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r36184 Monday 2nd March, 2015 at 15:59:17 UTC by Carl
(mess) pasogo: some cleanup (nw)
[src/emu/cpu/nec]necinstr.inc
[src/mess/drivers]pasogo.c

trunk/src/emu/cpu/nec/necinstr.inc
r244695r244696
533533OP( 0xd5, i_aad    ) { FETCH(); Breg(AL) = Breg(AH) * 10 + Breg(AL); Breg(AH) = 0; SetSZPF_Byte(Breg(AL)); CLKS(7,7,8); }
534534OP( 0xd6, i_setalc ) { Breg(AL) = (CF)?0xff:0x00; m_icount-=3; logerror("%06x: Undefined opcode (SETALC)\n",PC()); }
535535OP( 0xd7, i_trans  ) { UINT32 dest = (Wreg(BW)+Breg(AL))&0xffff; Breg(AL) = GetMemB(DS0, dest); CLKS(9,9,5); }
536OP( 0xd8, i_fpo    ) { GetModRM; m_icount-=2;  logerror("%06x: Unimplemented floating point control %04x\n",PC(),ModRM); }
536OP( 0xd8, i_fpo    ) { GetModRM; GetRMByte(ModRM); m_icount-=2;  logerror("%06x: Unimplemented floating point control %04x\n",PC(),ModRM); }
537537
538538OP( 0xe0, i_loopne ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if (!ZF && Wreg(CW)) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(14,14,6); } else CLKS(5,5,3); }
539539OP( 0xe1, i_loope  ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if ( ZF && Wreg(CW)) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(14,14,6); } else CLKS(5,5,3); }
trunk/src/mess/drivers/pasogo.c
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101101
102102#include "emu.h"
103103#include "cpu/nec/nec.h"
104#include "machine/pic8259.h"
105#include "machine/pit8253.h"
106#include "machine/am9517a.h"
107#include "machine/i8255.h"
108#include "sound/speaker.h"
109104#include "bus/generic/slot.h"
110105#include "bus/generic/carts.h"
106#include "machine/bankdev.h"
107#include "includes/genpc.h"
111108
112109
113110/*
114111  rtc interrupt irq 2
115112 */
116113
117struct vg230_t
118{
119   UINT8 index;
120   UINT8 data[0x100];
121   struct {
122      UINT16 data;
123   } bios_timer; // 1.19 MHz tclk signal
124   struct {
125      int seconds, minutes, hours, days;
126      int alarm_seconds, alarm_minutes, alarm_hours, alarm_days;
127114
128      int onehertz_interrupt_on;
129      int onehertz_interrupt_request;
130      int alarm_interrupt_on;
131      int alarm_interrupt_request;
132   } rtc;
133   struct {
134      int write_protected;
135   } pmu;
136};
137
138struct ems_t
139{
140   UINT8 data;
141   int index;
142   struct {
143      UINT8 data[2];
144      int address;
145      int type;
146      int on;
147   } mapper[26];
148};
149
150115class pasogo_state : public driver_device
151116{
152117public:
153118   pasogo_state(const machine_config &mconfig, device_type type, const char *tag)
154119      : driver_device(mconfig, type, tag)
155120      , m_maincpu(*this, "maincpu")
156      , m_pic8259(*this, "pic8259")
157      , m_dma8237(*this, "dma8237")
158      , m_pit8253(*this, "pit8254")
159      , m_speaker(*this, "speaker")
160121      , m_cart(*this, "cartslot")
122      , m_ems(*this, "ems")
123      , m_vram(*this, "vram")
161124   { }
162125
163126   required_device<cpu_device> m_maincpu;
164   required_device<pic8259_device> m_pic8259;
165   required_device<am9517a_device> m_dma8237;
166   required_device<pit8254_device> m_pit8253;
167   required_device<speaker_sound_device> m_speaker;
168127   required_device<generic_slot_device> m_cart;
128   required_device<address_map_bank_device> m_ems;
129   required_shared_ptr<UINT16> m_vram;
169130
170   DECLARE_READ8_MEMBER(ems_r);
171   DECLARE_WRITE8_MEMBER(ems_w);
131   DECLARE_READ16_MEMBER(ems_r);
132   DECLARE_WRITE16_MEMBER(ems_w);
133   DECLARE_READ16_MEMBER(emsram_r);
134   DECLARE_WRITE16_MEMBER(emsram_w);
172135   DECLARE_READ8_MEMBER(vg230_io_r);
173136   DECLARE_WRITE8_MEMBER(vg230_io_w);
174   vg230_t m_vg230;
175   ems_t m_ems;
176   DECLARE_DRIVER_INIT(pasogo);
177   virtual void machine_reset();
137
138   struct
139   {
140      UINT8 index;
141      UINT8 data[0x100];
142      struct {
143         UINT16 data;
144      } bios_timer; // 1.19 MHz tclk signal
145      struct {
146         int seconds, minutes, hours, days;
147         int alarm_seconds, alarm_minutes, alarm_hours, alarm_days;
148
149         int onehertz_interrupt_on;
150         int onehertz_interrupt_request;
151         int alarm_interrupt_on;
152         int alarm_interrupt_request;
153      } rtc;
154      struct {
155         int write_protected;
156      } pmu;
157   } m_vg230;
158
159   void machine_reset();
160   void machine_start();
161
178162   DECLARE_PALETTE_INIT(pasogo);
179163   UINT32 screen_update_pasogo(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
180164   INTERRUPT_GEN_MEMBER(pasogo_interrupt);
181165   TIMER_DEVICE_CALLBACK_MEMBER(vg230_timer);
182   void vg230_reset();
183   void vg230_init();
184   DECLARE_READ8_MEMBER( page_r );
185   DECLARE_WRITE8_MEMBER( page_w );
186   DECLARE_WRITE_LINE_MEMBER( speaker_set_spkrdata );
187   DECLARE_WRITE_LINE_MEMBER( pit8253_out1_changed );
188   DECLARE_WRITE_LINE_MEMBER( pit8253_out2_changed );
189   DECLARE_WRITE_LINE_MEMBER( dma_hrq_changed );
190   DECLARE_WRITE_LINE_MEMBER( dma8237_out_eop );
191   DECLARE_READ8_MEMBER( dma_read_byte );
192   DECLARE_WRITE8_MEMBER( dma_write_byte );
193   DECLARE_READ8_MEMBER( dma8237_1_dack_r );
194   DECLARE_READ8_MEMBER( dma8237_2_dack_r );
195   DECLARE_READ8_MEMBER( dma8237_3_dack_r );
196   DECLARE_WRITE8_MEMBER( dma8237_0_dack_w );
197   DECLARE_WRITE8_MEMBER( dma8237_1_dack_w );
198   DECLARE_WRITE8_MEMBER( dma8237_2_dack_w );
199   DECLARE_WRITE8_MEMBER( dma8237_3_dack_w );
200   void select_dma_channel(int channel, bool state);
201   DECLARE_WRITE_LINE_MEMBER( dack0_w ) { select_dma_channel(0, state); }
202   DECLARE_WRITE_LINE_MEMBER( dack1_w ) { select_dma_channel(1, state); }
203   DECLARE_WRITE_LINE_MEMBER( dack2_w ) { select_dma_channel(2, state); }
204   DECLARE_WRITE_LINE_MEMBER( dack3_w ) { select_dma_channel(3, state); }
205   DECLARE_READ8_MEMBER( ppi_porta_r );
206   DECLARE_READ8_MEMBER( ppi_portc_r );
207   DECLARE_WRITE8_MEMBER( ppi_portb_w );
208166
209protected:
210   UINT8 m_u73_q2;
211   UINT8 m_out1;
212   int m_dma_channel;
213   bool m_cur_eop;
214   UINT8 m_dma_offset[4];
215   UINT8 m_pc_spkrdata;
216   UINT8 m_pit_out2;
217
218   memory_region *m_maincpu_rom;
219167   memory_region *m_cart_rom;
220
221   int m_ppi_portc_switch_high;
222   int m_ppi_speaker;
223   int m_ppi_keyboard_clear;
224   UINT8 m_ppi_keyb_clock;
225   UINT8 m_ppi_portb;
226   UINT8 m_ppi_clock_signal;
227   UINT8 m_ppi_data_signal;
228   UINT8 m_ppi_shift_register;
229   UINT8 m_ppi_shift_enable;
230
168   UINT8 m_ems_index;
169   UINT16 m_ems_bank[28];
231170};
232171
233172
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259198   }
260199}
261200
262void pasogo_state::vg230_reset()
201void pasogo_state::machine_start()
263202{
264203   system_time systime;
265204
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275214   m_vg230.bios_timer.data=0x7200; // HACK
276215}
277216
278void pasogo_state::vg230_init()
279{
280   vg230_reset();
281}
282
283
284217READ8_MEMBER( pasogo_state::vg230_io_r )
285218{
286219   int log = TRUE;
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439372}
440373
441374
442READ8_MEMBER( pasogo_state::ems_r )
375READ16_MEMBER( pasogo_state::ems_r )
443376{
444377   UINT8 data = 0;
378   UINT8 index;
445379
446380   switch (offset)
447381   {
448382      case 0:
449         data = m_ems.data;
383         data = m_ems_index;
450384         break;
451385
452      case 2:
453      case 3:
454         data = m_ems.mapper[m_ems.index].data[offset & 1];
386      case 1:
387         index = (m_ems_index >> 2) & 0x1f;
388         data = m_ems_bank[index];
455389         break;
456390   }
457391   return data;
458392}
459393
460394
461WRITE8_MEMBER( pasogo_state::ems_w )
395WRITE16_MEMBER( pasogo_state::ems_w )
462396{
463   char bank[10];
397   UINT8 index;
464398
465399   switch (offset)
466400   {
467401   case 0:
468      m_ems.data = data;
469      switch (data & ~3)
470      {
471         case 0x80: m_ems.index = 0; break;
472         case 0x84: m_ems.index = 1; break;
473         case 0x88: m_ems.index = 2; break;
474         case 0x8c: m_ems.index = 3; break;
475         case 0x90: m_ems.index = 4; break;
476         case 0x94: m_ems.index = 5; break;
477         case 0x98: m_ems.index = 6; break;
478         case 0x9c: m_ems.index = 7; break;
479         case 0xa0: m_ems.index = 8; break;
480         case 0xa4: m_ems.index = 9; break;
481         case 0xa8: m_ems.index = 10; break;
482         case 0xac: m_ems.index = 11; break;
483         case 0xb0: m_ems.index = 12; break;
484         case 0xb4: m_ems.index = 13; break;
485         //case 0xb8: m_ems.index = 14; break;
486         //case 0xbc: m_ems.index = 15; break;
487         case 0xc0: m_ems.index = 14; break;
488         case 0xc4: m_ems.index = 15; break;
489         case 0xc8: m_ems.index = 16; break;
490         case 0xcc: m_ems.index = 17; break;
491         case 0xd0: m_ems.index = 18; break;
492         case 0xd4: m_ems.index = 19; break;
493         case 0xd8: m_ems.index = 20; break;
494         case 0xdc: m_ems.index = 21; break;
495         case 0xe0: m_ems.index = 22; break;
496         case 0xe4: m_ems.index = 23; break;
497         case 0xe8: m_ems.index = 24; break;
498         case 0xec: m_ems.index = 25; break;
499      }
402      m_ems_index = data;
500403      break;
501404
502   case 2:
503   case 3:
504      m_ems.mapper[m_ems.index].data[offset & 1] = data;
505      m_ems.mapper[m_ems.index].address = (m_ems.mapper[m_ems.index].data[0] << 14) | ((m_ems.mapper[m_ems.index].data[1] & 0xf) << 22);
506      m_ems.mapper[m_ems.index].on = m_ems.mapper[m_ems.index].data[1] & 0x80;
507      m_ems.mapper[m_ems.index].type = (m_ems.mapper[m_ems.index].data[1] & 0x70) >> 4;
508      logerror("%.5x ems mapper %d(%05x)on:%d type:%d address:%07x\n", (int)m_maincpu->pc(), m_ems.index, m_ems.data << 12,
509         m_ems.mapper[m_ems.index].on, m_ems.mapper[m_ems.index].type, m_ems.mapper[m_ems.index].address );
510
511      switch (m_ems.mapper[m_ems.index].type)
405   case 1:
406      index = (m_ems_index >> 2) & 0x1f;
407      if((index & ~1) == 10)
512408      {
513      case 0: /*external*/
514      case 1: /*ram*/
515         sprintf(bank, "bank%d", m_ems.index + 1);
516         membank(bank)->set_base(m_maincpu_rom->base() + (m_ems.mapper[m_ems.index].address & 0xfffff));
409         logerror("EMS mapping of CGA framebuffer\n");
517410         break;
518      case 3: /* rom 1 */
519      case 4: /* pc card a */
520      case 5: /* pc card b */
521      default:
411      }
412      else if(index >= 28)
413      {
414         logerror("EMS index out of range\n");
522415         break;
523      case 2:
524         sprintf(bank, "bank%d", m_ems.index + 1);
525         membank(bank)->set_base(m_cart_rom->base() + (m_ems.mapper[m_ems.index].address & 0xfffff));
526         break;
527416      }
417      COMBINE_DATA(&m_ems_bank[index]);
528418      break;
529419   }
530420}
531421
422READ16_MEMBER( pasogo_state::emsram_r )
423{
424   m_ems->set_bank(m_ems_bank[(offset >> 13) & 0x1f] & 0x7fff);
425   return m_ems->read16(space, offset & 0x1fff, mem_mask);
426}
532427
533static ADDRESS_MAP_START(pasogo_mem, AS_PROGRAM, 16, pasogo_state)
534   ADDRESS_MAP_GLOBAL_MASK(0xffFFF)
535   AM_RANGE(0x00000, 0x7ffff) AM_RAM
536   AM_RANGE(0x80000, 0x83fff) AM_RAMBANK("bank1")
537   AM_RANGE(0x84000, 0x87fff) AM_RAMBANK("bank2")
538   AM_RANGE(0x88000, 0x8bfff) AM_RAMBANK("bank3")
539   AM_RANGE(0x8c000, 0x8ffff) AM_RAMBANK("bank4")
540   AM_RANGE(0x90000, 0x93fff) AM_RAMBANK("bank5")
541   AM_RANGE(0x94000, 0x97fff) AM_RAMBANK("bank6")
542   AM_RANGE(0x98000, 0x9bfff) AM_RAMBANK("bank7")
543   AM_RANGE(0x9c000, 0x9ffff) AM_RAMBANK("bank8")
544   AM_RANGE(0xa0000, 0xa3fff) AM_RAMBANK("bank9")
545   AM_RANGE(0xa4000, 0xa7fff) AM_RAMBANK("bank10")
546   AM_RANGE(0xa8000, 0xabfff) AM_RAMBANK("bank11")
547   AM_RANGE(0xac000, 0xaffff) AM_RAMBANK("bank12")
548   AM_RANGE(0xb0000, 0xb3fff) AM_RAMBANK("bank13")
549   AM_RANGE(0xb4000, 0xb7fff) AM_RAMBANK("bank14")
550//  AM_RANGE(0xb8000, 0xbffff) AM_RAM
551   AM_RANGE(0xb8000, 0xbffff) AM_RAMBANK("bank28")
552   AM_RANGE(0xc0000, 0xc3fff) AM_RAMBANK("bank15")
553   AM_RANGE(0xc4000, 0xc7fff) AM_RAMBANK("bank16")
554   AM_RANGE(0xc8000, 0xcbfff) AM_RAMBANK("bank17")
555   AM_RANGE(0xcc000, 0xcffff) AM_RAMBANK("bank18")
556   AM_RANGE(0xd0000, 0xd3fff) AM_RAMBANK("bank19")
557   AM_RANGE(0xd4000, 0xd7fff) AM_RAMBANK("bank20")
558   AM_RANGE(0xd8000, 0xdbfff) AM_RAMBANK("bank21")
559   AM_RANGE(0xdc000, 0xdffff) AM_RAMBANK("bank22")
560   AM_RANGE(0xe0000, 0xe3fff) AM_RAMBANK("bank23")
561   AM_RANGE(0xe4000, 0xe7fff) AM_RAMBANK("bank24")
562   AM_RANGE(0xe8000, 0xebfff) AM_RAMBANK("bank25")
563   AM_RANGE(0xec000, 0xeffff) AM_RAMBANK("bank26")
428WRITE16_MEMBER( pasogo_state::emsram_w )
429{
430   m_ems->set_bank(m_ems_bank[(offset >> 13) & 0x1f] & 0x7fff);
431   m_ems->write16(space, offset & 0x1fff, data, mem_mask);
432}
564433
434static ADDRESS_MAP_START(emsbank_map, AS_PROGRAM, 16, pasogo_state)
435   AM_RANGE(0x04080000, 0x040fffff) AM_RAM
436   AM_RANGE(0x08000000, 0x080fffff) AM_ROMBANK("bank27")
437   AM_RANGE(0x10000000, 0x1000ffff) AM_RAM // cart ram?
438ADDRESS_MAP_END
439
440static ADDRESS_MAP_START(pasogo_mem, AS_PROGRAM, 16, pasogo_state)
441   AM_RANGE(0x00000, 0x7ffff) AM_RAMBANK("bank10")
442   AM_RANGE(0xb8000, 0xbffff) AM_RAM AM_SHARE("vram")
443   AM_RANGE(0x80000, 0xeffff) AM_READWRITE(emsram_r, emsram_w)
565444   AM_RANGE(0xf0000, 0xfffff) AM_ROMBANK("bank27")
566445ADDRESS_MAP_END
567446
568447
569448static ADDRESS_MAP_START(pasogo_io, AS_IO, 16, pasogo_state)
570//  ADDRESS_MAP_GLOBAL_MASK(0xfFFF)
571   AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237", am9517a_device, read, write, 0xffff)
572   AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE8("pic8259", pic8259_device, read, write, 0xffff)
573   AM_RANGE(0x26, 0x27) AM_READWRITE8(vg230_io_r, vg230_io_w, 0xffff)
574   AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE8("pit8254", pit8254_device, read, write, 0xffff)
575   AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE8("ppi8255", i8255_device, read, write, 0xffff)
576   AM_RANGE(0x6c, 0x6f) AM_READWRITE8(ems_r, ems_w, 0xffff)
449   AM_RANGE(0x0026, 0x0027) AM_READWRITE8(vg230_io_r, vg230_io_w, 0xffff)
450   AM_RANGE(0x006c, 0x006f) AM_READWRITE(ems_r, ems_w)
577451ADDRESS_MAP_END
578452
579453
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591465   PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("b") PORT_CODE(KEYCODE_B)
592466INPUT_PORTS_END
593467
594
595/* palette in red, green, blue tribles */
596468static const unsigned char pasogo_palette[][3] =
597469{
598470   { 0, 0, 0 },
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601473   { 255,255,255 }
602474};
603475
604
605476PALETTE_INIT_MEMBER(pasogo_state, pasogo)
606477{
607478   int i;
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616487UINT32 pasogo_state::screen_update_pasogo(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
617488{
618489   //static int width = -1, height = -1;
619   UINT8 *rom = m_maincpu_rom->base() + 0xb8000;
490   UINT8 *rom = (UINT8 *)m_vram.target();
620491   static const UINT16 c[] = { 3, 0 };
621492   int x,y;
622493//  plot_box(bitmap, 0, 0, 64/*bitmap.width*/, bitmap.height, 0);
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679550void pasogo_state::machine_reset()
680551{
681552   astring region_tag;
682   m_maincpu_rom = memregion("maincpu");
683553   m_cart_rom = memregion(region_tag.cpy(m_cart->tag()).cat(GENERIC_ROM_REGION_TAG));
684554   if (!m_cart_rom)    // this should never happen, since we make carts mandatory!
685555      m_cart_rom = memregion("maincpu");
686556
687557   membank("bank27")->set_base(m_cart_rom->base());
688   membank("bank28")->set_base(m_maincpu_rom->base() + 0xb8000/*?*/);
689
690   m_u73_q2 = 0;
691   m_out1 = 2; // initial state of pit output is undefined
692   m_pc_spkrdata = 0;
693   m_pit_out2 = 1;
694   m_dma_channel = -1;
695   m_cur_eop = false;
558   m_ems_index = 0;
559   memset(m_ems_bank, 0, sizeof(m_ems_bank));
696560}
697561
698
699WRITE_LINE_MEMBER(pasogo_state::speaker_set_spkrdata)
700{
701   m_pc_spkrdata = state ? 1 : 0;
702   m_speaker->level_w(m_pc_spkrdata & m_pit_out2);
703}
704
705
706WRITE_LINE_MEMBER( pasogo_state::pit8253_out1_changed )
707{
708   /* Trigger DMA channel #0 */
709   if ( m_out1 == 0 && state == 1 && m_u73_q2 == 0 )
710   {
711      m_u73_q2 = 1;
712      m_dma8237->dreq0_w( m_u73_q2 );
713   }
714   m_out1 = state;
715}
716
717
718WRITE_LINE_MEMBER( pasogo_state::pit8253_out2_changed )
719{
720   m_pit_out2 = state ? 1 : 0;
721   m_speaker->level_w(m_pc_spkrdata & m_pit_out2);
722}
723
724
725READ8_MEMBER( pasogo_state::page_r )
726{
727   return 0xff;
728}
729
730
731WRITE8_MEMBER( pasogo_state::page_w )
732{
733   switch(offset % 4)
734   {
735      case 1:
736         m_dma_offset[2] = data;
737         break;
738      case 2:
739         m_dma_offset[3] = data;
740         break;
741      case 3:
742         m_dma_offset[0] = m_dma_offset[1] = data;
743         break;
744   }
745}
746
747
748WRITE_LINE_MEMBER( pasogo_state::dma_hrq_changed )
749{
750   m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
751
752   /* Assert HLDA */
753   m_dma8237->hack_w(state);
754}
755
756WRITE_LINE_MEMBER( pasogo_state::dma8237_out_eop )
757{
758   m_cur_eop = state == ASSERT_LINE;
759   if(m_dma_channel != -1 && m_cur_eop)
760   {
761      //m_isabus->eop_w(m_dma_channel, m_cur_eop ? ASSERT_LINE : CLEAR_LINE );
762   }
763}
764
765READ8_MEMBER( pasogo_state::dma_read_byte )
766{
767   if(m_dma_channel == -1)
768      return 0xff;
769   address_space &spaceio = m_maincpu->space(AS_PROGRAM);
770   offs_t page_offset = (((offs_t) m_dma_offset[m_dma_channel]) << 16) & 0x0F0000;
771   return spaceio.read_byte( page_offset + offset);
772}
773
774WRITE8_MEMBER( pasogo_state::dma_write_byte )
775{
776   if(m_dma_channel == -1)
777      return;
778   address_space &spaceio = m_maincpu->space(AS_PROGRAM);
779   offs_t page_offset = (((offs_t) m_dma_offset[m_dma_channel]) << 16) & 0x0F0000;
780
781   spaceio.write_byte( page_offset + offset, data);
782}
783
784
785READ8_MEMBER( pasogo_state::dma8237_1_dack_r )
786{
787   return 0;
788   //return m_isabus->dack_r(1);
789}
790
791
792READ8_MEMBER( pasogo_state::dma8237_2_dack_r )
793{
794   return 0;
795   //return m_isabus->dack_r(2);
796}
797
798
799READ8_MEMBER( pasogo_state::dma8237_3_dack_r )
800{
801   return 0;
802   //return m_isabus->dack_r(3);
803}
804
805
806WRITE8_MEMBER( pasogo_state::dma8237_0_dack_w )
807{
808   m_u73_q2 = 0;
809   m_dma8237->dreq0_w( m_u73_q2 );
810}
811
812
813WRITE8_MEMBER( pasogo_state::dma8237_1_dack_w )
814{
815   //m_isabus->dack_w(1,data);
816}
817
818
819WRITE8_MEMBER( pasogo_state::dma8237_2_dack_w )
820{
821   //m_isabus->dack_w(2,data);
822}
823
824
825WRITE8_MEMBER( pasogo_state::dma8237_3_dack_w )
826{
827   //m_isabus->dack_w(3,data);
828}
829
830
831void pasogo_state::select_dma_channel(int channel, bool state)
832{
833   if (!state)
834   {
835      m_dma_channel = channel;
836      if(m_cur_eop)
837      {
838         //m_isabus->eop_w(channel, ASSERT_LINE );
839      }
840   }
841   else if(m_dma_channel == channel)
842   {
843      m_dma_channel = -1;
844      if(m_cur_eop)
845      {
846         //m_isabus->eop_w(channel, CLEAR_LINE );
847      }
848   }
849}
850
851READ8_MEMBER (pasogo_state::ppi_porta_r)
852{
853   int data = 0xFF;
854   /* KB port A */
855   if (m_ppi_keyboard_clear)
856   {
857      //data = ioport("DSW0")->read();
858   }
859   else
860   {
861      data = m_ppi_shift_register;
862   }
863   return data;
864}
865
866
867READ8_MEMBER ( pasogo_state::ppi_portc_r )
868{
869   int data=0xff;
870
871   data&=~0x80; // no parity error
872   data&=~0x40; // no error on expansion board
873   /* KB port C: equipment flags */
874   if (m_ppi_portc_switch_high)
875   {
876      /* read hi nibble of S2 */
877      //data = (data & 0xf0) | ((ioport("DSW0")->read() >> 4) & 0x0f);
878   }
879   else
880   {
881      /* read lo nibble of S2 */
882      //data = (data & 0xf0) | (ioport("DSW0")->read() & 0x0f);
883   }
884
885   if ( m_ppi_portb & 0x01 )
886   {
887      data = ( data & ~0x10 ) | ( m_pit_out2 ? 0x10 : 0x00 );
888   }
889   data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
890
891   return data;
892}
893
894
895WRITE8_MEMBER( pasogo_state::ppi_portb_w )
896{
897   /* PPI controller port B*/
898   m_ppi_portb = data;
899   m_ppi_portc_switch_high = data & 0x08;
900   m_ppi_keyboard_clear = data & 0x80;
901   m_ppi_keyb_clock = data & 0x40;
902   m_pit8253->write_gate2(BIT(data, 0));
903   speaker_set_spkrdata( data & 0x02 );
904
905   m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
906   //m_pc_kbdc->clock_write_from_mb(m_ppi_clock_signal);
907
908   /* If PB7 is set clear the shift register and reset the IRQ line */
909   if ( m_ppi_keyboard_clear )
910   {
911      m_pic8259->ir1_w(0);
912      m_ppi_shift_register = 0;
913      m_ppi_shift_enable = 1;
914   }
915}
916
917
918562static MACHINE_CONFIG_START( pasogo, pasogo_state )
919563
920564   MCFG_CPU_ADD("maincpu", V30, XTAL_32_22MHz/2)
921565   MCFG_CPU_PROGRAM_MAP(pasogo_mem)
922   MCFG_CPU_IO_MAP( pasogo_io)
566   MCFG_CPU_IO_MAP(pasogo_io)
923567   MCFG_CPU_VBLANK_INT_DRIVER("screen", pasogo_state,  pasogo_interrupt)
924   MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
568   MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("mb:pic8259", pic8259_device, inta_cb)
925569
926   MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
927   MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
928   MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
929   MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
930   MCFG_PIT8253_OUT1_HANDLER(WRITELINE(pasogo_state, pit8253_out1_changed))
931   MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
932   MCFG_PIT8253_OUT2_HANDLER(WRITELINE(pasogo_state, pit8253_out2_changed))
570   MCFG_DEVICE_ADD("ems", ADDRESS_MAP_BANK, 0)
571   MCFG_DEVICE_PROGRAM_MAP(emsbank_map)
572   MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
573   MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
574   MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000)
933575
934   MCFG_PIC8259_ADD("pic8259", INPUTLINE("maincpu", 0), VCC, NULL)
576   MCFG_IBM5160_MOTHERBOARD_ADD("mb", "maincpu")
935577
936   MCFG_DEVICE_ADD("dma8237", AM9517A, XTAL_14_31818MHz/3)
937   MCFG_I8237_OUT_HREQ_CB(WRITELINE(pasogo_state, dma_hrq_changed))
938   MCFG_I8237_OUT_EOP_CB(WRITELINE(pasogo_state, dma8237_out_eop))
939   MCFG_I8237_IN_MEMR_CB(READ8(pasogo_state, dma_read_byte))
940   MCFG_I8237_OUT_MEMW_CB(WRITE8(pasogo_state, dma_write_byte))
941   MCFG_I8237_IN_IOR_1_CB(READ8(pasogo_state, dma8237_1_dack_r))
942   MCFG_I8237_IN_IOR_2_CB(READ8(pasogo_state, dma8237_2_dack_r))
943   MCFG_I8237_IN_IOR_3_CB(READ8(pasogo_state, dma8237_3_dack_r))
944   MCFG_I8237_OUT_IOW_0_CB(WRITE8(pasogo_state, dma8237_0_dack_w))
945   MCFG_I8237_OUT_IOW_1_CB(WRITE8(pasogo_state, dma8237_1_dack_w))
946   MCFG_I8237_OUT_IOW_2_CB(WRITE8(pasogo_state, dma8237_2_dack_w))
947   MCFG_I8237_OUT_IOW_3_CB(WRITE8(pasogo_state, dma8237_3_dack_w))
948   MCFG_I8237_OUT_DACK_0_CB(WRITELINE(pasogo_state, dack0_w))
949   MCFG_I8237_OUT_DACK_1_CB(WRITELINE(pasogo_state, dack1_w))
950   MCFG_I8237_OUT_DACK_2_CB(WRITELINE(pasogo_state, dack2_w))
951   MCFG_I8237_OUT_DACK_3_CB(WRITELINE(pasogo_state, dack3_w))
578   MCFG_RAM_ADD(RAM_TAG)
579   MCFG_RAM_DEFAULT_SIZE("512K")
952580
953   MCFG_DEVICE_ADD("ppi8255", I8255, 0)
954   MCFG_I8255_IN_PORTA_CB(READ8(pasogo_state, ppi_porta_r))
955   MCFG_I8255_OUT_PORTB_CB(WRITE8(pasogo_state, ppi_portb_w))
956   MCFG_I8255_IN_PORTC_CB(READ8(pasogo_state, ppi_portc_r))
957
581   // It's a CGA device right so lets use isa_cga!  Well, not so much.
582   // The carts use vg230 specific registers and mostly ignore the mc6845.
958583   MCFG_SCREEN_ADD("screen", LCD)
959584   MCFG_SCREEN_REFRESH_RATE(60)
960585   MCFG_SCREEN_SIZE(640, 400)
961586   MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 400-1)
962587   MCFG_SCREEN_UPDATE_DRIVER(pasogo_state, screen_update_pasogo)
963588   MCFG_SCREEN_PALETTE("palette")
964
965589   MCFG_PALETTE_ADD("palette", ARRAY_LENGTH(pasogo_palette))
966590   MCFG_PALETTE_INIT_OWNER(pasogo_state, pasogo)
967591
968   MCFG_SPEAKER_STANDARD_MONO("mono")
969   MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
970   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
971
972592   MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "pasogo_cart")
973593   MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH)
974594   MCFG_GENERIC_MANDATORY
r244695r244696
978598   MCFG_TIMER_DRIVER_ADD_PERIODIC("vg230_timer", pasogo_state, vg230_timer, attotime::from_hz(1))
979599MACHINE_CONFIG_END
980600
981
982ROM_START(pasogo)
983   ROM_REGION(0x100000,"maincpu", ROMREGION_ERASEFF) // 1 megabyte dram?
601ROM_START( pasogo )
602   ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASEFF )
984603ROM_END
985604
986
987DRIVER_INIT_MEMBER(pasogo_state,pasogo)
988{
989   vg230_init();
990   memset(&m_ems, 0, sizeof(m_ems));
991}
992
993605//    YEAR   NAME    PARENT  COMPAT    MACHINE   INPUT     INIT      COMPANY  FULLNAME          FLAGS
994CONS( 1996, pasogo,   0,      0,       pasogo,  pasogo, pasogo_state,    pasogo,   "KOEI", "PasoGo", GAME_NO_SOUND|GAME_NOT_WORKING)
606CONS( 1996, pasogo,   0,      0,       pasogo,  pasogo, driver_device,    0,   "KOEI", "PasoGo", GAME_NO_SOUND|GAME_NOT_WORKING)

https://github.com/mamedev/mame/commit/99a78ab4a7b633873848bd8c2e8bf2181f7c5a00

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