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r36183 Monday 2nd March, 2015 at 15:22:34 UTC by Andrew Gardner
A few more set_base removals (nw)

[src/mame/drivers]	srmp6.c srumbler.c suna16.c
[src/mame/includes]	suna16.h

trunk/src/mame/drivers/srmp6.c

r244694	r244695
107	107	DECLARE_WRITE16_MEMBER(paletteram_w);
108	108	DECLARE_READ16_MEMBER(srmp6_irq_ack_r);
109	109	DECLARE_DRIVER_INIT(INIT);
	110	virtual void machine_start();
110	111	virtual void video_start();
111	112	UINT32 screen_update_srmp6(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
112	113	void update_palette();
r244694	r244695
306	307	Main CPU memory handlers
307	308	***************************************************************************/
308	309
	310	void srmp6_state::machine_start()
	311	{
	312	membank("bank1")->configure_entries(0, 16, memregion("nile")->base(), 0x200000);
	313	}
	314
309	315	WRITE16_MEMBER(srmp6_state::srmp6_input_select_w)
310	316	{
311	317	m_input_select = data & 0x0f;
r244694	r244695
313	319
314	320	READ16_MEMBER(srmp6_state::srmp6_inputs_r)
315	321	{
316		if (offset == 0)            // DSW
	322	if (offset == 0) // DSW
317	323	return ioport("DSW")->read();
318	324
319	325	switch (m_input_select) // inputs
r244694	r244695
334	340	{
335	341	case 0x5e/2: // bank switch, used by ROM check
336	342	{
337		const UINT8 *rom = memregion("nile")->base();
338		LOG(("%x\n",data));
339		membank("bank1")->set_base((UINT16 *)(rom + (data & 0x0f)*0x200000));
	343	LOG(("%x\n",data));
	344	membank("bank1")->set_entry(data & 0x0f);
340	345	break;
341	346	}
342	347
r244694	r244695
544	549	static ADDRESS_MAP_START( srmp6_map, AS_PROGRAM, 16, srmp6_state )
545	550	AM_RANGE(0x000000, 0x0fffff) AM_ROM
546	551	AM_RANGE(0x200000, 0x23ffff) AM_RAM                 // work RAM
547		AM_RANGE(0x600000, 0x7fffff) AM_ROMBANK("bank1")        // banked ROM (used by ROM check)
	552	AM_RANGE(0x600000, 0x7fffff) AM_ROMBANK("bank1")    // banked ROM (used by ROM check)
548	553	AM_RANGE(0x800000, 0x9fffff) AM_ROM AM_REGION("user1", 0)
549	554
550	555	AM_RANGE(0x300000, 0x300005) AM_READWRITE(srmp6_inputs_r, srmp6_input_select_w)     // inputs

trunk/src/mame/drivers/srumbler.c

r244694	r244695
27	27	Note that 5000-8fff can be either ROM or RAM, so we should handle
28	28	that as well to be 100% accurate.
29	29	*/
30		int i;
31		UINT8 *ROM = memregion("user1")->base();
32	30	UINT8 *prom1 = memregion("proms")->base() + (data & 0xf0);
33	31	UINT8 *prom2 = memregion("proms")->base() + 0x100 + ((data & 0x0f) << 4);
34	32
35		for (i = 0x05;i < 0x10;i++)
	33	for (int i = 0x05;i < 0x10;i++)
36	34	{
	35	/* bit 2 of prom1 selects ROM or RAM - not supported */
37	36	int bank = ((prom1[i] & 0x03) << 4) | (prom2[i] & 0x0f);
38		char bankname[10];
39		/* bit 2 of prom1 selects ROM or RAM - not supported */
40	37
	38	char bankname[10];
41	39	sprintf(bankname, "%04x", i*0x1000);
42		membank(bankname)->set_base(&ROM[bank*0x1000]);
	40	membank(bankname)->set_entry(bank);
43	41	}
44	42	}
45	43
46	44	void srumbler_state::machine_start()
47	45	{
48		address_space &space = m_maincpu->space(AS_PROGRAM);
49		/* initialize banked ROM pointers */
50		srumbler_bankswitch_w(space,0,0);
	46	for (int i = 0x05; i < 0x10; i++)
	47	{
	48	char bankname[10];
	49	sprintf(bankname, "%04x", i*0x1000);
	50	membank(bankname)->configure_entries(0, 64, memregion("user1")->base(), 0x1000);
	51	}
	52
	53	/* initialize banked ROM pointers */
	54	srumbler_bankswitch_w(m_maincpu->space(AS_PROGRAM), 0, 0);
51	55	}
52	56
53	57	TIMER_DEVICE_CALLBACK_MEMBER(srumbler_state::srumbler_interrupt)
r244694	r244695
84	88	AM_RANGE(0x400e, 0x400e) AM_WRITE(soundlatch_byte_w)
85	89	AM_RANGE(0x5000, 0x5fff) AM_ROMBANK("5000") AM_WRITE(srumbler_foreground_w) AM_SHARE("foregroundram") /* Banked ROM */
86	90	AM_RANGE(0x6000, 0x6fff) AM_ROMBANK("6000") /* Banked ROM */
87		AM_RANGE(0x6000, 0x6fff) AM_WRITENOP    /* Video RAM 2 ??? (not used) */
	91	AM_RANGE(0x6000, 0x6fff) AM_WRITENOP        /* Video RAM 2 ??? (not used) */
88	92	AM_RANGE(0x7000, 0x7fff) AM_ROMBANK("7000") /* Banked ROM */
89	93	AM_RANGE(0x7000, 0x73ff) AM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
90	94	AM_RANGE(0x8000, 0x8fff) AM_ROMBANK("8000") /* Banked ROM */

trunk/src/mame/drivers/suna16.c

r244694	r244695
288	288	Back Street Soccer
289	289	***************************************************************************/
290	290
	291	MACHINE_START_MEMBER(suna16_state, bssoccer)
	292	{
	293	membank("bank1")->configure_entries(0, 8, memregion("pcm1")->base() + 0x1000, 0x10000);
	294	membank("bank2")->configure_entries(0, 8, memregion("pcm2")->base() + 0x1000, 0x10000);
	295	}
	296
291	297	/* Bank Switching */
292	298
293	299	WRITE8_MEMBER(suna16_state::bssoccer_pcm_1_bankswitch_w)
294	300	{
295		UINT8 *RAM = memregion("pcm1")->base();
296		int bank = data & 7;
	301	const int bank = data & 7;
297	302	if (bank & ~7)  logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", space.device().safe_pc(), data);
298		membank("bank1")->set_base(&RAM[bank * 0x10000 + 0x1000]);
	303	printf("%d %d\n", 1, bank);
	304	membank("bank1")->set_entry(bank);
299	305	}
300	306
301	307	WRITE8_MEMBER(suna16_state::bssoccer_pcm_2_bankswitch_w)
302	308	{
303		UINT8 *RAM = memregion("pcm2")->base();
304		int bank = data & 7;
	309	const int bank = data & 7;
305	310	if (bank & ~7)  logerror("CPU#3 PC %06X - ROM bank unknown bits: %02X\n", space.device().safe_pc(), data);
306		membank("bank2")->set_base(&RAM[bank * 0x10000 + 0x1000]);
	311	printf("%d %d\n", 2, bank);
	312	membank("bank2")->set_entry(bank);
307	313	}
308	314
309	315
r244694	r244695
366	372
367	373	WRITE8_MEMBER(suna16_state::uballoon_pcm_1_bankswitch_w)
368	374	{
369		UINT8 *RAM = memregion("pcm1")->base();
370		int bank = data & 1;
	375	const int bank = data & 1;
371	376	if (bank & ~1)  logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", space.device().safe_pc(), data);
372		membank("bank1")->set_base(&RAM[bank * 0x10000 + 0x400]);
	377	membank("bank1")->set_entry(bank);
373	378	}
374	379
375	380	/* Memory maps: Yes, *no* RAM */
r244694	r244695
387	392	AM_RANGE(0x03, 0x03) AM_WRITE(uballoon_pcm_1_bankswitch_w)  // Rom Bank
388	393	ADDRESS_MAP_END
389	394
	395	MACHINE_START_MEMBER(suna16_state,uballoon)
	396	{
	397	membank("bank1")->configure_entries(0, 2, memregion("pcm1")->base() + 0x400, 0x10000);
	398	}
	399
390	400	MACHINE_RESET_MEMBER(suna16_state,uballoon)
391	401	{
392	402	address_space &space = m_maincpu->space(AS_PROGRAM);
r244694	r244695
812	822
813	823	MCFG_QUANTUM_TIME(attotime::from_hz(6000))
814	824
	825	MCFG_MACHINE_START_OVERRIDE(suna16_state,bssoccer)
	826
815	827	/* video hardware */
816	828	MCFG_SCREEN_ADD("screen", RASTER)
817	829	MCFG_SCREEN_REFRESH_RATE(60)
r244694	r244695
869	881
870	882	MCFG_QUANTUM_TIME(attotime::from_hz(6000))
871	883
	884	MCFG_MACHINE_START_OVERRIDE(suna16_state,uballoon)
872	885	MCFG_MACHINE_RESET_OVERRIDE(suna16_state,uballoon)
873	886
874	887	/* video hardware */

trunk/src/mame/includes/suna16.h

r244694	r244695
46	46	DECLARE_WRITE16_MEMBER(bestbest_flipscreen_w);
47	47	DECLARE_READ16_MEMBER(suna16_paletteram16_r);
48	48	DECLARE_WRITE16_MEMBER(suna16_paletteram16_w);
	49	DECLARE_MACHINE_START(bssoccer);
49	50	DECLARE_WRITE8_MEMBER(bssoccer_DAC1_w);
50	51	DECLARE_WRITE8_MEMBER(bssoccer_DAC2_w);
51	52	DECLARE_WRITE8_MEMBER(bssoccer_DAC3_w);
r244694	r244695
54	55	DECLARE_DRIVER_INIT(uballoon);
55	56	virtual void video_start();
56	57	DECLARE_MACHINE_RESET(uballoon);
	58	DECLARE_MACHINE_START(uballoon);
57	59	UINT32 screen_update_suna16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
58	60	UINT32 screen_update_bestbest(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
59	61	TIMER_DEVICE_CALLBACK_MEMBER(bssoccer_interrupt);

https://github.com/mamedev/mame/commit/bbeb8de3bb4514f67bef5b07dd356edf6c91d428

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199869 Revisions

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