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r33872 Sunday 14th December, 2014 at 12:56:06 UTC by Jürgen Buchmüller
Add preliminary emulation of the Rockwell A17XX chips

[src/emu/machine]

ra17xx.c* ra17xx.h*

trunk/src/emu/machine/ra17xx.c

r0	r242384
	1	/**********************************************************************
	2
	3	Rockwell A17XX ROM, RAM and I/O chip
	4
	5	Copyright Nicola Salmoria and the MAME Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	A ROM of 2048 x 8 bits is addressed whenever the RRSEL line
	9	(ROM/RAM select) is 0. A RAM of 128 x 4 bit is addressed when
	10	RRSEL is 1. The 16 I/O ports are addressed when the WI/O line
	11	is 1, i.e. whenever the CPU executes an IOL instruction.
	12	There are two basic I/O instructions:
	13	SES = Select Enable Status and SOS = Select Output Status
	14	The lower 4 bits of the I/O address select one of 16 I/O lines.
	15
	16	There are at most two A17XX per system, one for the lower
	17	ROM and RAM portion and one for the higher.
	18
	19	I/O section instructions
	20
	21	Menmonic  I/O bus            Accu      Description
	22	------------------------------------------------------------------
	23	SES       0 S S 0 X X X 0    1 X X X   Enable all outputs
	24	Acuu:3 <- I/O(BL)
	25	------------------------------------------------------------------
	26	SES       0 S S 0 X X X 0    0 X X X   Disable all outputs
	27	Acuu:3 <- I/O(BL)
	28	------------------------------------------------------------------
	29	SOS       0 S S 0 X X X 1    1 X X X   I/O(BL) <- 1
	30	Acuu:3 <- I/O(BL)
	31	------------------------------------------------------------------
	32	SOS       0 S S 0 X X X 1    0 X X X   I/O(BL) <- 0
	33	Acuu:3 <- I/O(BL)
	34
	35	This device emulation takes care of the I/O commands, not the
	36	ROM and RAM, because these are emulated using the generic MAME
	37	memory system.
	38	**********************************************************************/
	39
	40	#include "emu.h"
	41	#include "machine/ra17xx.h"
	42
	43	#define   VERBOSE   1
	44	#if VERBOSE
	45	#define LOG(x) logerror x
	46	#else
	47	#define LOG(x)
	48	#endif
	49
	50	/*************************************
	51	*
	52	*  Device interface
	53	*
	54	*************************************/
	55
	56	const device_type RA17XX = &device_creator<ra17xx_device>;
	57
	58	ra17xx_device::ra17xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	59	: device_t(mconfig, RA17XX, "Rockwell A17XX", tag, owner, clock, "ra17xx", __FILE__),
	60	m_line(),
	61	m_enable(false),
	62	m_iord(*this),
	63	m_iowr(*this)
	64	{
	65	}
	66
	67	/**
	68	* @brief ra17xx_device::device_start device-specific startup
	69	*/
	70	void ra17xx_device::device_start()
	71	{
	72	m_iord.resolve();
	73	m_iowr.resolve();
	74
	75	save_item(NAME(m_line));
	76	}
	77
	78	/**
	79	* @brief ra17xx_device::device_reset device-specific reset
	80	*/
	81	void ra17xx_device::device_reset()
	82	{
	83	memset(m_line, 0, sizeof(m_line));
	84	}
	85
	86
	87	/*************************************
	88	*
	89	*  Constants
	90	*
	91	*************************************/
	92
	93	/*************************************
	94	*
	95	*  Command access handlers
	96	*
	97	*************************************/
	98
	99	WRITE8_MEMBER( ra17xx_device::io_w )
	100	{
	101	assert(offset < 16);
	102	m_bl = (data >> 4) & 15;    // BL on the data bus most significant bits
	103	if (offset & 1) {
	104	// SOS command
	105	if (data & (1 << 3)) {
	106	m_line[m_bl] = 1;   // enable output
	107	if (m_enable)
	108	m_iowr(m_bl, 1);
	109	} else {
	110	m_line[m_bl] = 0;   // disable output
	111	if (m_enable)
	112	m_iowr(m_bl, 0);
	113	}
	114	} else {
	115	// SES command
	116	if (data & (1 << 3)) {
	117	// enable all outputs
	118	m_enable = true;
	119	for (int i = 0; i < 16; i++)
	120	m_iowr(i, m_line[i], 1);
	121	} else {
	122	// disable all outputs
	123	m_enable = false;
	124	}
	125	}
	126	}
	127
	128
	129	READ8_MEMBER( ra17xx_device::io_r )
	130	{
	131	assert(offset < 16);
	132	return (m_iord(m_bl) & 1) ? 0x0f : 0x07;
	133	}

trunk/src/emu/machine/ra17xx.h

r0	r242384
	1	/**********************************************************************
	2
	3	Rockwell RA17xx (e.g. A1752, A1753) ROM, RAM and I/O chip
	4
	5	Juergen Buchmueller <pullmoll@t-online.de>
	6
	7	The device integrates a 2048 x 8 ROM, a 128 x 4 RAM and
	8	and 16 I/O ports at one of the port ranges 00 ... 0f,
	9	20 ... 2f, 40 ... 4f or 60 ... 6f.
	10
	11	**********************************************************************/
	12
	13	#ifndef __RA17XX_H__
	14	#define __RA17XX_H__
	15
	16	#include "device.h"
	17
	18	/*************************************
	19	*
	20	*  Device configuration macros
	21	*
	22	*************************************/
	23
	24	/* Set the read line handler */
	25	#define MCFG_RA17XX_READ(_devcb) \
	26	ra17xx_device::set_iord(*device, DEVCB_##_devcb); \
	27
	28	/* Set the write line handler */
	29	#define MCFG_RA17XX_WRITE(_devcb) \
	30	ra17xx_device::set_iowr(*device, DEVCB_##_devcb); \
	31
	32	class ra17xx_device : public device_t
	33	{
	34	public:
	35	ra17xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	36	~ra17xx_device() {}
	37
	38	DECLARE_READ8_MEMBER ( io_r );
	39	DECLARE_WRITE8_MEMBER( io_w );
	40
	41	template<class _Object> static devcb_base &set_iord(device_t &device, _Object object) { return downcast<ra17xx_device &>(device).m_iord.set_callback(object); }
	42	template<class _Object> static devcb_base &set_iowr(device_t &device, _Object object) { return downcast<ra17xx_device &>(device).m_iowr.set_callback(object); }
	43	protected:
	44	// device-level overrides
	45	virtual void device_start();
	46	virtual void device_reset();
	47
	48	private:
	49	UINT8           m_line[16];   //!< input/output flip-flops for 16 I/O lines
	50	UINT8           m_bl;         //!< value of BL during the most recent output
	51	bool            m_enable;     //!< true if outputs are enabled
	52	devcb_read8     m_iord;       //!< input line (read, offset = line, data = 0/1)
	53	devcb_write8    m_iowr;       //!< output line (write, offset = line, data = 0/1)
	54	};
	55
	56	extern const device_type RA17XX;
	57
	58	#endif /* __RA17XX_H__ */

https://github.com/mamedev/mame/commit/79ca73c7c31ed23f09f0c4e55bd4361ca09b0d8f

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