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r33873 Sunday 14th December, 2014 at 13:41:48 UTC by Jürgen Buchmüller
Fix switches and solenoids I/O chip assignment. Log outputs to solenoids. Add NVRAM enable (E2) and W/R (nw)
[src/mame/drivers]gts1.c

trunk/src/mame/drivers/gts1.c
r242384r242385
108108private:
109109    virtual void machine_reset();
110110    required_device<cpu_device> m_maincpu;
111    UINT8 m_io[256];
112    UINT8 m_nvram_addr;
111    UINT8 m_io[256];            //!< dummy I/O values of undefined ranges (will be removed)
112    UINT8 m_nvram_addr;         //!< NVRAM address
113    bool m_nvram_e2;            //!< NVRWAM enable (E2 line)
114    bool m_nvram_wr;            //!< NVRWAM write (W/R line)
113115    UINT16 m_6351_addr;
114116    UINT16 m_z30_out;
115117};
r242384r242385
216218void gts1_state::machine_reset()
217219{
218220    m_nvram_addr = 0;
221    m_nvram_e2 = false;
222    m_nvram_wr = false;
219223    m_6351_addr = 0;
220224    m_z30_out = 0;
221225}
r242384r242385
233237
234238WRITE8_MEMBER(gts1_state::gts1_solenoid_w)
235239{
236    LOG(("%s: solenoid[%02x] <- %x\n", __FUNCTION__, offset, data));
240    switch (offset) {
241    case  0:
242        LOG(("%s: outhole <- %x\n", __FUNCTION__, data));
243        break;
244    case  1:
245        LOG(("%s: knocker <- %x\n", __FUNCTION__, data));
246        break;
247    case  2:
248        LOG(("%s: tens chime <- %x\n", __FUNCTION__, data));
249        break;
250    case  3:
251        LOG(("%s: hundreds chime <- %x\n", __FUNCTION__, data));
252        break;
253    case  4:
254        LOG(("%s: thousands chime <- %x\n", __FUNCTION__, data));
255        break;
256    case  5:
257        LOG(("%s: no. 6 <- %x\n", __FUNCTION__, data));
258        break;
259    case  6:
260        LOG(("%s: no. 7 <- %x\n", __FUNCTION__, data));
261        break;
262    case  7:
263        LOG(("%s: no. 8 <- %x\n", __FUNCTION__, data));
264        break;
265    case  8:
266    case  9:
267    case 10:
268    case 11:
269        LOG(("%s: not used [%x] <- %x\n", __FUNCTION__, offset, data));
270        break;
271    case 12:    // spare
272        LOG(("%s: spare [%x] <- %x\n", __FUNCTION__, offset, data));
273        break;
274    case 13:    // RAM control E2
275        LOG(("%s: RAM control E2 <- %x\n", __FUNCTION__, data));
276        m_nvram_e2 = (data & 1) ? true : false;
277        break;
278    case 14:    // RAM control W/R
279        LOG(("%s: RAM control W/R <- %x\n", __FUNCTION__, data));
280        break;
281        m_nvram_wr = (data & 1) ? true : false;
282    case 15:    // spare
283        LOG(("%s: spare [%x] <- %x\n", __FUNCTION__, offset, data));
284        break;
285    }
237286}
238287
239288READ8_MEMBER (gts1_state::gts1_switches_r)
r242384r242385
327376    {
328377        case 0: // group A
329378            // FIXME: Schematics says TO Z5
379            if (!m_nvram_wr && m_nvram_e2) {
380                // FIXME: read generic NVRAM data
381            }
330382            break;
331383        case 1: // group B
332384        case 2: // group C
r242384r242385
352404            m_nvram_addr = (m_nvram_addr & ~(15 << 4)) | ((data & 15) << 4);
353405            break;
354406        case 2: // group C - data bits 3:0 of NVRAM
355            // FIXME: schematics says write enable is U4-36 (O14)
356            LOG(("%s: nvram[%02x] <- %x\n", __FUNCTION__, m_nvram_addr, data & 15));
407            if (m_nvram_wr && m_nvram_e2) {
408                LOG(("%s: nvram[%02x] <- %x\n", __FUNCTION__, m_nvram_addr, data & 15));
409                // FIXME: write generic NVRAM data
410            }
357411            break;
358412    }
359413}
r242384r242385
515569
516570    /* A1753CE 2048 x 8 ROM (000-7ff), 128 x 4 RAM (00-7f) and 16 I/O lines (20 ... 2f) */
517571    MCFG_DEVICE_ADD( "ra17xx_u5", RA17XX, 0 )
518    MCFG_RA17XX_READ ( READ8 (gts1_state,gts1_solenoid_r) )
519    MCFG_RA17XX_WRITE( WRITE8(gts1_state,gts1_solenoid_w) )
572    MCFG_RA17XX_READ ( READ8 (gts1_state,gts1_switches_r) )
573    MCFG_RA17XX_WRITE( WRITE8(gts1_state,gts1_switches_w) )
520574
521575    /* A1752CF 2048 x 8 ROM (800-fff), 128 x 4 RAM (80-ff) and 16 I/O lines (40 ... 4f) */
522576    MCFG_DEVICE_ADD( "ra17xx_u4", RA17XX, 0 )
523    MCFG_RA17XX_READ ( READ8 (gts1_state,gts1_switches_r) )
524    MCFG_RA17XX_WRITE( WRITE8(gts1_state,gts1_switches_w) )
577    MCFG_RA17XX_READ ( READ8 (gts1_state,gts1_solenoid_r) )
578    MCFG_RA17XX_WRITE( WRITE8(gts1_state,gts1_solenoid_w) )
525579
526580    /* 10696 General Purpose Input/Output */
527581    MCFG_DEVICE_ADD( "r10696_u2", R10696, 0 )


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