trunk/src/mame/drivers/gts1.c
| r242382 | r242383 | |
| 67 | 67 | |
| 68 | 68 | |
| 69 | 69 | #include "machine/genpin.h" |
| 70 | #include "machine/ra17xx.h" |
| 70 | 71 | #include "machine/r10696.h" |
| 71 | 72 | #include "machine/r10788.h" |
| 72 | 73 | #include "cpu/pps4/pps4.h" |
| r242382 | r242383 | |
| 90 | 91 | |
| 91 | 92 | DECLARE_DRIVER_INIT(gts1); |
| 92 | 93 | |
| 94 | DECLARE_READ8_MEMBER (gts1_solenoid_r); |
| 95 | DECLARE_WRITE8_MEMBER(gts1_solenoid_w); |
| 96 | DECLARE_READ8_MEMBER (gts1_switches_r); |
| 97 | DECLARE_WRITE8_MEMBER(gts1_switches_w); |
| 93 | 98 | DECLARE_WRITE8_MEMBER(gts1_display_w); |
| 94 | | DECLARE_READ8_MEMBER (gts1_io_r); |
| 95 | | DECLARE_WRITE8_MEMBER(gts1_io_w); |
| 96 | 99 | DECLARE_READ8_MEMBER (gts1_lamp_apm_r); |
| 97 | 100 | DECLARE_WRITE8_MEMBER(gts1_lamp_apm_w); |
| 98 | 101 | DECLARE_READ8_MEMBER (gts1_nvram_r); |
| 99 | 102 | DECLARE_WRITE8_MEMBER(gts1_nvram_w); |
| 103 | DECLARE_READ8_MEMBER (gts1_io_r); |
| 104 | DECLARE_WRITE8_MEMBER(gts1_io_w); |
| 100 | 105 | DECLARE_READ8_MEMBER (gts1_pa_r); |
| 101 | 106 | DECLARE_WRITE8_MEMBER(gts1_pa_w); |
| 102 | 107 | DECLARE_WRITE8_MEMBER(gts1_pb_w); |
| r242382 | r242383 | |
| 118 | 123 | ADDRESS_MAP_END |
| 119 | 124 | |
| 120 | 125 | static ADDRESS_MAP_START( gts1_io, AS_IO, 8, gts1_state ) |
| 121 | | AM_RANGE(0x0030, 0x003f) AM_DEVREADWRITE ( "r10696", r10696_device, io_r, io_w ) // (U3) solenoid + dips |
| 122 | | AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE ( "r10696", r10696_device, io_r, io_w ) // (U2) NVRAM io chip |
| 123 | | AM_RANGE(0x00d0, 0x00df) AM_DEVREADWRITE ( "r10788", r10788_device, io_r, io_w ) // (U6) display chip |
| 124 | | AM_RANGE(0x0000, 0x00ff) AM_READ ( gts1_io_r ) AM_WRITE( gts1_io_w ) // connects to all the other chips |
| 125 | | AM_RANGE(0x0100, 0x0100) AM_READ ( gts1_pa_r ) AM_WRITE( gts1_pa_w ) |
| 126 | | AM_RANGE(0x0101, 0x0101) AM_WRITE(gts1_pb_w) |
| 126 | AM_RANGE(0x0020, 0x002f) AM_DEVREADWRITE ( "ra17xx_u4", ra17xx_device, io_r, io_w ) // (U4) solenoid |
| 127 | AM_RANGE(0x0030, 0x003f) AM_DEVREADWRITE ( "r10696_u3", r10696_device, io_r, io_w ) // (U3) solenoid + dips |
| 128 | AM_RANGE(0x0040, 0x004f) AM_DEVREADWRITE ( "ra17xx_u5", ra17xx_device, io_r, io_w ) // (U5) switch matrix |
| 129 | AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE ( "r10696_u2", r10696_device, io_r, io_w ) // (U2) NVRAM io chip |
| 130 | AM_RANGE(0x00d0, 0x00df) AM_DEVREADWRITE ( "r10788_u6", r10788_device, io_r, io_w ) // (U6) display chip |
| 131 | AM_RANGE(0x0000, 0x00ff) AM_READ ( gts1_io_r ) AM_WRITE( gts1_io_w ) // catch undecoded I/O accesss |
| 132 | AM_RANGE(0x0100, 0x0100) AM_READ ( gts1_pa_r ) AM_WRITE( gts1_pa_w ) // CPU I/O port A (input/output) |
| 133 | AM_RANGE(0x0101, 0x0101) AM_WRITE( gts1_pb_w ) // CPU I/O port B (output only) |
| 127 | 134 | ADDRESS_MAP_END |
| 128 | 135 | |
| 129 | 136 | static INPUT_PORTS_START( gts1 ) |
| r242382 | r242383 | |
| 217 | 224 | { |
| 218 | 225 | } |
| 219 | 226 | |
| 227 | READ8_MEMBER (gts1_state::gts1_solenoid_r) |
| 228 | { |
| 229 | UINT8 data = 0; |
| 230 | LOG(("%s: solenoid[%02x] -> %x\n", __FUNCTION__, offset, data)); |
| 231 | return data; |
| 232 | } |
| 233 | |
| 234 | WRITE8_MEMBER(gts1_state::gts1_solenoid_w) |
| 235 | { |
| 236 | LOG(("%s: solenoid[%02x] <- %x\n", __FUNCTION__, offset, data)); |
| 237 | } |
| 238 | |
| 239 | READ8_MEMBER (gts1_state::gts1_switches_r) |
| 240 | { |
| 241 | UINT8 data = 0; |
| 242 | LOG(("%s: switches[%02x] -> %x\n", __FUNCTION__, offset, data)); |
| 243 | return data; |
| 244 | } |
| 245 | |
| 246 | WRITE8_MEMBER(gts1_state::gts1_switches_w) |
| 247 | { |
| 248 | LOG(("%s: switches[%02x] <- %x\n", __FUNCTION__, offset, data)); |
| 249 | } |
| 250 | |
| 220 | 251 | /** |
| 221 | 252 | * @brief write a 8seg display value |
| 222 | 253 | * @param offset digit number 0 .. 19 |
| r242382 | r242383 | |
| 482 | 513 | |
| 483 | 514 | //MCFG_NVRAM_ADD_0FILL("nvram") |
| 484 | 515 | |
| 485 | | /* General Purpose Input/Output */ |
| 486 | | MCFG_DEVICE_ADD( "r10696", R10696, 0 ) |
| 516 | /* A1753CE 2048 x 8 ROM (000-7ff), 128 x 4 RAM (00-7f) and 16 I/O lines (20 ... 2f) */ |
| 517 | MCFG_DEVICE_ADD( "ra17xx_u5", RA17XX, 0 ) |
| 518 | MCFG_RA17XX_READ ( READ8 (gts1_state,gts1_solenoid_r) ) |
| 519 | MCFG_RA17XX_WRITE( WRITE8(gts1_state,gts1_solenoid_w) ) |
| 520 | |
| 521 | /* A1752CF 2048 x 8 ROM (800-fff), 128 x 4 RAM (80-ff) and 16 I/O lines (40 ... 4f) */ |
| 522 | MCFG_DEVICE_ADD( "ra17xx_u4", RA17XX, 0 ) |
| 523 | MCFG_RA17XX_READ ( READ8 (gts1_state,gts1_switches_r) ) |
| 524 | MCFG_RA17XX_WRITE( WRITE8(gts1_state,gts1_switches_w) ) |
| 525 | |
| 526 | /* 10696 General Purpose Input/Output */ |
| 527 | MCFG_DEVICE_ADD( "r10696_u2", R10696, 0 ) |
| 487 | 528 | MCFG_R10696_IO( READ8 (gts1_state,gts1_nvram_r), |
| 488 | 529 | WRITE8(gts1_state,gts1_nvram_w) ) |
| 489 | 530 | |
| 490 | | /* General Purpose Display and Keyboard */ |
| 491 | | MCFG_DEVICE_ADD( "r10788", R10788, XTAL_3_579545MHz / 18 ) // divided in the circuit |
| 531 | /* 10696 General Purpose Input/Output */ |
| 532 | MCFG_DEVICE_ADD( "r10696_u3", R10696, 0 ) |
| 533 | MCFG_R10696_IO( READ8 (gts1_state,gts1_lamp_apm_r), |
| 534 | WRITE8(gts1_state,gts1_lamp_apm_w) ) |
| 535 | |
| 536 | /* 10788 General Purpose Display and Keyboard */ |
| 537 | MCFG_DEVICE_ADD( "r10788_u6", R10788, XTAL_3_579545MHz / 18 ) // divided in the circuit |
| 492 | 538 | MCFG_R10788_UPDATE( WRITE8(gts1_state,gts1_display_w) ) |
| 493 | 539 | |
| 494 | 540 | /* Video */ |