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r29498 Wednesday 9th April, 2014 at 17:08:24 UTC by Osso
wd11c00_17_device: converted to devcb2 (nw)

[src/emu/bus/isa]	wdxt_gen.c
[src/emu/machine]	wd11c00_17.c wd11c00_17.h

trunk/src/emu/bus/isa/wdxt_gen.c

r29497	r29498
140	140	m_ram[offset] = data;
141	141	}
142	142
143		static WD11C00_17_INTERFACE( host_intf )
144		{
145		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, irq5_w),
146		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, drq3_w),
147		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, mr_w),
148		DEVCB_NULL,
149		DEVCB_NULL,
150		DEVCB_CPU_INPUT_LINE(WD1015_TAG, MCS48_INPUT_IRQ),
151		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, rd322_r),
152		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, ram_r),
153		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, ram_w),
154		DEVCB_DEVICE_MEMBER(WD2010A_TAG, wd2010_device, read),
155		DEVCB_DEVICE_MEMBER(WD2010A_TAG, wd2010_device, write)
156		};
157
158
159	143	//-------------------------------------------------
160	144	//  MACHINE_DRIVER( wdxt_gen )
161	145	//-------------------------------------------------
r29497	r29498
164	148	MCFG_CPU_ADD(WD1015_TAG, I8049, 5000000)
165	149	MCFG_CPU_IO_MAP(wd1015_io)
166	150
167		MCFG_WD11C00_17_ADD(WD11C00_17_TAG, 5000000, host_intf)
	151	MCFG_DEVICE_ADD(WD11C00_17_TAG, WD11C00_17, 5000000)
	152	MCFG_WD11C00_17_OUT_IRQ5_CB(WRITELINE(wdxt_gen_device, irq5_w))
	153	MCFG_WD11C00_17_OUT_DRQ3_CB(WRITELINE(wdxt_gen_device, drq3_w))
	154	MCFG_WD11C00_17_OUT_MR_CB(WRITELINE(wdxt_gen_device, mr_w))
	155	MCFG_WD11C00_17_OUT_RA3_CB(INPUTLINE(WD1015_TAG, MCS48_INPUT_IRQ))
	156	MCFG_WD11C00_17_IN_RD322_CB(READ8(wdxt_gen_device, rd322_r))
	157	MCFG_WD11C00_17_IN_RAMCS_CB(READ8(wdxt_gen_device, ram_r))
	158	MCFG_WD11C00_17_OUT_RAMWR_CB(WRITE8(wdxt_gen_device, ram_w))
	159	MCFG_WD11C00_17_IN_CS1010_CB(DEVREAD8(WD2010A_TAG, wd2010_device, read))
	160	MCFG_WD11C00_17_OUT_CS1010_CB(DEVWRITE8(WD2010A_TAG, wd2010_device, write))
168	161	MCFG_DEVICE_ADD(WD2010A_TAG, WD2010, 5000000)
169	162	MCFG_WD2010_OUT_BCR_CB(DEVWRITELINE(WD11C00_17_TAG, wd11c00_17_device, clct_w))
170	163	MCFG_WD2010_IN_BCS_CB(DEVREAD8(WD11C00_17_TAG, wd11c00_17_device, read))

trunk/src/emu/machine/wd11c00_17.c

r29497	r29498
42	42	const device_type WD11C00_17 = &device_creator<wd11c00_17_device>;
43	43
44	44
45		//-------------------------------------------------
46		//  device_config_complete - perform any
47		//  operations now that the configuration is
48		//  complete
49		//-------------------------------------------------
50
51		void wd11c00_17_device::device_config_complete()
52		{
53		// inherit a copy of the static data
54		const wd11c00_17_interface *intf = reinterpret_cast<const wd11c00_17_interface *>(static_config());
55		if (intf != NULL)
56		*static_cast<wd11c00_17_interface *>(this) = *intf;
57
58		// or initialize to defaults if none provided
59		else
60		{
61		memset(&m_out_irq5_cb, 0, sizeof(m_out_irq5_cb));
62		memset(&m_out_drq3_cb, 0, sizeof(m_out_drq3_cb));
63		memset(&m_out_mr_cb, 0, sizeof(m_out_mr_cb));
64		memset(&m_out_busy_cb, 0, sizeof(m_out_busy_cb));
65		memset(&m_out_req_cb, 0, sizeof(m_out_req_cb));
66		memset(&m_out_ra3_cb, 0, sizeof(m_out_ra3_cb));
67		memset(&m_in_rd322_cb, 0, sizeof(m_in_rd322_cb));
68		memset(&m_in_ramcs_cb, 0, sizeof(m_in_ramcs_cb));
69		memset(&m_out_ramwr_cb, 0, sizeof(m_out_ramwr_cb));
70		memset(&m_in_cs1010_cb, 0, sizeof(m_in_cs1010_cb));
71		memset(&m_out_cs1010_cb, 0, sizeof(m_out_cs1010_cb));
72		}
73		}
74
75
76
77	45	//**************************************************************************
78	46	//  INLINE HELPERS
79	47	//**************************************************************************
r29497	r29498
93	61
94	62	if (m_ra3 != ra3)
95	63	{
96		m_out_ra3_func(ra3 ? ASSERT_LINE : CLEAR_LINE);
	64	m_out_ra3_cb(ra3 ? ASSERT_LINE : CLEAR_LINE);
97	65	m_ra3 = ra3;
98	66	}
99	67
r29497	r29498
101	69
102	70	if (m_irq5 != irq5)
103	71	{
104		m_out_irq5_func(irq5);
	72	m_out_irq5_cb(irq5);
105	73	m_irq5 = irq5;
106	74	}
107	75
r29497	r29498
109	77
110	78	if (m_drq3 != drq3)
111	79	{
112		m_out_drq3_func(drq3);
	80	m_out_drq3_cb(drq3);
113	81	m_drq3 = drq3;
114	82	}
115	83
r29497	r29498
117	85
118	86	if (m_busy != busy)
119	87	{
120		m_out_busy_func(busy);
	88	m_out_busy_cb(busy);
121	89	m_busy = busy;
122	90	}
123	91
r29497	r29498
125	93
126	94	if (m_req != req)
127	95	{
128		m_out_req_func(req);
	96	m_out_req_cb(req);
129	97	m_req = req;
130	98	}
131	99	}
r29497	r29498
152	120
153	121	if (m_status & STATUS_BUSY)
154	122	{
155		data = m_in_ramcs_func(m_ra & 0x7ff);
	123	data = m_in_ramcs_cb(m_ra & 0x7ff);
156	124
157	125	increment_address();
158	126	}
r29497	r29498
169	137	{
170	138	if (m_status & STATUS_BUSY)
171	139	{
172		m_out_ramwr_func(m_ra & 0x7ff, data);
	140	m_out_ramwr_cb(m_ra & 0x7ff, data);
173	141
174	142	increment_address();
175	143	}
r29497	r29498
182	150
183	151	inline void wd11c00_17_device::software_reset()
184	152	{
185		m_out_mr_func(ASSERT_LINE);
186		m_out_mr_func(CLEAR_LINE);
	153	m_out_mr_cb(ASSERT_LINE);
	154	m_out_mr_cb(CLEAR_LINE);
187	155
188	156	device_reset();
189	157	}
r29497	r29498
212	180
213	181	wd11c00_17_device::wd11c00_17_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
214	182	: device_t(mconfig, WD11C00_17, "Western Digital WD11C00-17", tag, owner, clock, "wd11c00_17", __FILE__),
	183	m_out_irq5_cb(*this),
	184	m_out_drq3_cb(*this),
	185	m_out_mr_cb(*this),
	186	m_out_busy_cb(*this),
	187	m_out_req_cb(*this),
	188	m_out_ra3_cb(*this),
	189	m_in_rd322_cb(*this),
	190	m_in_ramcs_cb(*this),
	191	m_out_ramwr_cb(*this),
	192	m_in_cs1010_cb(*this),
	193	m_out_cs1010_cb(*this),
215	194	m_status(0),
216	195	m_ra(0),
217	196	m_irq5(CLEAR_LINE),
r29497	r29498
230	209	void wd11c00_17_device::device_start()
231	210	{
232	211	// resolve callbacks
233		m_out_irq5_func.resolve(m_out_irq5_cb, *this);
234		m_out_drq3_func.resolve(m_out_drq3_cb, *this);
235		m_out_mr_func.resolve(m_out_mr_cb, *this);
236		m_out_busy_func.resolve(m_out_busy_cb, *this);
237		m_out_req_func.resolve(m_out_req_cb, *this);
238		m_out_ra3_func.resolve(m_out_ra3_cb, *this);
239		m_in_rd322_func.resolve(m_in_rd322_cb, *this);
240		m_in_ramcs_func.resolve(m_in_ramcs_cb, *this);
241		m_out_ramwr_func.resolve(m_out_ramwr_cb, *this);
242		m_in_cs1010_func.resolve(m_in_cs1010_cb, *this);
243		m_out_cs1010_func.resolve(m_out_cs1010_cb, *this);
	212	m_out_irq5_cb.resolve_safe();
	213	m_out_drq3_cb.resolve_safe();
	214	m_out_mr_cb.resolve_safe();
	215	m_out_busy_cb.resolve_safe();
	216	m_out_req_cb.resolve_safe();
	217	m_out_ra3_cb.resolve_safe();
	218	m_in_rd322_cb.resolve_safe(0);
	219	m_in_ramcs_cb.resolve_safe(0);
	220	m_out_ramwr_cb.resolve_safe();
	221	m_in_cs1010_cb.resolve_safe(0);
	222	m_out_cs1010_cb.resolve_safe();
244	223	}
245	224
246	225
r29497	r29498
280	259	break;
281	260
282	261	case 2: // Read Drive Configuration Information
283		data = m_in_rd322_func(0);
	262	data = m_in_rd322_cb(0);
284	263	break;
285	264
286	265	case 3: // Not Used
r29497	r29498
361	340	break;
362	341
363	342	case 0x20:
364		data = m_in_cs1010_func(m_ra >> 8);
	343	data = m_in_cs1010_cb(m_ra >> 8);
365	344	break;
366	345	}
367	346
r29497	r29498
384	363	break;
385	364
386	365	case 0x20:
387		m_out_cs1010_func(m_ra >> 8, data);
	366	m_out_cs1010_cb(m_ra >> 8, data);
388	367	break;
389	368
390	369	case 0x60:

trunk/src/emu/machine/wd11c00_17.h

r29497	r29498
23	23	//  INTERFACE CONFIGURATION MACROS
24	24	//**************************************************************************
25	25
26		#define MCFG_WD11C00_17_ADD(_tag, _clock, _config) \
27		MCFG_DEVICE_ADD(_tag, WD11C00_17, _clock) \
28		MCFG_DEVICE_CONFIG(_config)
	26	#define MCFG_WD11C00_17_OUT_IRQ5_CB(_devcb) \
	27	devcb = &wd11c00_17_device::set_out_irq5_callback(*device, DEVCB2_##_devcb);
29	28
	29	#define MCFG_WD11C00_17_OUT_DRQ3_CB(_devcb) \
	30	devcb = &wd11c00_17_device::set_out_drq3_callback(*device, DEVCB2_##_devcb);
30	31
31		#define WD11C00_17_INTERFACE(_name) \
32		const wd11c00_17_interface (_name) =
	32	#define MCFG_WD11C00_17_OUT_MR_CB(_devcb) \
	33	devcb = &wd11c00_17_device::set_out_mr_callback(*device, DEVCB2_##_devcb);
33	34
	35	#define MCFG_WD11C00_17_OUT_BUSY_CB(_devcb) \
	36	devcb = &wd11c00_17_device::set_out_busy_callback(*device, DEVCB2_##_devcb);
34	37
	38	#define MCFG_WD11C00_17_OUT_REQ_CB(_devcb) \
	39	devcb = &wd11c00_17_device::set_out_req_callback(*device, DEVCB2_##_devcb);
35	40
	41	#define MCFG_WD11C00_17_OUT_RA3_CB(_devcb) \
	42	devcb = &wd11c00_17_device::set_out_ra3_callback(*device, DEVCB2_##_devcb);
	43
	44	#define MCFG_WD11C00_17_IN_RD322_CB(_devcb) \
	45	devcb = &wd11c00_17_device::set_in_rd322_callback(*device, DEVCB2_##_devcb);
	46
	47	#define MCFG_WD11C00_17_IN_RAMCS_CB(_devcb) \
	48	devcb = &wd11c00_17_device::set_in_ramcs_callback(*device, DEVCB2_##_devcb);
	49
	50	#define MCFG_WD11C00_17_OUT_RAMWR_CB(_devcb) \
	51	devcb = &wd11c00_17_device::set_out_ramwr_callback(*device, DEVCB2_##_devcb);
	52
	53	#define MCFG_WD11C00_17_IN_CS1010_CB(_devcb) \
	54	devcb = &wd11c00_17_device::set_in_cs1010_callback(*device, DEVCB2_##_devcb);
	55
	56	#define MCFG_WD11C00_17_OUT_CS1010_CB(_devcb) \
	57	devcb = &wd11c00_17_device::set_out_cs1010_callback(*device, DEVCB2_##_devcb);
	58
36	59	//**************************************************************************
37	60	//  TYPE DEFINITIONS
38	61	//**************************************************************************
39	62
40		// ======================> wd11c00_17_interface
41
42		struct wd11c00_17_interface
43		{
44		devcb_write_line    m_out_irq5_cb;
45		devcb_write_line    m_out_drq3_cb;
46		devcb_write_line    m_out_mr_cb;
47		devcb_write_line    m_out_busy_cb;
48		devcb_write_line    m_out_req_cb;
49		devcb_write_line    m_out_ra3_cb;
50		devcb_read8         m_in_rd322_cb;
51		devcb_read8         m_in_ramcs_cb;
52		devcb_write8        m_out_ramwr_cb;
53		devcb_read8         m_in_cs1010_cb;
54		devcb_write8        m_out_cs1010_cb;
55		};
56
57
58	63	// ======================> wd11c00_17_device
59	64
60		class wd11c00_17_device :   public device_t,
61		public wd11c00_17_interface
	65	class wd11c00_17_device :   public device_t
62	66	{
63	67	public:
64	68	// construction/destruction
65	69	wd11c00_17_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
66	70
	71	template<class _Object> static devcb2_base &set_out_irq5_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_irq5_cb.set_callback(object); }
	72	template<class _Object> static devcb2_base &set_out_drq3_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_drq3_cb.set_callback(object); }
	73	template<class _Object> static devcb2_base &set_out_mr_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_mr_cb.set_callback(object); }
	74	template<class _Object> static devcb2_base &set_out_busy_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_busy_cb.set_callback(object); }
	75	template<class _Object> static devcb2_base &set_out_req_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_req_cb.set_callback(object); }
	76	template<class _Object> static devcb2_base &set_out_ra3_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_ra3_cb.set_callback(object); }
	77	template<class _Object> static devcb2_base &set_in_rd322_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_in_rd322_cb.set_callback(object); }
	78	template<class _Object> static devcb2_base &set_in_ramcs_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_in_ramcs_cb.set_callback(object); }
	79	template<class _Object> static devcb2_base &set_out_ramwr_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_ramwr_cb.set_callback(object); }
	80	template<class _Object> static devcb2_base &set_in_cs1010_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_in_cs1010_cb.set_callback(object); }
	81	template<class _Object> static devcb2_base &set_out_cs1010_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_cs1010_cb.set_callback(object); }
	82
67	83	DECLARE_READ8_MEMBER( io_r );
68	84	DECLARE_WRITE8_MEMBER( io_w );
69	85
r29497	r29498
86	102	// device-level overrides
87	103	virtual void device_start();
88	104	virtual void device_reset();
89		virtual void device_config_complete();
90	105
91	106	private:
92	107	inline void check_interrupt();
r29497	r29498
96	111	inline void software_reset();
97	112	inline void select();
98	113
99		devcb_resolved_write_line   m_out_irq5_func;
100		devcb_resolved_write_line   m_out_drq3_func;
101		devcb_resolved_write_line   m_out_mr_func;
102		devcb_resolved_write_line   m_out_busy_func;
103		devcb_resolved_write_line   m_out_req_func;
104		devcb_resolved_write_line   m_out_ra3_func;
105		devcb_resolved_read8        m_in_rd322_func;
106		devcb_resolved_read8        m_in_ramcs_func;
107		devcb_resolved_write8       m_out_ramwr_func;
108		devcb_resolved_read8        m_in_cs1010_func;
109		devcb_resolved_write8       m_out_cs1010_func;
	114	devcb2_write_line    m_out_irq5_cb;
	115	devcb2_write_line    m_out_drq3_cb;
	116	devcb2_write_line    m_out_mr_cb;
	117	devcb2_write_line    m_out_busy_cb;
	118	devcb2_write_line    m_out_req_cb;
	119	devcb2_write_line    m_out_ra3_cb;
	120	devcb2_read8         m_in_rd322_cb;
	121	devcb2_read8         m_in_ramcs_cb;
	122	devcb2_write8        m_out_ramwr_cb;
	123	devcb2_read8         m_in_cs1010_cb;
	124	devcb2_write8        m_out_cs1010_cb;
110	125
111	126	UINT8 m_status;
112	127	UINT8 m_mask;

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