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r29499 Wednesday 9th April, 2014 at 17:13:17 UTC by Osso
dp8390_device: converted to devcb2 (nw)
[src/emu/bus/isa]3c503.c ne1000.c ne2000.c
[src/emu/bus/nubus]nubus_asntmc3b.c
[src/emu/bus/x68k]x68k_neptunex.c
[src/emu/machine]dp8390.c dp8390.h

trunk/src/emu/machine/dp8390.c
r29498r29499
77const device_type DP8390D = &device_creator<dp8390d_device>;
88const device_type RTL8019A = &device_creator<rtl8019a_device>;
99
10void dp8390_device::device_config_complete() {
11   const dp8390_interface *intf = reinterpret_cast<const dp8390_interface *>(static_config());
12   if(intf != NULL)
13      *static_cast<dp8390_interface *>(this) = *intf;
14   else {
15      memset(&irq_cb, 0, sizeof(irq_cb));
16      memset(&breq_cb, 0, sizeof(breq_cb));
17      memset(&mem_read_cb, 0, sizeof(mem_read_cb));
18      memset(&mem_write_cb, 0, sizeof(mem_write_cb));
19   }
20}
21
2210dp8390d_device::dp8390d_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
2311   : dp8390_device(mconfig, DP8390D, "DP8390D", tag, owner, clock, 10.0f, "dp8390d", __FILE__) {
2412      m_type = TYPE_DP8390D;
r29498r29499
3119
3220dp8390_device::dp8390_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, float bandwidth, const char *shortname, const char *source)
3321   : device_t(mconfig, type, name, tag, owner, clock, shortname, source),
34      device_network_interface(mconfig, *this, bandwidth) {
22      device_network_interface(mconfig, *this, bandwidth),
23      m_irq_cb(*this),
24      m_breq_cb(*this),
25      m_mem_read_cb(*this),
26      m_mem_write_cb(*this)
27      {
3528}
3629
3730void dp8390_device::device_start() {
38   irq_func.resolve(irq_cb, *this);
39   breq_func.resolve(breq_cb, *this);
40   mem_read.resolve(mem_read_cb, *this);
41   mem_write.resolve(mem_write_cb, *this);
31   m_irq_cb.resolve_safe();
32   m_breq_cb.resolve_safe();
33   m_mem_read_cb.resolve_safe(0);
34   m_mem_write_cb.resolve_safe();
4235}
4336
4437void dp8390_device::stop() {
4538   m_regs.isr = 0x80; // is this right?
4639   m_regs.cr |= 1;
47   irq_func(CLEAR_LINE);
40   m_irq_cb(CLEAR_LINE);
4841   m_reset = 1;
4942}
5043
r29498r29499
5649   memset(&m_8019regs, 0, sizeof(m_8019regs));
5750   m_8019regs.config1 = 0x80;
5851   m_8019regs.config3 = 0x01;
59   irq_func(CLEAR_LINE);
52   m_irq_cb(CLEAR_LINE);
6053
6154   m_reset = 1;
6255}
r29498r29499
8376   }
8477
8578   buf.resize(m_regs.tbcr);
86   for(i = 0; i < m_regs.tbcr; i++) buf[i] = mem_read(high16 + (m_regs.tpsr << 8) + i);
79   for(i = 0; i < m_regs.tbcr; i++) buf[i] = m_mem_read_cb(high16 + (m_regs.tpsr << 8) + i);
8780
8881   if(send(buf, m_regs.tbcr)) {
8982      m_regs.tsr = 1;
r29498r29499
139132   len &= 0xffff;
140133
141134   for(i = 0; i < len; i++) {
142      mem_write(high16 + offset, buf[i]);
135      m_mem_write_cb(high16 + offset, buf[i]);
143136      offset++;
144137      if(!(offset & 0xff)) {
145138         if((offset >> 8) == m_regs.pstop) offset = m_regs.pstart << 8;
r29498r29499
149142   if(len < 60) {
150143      // this can't pass to the next page
151144      for(; i < 60; i++) {
152         mem_write(high16 + offset, 0);
145         m_mem_write_cb(high16 + offset, 0);
153146         offset++;
154147      }
155148      len = 60;
r29498r29499
160153   m_regs.curr = (offset >> 8) + ((offset & 0xff)?1:0);
161154   if(m_regs.curr == m_regs.pstop) m_regs.curr = m_regs.pstart;
162155   len += 4;
163   mem_write(start, m_regs.rsr);
164   mem_write(start+1, m_regs.curr);
165   mem_write(start+2, len & 0xff);
166   mem_write(start+3, len >> 8);
156   m_mem_write_cb((offs_t)start, m_regs.rsr);
157   m_mem_write_cb((offs_t)start+1, m_regs.curr);
158   m_mem_write_cb((offs_t)start+2, len & 0xff);
159   m_mem_write_cb((offs_t)start+3, len >> 8);
167160   check_irq();
168161}
169162
r29498r29499
185178      UINT32 high16 = (m_regs.dcr & 4)?m_regs.rsar<<16:0;
186179      if(m_regs.dcr & 1) {
187180         m_regs.crda &= ~1;
188         data = mem_read(high16 + m_regs.crda++);
189         data |= mem_read(high16 + m_regs.crda++) << 8;
181         data = m_mem_read_cb(high16 + m_regs.crda++);
182         data |= m_mem_read_cb(high16 + m_regs.crda++) << 8;
190183         m_regs.rbcr -= (m_regs.rbcr < 2)?m_regs.rbcr:2;
191184         check_dma_complete();
192185         return DP8390_BYTE_ORDER(data);
193186      } else {
194187         m_regs.rbcr -= (m_regs.rbcr)?1:0;
195         data = mem_read(high16 + m_regs.crda++);
188         data = m_mem_read_cb(high16 + m_regs.crda++);
196189         check_dma_complete();
197190         return data;
198191      }
r29498r29499
355348      if(m_regs.dcr & 1) {
356349         data = DP8390_BYTE_ORDER(data);
357350         m_regs.crda &= ~1;
358         mem_write(high16 + m_regs.crda++, data & 0xff);
359         mem_write(high16 + m_regs.crda++, data >> 8);
351         m_mem_write_cb(high16 + m_regs.crda++, data & 0xff);
352         m_mem_write_cb(high16 + m_regs.crda++, data >> 8);
360353         m_regs.rbcr -= (m_regs.rbcr < 2)?m_regs.rbcr:2;
361354         check_dma_complete();
362355      } else {
363356         data &= 0xff;
364         mem_write(high16 + m_regs.crda++, data);
357         m_mem_write_cb(high16 + m_regs.crda++, data);
365358         m_regs.rbcr -= (m_regs.rbcr)?1:0;
366359         check_dma_complete();
367360      }
trunk/src/emu/machine/dp8390.h
r29498r29499
33
44#include "emu.h"
55
6struct dp8390_interface
7{
8   devcb_write_line    irq_cb;
9   devcb_write_line    breq_cb;
10   devcb_read8         mem_read_cb;
11   devcb_write8        mem_write_cb;
12};
136
147// device stuff
15#define MCFG_DP8390D_ADD(_tag, _intrf) \
16   MCFG_DEVICE_ADD(_tag, DP8390D, 0) \
17   MCFG_DEVICE_CONFIG(_intrf)
188
19#define MCFG_RTL8019A_ADD(_tag, _intrf) \
20   MCFG_DEVICE_ADD(_tag, RTL8019A, 0) \
21   MCFG_DEVICE_CONFIG(_intrf)
9#define MCFG_DP8390D_IRQ_CB(_devcb) \
10   devcb = &dp8390d_device::set_irq_callback(*device, DEVCB2_##_devcb);
2211
12#define MCFG_DP8390D_BREQ_CB(_devcb) \
13   devcb = &dp8390d_device::set_breq_callback(*device, DEVCB2_##_devcb);
14
15#define MCFG_DP8390D_MEM_READ_CB(_devcb) \
16   devcb = &dp8390d_device::set_mem_read_callback(*device, DEVCB2_##_devcb);
17
18#define MCFG_DP8390D_MEM_WRITE_CB(_devcb) \
19   devcb = &dp8390d_device::set_mem_write_callback(*device, DEVCB2_##_devcb);
20   
21#define MCFG_RTL8019A_IRQ_CB(_devcb) \
22   devcb = &rtl8019a_device::set_irq_callback(*device, DEVCB2_##_devcb);
23
24#define MCFG_RTL8019A_BREQ_CB(_devcb) \
25   devcb = &rtl8019a_device::set_breq_callback(*device, DEVCB2_##_devcb);
26
27#define MCFG_RTL8019A_MEM_READ_CB(_devcb) \
28   devcb = &rtl8019a_device::set_mem_read_callback(*device, DEVCB2_##_devcb);
29
30#define MCFG_RTL8019A_MEM_WRITE_CB(_devcb) \
31   devcb = &rtl8019a_device::set_mem_write_callback(*device, DEVCB2_##_devcb);
32
33
2334class dp8390_device : public device_t,
24                  public device_network_interface,
25                  public dp8390_interface
35                  public device_network_interface
2636{
2737public:
2838   // construction/destruction
2939   dp8390_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, float bandwidth, const char *shortname, const char *source);
40   
41   template<class _Object> static devcb2_base &set_irq_callback(device_t &device, _Object object) { return downcast<dp8390_device &>(device).m_irq_cb.set_callback(object); }
42   template<class _Object> static devcb2_base &set_breq_callback(device_t &device, _Object object) { return downcast<dp8390_device &>(device).m_breq_cb.set_callback(object); }
43   template<class _Object> static devcb2_base &set_mem_read_callback(device_t &device, _Object object) { return downcast<dp8390_device &>(device).m_mem_read_cb.set_callback(object); }
44   template<class _Object> static devcb2_base &set_mem_write_callback(device_t &device, _Object object) { return downcast<dp8390_device &>(device).m_mem_write_cb.set_callback(object); }
3045
3146   DECLARE_WRITE16_MEMBER( dp8390_w );
3247   DECLARE_READ16_MEMBER( dp8390_r );
r29498r29499
3853   // device-level overrides
3954   virtual void device_start();
4055   virtual void device_reset();
41   virtual void device_config_complete();
56
4257   int m_type;
4358
4459   enum {
r29498r29499
4762   };
4863
4964private:
50   devcb_resolved_write_line   irq_func;
51   devcb_resolved_write_line   breq_func;
52   devcb_resolved_read8        mem_read;
53   devcb_resolved_write8       mem_write;
65   devcb2_write_line    m_irq_cb;
66   devcb2_write_line    m_breq_cb;
67   devcb2_read8         m_mem_read_cb;
68   devcb2_write8        m_mem_write_cb;
5469
5570   void set_cr(UINT8 newcr);
5671   void check_dma_complete();
5772   void do_tx();
5873   bool mcast_ck(const UINT8 *buf, int len);
59   void check_irq() { irq_func((m_regs.imr & m_regs.isr & 0x7f)?ASSERT_LINE:CLEAR_LINE); }
74   void check_irq() { m_irq_cb((m_regs.imr & m_regs.isr & 0x7f)?ASSERT_LINE:CLEAR_LINE); }
6075   void recv_overflow();
6176   void stop();
6277   void recv(UINT8 *buf, int len);
trunk/src/emu/bus/isa/3c503.c
r29498r29499
33
44#define SADDR 0xcc000
55
6static const dp8390_interface el2_3c503_dp8390_interface = {
7   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, el2_3c503_device, el2_3c503_irq_w),
8   DEVCB_NULL,
9   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, el2_3c503_device, el2_3c503_mem_read),
10   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, el2_3c503_device, el2_3c503_mem_write)
11};
12
136static MACHINE_CONFIG_FRAGMENT(el2_3c503_config)
14   MCFG_DP8390D_ADD("dp8390d", el2_3c503_dp8390_interface)
7   MCFG_DEVICE_ADD("dp8390d", DP8390D, 0)
8   MCFG_DP8390D_IRQ_CB(WRITELINE(el2_3c503_device, el2_3c503_irq_w))
9   MCFG_DP8390D_MEM_READ_CB(READ8(el2_3c503_device, el2_3c503_mem_read))
10   MCFG_DP8390D_MEM_WRITE_CB(WRITE8(el2_3c503_device, el2_3c503_mem_write))
1511MACHINE_CONFIG_END
1612
1713const device_type EL2_3C503 = &device_creator<el2_3c503_device>;
trunk/src/emu/bus/isa/ne1000.c
r29498r29499
11#include "emu.h"
22#include "ne1000.h"
33
4static const dp8390_interface ne1000_dp8390_interface = {
5   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ne1000_device, ne1000_irq_w),
6   DEVCB_NULL,
7   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, ne1000_device, ne1000_mem_read),
8   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, ne1000_device, ne1000_mem_write)
9};
10
114static MACHINE_CONFIG_FRAGMENT(ne1000_config)
12   MCFG_DP8390D_ADD("dp8390d", ne1000_dp8390_interface)
5   MCFG_DEVICE_ADD("dp8390d", DP8390D, 0)
6   MCFG_DP8390D_IRQ_CB(WRITELINE(ne1000_device, ne1000_irq_w))
7   MCFG_DP8390D_MEM_READ_CB(READ8(ne1000_device, ne1000_mem_read))
8   MCFG_DP8390D_MEM_WRITE_CB(WRITE8(ne1000_device, ne1000_mem_write))
139MACHINE_CONFIG_END
1410
1511const device_type NE1000 = &device_creator<ne1000_device>;
trunk/src/emu/bus/isa/ne2000.c
r29498r29499
11#include "emu.h"
22#include "ne2000.h"
33
4static const dp8390_interface ne2000_dp8390_interface = {
5   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ne2000_device, ne2000_irq_w),
6   DEVCB_NULL,
7   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, ne2000_device, ne2000_mem_read),
8   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, ne2000_device, ne2000_mem_write)
9};
104
115static MACHINE_CONFIG_FRAGMENT(ne2000_config)
12   MCFG_DP8390D_ADD("dp8390d", ne2000_dp8390_interface)
6   MCFG_DEVICE_ADD("dp8390d", DP8390D, 0)
7   MCFG_DP8390D_IRQ_CB(WRITELINE(ne2000_device, ne2000_irq_w))
8   MCFG_DP8390D_MEM_READ_CB(READ8(ne2000_device, ne2000_mem_read))
9   MCFG_DP8390D_MEM_WRITE_CB(WRITE8(ne2000_device, ne2000_mem_write))
1310MACHINE_CONFIG_END
1411
1512const device_type NE2000 = &device_creator<ne2000_device>;
trunk/src/emu/bus/nubus/nubus_asntmc3b.c
r29498r29499
1616#define MAC8390_ROM_REGION  "asntm3b_rom"
1717#define MAC8390_839X  "dp83902"
1818
19static const dp8390_interface dp8390_interface =
20{
21   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, nubus_mac8390_device, dp_irq_w),
22   DEVCB_NULL,
23   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, nubus_mac8390_device, dp_mem_read),
24   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, nubus_mac8390_device, dp_mem_write)
25};
2619
2720MACHINE_CONFIG_FRAGMENT( asntm3b )
28   MCFG_DP8390D_ADD(MAC8390_839X, dp8390_interface)
21   MCFG_DEVICE_ADD(MAC8390_839X, DP8390D, 0)
22   MCFG_DP8390D_IRQ_CB(WRITELINE(nubus_mac8390_device, dp_irq_w))
23   MCFG_DP8390D_MEM_READ_CB(READ8(nubus_mac8390_device, dp_mem_read))
24   MCFG_DP8390D_MEM_WRITE_CB(WRITE8(nubus_mac8390_device, dp_mem_write))
2925MACHINE_CONFIG_END
3026
3127ROM_START( asntm3nb )
trunk/src/emu/bus/x68k/x68k_neptunex.c
r29498r29499
1313
1414const device_type X68K_NEPTUNEX = &device_creator<x68k_neptune_device>;
1515
16static const dp8390_interface neptune_dp8390_interface = {
17   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, x68k_neptune_device, x68k_neptune_irq_w),
18   DEVCB_NULL,
19   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, x68k_neptune_device, x68k_neptune_mem_read),
20   DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, x68k_neptune_device, x68k_neptune_mem_write)
21};
22
23
2416// device machine config
2517static MACHINE_CONFIG_FRAGMENT( x68k_neptunex )
26   MCFG_DP8390D_ADD("dp8390d", neptune_dp8390_interface)
18   MCFG_DEVICE_ADD("dp8390d", DP8390D, 0)
19   MCFG_DP8390D_IRQ_CB(WRITELINE(x68k_neptune_device, x68k_neptune_irq_w))
20   MCFG_DP8390D_MEM_READ_CB(READ8(x68k_neptune_device, x68k_neptune_mem_read))
21   MCFG_DP8390D_MEM_WRITE_CB(WRITE8(x68k_neptune_device, x68k_neptune_mem_write))
2722MACHINE_CONFIG_END
2823
2924machine_config_constructor x68k_neptune_device::device_mconfig_additions() const
r29498r29499
8580      m_dp8390->dp8390_reset(CLEAR_LINE);
8681      return 0;
8782   default:
88      logerror("ne2000: invalid register read %02X\n", offset);
83      logerror("x68k_neptune: invalid register read %02X\n", offset);
8984   }
9085   return 0;
9186}
r29498r29499
118113      m_dp8390->dp8390_reset(ASSERT_LINE);
119114      return;
120115   default:
121      logerror("ne2000: invalid register write %02X\n", offset);
116      logerror("x68k_neptune: invalid register write %02X\n", offset);
122117   }
123118   return;
124119}
r29498r29499
128123   if(offset < 32) return m_prom[offset>>1];
129124   if((offset < (16*1024)) || (offset >= (32*1024)))
130125   {
131      logerror("ne2000: invalid memory read %04X\n", offset);
126      logerror("x68k_neptune: invalid memory read %04X\n", offset);
132127      return 0xff;
133128   }
134129   return m_board_ram[offset - (16*1024)];
r29498r29499
138133{
139134   if((offset < (16*1024)) || (offset >= (32*1024)))
140135   {
141      logerror("ne2000: invalid memory write %04X\n", offset);
136      logerror("x68k_neptune: invalid memory write %04X\n", offset);
142137      return;
143138   }
144139   m_board_ram[offset - (16*1024)] = data;

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