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r26332 Thursday 21st November, 2013 at 14:27:19 UTC by Jürgen Buchmüller
Remove redundant macros and simplify code while hunting the jiggly cursor bug.
[/branches/alto2/src/emu/cpu/alto2]a2curt.c a2dht.c a2disk.c a2disk.h a2disp.c a2disp.h a2dvt.c a2dwt.c a2ether.c alto2cpu.c alto2cpu.h

branches/alto2/src/emu/cpu/alto2/a2dwt.c
r26331r26332
1414 */
1515void alto2_cpu_device::f1_early_dwt_block()
1616{
17   m_dsp.dwt_blocks = 1;
17   m_dsp.dwt_blocks = true;
1818
1919   /* clear the wakeup for the display word task */
2020   m_task_wakeup &= ~(1 << m_task);
branches/alto2/src/emu/cpu/alto2/a2disk.h
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4242#if   USE_BITCLK_TIMER
4343   emu_timer* bitclk_timer;      //!< bit clock timer
4444#else
45   int bitclk_time;            //!< time in clocks per bit
45   int bitclk_time[2];            //!< per drive time in clocks per bit
4646#endif
4747   UINT8 datin;               //!< current datin from the drive
4848   UINT8 bitcount;               //!< bit counter
branches/alto2/src/emu/cpu/alto2/a2disp.c
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9696 * </PRE>
9797 */
9898
99//!< test the HBLANK (horizontal blanking) signal in PROM a63 being high
100#define A63_HBLANK_HI(a) ((a & A63_HBLANK) ? true : false)
101
102//!< test the HSYNC (horizontal synchonisation) signal in PROM a63 being high
103#define A63_HSYNC_HI(a) ((a & A63_HSYNC) ? true : false)
104
105//!< test the SCANEND (scanline end) signal in PROM a63 being high
106#define A63_SCANEND_HI(a) ((a & A63_SCANEND) ? true : false)
107
108//!< test the HLCGATE (horz. line counter gate) signal in PROM a63 being high
109#define A63_HLCGATE_HI(a) ((a & A63_HLCGATE) ? true : false)
110
99111/**
100112 * @brief PROM a66 is a 256x4 bit (type 3601)
101113 * <PRE>
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109121 * </PRE>
110122 */
111123
124//! test the VSYNC (vertical synchronisation) signal in PROM a66 being high
125#define A66_VSYNC(a) (a & (HLC1024 ? A66_VSYNC_ODD : A66_VSYNC_EVEN) ? false : true)
126
127//! test the VBLANK (vertical blanking) signal in PROM a66 being high
128#define A66_VBLANK(a) (a & (HLC1024 ? A66_VBLANK_ODD : A66_VBLANK_EVEN) ? false : true)
129
112130/**
113131 * @brief double the bits for a byte (left and right of display word) to a word
114132 */
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150168//! update the internal bitmap to a byte array
151169void alto2_cpu_device::update_bitmap_word(int x, int y, UINT16 word)
152170{
153   const UINT8 white = 0;
154   const UINT8 black = 1;
155171   UINT8* pix = m_dsp.scanline[y] + x;
156   *pix++ = (word & 0100000) ? black : white;
157   *pix++ = (word & 0040000) ? black : white;
158   *pix++ = (word & 0020000) ? black : white;
159   *pix++ = (word & 0010000) ? black : white;
160   *pix++ = (word & 0004000) ? black : white;
161   *pix++ = (word & 0002000) ? black : white;
162   *pix++ = (word & 0001000) ? black : white;
163   *pix++ = (word & 0000400) ? black : white;
164   *pix++ = (word & 0000200) ? black : white;
165   *pix++ = (word & 0000100) ? black : white;
166   *pix++ = (word & 0000040) ? black : white;
167   *pix++ = (word & 0000020) ? black : white;
168   *pix++ = (word & 0000010) ? black : white;
169   *pix++ = (word & 0000004) ? black : white;
170   *pix++ = (word & 0000002) ? black : white;
171   *pix++ = (word & 0000001) ? black : white;
172   *pix++ = (word >> 15) & 1;
173   *pix++ = (word >> 14) & 1;
174   *pix++ = (word >> 13) & 1;
175   *pix++ = (word >> 12) & 1;
176   *pix++ = (word >> 11) & 1;
177   *pix++ = (word >> 10) & 1;
178   *pix++ = (word >>  9) & 1;
179   *pix++ = (word >>  8) & 1;
180   *pix++ = (word >>  7) & 1;
181   *pix++ = (word >>  6) & 1;
182   *pix++ = (word >>  5) & 1;
183   *pix++ = (word >>  4) & 1;
184   *pix++ = (word >>  3) & 1;
185   *pix++ = (word >>  2) & 1;
186   *pix++ = (word >>  1) & 1;
187   *pix++ = (word >>  0) & 1;
172188}
173189
174190#define   HLC1   ((m_dsp.hlc >>  0) & 1)      //!< horizontal line counter bit 0
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189205//!< helper to extract A3-A0 from a PROM a63 value
190206#define A63_NEXT(n) ((n >> 2) & 017)
191207
192//!< test the HBLANK (horizontal blanking) signal in PROM a63 being high
193#define A63_HBLANK_HI(a) ((a & A63_HBLANK) ? true : false)
194//!< test the HBLANK (horizontal blanking) signal in PROM a63 being low
195#define A63_HBLANK_LO(a) ((a & A63_HBLANK) ? false : true)
196//!< test the HSYNC (horizontal synchonisation) signal in PROM a63 being high
197#define A63_HSYNC_HI(a) ((a & A63_HSYNC) ? true : false)
198//!< test the HSYNC (horizontal synchonisation) signal in PROM a63 being low
199#define A63_HSYNC_LO(a) ((a & A63_HSYNC) ? false : true)
200//!< test the SCANEND (scanline end) signal in PROM a63 being high
201#define A63_SCANEND_HI(a) ((a & A63_SCANEND) ? true : false)
202//!< test the SCANEND (scanline end) signal in PROM a63 being low
203#define A63_SCANEND_LO(a) ((a & A63_SCANEND) ? false : true)
204//!< test the HLCGATE (horz. line counter gate) signal in PROM a63 being high
205#define A63_HLCGATE_HI(a) ((a & A63_HLCGATE) ? true : false)
206//!< test the HLCGATE (horz. line counter gate) signal in PROM a63 being low
207#define A63_HLCGATE_LO(a) ((a & A63_HLCGATE) ? false : true)
208
209208/**
210209 * @brief unload the next word from the display FIFO and shift it to the screen
211210 */
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302301         m_task_wakeup |= 1 << task_ether;
303302      }
304303   }
305   UINT8 a66 = 017;
306   if (HLC256 || HLC512) {
307      // PROM a66 is disabled, if any of HLC256 or HLC512 are high
308   } else {
309      // PROM a66 address lines are connected the HLC1 to HLC128 signals
310      a66 = m_disp_a66[m_dsp.hlc & 0377];
311   }
304   // PROM a66 is disabled, if any of HLC256 or HLC512 are high
305   UINT8 a66 = (HLC256 || HLC512) ? 017 : m_disp_a66[m_dsp.hlc & 0377];
312306
313307   // next address from PROM a63, use A4 from HLC1
314308   UINT8 next = ((HLC1 ^ 1) << 4) | A63_NEXT(a63);
315309
316   if (A66_VBLANK_HI(a66, HLC1024)) {
310   if (A66_VBLANK(a66)) {
317311      /* VBLANK: remember hlc */
318      m_dsp.vblank = m_dsp.hlc | 1;
312      m_dsp.vblank = m_dsp.hlc & ~02000;
319313
320314      LOG((LOG_DISPL,1, " VBLANK"));
321315
322316      /* VSYNC is always within VBLANK */
323      if (A66_VSYNC_HI(a66, HLC1024)) {
324         if (A66_VSYNC_LO(m_dsp.a66, HLC1024)) {
317      if (A66_VSYNC(a66)) {
318         if (!A66_VSYNC(m_dsp.a66)) {
325319            LOG((LOG_DISPL,1, " VSYNC/ (wake DVT)"));
326320            /*
327321             * The display vertical task DVT is awakened once per field,
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334328         }
335329      }
336330   } else {
337      if (A66_VBLANK_HI(m_dsp.a66, HLC1024)) {
331      if (A66_VBLANK(m_dsp.a66)) {
338332         /**
339333          * VBLANKPULSE:
340334          * The display horizontal task DHT is awakened once at the
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345339          * next field.
346340          */
347341         LOG((LOG_DISPL,1, " VBLANKPULSE (wake DHT)"));
348         m_dsp.dht_blocks = 0;
349         m_dsp.dwt_blocks = 0;
342         m_dsp.dht_blocks = false;
343         m_dsp.dwt_blocks = false;
350344         m_task_wakeup |= 1 << task_dht;
351345         /*
352346          * VBLANKPULSE also resets the cursor task block flip flop,
353347          * which is built from two NAND gates a40c and a40d (74H01).
354348          */
355         m_dsp.curt_blocks = 0;
349         m_dsp.curt_blocks = false;
356350      }
357      if (A63_HBLANK_LO(a63) && A63_HBLANK_HI(m_dsp.a63)) {
351      if (!A63_HBLANK_HI(a63) && A63_HBLANK_HI(m_dsp.a63)) {
358352         /* falling edge of a63 HBLANK starts unload */
359353         LOG((LOG_DISPL,1, " HBLANK\\ UNLOAD"));
360354         m_unload_time = ALTO2_DISPLAY_BITTIME(m_dsp.halfclock ? 32 : 16);
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374368    * are generated.
375369    */
376370   if (!m_dsp.dwt_blocks && !m_dsp.dht_blocks && FIFO_STOPWAKE_0() != 0) {
377      if (!(m_task_wakeup & (1 << task_dwt))) {
378         m_task_wakeup |= 1 << task_dwt;
379         LOG((LOG_DISPL,1, " (wake DWT)"));
380      }
371      m_task_wakeup |= 1 << task_dwt;
372      LOG((LOG_DISPL,1, " (wake DWT)"));
381373   }
382374
383375   if (A63_SCANEND_HI(a63)) {
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385377      m_task_wakeup &= ~(1 << task_dwt);
386378   }
387379
388   LOG((LOG_DISPL,1, "%s", (a63 & A63_HBLANK) ? " HBLANK": ""));
380   LOG((LOG_DISPL,1, "%s", A63_HBLANK_HI(a63) ? " HBLANK": ""));
389381
390382   if (A63_HSYNC_HI(a63)) {
391      if (A63_HSYNC_LO(m_dsp.a63)) {
383      if (!A63_HSYNC_HI(m_dsp.a63)) {
392384         LOG((LOG_DISPL,1, " HSYNC/ (CLRBUF)"));
393385         /*
394386          * The hardware sets the buffer empty and clears the DWT block
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397389          */
398390         m_dsp.fifo_wr = 0;
399391         m_dsp.fifo_rd = 0;
400         m_dsp.dwt_blocks = 0;
392         m_dsp.dwt_blocks = false;
401393         /* now take the new values from the last setmode */
402394         m_dsp.inverse = GET_SETMODE_INVERSE(m_dsp.setmode) ? 0xffff : 0x0000;
403395         m_dsp.halfclock = GET_SETMODE_SPEEDY(m_dsp.setmode);
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406398      } else {
407399         LOG((LOG_DISPL,1, " HSYNC"));
408400      }
409   } else if (A63_SCANEND_HI(a63)) {
410      /*
411       * CLRBUF' also resets the 2nd cursor task block flip flop,
412       * which is built from two NAND gates a30c and a30d (74H00).
413       * If both flip flops are reset, the NOR gate a20d (74S02)
414       * decodes this as WAKECURT signal.
415       */
416      m_dsp.curt_wakeup = 1;
417401   }
402   // FIXME: try at the end of HSYNC
403   if (A63_HSYNC_HI(m_dsp.a63) && !A63_HSYNC_HI(a63)) {
404         /*
405          * CLRBUF' also resets the 2nd cursor task block flip flop,
406          * which is built from two NAND gates a30c and a30d (74H00).
407          * If both flip flops are reset, the NOR gate a20d (74S02)
408          * decodes this as WAKECURT signal.
409          */
410         m_dsp.curt_wakeup = true;
411   }
418412
419413
420414   LOG((LOG_DISPL,1, " NEXT:%03o\n", next));
branches/alto2/src/emu/cpu/alto2/a2disp.h
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185185   UINT16 fifo[ALTO2_DISPLAY_FIFO];   //!< display word fifo
186186   UINT8 fifo_wr;                  //!< fifo input pointer (4-bit)
187187   UINT8 fifo_rd;                  //!< fifo output pointer (4-bit)
188   UINT8 dht_blocks;               //!< set non-zero, if the DHT executed BLOCK
189   UINT8 dwt_blocks;               //!< set non-zero, if the DWT executed BLOCK
190   UINT8 curt_blocks;               //!< set non-zero, if the CURT executed BLOCK
191   UINT8 curt_wakeup;               //!< set non-zero, if CURT wakeups are generated
188   bool dht_blocks;               //!< set non-zero, if the DHT executed BLOCK
189   bool dwt_blocks;               //!< set non-zero, if the DWT executed BLOCK
190   bool curt_blocks;               //!< set non-zero, if the CURT executed BLOCK
191   bool curt_wakeup;               //!< set non-zero, if CURT wakeups are generated
192192   UINT16 vblank;                  //!< most recent HLC with VBLANK still high (11-bit)
193193   UINT16 xpreg;                  //!< cursor cursor x position register (10-bit)
194194   UINT16 csr;                     //!< cursor shift register (16-bit)
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297297   A66_VBLANK_EVEN   = (1 << 3)
298298};
299299
300//! test the VSYNC (vertical synchronisation) signal in PROM a66 being high
301static inline bool A66_VSYNC_HI(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VSYNC_ODD : A66_VSYNC_EVEN) ? false : true; }
302//! test the VSYNC (vertical synchronisation) signal in PROM a66 being low
303static inline bool A66_VSYNC_LO(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VSYNC_ODD : A66_VSYNC_EVEN) ? true : false; }
304//! test the VBLANK (vertical blanking) signal in PROM a66 being high
305static inline bool A66_VBLANK_HI(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VBLANK_ODD : A66_VBLANK_EVEN) ? false : true; }
306//! test the VBLANK (vertical blanking) signal in PROM a66 being low
307static inline bool A66_VBLANK_LO(UINT8 a, int hlc1024) { return a & (hlc1024 ? A66_VBLANK_ODD : A66_VBLANK_EVEN) ? true : false; }
308
309300void update_bitmap_word(int x, int y, UINT16 word);   //!< update a word in the screen bitmap
310301void unload_word();               //!< unload the next word from the display FIFO and shift it to the screen
311302void display_state_machine();      //!< function called by the CPU to enter the next display state
branches/alto2/src/emu/cpu/alto2/alto2cpu.c
r26331r26332
606606/* dmap */   DMAP_DEFAULT,
607607/* dand */   KEEP,
608608/* type */   sizeof(UINT32)
609    }
609   }
610610#endif   // (UCODE_ROM_PAGES > 1)
611611};
612612
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12971297// FIXME
12981298void alto2_cpu_device::device_reset()
12991299{
1300    soft_reset();
1300   soft_reset();
13011301}
13021302
13031303/**
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16401640 */
16411641WRITE16_MEMBER( alto2_cpu_device::noop_w )
16421642{
1643    LOG((LOG_CPU,0,"   MMIO wr %s\n", memory_range_name(offset)));
1643   LOG((LOG_CPU,0,"   MMIO wr %s\n", memory_range_name(offset)));
16441644}
16451645
16461646/**
r26331r26332
24752475/** @brief flag that tells whether to load the T register from BUS or ALU */
24762476#define   TSELECT   A10_TSELECT
24772477
2478/** @brief flag that tells wheter operation was 0: logic (M=1) or 1: arithmetic (M=0) */
2479#define   ALUM2   A10_ALUM
2478/** @brief flag that tells wheter operation was 0: arithmetic (M=0) or 1: logic (M=1) */
2479#define   ALUM   A10_ALUM
24802480
24812481/** @brief execute the CPU for at most nsecs nano seconds */
24822482void alto2_cpu_device::execute_run()
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24872487   do {
24882488      int do_bs, flags;
24892489
2490      /*
2491       * Subtract the microcycle time from the display time accu.
2492       * If it underflows, call the display state machine and add
2493       * the time for 24 pixel clocks to the accu.
2494       * This is very close to every seventh CPU cycle.
2495       */
2496      m_dsp_time -= ALTO2_UCYCLE;
2497      if (m_dsp_time < 0) {
2498         display_state_machine();
2499         m_dsp_time += ALTO2_DISPLAY_BITTIME(24);
2500      }
2501      if (m_unload_time >= 0) {
2502         /*
2503          * Subtract the microcycle time from the unload time accu.
2504          * If it underflows, call the unload word function which adds
2505          * the time for 16 or 32 pixel clocks to the accu, or ends
2506          * the unloading by leaving m_unload_time at -1.
2507          */
2508         m_unload_time -= ALTO2_UCYCLE;
2509         if (m_unload_time < 0)
2510            unload_word();
2511      }
2512#if   (USE_BITCLK_TIMER == 0)
2513      if (m_bitclk_time >= 0) {
2514         /*
2515          * Subtract the microcycle time from the bitclk time accu.
2516          * If it underflows, call the disk bitclk function which adds
2517          * the time for one bit as clocks to the accu, or ends
2518          * the bitclk sequence by leaving m_bitclk_time at -1.
2519          */
2520         m_bitclk_time -= ALTO2_UCYCLE;
2521         disk_bitclk(0, m_bitclk_index);
2522      }
2523#endif
2524
25252490      m_cycle++;
25262491      /* nano seconds per cycle */
25272492      m_pico_time[m_task] += ALTO2_UCYCLE;
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26162581      UINT8 a10 = m_alu_a10[(m_emu.skip << 4) | m_d_aluf];
26172582      UINT32 alu = alu_74181(m_bus, m_t, a10);
26182583      m_aluc0 = (alu >> 16) & 1;
2619      flags = (a10 ^ ALUM2) & (TSELECT | ALUM2);
2584      flags = a10 & (TSELECT | ALUM);
26202585      m_alu = static_cast<UINT16>(alu);
26212586#else
26222587      UINT32 alu;
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26312596      case aluf_bus__alut:
26322597         alu = m_bus;
26332598         m_aluc0 = 1;
2634         flags = 0;
2599         flags = ALUM;
26352600         LOG((LOG_CPU,2,"   ALU← BUS (%#o := %#o)\n", alu, m_bus));
26362601         break;
26372602
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26442609      case aluf_treg:
26452610         alu = m_t;
26462611         m_aluc0 = 1;
2647         flags = 0;
2612         flags = ALUM;
26482613         LOG((LOG_CPU,2,"   ALU← T (%#o := %#o)\n", alu, m_t));
26492614         break;
26502615
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26572622      case aluf_bus_or_t__alut:
26582623         alu = m_bus | m_t;
26592624         m_aluc0 = 1;
2660         flags = TSELECT;
2625         flags = ALUM | TSELECT;
26612626         LOG((LOG_CPU,2,"   ALU← BUS OR T (%#o := %#o | %#o)\n", alu, m_bus, m_t));
26622627         break;
26632628
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26702635      case aluf_bus_and_t:
26712636         alu = m_bus & m_t;
26722637         m_aluc0 = 1;
2673         flags = 0;
2638         flags = ALUM;
26742639         LOG((LOG_CPU,2,"   ALU← BUS AND T (%#o := %#o & %#o)\n", alu, m_bus, m_t));
26752640         break;
26762641
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26832648      case aluf_bus_xor_t:
26842649         alu = m_bus ^ m_t;
26852650         m_aluc0 = 1;
2686         flags = 0;
2651         flags = ALUM;
26872652         LOG((LOG_CPU,2,"   ALU← BUS XOR T (%#o := %#o ^ %#o)\n", alu, m_bus, m_t));
26882653         break;
26892654
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26962661      case aluf_bus_plus_1__alut:
26972662         alu = m_bus + 1;
26982663         m_aluc0 = (alu >> 16) & 1;
2699         flags = ALUM2 | TSELECT;
2664         flags = TSELECT;
27002665         LOG((LOG_CPU,2,"   ALU← BUS + 1 (%#o := %#o + 1)\n", alu, m_bus));
27012666         break;
27022667
r26331r26332
27092674      case aluf_bus_minus_1__alut:
27102675         alu = m_bus + 0177777;
27112676         m_aluc0 = (~alu >> 16) & 1;
2712         flags = ALUM2 | TSELECT;
2677         flags = TSELECT;
27132678         LOG((LOG_CPU,2,"   ALU← BUS - 1 (%#o := %#o - 1)\n", alu, m_bus));
27142679         break;
27152680
r26331r26332
27222687      case aluf_bus_plus_t:
27232688         alu = m_bus + m_t;
27242689         m_aluc0 = (alu >> 16) & 1;
2725         flags = ALUM2;
2690         flags = 0;
27262691         LOG((LOG_CPU,2,"   ALU← BUS + T (%#o := %#o + %#o)\n", alu, m_bus, m_t));
27272692         break;
27282693
r26331r26332
27352700      case aluf_bus_minus_t:
27362701         alu = m_bus + ~m_t + 1;
27372702         m_aluc0 = (~alu >> 16) & 1;
2738         flags = ALUM2;
2703         flags = 0;
27392704         LOG((LOG_CPU,2,"   ALU← BUS - T (%#o := %#o - %#o)\n", alu, m_bus, m_t));
27402705         break;
27412706
r26331r26332
27482713      case aluf_bus_minus_t_minus_1:
27492714         alu = m_bus + ~m_t;
27502715         m_aluc0 = (~alu >> 16) & 1;
2751         flags = ALUM2;
2716         flags = 0;
27522717         LOG((LOG_CPU,2,"   ALU← BUS - T - 1 (%#o := %#o - %#o - 1)\n", alu, m_bus, m_t));
27532718         break;
27542719
r26331r26332
27612726      case aluf_bus_plus_t_plus_1__alut:
27622727         alu = m_bus + m_t + 1;
27632728         m_aluc0 = (alu >> 16) & 1;
2764         flags = ALUM2 | TSELECT;
2729         flags = TSELECT;
27652730         LOG((LOG_CPU,2,"   ALU← BUS + T + 1 (%#o := %#o + %#o + 1)\n", alu, m_bus, m_t));
27662731         break;
27672732
r26331r26332
27742739      case aluf_bus_plus_skip__alut:
27752740         alu = m_bus + m_emu.skip;
27762741         m_aluc0 = (alu >> 16) & 1;
2777         flags = ALUM2 | TSELECT;
2742         flags = TSELECT;
27782743         LOG((LOG_CPU,2,"   ALU← BUS + SKIP (%#o := %#o + %#o)\n", alu, m_bus, m_emu.skip));
27792744         break;
27802745
r26331r26332
27872752      case aluf_bus_and_t__alut:
27882753         alu = m_bus & m_t;
27892754         m_aluc0 = 1;
2790         flags = TSELECT;
2755         flags = ALUM | TSELECT;
27912756         LOG((LOG_CPU,2,"   ALU← BUS,T (%#o := %#o & %#o)\n", alu, m_bus, m_t));
27922757         break;
27932758
r26331r26332
28002765      case aluf_bus_and_not_t:
28012766         alu = m_bus & ~m_t;
28022767         m_aluc0 = 1;
2803         flags = 0;
2768         flags = ALUM;
28042769         LOG((LOG_CPU,2,"   ALU← BUS AND NOT T (%#o := %#o & ~%#o)\n", alu, m_bus, m_t));
28052770         break;
28062771
r26331r26332
28132778      case aluf_undef_16:
28142779         alu = m_bus;
28152780         m_aluc0 = 1;
2816         flags = TSELECT;
2781         flags = ALUM | TSELECT;
28172782         LOG((LOG_CPU,0,"   ALU← 0 (illegal aluf in task %s, mpc:%05o aluf:%02o)\n", task_name(m_task), m_mpc, aluf));
28182783         break;
28192784
r26331r26332
28272792      default:
28282793         alu = m_bus;
28292794         m_aluc0 = 1;
2830         flags = TSELECT;
2795         flags = ALUM | TSELECT;
28312796         LOG((LOG_CPU,0,"   ALU← 0 (illegal aluf in task %s, mpc:%05o aluf:%02o)\n", task_name(m_task), m_mpc, aluf));
28322797      }
28332798      m_alu = static_cast<UINT16>(alu);
r26331r26332
28532818      // update L register and LALUC0, and also M register, if a RAM related task is active
28542819      if (m_d_loadl) {
28552820         m_l = m_alu;         // load L from ALU
2856         if (flags & ALUM2) {
2857            m_laluc0 = m_aluc0;
2821         if (flags & ALUM) {
2822            m_laluc0 = 0;      // logic operation - latch 0
2823            LOG((LOG_CPU,2, "   L← ALU (%#o); LALUC0← %o\n", m_alu, 0));
2824         } else {
2825            m_laluc0 = m_aluc0;   // logic operation - latch carry
28582826            LOG((LOG_CPU,2, "   L← ALU (%#o); LALUC0← ALUC0 (%o)\n", m_alu, m_aluc0));
2859         } else {
2860            m_laluc0 = 0;
2861            LOG((LOG_CPU,2, "   L← ALU (%#o); LALUC0← %o\n", m_alu, 0));
28622827         }
28632828         if (m_ram_related[m_task]) {
28642829            m_m = m_alu;      // load M from ALU, if 'GOODTASK'
r26331r26332
28672832         }
28682833      }
28692834
2870      // update T register, if LOADT is set
2871      if (m_d_loadt) {
2872         m_cram_addr = m_alu;   // latch CRAM address
2873         if (flags & TSELECT) {
2874            m_t = m_alu;      // T source is ALU
2875            LOG((LOG_CPU,2, "   T← ALU (%#o)\n", m_alu));
2876         } else {
2877            m_t = m_bus;      // T source is BUS
2878            LOG((LOG_CPU,2, "   T← BUS (%#o)\n", m_bus));
2879         }
2880      }
2881
28822835      if (m_task != m_next2_task) {
28832836         /* switch now? */
28842837         if (m_task == m_next_task) {
r26331r26332
28972850            ((*this).*m_active_callback[m_task])();
28982851         }
28992852      }
2853
2854      // update T register, if LOADT is set
2855      if (m_d_loadt) {
2856         m_cram_addr = m_alu;   // latch CRAM address
2857         if (flags & TSELECT) {
2858            m_t = m_alu;      // T source is ALU
2859            LOG((LOG_CPU,2, "   T← ALU (%#o)\n", m_alu));
2860         } else {
2861            m_t = m_bus;      // T source is BUS
2862            LOG((LOG_CPU,2, "   T← BUS (%#o)\n", m_bus));
2863         }
2864      }
2865
2866      /*
2867       * Subtract the microcycle time from the display time accu.
2868       * If it underflows, call the display state machine and add
2869       * the time for 24 pixel clocks to the accu.
2870       * This is very close to every seventh CPU cycle.
2871       */
2872      m_dsp_time -= ALTO2_UCYCLE;
2873      if (m_dsp_time < 0) {
2874         display_state_machine();
2875         m_dsp_time += ALTO2_DISPLAY_BITTIME(24);
2876      }
2877      if (m_unload_time >= 0) {
2878         /*
2879          * Subtract the microcycle time from the unload time accu.
2880          * If it underflows, call the unload word function which adds
2881          * the time for 16 or 32 pixel clocks to the accu, or ends
2882          * the unloading by leaving m_unload_time at -1.
2883          */
2884         m_unload_time -= ALTO2_UCYCLE;
2885         if (m_unload_time < 0)
2886            unload_word();
2887      }
2888#if   (USE_BITCLK_TIMER == 0)
2889      if (m_bitclk_time >= 0) {
2890         /*
2891          * Subtract the microcycle time from the bitclk time accu.
2892          * If it underflows, call the disk bitclk function which adds
2893          * the time for one bit as clocks to the accu, or ends
2894          * the bitclk sequence by leaving m_bitclk_time at -1.
2895          */
2896         m_bitclk_time -= ALTO2_UCYCLE;
2897         disk_bitclk(0, m_bitclk_index);
2898      }
2899#endif
29002900   } while (m_icount-- > 0);
29012901
29022902   /* save this task's mpc and address modifier */
branches/alto2/src/emu/cpu/alto2/a2ether.c
r26331r26332
331331 *
332332 * @param crc previous CRC value
333333 * @param data 16 bit data
334 * @result new CRC value after 16 bits
334 * @return new CRC value after 16 bits
335335 */
336336UINT32 f9401_7(UINT32 crc, UINT32 data)
337337{
338338   int i;
339339   for (i = 0; i < 16; i++) {
340340      crc <<= 1;
341      if (data & 0100000)
342         crc ^= (1<<15) | (1<<10) | (1<<3) | (1<<0);
341      if (data & (1 << 15))
342         crc ^= (1 << 10) | (1 << 3) | (1 << 0);
343343      data <<= 1;
344344   }
345345   return crc & 0177777;
r26331r26332
676676 */
677677void alto2_cpu_device::activate_eth()
678678{
679    m_ewfct = 0;
679   m_ewfct = 0;
680680}
681681
682682/**
branches/alto2/src/emu/cpu/alto2/alto2cpu.h
r26331r26332
5151#endif
5252
5353#define   USE_PRIO_F9318         0         //!< define to 1 to use the F9318 priority encoder code
54#define   USE_ALU_74181         0         //!< define to 1 to use the SN74181 ALU code
54#define   USE_ALU_74181         1         //!< define to 1 to use the SN74181 ALU code
5555#define   DEBUG_DISPLAY_TIMING   0         //!< define to 1 to debug the display timing
5656#define   USE_BITCLK_TIMER      0         //!< define to 1 to use a very high rate timer for the disk bit clock
5757#define   ALTO2_HAMMING_CHECK      0         //!< define to 1 to incorporate the Hamming code and Parity check
branches/alto2/src/emu/cpu/alto2/a2curt.c
r26331r26332
1414 */
1515void alto2_cpu_device::f1_early_curt_block()
1616{
17   m_dsp.curt_blocks = true;
1718   m_task_wakeup &= ~(1 << m_task);
1819   LOG((LOG_CURT,2,"   BLOCK %s\n", task_name(m_task)));
19   m_dsp.curt_blocks = 1;
2020}
2121
2222/**
r26331r26332
5959 */
6060void alto2_cpu_device::activate_curt()
6161{
62    m_task_wakeup &= ~(1 << m_task);
63    m_dsp.curt_wakeup = 0;
62   m_task_wakeup &= ~(1 << m_task);
63   m_dsp.curt_wakeup = false;
6464}
6565
6666/** @brief initialize the cursor task F1 and F2 functions */
branches/alto2/src/emu/cpu/alto2/a2dht.c
r26331r26332
1414 */
1515void alto2_cpu_device::f1_early_dht_block()
1616{
17   m_dsp.dht_blocks = 1;
17   m_dsp.dht_blocks = true;
1818   /* clear the wakeup for the display horizontal task */
1919   m_task_wakeup &= ~(1 << m_task);
2020   LOG((LOG_DHT,2,"   BLOCK %s\n", task_name(m_task)));
branches/alto2/src/emu/cpu/alto2/a2dvt.c
r26331r26332
1414 */
1515void alto2_cpu_device::f1_early_dvt_block()
1616{
17   m_task_wakeup &= ~(1 << m_task);
17//   m_task_wakeup &= ~(1 << m_task);
1818   LOG((LOG_DVT,2,"   BLOCK %s\n", task_name(m_task)));
1919}
2020
r26331r26332
2424 */
2525void alto2_cpu_device::activate_dvt()
2626{
27   /* TODO: what do we do here? */
2827   m_task_wakeup &= ~(1 << m_task);
2928}
3029
branches/alto2/src/emu/cpu/alto2/a2disk.c
r26331r26332
927927 */
928928void alto2_cpu_device::disk_block(int task)
929929{
930    kwd_timing(m_dsk.bitclk, m_dsk.datin, task);
930   kwd_timing(m_dsk.bitclk, m_dsk.datin, task);
931931}
932932
933933/**
r26331r26332
15291529    * </PRE>
15301530    */
15311531   if (m_dsk.krwc & RWC_WRITE) {
1532      bit = (m_dsk.shiftout >> 15) & 1;
1533      kwd_timing(clk, bit, 0);
15341532      if (GET_KCOM_XFEROFF(m_dsk.kcom)) {
15351533         /* do anything, if the transfer is off? */
1534         kwd_timing(clk, 1, 0);
15361535      } else {
1536         bit = (m_dsk.shiftout >> 15) & 1;
1537         kwd_timing(clk, bit, 0);
15371538         LOG((LOG_DISK,7,"   BITCLK#%d bit:%d (write) @%lldns\n", arg, bit, ntime()));
15381539         if (clk)
15391540            dhd->wr_data(arg, bit);
r26331r26332
15661567   }
15671568#else
15681569   if (++arg < dhd->bits_per_sector()) {
1569      if (!m_dsk.bitclk_time) {
1570         // get bit time in pico seconds
1571         m_dsk.bitclk_time = static_cast<int>(dhd->bit_time().as_attoseconds() / 1000000);
1572      }
1573      m_bitclk_time += m_dsk.bitclk_time;
1570      m_bitclk_time += m_dsk.bitclk_time[m_dsk.drive];
15741571      m_bitclk_index = arg;
15751572   } else {
15761573      // stop the bitclock timer
r26331r26332
15881585{
15891586   diablo_hd_device* dhd = m_drive[unit];
15901587   LOG((LOG_DISK,0,"%s dhd=%p\n", __FUNCTION__, dhd));
1588   // get bit time in pico seconds
1589   m_dsk.bitclk_time[unit] = static_cast<int>(dhd->bit_time().as_attoseconds() / 1000000);
15911590#if   USE_BITCLK_TIMER
15921591   LOG((LOG_DISK,0,"   unit #%d stop bitclk\n", unit));
15931592   m_dsk.bitclk_timer->enable(false);
r26331r26332
16841683
16851684   m_dsk.ready_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(alto2_cpu_device::disk_ready_mf31a),this));
16861685   m_dsk.ready_timer->reset();
1686
1687   m_dsk.bitclk_time[0] = static_cast<int>(attotime::from_nsec(300).as_attoseconds() / 1000000);
1688   m_dsk.bitclk_time[1] = static_cast<int>(attotime::from_nsec(300).as_attoseconds() / 1000000);
16871689}
16881690
16891691/**
r26331r26332
16911693 */
16921694void alto2_cpu_device::exit_disk()
16931695{
1694    // nothing to do yet
1696   // nothing to do yet
16951697}
16961698

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