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r26331 Thursday 21st November, 2013 at 14:27:14 UTC by Jürgen Buchmüller
Add per unit m_cylinders since the 44 has 406, while the 31 has 203. Simplify strobe handling. TODO: verify that invalid seeks return appropriate status lines.
[/branches/alto2/src/emu/machine]diablo_hd.c diablo_hd.h

branches/alto2/src/emu/machine/diablo_hd.c
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55 *
66 *   Licenses: MAME, GPLv2
77 **********************************************************/
8
98#include "diablo_hd.h"
109
1110/**
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8382   m_egate_0(1),
8483   m_wrgate_0(1),
8584   m_rdgate_0(1),
85   m_cylinders(DIABLO_CYLINDERS),
86   m_pages(DIABLO_PAGES),
8687   m_cylinder(-1),
8788   m_head(-1),
8889   m_sector(-1),
8990   m_page(-1),
90   m_pages(DIABLO_PAGES),
9191   m_cache(0),
9292   m_bits(0),
9393   m_rdfirst(-1),
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132132   m_sector_callback = callback;
133133}
134134
135#define   DIABLO31_ROTATION_TIME attotime::from_usec(40000)      //!< DIABLO 31 rotation time is approx. 40ms
136#define   DIABLO31_SECTOR_TIME attotime::from_usec(40000/12)      //!< DIABLO 31 sector time
135#define   DIABLO31_ROTATION_TIME attotime::from_usec(39900)      //!< DIABLO 31 rotation time is approx. 40ms
136#define   DIABLO31_SECTOR_TIME attotime::from_usec(39900/12)      //!< DIABLO 31 sector time
137137/**
138138 * @brief DIABLO 31 bit clock is 3330kHz ~= 300ns per bit
139139 * ~= 133333 bits/track (?)
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141141 * ~= 347 words/sector
142142 */
143143#define   DIABLO31_BIT_TIME(bits) attotime::from_nsec(300*(bits))
144#define DIABLO31_SECTOR_BITS  11111
145#define   DIABLO31_SECTOR_WORDS 347                        //!< DIABLO 31 possible sector words
144#define DIABLO31_SECTOR_BITS   10432
145#define   DIABLO31_SECTOR_WORDS   347                        //!< DIABLO 31 possible sector words
146146#define   DIABLO31_SECTOR_MARK_PULSE_PRE DIABLO31_BIT_TIME(16)   //!< pulse width of sector mark before the next sector begins
147147#define   DIABLO31_SECTOR_MARK_PULSE_POST DIABLO31_BIT_TIME(16)   //!< pulse width of sector mark after the next sector began
148148
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155155 * ~= 325 words/sector
156156 */
157157#define   DIABLO44_BIT_TIME(bits) attotime::from_nsec(200*(bits))
158#define DIABLO44_SECTOR_BITS  10432
158#define DIABLO44_SECTOR_BITS   10432
159159#define   DIABLO44_SECTOR_WORDS   325                        //!< DIABLO 44 possible sector words
160160#define   DIABLO44_SECTOR_MARK_PULSE_PRE DIABLO44_BIT_TIME(16)   //!< pulse width of sector mark before the next sector begins
161161#define   DIABLO44_SECTOR_MARK_PULSE_POST DIABLO44_BIT_TIME(16)   //!< pulse width of sector mark after the next sector began
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284284      m_page = -1;
285285      return;
286286   }
287   if (m_cylinder < 0 || m_cylinder >= DIABLO_CYLINDERS) {
287   if (m_cylinder < 0 || m_cylinder >= m_cylinders) {
288288      LOG_DRIVE((0,"[DHD%u]   CHS:%03d/%d/%02d => invalid cylinder\n", m_unit, m_cylinder, m_head, m_sector));
289289      m_page = -1;
290290      return;
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304304
305305   // already have the sector image?
306306   if (m_cache[m_page]) {
307      LOG_DRIVE((6,"[DHD%u]   CHS:%03d/%d/%02d => page:%d is cached\n", m_unit, m_cylinder, m_head, m_sector, m_page));
307      LOG_DRIVE((9,"[DHD%u]   CHS:%03d/%d/%02d => page:%d is cached\n", m_unit, m_cylinder, m_head, m_sector, m_page));
308308      return;
309309   }
310310
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735735   src = squeeze_sync(bits, src, 40);         // sync on header preamble
736736   LOG_DRIVE((0,"[DHD%u]   header sync bit #%5d\n", m_unit, src));
737737   src = squeeze_record(bits, src, s->header, sizeof(s->header));
738   LOG_DRIVE((0,"[DHD%u]   header CRC bit #%5d\n", m_unit, src));
738739   src = squeeze_cksum(bits, src, &cksum_header);
739740#if   DIABLO_DEBUG
740741   dump_record(s->header, 0, sizeof(s->header), "header", 0);
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744745   src = squeeze_sync(bits, src, 40);         // sync on label preamble
745746   LOG_DRIVE((0,"[DHD%u]   label sync bit #%5d\n", m_unit, src));
746747   src = squeeze_record(bits, src, s->label, sizeof(s->label));
748   LOG_DRIVE((0,"[DHD%u]   label CRC bit #%5d\n", m_unit, src));
747749   src = squeeze_cksum(bits, src, &cksum_label);
748750#if   DIABLO_DEBUG
749751   dump_record(s->label, 0, sizeof(s->label), "label", 0);
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753755   src = squeeze_sync(bits, src, 40);         // sync on data preamble
754756   LOG_DRIVE((0,"[DHD%u]   data sync bit #%5d\n", m_unit, src));
755757   src = squeeze_record(bits, src, s->data, sizeof(s->data));
758   LOG_DRIVE((0,"[DHD%u]   data CRC bit #%5d\n", m_unit, src));
756759   src = squeeze_cksum(bits, src, &cksum_data);
757760#if   DIABLO_DEBUG
758761   dump_record(s->data, 0, sizeof(s->data), "data", 1);
759762#endif
763   LOG_DRIVE((0,"[DHD%u]   postamble bit #%5d\n", m_unit, src));
760764
761765   /* The checksum start value always seems to be 0521 */
762766   cksum_header ^= cksum(s->header, sizeof(s->header), 0521);
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786790 */
787791int diablo_hd_device::bits_per_sector() const
788792{
789    return m_diablo31 ? DIABLO31_SECTOR_BITS : DIABLO44_SECTOR_BITS;
793   return m_diablo31 ? DIABLO31_SECTOR_BITS : DIABLO44_SECTOR_BITS;
790794}
791795
792796/**
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795799 */
796800const char* diablo_hd_device::description() const
797801{
798    return m_description;
802   return m_description;
799803}
800804
801805/**
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804808 */
805809int diablo_hd_device::unit() const
806810{
807    return m_unit;
811   return m_unit;
808812}
809813
810814/**
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813817 */
814818attotime diablo_hd_device::rotation_time() const
815819{
816    return m_rotation_time;
820   return m_rotation_time;
817821}
818822
819823/**
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822826 */
823827attotime diablo_hd_device::sector_time() const
824828{
825    return m_sector_time;
829   return m_sector_time;
826830}
827831
828832/**
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831835 */
832836attotime diablo_hd_device::bit_time() const
833837{
834    return m_bit_time;
838   return m_bit_time;
835839}
836840
837841/**
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840844 */
841845int diablo_hd_device::get_seek_read_write_0() const
842846{
843    return m_s_r_w_0;
847   return m_s_r_w_0;
844848}
845849
846850/**
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849853 */
850854int diablo_hd_device::get_ready_0() const
851855{
852    return m_ready_0;
856   return m_ready_0;
853857}
854858
855859/**
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877881 */
878882int diablo_hd_device::get_addx_acknowledge_0() const
879883{
880    return m_addx_acknowledge_0;
884   return m_addx_acknowledge_0;
881885}
882886
883887/**
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886890 */
887891int diablo_hd_device::get_log_addx_interlock_0() const
888892{
889    return m_log_addx_interlock_0;
893   return m_log_addx_interlock_0;
890894}
891895
892896/**
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895899 */
896900int diablo_hd_device::get_seek_incomplete_0() const
897901{
898    return m_seek_incomplete_0;
902   return m_seek_incomplete_0;
899903}
900904
901905/**
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909913 */
910914int diablo_hd_device::get_cylinder() const
911915{
912    return m_cylinder;
916   return m_cylinder;
913917}
914918
915919/**
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923927 */
924928int diablo_hd_device::get_head() const
925929{
926    return m_head;
930   return m_head;
927931}
928932
929933/**
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941945 */
942946int diablo_hd_device::get_sector() const
943947{
944    return m_sector;
948   return m_sector;
945949}
946950
947951/**
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955959 */
956960int diablo_hd_device::get_page() const
957961{
958    return m_page;
962   return m_page;
959963}
960964
961965/**
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10211025   // assert the seek-read-write signal
10221026   m_s_r_w_0 = 0;
10231027
1028   bool complete = true;
10241029   if (seekto < m_cylinder) {
10251030      m_cylinder--;               // previous cylinder
10261031      if (m_cylinder < 0) {
10271032         m_cylinder = 0;
1028         m_log_addx_interlock_0 = 1;   // deassert the log address interlock signal
1029         m_seek_incomplete_0 = 1;   // deassert seek incomplete signal
1030         m_addx_acknowledge_0 = 0;   // assert address acknowledge signal
1031         LOG_DRIVE((1,"[DHD%u]   STROBE to cylinder %d incomplete\n", m_unit, seekto));
1032         return;
1033         complete = false;
10331034      }
10341035   }
10351036   if (seekto > m_cylinder) {
10361037      /* increment cylinder */
10371038      m_cylinder++;
1038      if (m_cylinder >= DIABLO_CYLINDERS) {
1039         m_cylinder = DIABLO_CYLINDERS - 1;
1040         m_log_addx_interlock_0 = 1;   // deassert the log address interlock signal
1041         m_seek_incomplete_0 = 1;   // deassert seek incomplete signal
1042         m_addx_acknowledge_0 = 0;   // assert address acknowledge signal
1043         LOG_DRIVE((1,"[DHD%u]   STROBE to cylinder %d incomplete\n", m_unit, seekto));
1044         return;
1039      if (m_cylinder >= m_cylinders) {
1040         m_cylinder = m_cylinders - 1;
1041         complete = false;
10451042      }
10461043   }
1047   LOG_DRIVE((1,"[DHD%u]   STROBE to cylinder %d (now %d) - interlock\n", m_unit, seekto, m_cylinder));
1048
1049   m_addx_acknowledge_0 = 1;   // deassert address acknowledge signal
1050   m_seek_incomplete_0 = 1;   // deassert seek incomplete signal
1051   read_sector();
1044   if (complete) {
1045      LOG_DRIVE((1,"[DHD%u]   STROBE to cylinder %d (now %d) - interlock\n", m_unit, seekto, m_cylinder));
1046      m_addx_acknowledge_0 = 1;   // deassert address acknowledge signal
1047      m_seek_incomplete_0 = 1;   // deassert seek incomplete signal
1048      read_sector();
1049   } else {
1050      m_log_addx_interlock_0 = 0;   // deassert the log address interlock signal
1051      m_seek_incomplete_0 = 1;   // deassert seek incomplete signal
1052      m_addx_acknowledge_0 = 0;   // assert address acknowledge signal
1053      LOG_DRIVE((1,"[DHD%u]   STROBE to cylinder %d incomplete\n", m_unit, seekto));
1054   }
10521055}
10531056
10541057/**
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10571060 */
10581061void diablo_hd_device::set_egate(int gate)
10591062{
1060    m_egate_0 = gate & 1;
1063   m_egate_0 = gate & 1;
10611064}
10621065
10631066/**
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10661069 */
10671070void diablo_hd_device::set_wrgate(int gate)
10681071{
1069    m_wrgate_0 = gate & 1;
1072   m_wrgate_0 = gate & 1;
10701073}
10711074
10721075/**
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10751078 */
10761079void diablo_hd_device::set_rdgate(int gate)
10771080{
1078    m_rdgate_0 = gate & 1;
1081   m_rdgate_0 = gate & 1;
10791082}
10801083
10811084/**
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10981101void diablo_hd_device::wr_data(int index, int wrdata)
10991102{
11001103   if (m_wrgate_0) {
1101      LOG_DRIVE((0,"[DHD%u]   wrgate not asserted\n", m_unit));
1104      LOG_DRIVE((0,"[DHD%u]   index=%d wrgate not asserted\n", m_unit, index));
11021105      return;   // write gate is not asserted (active 0)
11031106   }
11041107
11051108   if (index < 0 || index >= bits_per_sector()) {
1106      LOG_DRIVE((0,"[DHD%u]   index out of range (%d)\n", m_unit, index));
1109      LOG_DRIVE((0,"[DHD%u]   index=%d out of range\n", m_unit, index));
11071110      return;   // don't write before or beyond the sector
11081111   }
11091112
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11401143   int bit = 0;
11411144
11421145   if (m_rdgate_0) {
1143      LOG_DRIVE((1,"[DHD%u]   rdgate not asserted\n", m_unit));
1146      LOG_DRIVE((1,"[DHD%u]   index=%d rdgate not asserted\n", m_unit, index));
11441147      return 0;   // read gate is not asserted (active 0)
11451148   }
11461149
11471150   if (index < 0 || index >= bits_per_sector()) {
1148      LOG_DRIVE((0,"[DHD%u]   index out of range (%d)\n", m_unit, index));
1151      LOG_DRIVE((0,"[DHD%u]   index=%d out of range\n", m_unit, index));
11491152      return 1;   // don't read before or beyond the sector
11501153   }
11511154
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12361239{
12371240   LOG_DRIVE((9,"[DHD%u]   CHS:%03d/%d/%02d sector_mark_0=0\n", m_unit, m_cylinder, m_head, m_sector));
12381241
1242   // HACK: deassert wrgate
1243   m_wrgate_0 = 1;
1244
12391245   squeeze_sector();      // squeeze previous sector bits, if it was written to
12401246   m_sector_mark_0 = 0;   // assert sector mark (set to 0)
12411247   // reset read and write bit locations
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12871293      m_sector_mark_0_time = DIABLO31_SECTOR_MARK_PULSE_PRE;
12881294      m_sector_mark_1_time = DIABLO31_SECTOR_MARK_PULSE_PRE;
12891295      m_bit_time = DIABLO31_BIT_TIME(1);
1296      m_cylinders = DIABLO_CYLINDERS;
12901297      m_pages = DIABLO_PAGES;
12911298   } else {
12921299      snprintf(m_description, sizeof(m_description), "DIABLO44");
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12951302      m_sector_mark_0_time = DIABLO44_SECTOR_MARK_PULSE_PRE;
12961303      m_sector_mark_1_time = DIABLO44_SECTOR_MARK_PULSE_PRE;
12971304      m_bit_time = DIABLO44_BIT_TIME(1);
1305      m_cylinders = 2 * DIABLO_CYLINDERS;
12981306      m_pages = 2 * DIABLO_PAGES;
12991307   }
13001308   LOG_DRIVE((0,"[DHD%u]   rotation time       : %.0fns\n", m_unit, m_rotation_time.as_double() * ATTOSECONDS_PER_NANOSECOND));
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13491357 */
13501358void diablo_hd_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
13511359{
1352   LOG_DRIVE((6,"[DHD%u]   TIMER id=%d param=%d ptr=%p @%.0fns\n", m_unit, id, param, ptr, timer.elapsed().as_double() * ATTOSECONDS_PER_NANOSECOND));
1360   LOG_DRIVE((9,"[DHD%u]   TIMER id=%d param=%d ptr=%p @%.0fns\n", m_unit, id, param, ptr, timer.elapsed().as_double() * ATTOSECONDS_PER_NANOSECOND));
13531361
13541362   switch (param) {
13551363   case 0:
branches/alto2/src/emu/machine/diablo_hd.h
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1313#include "imagedev/diablo.h"
1414
1515#ifndef   DIABLO_DEBUG
16#define   DIABLO_DEBUG   0                         //!< set to 1 to enable debug log output
16#define   DIABLO_DEBUG   1                         //!< set to 1 to enable debug log output
1717#endif
1818
1919#define DIABLO_HD_0 "diablo0"
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9999   int m_egate_0;                     //!< erase gate
100100   int m_wrgate_0;                     //!< write gate
101101   int m_rdgate_0;                     //!< read gate
102   int m_cylinders;                  //!< total number of cylinders
103   int m_pages;                     //!< total number of pages
102104   int m_cylinder;                     //!< current cylinder number
103105   int m_head;                        //!< current head (track) number on cylinder
104106   int m_sector;                     //!< current sector number in track
105107   int m_page;                        //!< current page (derived from cylinder, head and sector)
106   int m_pages;                     //!< total number of pages
107108   UINT8** m_cache;                  //!< pages raw bytes
108109   UINT32** m_bits;                  //!< pages expanded to bits
109110   int m_rdfirst;                     //!< set to first bit of a sector that is read from

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