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r23538 Saturday 8th June, 2013 at 12:31:25 UTC by O. Galibert
naomig1: Make the dma cpu-independant [O. Galibert]
[src/mame/drivers]chihiro.c naomi.c triforce.c
[src/mame/includes]dc.h
[src/mame/machine]awboard.h dc.c naomibd.h naomig1.c naomig1.h naomigd.h naomim1.h naomim2.h naomim4.h naomirom.h

trunk/src/mame/drivers/chihiro.c
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30693069MACHINE_CONFIG_END
30703070
30713071static MACHINE_CONFIG_DERIVED( chihirogd, chihiro_base )
3072   MCFG_NAOMI_GDROM_BOARD_ADD("rom_board", ":gdrom", "pic", NULL, "maincpu", NOOP)
3072   MCFG_NAOMI_GDROM_BOARD_ADD("rom_board", ":gdrom", "pic", NULL, NOOP)
30733073MACHINE_CONFIG_END
30743074
30753075#define ROM_LOAD16_WORD_SWAP_BIOS(bios,name,offset,length,hash) \
trunk/src/mame/drivers/triforce.c
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547547MACHINE_CONFIG_END
548548
549549static MACHINE_CONFIG_DERIVED( triforcegd, triforce_base )
550   MCFG_NAOMI_GDROM_BOARD_ADD("rom_board", ":gdrom", "picreturn", NULL, "maincpu", NOOP)
550   MCFG_NAOMI_GDROM_BOARD_ADD("rom_board", ":gdrom", "picreturn", NULL, NOOP)
551551MACHINE_CONFIG_END
552552
553553
trunk/src/mame/drivers/naomi.c
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25212521 */
25222522
25232523static MACHINE_CONFIG_DERIVED( naomi, naomi_base )
2524   MCFG_NAOMI_ROM_BOARD_ADD("rom_board", "naomibd_eeprom", "maincpu", WRITE8(dc_state, g1_irq))
2524   MCFG_NAOMI_ROM_BOARD_ADD("rom_board", "naomibd_eeprom", WRITE8(dc_state, g1_irq))
25252525MACHINE_CONFIG_END
25262526
25272527/*
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25292529 */
25302530
25312531static MACHINE_CONFIG_DERIVED( naomigd, naomi_base )
2532   MCFG_NAOMI_GDROM_BOARD_ADD("rom_board", ":gdrom", ":pic", "naomibd_eeprom", "maincpu", WRITE8(dc_state, g1_irq))
2532   MCFG_NAOMI_GDROM_BOARD_ADD("rom_board", ":gdrom", ":pic", "naomibd_eeprom", WRITE8(dc_state, g1_irq))
25332533MACHINE_CONFIG_END
25342534
25352535/*
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25372537 */
25382538
25392539static MACHINE_CONFIG_DERIVED( naomim1, naomi_base )
2540   MCFG_NAOMI_M1_BOARD_ADD("rom_board", ":rom_key", "naomibd_eeprom", "maincpu", WRITE8(dc_state, g1_irq))
2540   MCFG_NAOMI_M1_BOARD_ADD("rom_board", ":rom_key", "naomibd_eeprom", WRITE8(dc_state, g1_irq))
25412541MACHINE_CONFIG_END
25422542
25432543/*
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25452545 */
25462546
25472547static MACHINE_CONFIG_DERIVED( naomim2, naomi_base )
2548   MCFG_NAOMI_M2_BOARD_ADD("rom_board", ":rom_key", "naomibd_eeprom", "maincpu", WRITE8(dc_state, g1_irq))
2548   MCFG_NAOMI_M2_BOARD_ADD("rom_board", ":rom_key", "naomibd_eeprom", WRITE8(dc_state, g1_irq))
25492549MACHINE_CONFIG_END
25502550
25512551/*
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25532553 */
25542554
25552555static MACHINE_CONFIG_DERIVED( naomim4, naomi_base )
2556   MCFG_NAOMI_M4_BOARD_ADD("rom_board", ":rom_key", "naomibd_eeprom", "maincpu", WRITE8(dc_state, g1_irq))
2556   MCFG_NAOMI_M4_BOARD_ADD("rom_board", ":rom_key", "naomibd_eeprom", WRITE8(dc_state, g1_irq))
25572557MACHINE_CONFIG_END
25582558
25592559/*
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26002600   MCFG_CPU_MODIFY("maincpu")
26012601   MCFG_CPU_PROGRAM_MAP(aw_map)
26022602   MCFG_MACRONIX_29L001MC_ADD("awflash")
2603   MCFG_AW_ROM_BOARD_ADD("rom_board", ":rom_key", "maincpu", WRITE8(dc_state, g1_irq))
2603   MCFG_AW_ROM_BOARD_ADD("rom_board", ":rom_key", WRITE8(dc_state, g1_irq))
26042604MACHINE_CONFIG_END
26052605
26062606static MACHINE_CONFIG_DERIVED( aw1c, aw_base )
trunk/src/mame/machine/naomim1.h
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33
44#include "naomibd.h"
55
6#define MCFG_NAOMI_M1_BOARD_ADD(_tag, _key_tag, _eeprom_tag, _maincpu_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_M1_BOARD, _eeprom_tag, _maincpu_tag, _irq_cb) \
6#define MCFG_NAOMI_M1_BOARD_ADD(_tag, _key_tag, _eeprom_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_M1_BOARD, _eeprom_tag, _irq_cb) \
88   naomi_m1_board::static_set_tags(*device, _key_tag);
99
1010class naomi_m1_board : public naomi_board
trunk/src/mame/machine/dc.c
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7676
7777#endif
7878
79void dc_state::generic_dma(UINT32 main_adr, void *dma_ptr, UINT32 length, UINT32 size, bool to_mainram)
80{
81   sh4_ddt_dma ddt;
82   if(to_mainram)
83      ddt.destination = main_adr;
84   else
85      ddt.source = main_adr;
86   ddt.buffer = dma_ptr;
87   ddt.length = length;
88   ddt.size =size;
89   ddt.direction = to_mainram;
90   ddt.channel = -1;
91   ddt.mode = -1;
92   sh4_dma_ddt(m_maincpu, &ddt);
93}
94
7995TIMER_CALLBACK_MEMBER(dc_state::aica_dma_irq)
8096{
8197   m_wave_dma.start = g2bus_regs[SB_ADST] = 0;
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720736{
721737   rtc_initial_setup();
722738
739   // dccons doesn't have a specific g1 device yet
740   if(m_naomig1)
741      m_naomig1->set_dma_cb(naomi_g1_device::dma_cb(FUNC(dc_state::generic_dma), this));
742
723743   // save states
724744   save_pointer(NAME(dc_rtcregister), 4);
725745   save_pointer(NAME(dc_sysctrl_regs), 0x200/4);
trunk/src/mame/machine/naomim2.h
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33
44#include "naomibd.h"
55
6#define MCFG_NAOMI_M2_BOARD_ADD(_tag, _key_tag, _eeprom_tag, _maincpu_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_M2_BOARD, _eeprom_tag, _maincpu_tag, _irq_cb) \
6#define MCFG_NAOMI_M2_BOARD_ADD(_tag, _key_tag, _eeprom_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_M2_BOARD, _eeprom_tag, _irq_cb) \
88   naomi_m2_board::static_set_tags(*device, _key_tag);
99
1010class naomi_m2_board : public naomi_board
trunk/src/mame/machine/awboard.h
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33
44#include "naomig1.h"
55
6#define MCFG_AW_ROM_BOARD_ADD(_tag, _keyregion, _maincpu_tag, _irq_cb)  \
7   MCFG_NAOMI_G1_ADD(_tag, AW_ROM_BOARD, _maincpu_tag, _irq_cb)        \
6#define MCFG_AW_ROM_BOARD_ADD(_tag, _keyregion, _irq_cb)  \
7   MCFG_NAOMI_G1_ADD(_tag, AW_ROM_BOARD, _irq_cb)        \
88   aw_rom_board::static_set_keyregion(*device, _keyregion);
99
1010class aw_rom_board : public naomi_g1_device
trunk/src/mame/machine/naomigd.h
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33
44#include "machine/naomibd.h"
55
6#define MCFG_NAOMI_GDROM_BOARD_ADD(_tag, _image_tag, _pic_tag, _eeprom_tag, _maincpu_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_GDROM_BOARD, _eeprom_tag, _maincpu_tag, _irq_cb) \
6#define MCFG_NAOMI_GDROM_BOARD_ADD(_tag, _image_tag, _pic_tag, _eeprom_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_GDROM_BOARD, _eeprom_tag, _irq_cb) \
88   naomi_gdrom_board::static_set_tags(*device, _image_tag, _pic_tag);
99
1010class naomi_gdrom_board : public naomi_board
trunk/src/mame/machine/naomim4.h
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33
44#include "naomibd.h"
55
6#define MCFG_NAOMI_M4_BOARD_ADD(_tag, _key_tag, _eeprom_tag, _maincpu_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_M4_BOARD, _eeprom_tag, _maincpu_tag, _irq_cb) \
6#define MCFG_NAOMI_M4_BOARD_ADD(_tag, _key_tag, _eeprom_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_M4_BOARD, _eeprom_tag, _irq_cb) \
88   naomi_m4_board::static_set_tags(*device, _key_tag);
99
1010class naomi_m4_board : public naomi_board
trunk/src/mame/machine/naomibd.h
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44#include "machine/naomig1.h"
55#include "machine/naomicrypt.h"
66
7#define MCFG_NAOMI_BOARD_ADD(_tag, type, _eeprom_tag, _maincpu_tag, _irq_cb)    \
8   MCFG_NAOMI_G1_ADD(_tag, type, _maincpu_tag, _irq_cb)                        \
7#define MCFG_NAOMI_BOARD_ADD(_tag, type, _eeprom_tag, _irq_cb)    \
8   MCFG_NAOMI_G1_ADD(_tag, type, _irq_cb)                        \
99   naomi_board::static_set_eeprom_tag(*device, _eeprom_tag);
1010
1111class naomi_board : public naomi_g1_device
trunk/src/mame/machine/naomirom.h
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33
44#include "naomibd.h"
55
6#define MCFG_NAOMI_ROM_BOARD_ADD(_tag, _eeprom_tag, _maincpu_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_ROM_BOARD, _eeprom_tag, _maincpu_tag, _irq_cb)
6#define MCFG_NAOMI_ROM_BOARD_ADD(_tag, _eeprom_tag, _irq_cb) \
7   MCFG_NAOMI_BOARD_ADD(_tag, NAOMI_ROM_BOARD, _eeprom_tag, _irq_cb)
88
99class naomi_rom_board : public naomi_board
1010{
trunk/src/mame/machine/naomig1.c
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2727   : device_t(mconfig, type, name, tag, owner, clock),
2828     irq_cb(*this)
2929{
30   cpu = 0;
3130}
3231
33void naomi_g1_device::set_maincpu_tag(const char *_maincpu_tag)
34{
35   maincpu_tag = _maincpu_tag;
36}
37
3832void naomi_g1_device::device_start()
3933{
40   cpu = machine().device<sh4_device>(maincpu_tag);
4134   timer = timer_alloc(G1_TIMER_ID);
4235   irq_cb.resolve_safe();
4336
r23537r23538
234227
235228void naomi_g1_device::dma(void *dma_ptr, UINT32 main_adr, UINT32 size, bool to_mainram)
236229{
237   sh4_ddt_dma ddt;
238   if(to_mainram)
239      ddt.destination = main_adr;
240   else
241      ddt.source = main_adr;
242   ddt.buffer = dma_ptr;
243   ddt.length = size >> 5;
244   ddt.size = 32;
245   ddt.direction = to_mainram;
246   ddt.channel = -1;
247   ddt.mode = -1;
248   sh4_dma_ddt(cpu, &ddt);
230   if(!_dma_cb.isnull())
231      _dma_cb(main_adr, dma_ptr, size >> 5, 32, to_mainram);
249232}
trunk/src/mame/machine/naomig1.h
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22#define _NAOMIG1_H_
33
44#include "cpu/sh4/sh4.h"
5#include "includes/dc.h"
65
7#define MCFG_NAOMI_G1_ADD(_tag, type, _maincpu_tag, _irq_cb)            \
6#define MCFG_NAOMI_G1_ADD(_tag, type, _irq_cb)                          \
87   MCFG_DEVICE_ADD(_tag, type, 0)                                      \
9   downcast<naomi_g1_device *>(device)->set_maincpu_tag(_maincpu_tag); \
108   downcast<naomi_g1_device *>(device)->set_irq_cb(DEVCB2_ ## _irq_cb);
119
1210class naomi_g1_device : public device_t
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1614      DMA_GDROM_IRQ
1715   };
1816
17   typedef delegate<void (UINT32 main_adr, void *dma_ptr, UINT32 length, UINT32 size, bool to_mainram)> dma_cb;
18
1919   naomi_g1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
20   void set_maincpu_tag(const char *maincpu_tag);
2120   template<class _cb> void set_irq_cb(_cb cb) { irq_cb.set_callback(cb); }
21   void set_dma_cb(dma_cb _cb) { _dma_cb = _cb; }
2222
2323   DECLARE_ADDRESS_MAP(amap, 32);
2424
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6161private:
6262   UINT32 gdstar, gdlen, gddir, gden, gdst;
6363
64   sh4_device *cpu;
6564   const char *maincpu_tag;
6665   emu_timer *timer;
6766   devcb2_write8 irq_cb;
67   dma_cb _dma_cb;
6868
6969   void dma(void *dma_ptr, UINT32 main_adr, UINT32 size, bool to_mainram);
7070};
trunk/src/mame/includes/dc.h
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88#define __DC_H__
99
1010#include "video/powervr2.h"
11#include "machine/naomig1.h"
1112
1213class dc_state : public driver_device
1314{
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2021      dc_ram(*this, "dc_ram"),
2122      m_maincpu(*this, "maincpu"),
2223      m_soundcpu(*this, "soundcpu"),
23      m_powervr2(*this, "powervr2") { }
24      m_powervr2(*this, "powervr2"),
25      m_naomig1(*this, "rom_board") { }
2426
2527   required_shared_ptr<UINT64> dc_framebuffer_ram; // '32-bit access area'
2628   required_shared_ptr<UINT64> dc_texture_ram; // '64-bit access area'
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4749      UINT8 sel;
4850   }m_wave_dma;
4951
50   /* video related */
51
5252   virtual void machine_start();
5353   virtual void machine_reset();
5454   TIMER_CALLBACK_MEMBER(aica_dma_irq);
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8282   required_device<cpu_device> m_maincpu;
8383   required_device<cpu_device> m_soundcpu;
8484   required_device<powervr2_device> m_powervr2;
85   optional_device<naomi_g1_device> m_naomig1;
86
87   void generic_dma(UINT32 main_adr, void *dma_ptr, UINT32 length, UINT32 size, bool to_mainram);
8588};
8689
8790/*--------- Ch2-DMA Control Registers ----------*/

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