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r19316 Wednesday 5th December, 2012 at 01:13:49 UTC by David Haywood
move some system specific stuff out of the cdc (nw)
[src/mame/machine]megacd.c megacd.h megacdcd.c megacdcd.h
[src/mess/drivers]ng_aes.c

trunk/src/mess/drivers/ng_aes.c
r19315r19316
8787      : neogeo_state(mconfig, type, tag),
8888      m_tempcdc(*this,"tempcdc")
8989   {
90      NeoCDDMAAddress1 = 0;
91      NeoCDDMAAddress2 = 0;
92      NeoCDDMAValue1   = 0;
93      NeoCDDMAValue2   = 0;
94      NeoCDDMACount    = 0;
95      NeoCDDMAMode = 0;
9096
9197   }
9298
93   required_device<lc89510_temp_device> m_tempcdc;
99   optional_device<lc89510_temp_device> m_tempcdc;
100   
94101
95102
103   void NeoCDDoDMA();
104   void set_DMA_regs(int offset, UINT16 wordValue);
105
96106   UINT8 *m_memcard_data;
97107   DECLARE_WRITE8_MEMBER(audio_cpu_clear_nmi_w);
98108   DECLARE_WRITE16_MEMBER(io_control_w);
r19315r19316
134144   INT32 nActiveTransferArea;
135145   INT32 nSpriteTransferBank;
136146   INT32 nADPCMTransferBank;
147   INT32 NeoCDDMAAddress1;
148   INT32 NeoCDDMAAddress2;
149   INT32 NeoCDDMAValue1;
150   INT32 NeoCDDMAValue2;
151   INT32 NeoCDDMACount;
152   INT32 NeoCDDMAMode;
153   void SekWriteWord(UINT32 a, UINT16 d);
154   void SekWriteByte(UINT32 a, UINT8 d);
155   UINT32 SekReadByte(UINT32 a);
156   UINT32 SekReadWord(UINT32 a);
137157
138158   UINT8 nTransferWriteEnable;
139159
r19315r19316
655675      case 0:                     // Sprites
656676         address = (nSpriteTransferBank + (sekAddress & 0x0FFFFF));
657677
658         // wtf? is this just due to how we decode the sprite gfx or is something bad happening?
659678         if ((address&3)==0) NeoSpriteRAM[address] = byteValue;
660679         if ((address&3)==1) NeoSpriteRAM[address^3] = byteValue;
661680         if ((address&3)==2) NeoSpriteRAM[address^3] = byteValue;
r19315r19316
740759         // DMA controller
741760      case 0x0060:
742761         if (byteValue & 0x40) {
743            m_tempcdc->NeoCDDoDMA();
762            NeoCDDoDMA();
744763         }
745764         break;
746765
r19315r19316
753772      case 0x0070:
754773      case 0x0072:
755774      case 0x007E:
756         m_tempcdc->set_DMA_regs(sekAddress & 0xFFFE, wordValue);
775         set_DMA_regs(sekAddress & 0xFFFE, wordValue);
757776         break;
758777
759778      // upload DMA controller program
r19315r19316
934953
935954}
936955
956
957
958void ng_aes_state::set_DMA_regs(int offset, UINT16 wordValue)
959{
960   switch (offset)
961   {
962      case 0x0064:
963         NeoCDDMAAddress1 &= 0x0000FFFF;
964         NeoCDDMAAddress1 |= wordValue << 16;
965         break;
966      case 0x0066:
967         NeoCDDMAAddress1 &= 0xFFFF0000;
968         NeoCDDMAAddress1 |= wordValue;
969         break;
970      case 0x0068:
971         NeoCDDMAAddress2 &= 0x0000FFFF;
972         NeoCDDMAAddress2 |= wordValue << 16;
973         break;
974      case 0x006A:
975         NeoCDDMAAddress2 &= 0xFFFF0000;
976         NeoCDDMAAddress2 |= wordValue;
977         break;
978      case 0x006C:
979         NeoCDDMAValue1 = wordValue;
980         break;
981      case 0x006E:
982         NeoCDDMAValue2 = wordValue;
983         break;
984      case 0x0070:
985         NeoCDDMACount &= 0x0000FFFF;
986         NeoCDDMACount |= wordValue << 16;
987         break;
988      case 0x0072:
989         NeoCDDMACount &= 0xFFFF0000;
990         NeoCDDMACount |= wordValue;
991         break;
992
993      case 0x007E:
994         NeoCDDMAMode = wordValue;
995//          bprintf(PRINT_NORMAL, _T("  - DMA controller 0x%2X -> 0x%04X (PC: 0x%06X)\n"), sekAddress & 0xFF, wordValue, SekGetPC(-1));
996         break;
997
998   }
999}
1000
1001
1002
1003void ng_aes_state::SekWriteWord(UINT32 a, UINT16 d)
1004{
1005//  printf("write word %08x %04x\n", a, d);
1006   curr_space->write_word(a,d);
1007}
1008
1009void ng_aes_state::SekWriteByte(UINT32 a, UINT8 d)
1010{
1011//  printf("write byte %08x %02x\n", a, d);
1012   curr_space->write_byte(a,d);
1013}
1014
1015UINT32 ng_aes_state::SekReadByte(UINT32 a)
1016{
1017//  printf("read byte %08x\n", a);
1018   return curr_space->read_byte(a);
1019}
1020
1021
1022UINT32 ng_aes_state::SekReadWord(UINT32 a)
1023{
1024//  printf("read WORD %08x\n", a);
1025   return curr_space->read_word(a);
1026}
1027
1028
1029
1030static INT32 SekIdle(INT32 nCycles)
1031{
1032   return nCycles;
1033}
1034
1035
1036void ng_aes_state::NeoCDDoDMA()
1037{
1038
1039   // The LC8953 chip has a programmable DMA controller, which is not properly emulated.
1040   // Since the software only uses it in a limited way, we can apply a simple heuristic
1041   // to determnine the requested operation.
1042
1043   // Additionally, we don't know how many cycles DMA operations take.
1044   // Here, only bus access is used to get a rough approximation --
1045   // each read/write takes a single cycle, setup and everything else is ignored.
1046
1047//  bprintf(PRINT_IMPORTANT, _T("  - DMA controller transfer started (PC: 0x%06X)\n"), SekGetPC(-1));
1048
1049   switch (NeoCDDMAMode) {
1050
1051      case 0xCFFD: {
1052//          bprintf(PRINT_NORMAL, _T("    adr : 0x%08X - 0x%08X <- address, skip odd bytes\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 8);
1053
1054         //  - DMA controller 0x7E -> 0xCFFD (PC: 0xC07CE2)
1055         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC07CE8)
1056         //  - DMA controller program[02] -> 0xE8DA (PC: 0xC07CEE)
1057         //  - DMA controller program[04] -> 0x92DA (PC: 0xC07CF4)
1058         //  - DMA controller program[06] -> 0x92DB (PC: 0xC07CFA)
1059         //  - DMA controller program[08] -> 0x96DB (PC: 0xC07D00)
1060         //  - DMA controller program[10] -> 0x96F6 (PC: 0xC07D06)
1061         //  - DMA controller program[12] -> 0x2E02 (PC: 0xC07D0C)
1062         //  - DMA controller program[14] -> 0xFDFF (PC: 0xC07D12)
1063
1064         SekIdle(NeoCDDMACount * 4);
1065
1066         while (NeoCDDMACount--) {
1067            SekWriteWord(NeoCDDMAAddress1 + 0, NeoCDDMAAddress1 >> 24);
1068            SekWriteWord(NeoCDDMAAddress1 + 2, NeoCDDMAAddress1 >> 16);
1069            SekWriteWord(NeoCDDMAAddress1 + 4, NeoCDDMAAddress1 >>  8);
1070            SekWriteWord(NeoCDDMAAddress1 + 6, NeoCDDMAAddress1 >>  0);
1071            NeoCDDMAAddress1 += 8;
1072         }
1073
1074         break;
1075      }
1076
1077      case 0xE2DD: {
1078//          bprintf(PRINT_NORMAL, _T("    copy: 0x%08X - 0x%08X <- 0x%08X - 0x%08X, skip odd bytes\n"), NeoCDDMAAddress2, NeoCDDMAAddress2 + NeoCDDMACount * 2, NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 4);
1079
1080         //  - DMA controller 0x7E -> 0xE2DD (PC: 0xC0A190)
1081         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1082         //  - DMA controller program[02] -> 0x82BE (PC: 0xC0A194)
1083         //  - DMA controller program[04] -> 0x93DA (PC: 0xC0A196)
1084         //  - DMA controller program[06] -> 0xBE93 (PC: 0xC0A198)
1085         //  - DMA controller program[08] -> 0xDABE (PC: 0xC0A19A)
1086         //  - DMA controller program[10] -> 0xF62D (PC: 0xC0A19C)
1087         //  - DMA controller program[12] -> 0x02FD (PC: 0xC0A19E)
1088         //  - DMA controller program[14] -> 0xFFFF (PC: 0xC0A1A0)
1089
1090         SekIdle(NeoCDDMACount * 1);
1091
1092         while (NeoCDDMACount--) {
1093            SekWriteWord(NeoCDDMAAddress2 + 0, SekReadByte(NeoCDDMAAddress1 + 0));
1094            SekWriteWord(NeoCDDMAAddress2 + 2, SekReadByte(NeoCDDMAAddress1 + 1));
1095            NeoCDDMAAddress1 += 2;
1096            NeoCDDMAAddress2 += 4;
1097         }
1098
1099         break;
1100      }
1101
1102      case 0xFC2D: {
1103//          bprintf(PRINT_NORMAL, _T("    copy: 0x%08X - 0x%08X <- LC8951 external buffer, skip odd bytes\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 4);
1104
1105         //  - DMA controller 0x7E -> 0xFC2D (PC: 0xC0A190)
1106         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1107         //  - DMA controller program[02] -> 0x8492 (PC: 0xC0A194)
1108         //  - DMA controller program[04] -> 0xDA92 (PC: 0xC0A196)
1109         //  - DMA controller program[06] -> 0xDAF6 (PC: 0xC0A198)
1110         //  - DMA controller program[08] -> 0x2A02 (PC: 0xC0A19A)
1111         //  - DMA controller program[10] -> 0xFDFF (PC: 0xC0A19C)
1112         //  - DMA controller program[12] -> 0x48E7 (PC: 0xC0A19E)
1113         //  - DMA controller program[14] -> 0xFFFE (PC: 0xC0A1A0)
1114
1115         char* data = m_tempcdc->LC8915InitTransfer(NeoCDDMACount);
1116         if (data == NULL) {
1117            break;
1118         }
1119
1120         SekIdle(NeoCDDMACount * 4);
1121
1122         while (NeoCDDMACount--) {
1123            SekWriteByte(NeoCDDMAAddress1 + 0, data[0]);
1124            SekWriteByte(NeoCDDMAAddress1 + 2, data[1]);
1125            NeoCDDMAAddress1 += 4;
1126            data += 2;
1127         }
1128
1129         m_tempcdc->LC8915EndTransfer();
1130
1131         break;
1132      }
1133
1134      case 0xFE3D:
1135
1136         //  - DMA controller 0x7E -> 0xFE3D (PC: 0xC0A190)
1137         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1138         //  - DMA controller program[02] -> 0x82BF (PC: 0xC0A194)
1139         //  - DMA controller program[04] -> 0x93BF (PC: 0xC0A196)
1140         //  - DMA controller program[06] -> 0xF629 (PC: 0xC0A198)
1141         //  - DMA controller program[08] -> 0x02FD (PC: 0xC0A19A)
1142         //  - DMA controller program[10] -> 0xFFFF (PC: 0xC0A19C)
1143         //  - DMA controller program[12] -> 0xF17D (PC: 0xC0A19E)
1144         //  - DMA controller program[14] -> 0xFCF5 (PC: 0xC0A1A0)
1145
1146      case 0xFE6D: {
1147//          bprintf(PRINT_NORMAL, _T("    copy: 0x%08X - 0x%08X <- 0x%08X - 0x%08X\n"), NeoCDDMAAddress2, NeoCDDMAAddress2 + NeoCDDMACount * 2, NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 2);
1148
1149         //  - DMA controller 0x7E -> 0xFE6D (PC: 0xC0FD7A)
1150         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0FD7C)
1151         //  - DMA controller program[02] -> 0x82BF (PC: 0xC0FD7E)
1152         //  - DMA controller program[04] -> 0xF693 (PC: 0xC0FD80)
1153         //  - DMA controller program[06] -> 0xBF29 (PC: 0xC0FD82)
1154         //  - DMA controller program[08] -> 0x02FD (PC: 0xC0FD84)
1155         //  - DMA controller program[10] -> 0xFFFF (PC: 0xC0FD86)
1156         //  - DMA controller program[12] -> 0xC515 (PC: 0xC0FD88)
1157         //  - DMA controller program[14] -> 0xFCF5 (PC: 0xC0FD8A)
1158
1159         SekIdle(NeoCDDMACount * 1);
1160
1161         while (NeoCDDMACount--) {
1162            SekWriteWord(NeoCDDMAAddress2, SekReadWord(NeoCDDMAAddress1));
1163            NeoCDDMAAddress1 += 2;
1164            NeoCDDMAAddress2 += 2;
1165         }
1166
1167if (NeoCDDMAAddress2 == 0x0800)  {
1168// MapVectorTable(false);
1169//  bprintf(PRINT_ERROR, _T("    RAM vectors mapped (PC = 0x%08X\n"), SekGetPC(0));
1170//  extern INT32 bRunPause;
1171//  bRunPause = 1;
1172}
1173         break;
1174      }
1175
1176      case 0xFEF5: {
1177//          bprintf(PRINT_NORMAL, _T("    adr : 0x%08X - 0x%08X <- address\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 4);
1178
1179         //  - DMA controller 0x7E -> 0xFEF5 (PC: 0xC07CE2)
1180         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC07CE8)
1181         //  - DMA controller program[02] -> 0x92E8 (PC: 0xC07CEE)
1182         //  - DMA controller program[04] -> 0xBE96 (PC: 0xC07CF4)
1183         //  - DMA controller program[06] -> 0xF629 (PC: 0xC07CFA)
1184         //  - DMA controller program[08] -> 0x02FD (PC: 0xC07D00)
1185         //  - DMA controller program[10] -> 0xFFFF (PC: 0xC07D06)
1186         //  - DMA controller program[12] -> 0xFC3D (PC: 0xC07D0C)
1187         //  - DMA controller program[14] -> 0xFCF5 (PC: 0xC07D12)
1188
1189         SekIdle(NeoCDDMACount * 2);
1190
1191         while (NeoCDDMACount--) {
1192            SekWriteWord(NeoCDDMAAddress1 + 0, NeoCDDMAAddress1 >> 16);
1193            SekWriteWord(NeoCDDMAAddress1 + 2, NeoCDDMAAddress1 >>  0);
1194            NeoCDDMAAddress1 += 4;
1195         }
1196
1197         break;
1198      }
1199
1200      case 0xFFC5: {
1201//          bprintf(PRINT_NORMAL, _T("    copy: 0x%08X - 0x%08X <- LC8951 external buffer\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 2);
1202
1203         //  - DMA controller 0x7E -> 0xFFC5 (PC: 0xC0A190)
1204         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1205         //  - DMA controller program[02] -> 0xA6F6 (PC: 0xC0A194)
1206         //  - DMA controller program[04] -> 0x2602 (PC: 0xC0A196)
1207         //  - DMA controller program[06] -> 0xFDFF (PC: 0xC0A198)
1208         //  - DMA controller program[08] -> 0xFC2D (PC: 0xC0A19A)
1209         //  - DMA controller program[10] -> 0xFCF5 (PC: 0xC0A19C)
1210         //  - DMA controller program[12] -> 0x8492 (PC: 0xC0A19E)
1211         //  - DMA controller program[14] -> 0xDA92 (PC: 0xC0A1A0)
1212
1213         char* data = m_tempcdc->LC8915InitTransfer(NeoCDDMACount);
1214         if (data == NULL) {
1215            break;
1216         }
1217
1218         SekIdle(NeoCDDMACount * 4);
1219
1220         while (NeoCDDMACount--) {
1221            SekWriteByte(NeoCDDMAAddress1 + 0, data[0]);
1222            SekWriteByte(NeoCDDMAAddress1 + 1, data[1]);
1223            NeoCDDMAAddress1 += 2;
1224            data += 2;
1225         }
1226
1227         m_tempcdc->LC8915EndTransfer();
1228
1229         break;
1230      }
1231
1232      case 0xFFCD:
1233
1234         //  - DMA controller 0x7E -> 0xFFCD (PC: 0xC0A190)
1235         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1236         //  - DMA controller program[02] -> 0x92F6 (PC: 0xC0A194)
1237         //  - DMA controller program[04] -> 0x2602 (PC: 0xC0A196)
1238         //  - DMA controller program[06] -> 0xFDFF (PC: 0xC0A198)
1239         //  - DMA controller program[08] -> 0x7006 (PC: 0xC0A19A)
1240         //  - DMA controller program[10] -> 0x6100 (PC: 0xC0A19C)
1241         //  - DMA controller program[12] -> 0x2412 (PC: 0xC0A19E)
1242         //  - DMA controller program[14] -> 0x13FC (PC: 0xC0A1A0)
1243
1244      case 0xFFDD: {
1245//          bprintf(PRINT_NORMAL, _T("    Fill: 0x%08X - 0x%08X <- 0x%04X\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 2, NeoCDDMAValue1);
1246
1247         //  - DMA controller 0x7E -> 0xFFDD (PC: 0xC07CE2)
1248         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC07CE8)
1249         //  - DMA controller program[02] -> 0x92F6 (PC: 0xC07CEE)
1250         //  - DMA controller program[04] -> 0x2602 (PC: 0xC07CF4)
1251         //  - DMA controller program[06] -> 0xFDFF (PC: 0xC07CFA)
1252         //  - DMA controller program[08] -> 0xFFFF (PC: 0xC07D00)
1253         //  - DMA controller program[10] -> 0xFCF5 (PC: 0xC07D06)
1254         //  - DMA controller program[12] -> 0x8AF0 (PC: 0xC07D0C)
1255         //  - DMA controller program[14] -> 0x1609 (PC: 0xC07D12)
1256
1257         SekIdle(NeoCDDMACount * 1);
1258
1259         while (NeoCDDMACount--) {
1260            SekWriteWord(NeoCDDMAAddress1, NeoCDDMAValue1);
1261            NeoCDDMAAddress1 += 2;
1262         }
1263
1264         break;
1265      }
1266      default: {
1267         //bprintf(PRINT_ERROR, _T("    Unknown transfer type 0x%04X (PC: 0x%06X)\n"), NeoCDDMAMode, SekGetPC(-1));
1268         //bprintf(PRINT_NORMAL, _T("    ??? : 0x%08X  0x%08X 0x%04X 0x%04X 0x%08X\n"), NeoCDDMAAddress1, NeoCDDMAAddress2, NeoCDDMAValue1, NeoCDDMAValue2, NeoCDDMACount);
1269
1270//extern INT32 bRunPause;
1271//bRunPause = 1;
1272
1273      }
1274   }
1275}
1276
1277
9371278/*
9381279 * Handling selectable controller types
9391280 */
r19315r19316
11701511   NeoZ80ROMActive = memregion("audiocpu")->base();
11711512   NeoTextRAM = memregion("fixed")->base();
11721513   curr_space = &machine().device("maincpu")->memory().space(AS_PROGRAM);
1173   m_tempcdc->dma_space = curr_space;
11741514
11751515
11761516   m_tempcdc->NeoCDCommsReset();
trunk/src/mame/machine/megacdcd.c
r19315r19316
2828   for (int i=0;i<2352;i++)
2929      NeoCDSectorData[i] = 0;
3030   bNeoCDLoadSector = false;
31   NeoCDDMAAddress1 = 0;
32   NeoCDDMAAddress2 = 0;
33   NeoCDDMAValue1   = 0;
34   NeoCDDMAValue2   = 0;
35   NeoCDDMACount    = 0;
36   NeoCDDMAMode = 0;
3731   CDC_REG0 = 0;
3832   nNeoCDIRQVectorAck = 0;
3933   nNeoCDIRQVector = 0;
r19315r19316
5347}
5448
5549// HACK for DMA handling, this gets replaced
56void lc89510_temp_device::Fake_CDC_Do_DMA(int &dmacount, UINT8 *CDC_BUFFER, UINT16 &SEGACD_DMA_ADDRESS, UINT16 &dma_addrc, UINT16 &destination )
50void lc89510_temp_device::Fake_CDC_Do_DMA(int &dmacount, UINT8 *CDC_BUFFER, UINT16 &dma_addrc, UINT16 &destination )
5751{
5852   fatalerror("Fake_CDC_Do_DMA\n");
5953}
r19315r19316
455449   CDD_Reset();
456450   CDC_Reset();
457451
458   CDC_REG0 = CDC_REG1 = SEGACD_DMA_ADDRESS = SCD_STATUS_CDC = CDD_DONE = 0;
452   CDC_REG0 = CDC_REG1 = SCD_STATUS_CDC = CDD_DONE = 0;
459453}
460454
461455void lc89510_temp_device::CDC_End_Transfer(running_machine& machine)
r19315r19316
504498   UINT16 dma_addrc = LC8951RegistersW[REG_W_DACL] | (LC8951RegistersW[REG_W_DACH]<<8);
505499
506500   // HACK
507   segacd_dma_callback(dmacount, CDC_BUFFER, SEGACD_DMA_ADDRESS, dma_addrc, destination );
501   segacd_dma_callback(dmacount, CDC_BUFFER, dma_addrc, destination );
508502   
509503
510504   dma_addrc += length*2;
r19315r19316
894888
895889
896890
897READ16_MEMBER( lc89510_temp_device::cdc_dmaaddr_r )
898{
899   return SEGACD_DMA_ADDRESS;
900}
901891
902WRITE16_MEMBER( lc89510_temp_device::cdc_dmaaddr_w )
903{
904   COMBINE_DATA(&SEGACD_DMA_ADDRESS);
905}
906892
907893READ16_MEMBER( lc89510_temp_device::segacd_cdfader_r )
908894{
r19315r19316
10611047   nff0016 = 0;
10621048}
10631049
1064static INT32 SekIdle(INT32 nCycles)
1065{
1066   return nCycles;
1067}
10681050
1069void lc89510_temp_device::NeoCDDoDMA()
1070{
1071
1072   // The LC8953 chip has a programmable DMA controller, which is not properly emulated.
1073   // Since the software only uses it in a limited way, we can apply a simple heuristic
1074   // to determnine the requested operation.
1075
1076   // Additionally, we don't know how many cycles DMA operations take.
1077   // Here, only bus access is used to get a rough approximation --
1078   // each read/write takes a single cycle, setup and everything else is ignored.
1079
1080//  bprintf(PRINT_IMPORTANT, _T("  - DMA controller transfer started (PC: 0x%06X)\n"), SekGetPC(-1));
1081
1082   switch (NeoCDDMAMode) {
1083
1084      case 0xCFFD: {
1085//          bprintf(PRINT_NORMAL, _T("    adr : 0x%08X - 0x%08X <- address, skip odd bytes\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 8);
1086
1087         //  - DMA controller 0x7E -> 0xCFFD (PC: 0xC07CE2)
1088         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC07CE8)
1089         //  - DMA controller program[02] -> 0xE8DA (PC: 0xC07CEE)
1090         //  - DMA controller program[04] -> 0x92DA (PC: 0xC07CF4)
1091         //  - DMA controller program[06] -> 0x92DB (PC: 0xC07CFA)
1092         //  - DMA controller program[08] -> 0x96DB (PC: 0xC07D00)
1093         //  - DMA controller program[10] -> 0x96F6 (PC: 0xC07D06)
1094         //  - DMA controller program[12] -> 0x2E02 (PC: 0xC07D0C)
1095         //  - DMA controller program[14] -> 0xFDFF (PC: 0xC07D12)
1096
1097         SekIdle(NeoCDDMACount * 4);
1098
1099         while (NeoCDDMACount--) {
1100            SekWriteWord(NeoCDDMAAddress1 + 0, NeoCDDMAAddress1 >> 24);
1101            SekWriteWord(NeoCDDMAAddress1 + 2, NeoCDDMAAddress1 >> 16);
1102            SekWriteWord(NeoCDDMAAddress1 + 4, NeoCDDMAAddress1 >>  8);
1103            SekWriteWord(NeoCDDMAAddress1 + 6, NeoCDDMAAddress1 >>  0);
1104            NeoCDDMAAddress1 += 8;
1105         }
1106
1107         break;
1108      }
1109
1110      case 0xE2DD: {
1111//          bprintf(PRINT_NORMAL, _T("    copy: 0x%08X - 0x%08X <- 0x%08X - 0x%08X, skip odd bytes\n"), NeoCDDMAAddress2, NeoCDDMAAddress2 + NeoCDDMACount * 2, NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 4);
1112
1113         //  - DMA controller 0x7E -> 0xE2DD (PC: 0xC0A190)
1114         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1115         //  - DMA controller program[02] -> 0x82BE (PC: 0xC0A194)
1116         //  - DMA controller program[04] -> 0x93DA (PC: 0xC0A196)
1117         //  - DMA controller program[06] -> 0xBE93 (PC: 0xC0A198)
1118         //  - DMA controller program[08] -> 0xDABE (PC: 0xC0A19A)
1119         //  - DMA controller program[10] -> 0xF62D (PC: 0xC0A19C)
1120         //  - DMA controller program[12] -> 0x02FD (PC: 0xC0A19E)
1121         //  - DMA controller program[14] -> 0xFFFF (PC: 0xC0A1A0)
1122
1123         SekIdle(NeoCDDMACount * 1);
1124
1125         while (NeoCDDMACount--) {
1126            SekWriteWord(NeoCDDMAAddress2 + 0, SekReadByte(NeoCDDMAAddress1 + 0));
1127            SekWriteWord(NeoCDDMAAddress2 + 2, SekReadByte(NeoCDDMAAddress1 + 1));
1128            NeoCDDMAAddress1 += 2;
1129            NeoCDDMAAddress2 += 4;
1130         }
1131
1132         break;
1133      }
1134
1135      case 0xFC2D: {
1136//          bprintf(PRINT_NORMAL, _T("    copy: 0x%08X - 0x%08X <- LC8951 external buffer, skip odd bytes\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 4);
1137
1138         //  - DMA controller 0x7E -> 0xFC2D (PC: 0xC0A190)
1139         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1140         //  - DMA controller program[02] -> 0x8492 (PC: 0xC0A194)
1141         //  - DMA controller program[04] -> 0xDA92 (PC: 0xC0A196)
1142         //  - DMA controller program[06] -> 0xDAF6 (PC: 0xC0A198)
1143         //  - DMA controller program[08] -> 0x2A02 (PC: 0xC0A19A)
1144         //  - DMA controller program[10] -> 0xFDFF (PC: 0xC0A19C)
1145         //  - DMA controller program[12] -> 0x48E7 (PC: 0xC0A19E)
1146         //  - DMA controller program[14] -> 0xFFFE (PC: 0xC0A1A0)
1147
1148         char* data = LC8915InitTransfer();
1149         if (data == NULL) {
1150            break;
1151         }
1152
1153         SekIdle(NeoCDDMACount * 4);
1154
1155         while (NeoCDDMACount--) {
1156            SekWriteByte(NeoCDDMAAddress1 + 0, data[0]);
1157            SekWriteByte(NeoCDDMAAddress1 + 2, data[1]);
1158            NeoCDDMAAddress1 += 4;
1159            data += 2;
1160         }
1161
1162         LC8915EndTransfer();
1163
1164         break;
1165      }
1166
1167      case 0xFE3D:
1168
1169         //  - DMA controller 0x7E -> 0xFE3D (PC: 0xC0A190)
1170         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1171         //  - DMA controller program[02] -> 0x82BF (PC: 0xC0A194)
1172         //  - DMA controller program[04] -> 0x93BF (PC: 0xC0A196)
1173         //  - DMA controller program[06] -> 0xF629 (PC: 0xC0A198)
1174         //  - DMA controller program[08] -> 0x02FD (PC: 0xC0A19A)
1175         //  - DMA controller program[10] -> 0xFFFF (PC: 0xC0A19C)
1176         //  - DMA controller program[12] -> 0xF17D (PC: 0xC0A19E)
1177         //  - DMA controller program[14] -> 0xFCF5 (PC: 0xC0A1A0)
1178
1179      case 0xFE6D: {
1180//          bprintf(PRINT_NORMAL, _T("    copy: 0x%08X - 0x%08X <- 0x%08X - 0x%08X\n"), NeoCDDMAAddress2, NeoCDDMAAddress2 + NeoCDDMACount * 2, NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 2);
1181
1182         //  - DMA controller 0x7E -> 0xFE6D (PC: 0xC0FD7A)
1183         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0FD7C)
1184         //  - DMA controller program[02] -> 0x82BF (PC: 0xC0FD7E)
1185         //  - DMA controller program[04] -> 0xF693 (PC: 0xC0FD80)
1186         //  - DMA controller program[06] -> 0xBF29 (PC: 0xC0FD82)
1187         //  - DMA controller program[08] -> 0x02FD (PC: 0xC0FD84)
1188         //  - DMA controller program[10] -> 0xFFFF (PC: 0xC0FD86)
1189         //  - DMA controller program[12] -> 0xC515 (PC: 0xC0FD88)
1190         //  - DMA controller program[14] -> 0xFCF5 (PC: 0xC0FD8A)
1191
1192         SekIdle(NeoCDDMACount * 1);
1193
1194         while (NeoCDDMACount--) {
1195            SekWriteWord(NeoCDDMAAddress2, SekReadWord(NeoCDDMAAddress1));
1196            NeoCDDMAAddress1 += 2;
1197            NeoCDDMAAddress2 += 2;
1198         }
1199
1200if (NeoCDDMAAddress2 == 0x0800)  {
1201// MapVectorTable(false);
1202//  bprintf(PRINT_ERROR, _T("    RAM vectors mapped (PC = 0x%08X\n"), SekGetPC(0));
1203//  extern INT32 bRunPause;
1204//  bRunPause = 1;
1205}
1206         break;
1207      }
1208
1209      case 0xFEF5: {
1210//          bprintf(PRINT_NORMAL, _T("    adr : 0x%08X - 0x%08X <- address\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 4);
1211
1212         //  - DMA controller 0x7E -> 0xFEF5 (PC: 0xC07CE2)
1213         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC07CE8)
1214         //  - DMA controller program[02] -> 0x92E8 (PC: 0xC07CEE)
1215         //  - DMA controller program[04] -> 0xBE96 (PC: 0xC07CF4)
1216         //  - DMA controller program[06] -> 0xF629 (PC: 0xC07CFA)
1217         //  - DMA controller program[08] -> 0x02FD (PC: 0xC07D00)
1218         //  - DMA controller program[10] -> 0xFFFF (PC: 0xC07D06)
1219         //  - DMA controller program[12] -> 0xFC3D (PC: 0xC07D0C)
1220         //  - DMA controller program[14] -> 0xFCF5 (PC: 0xC07D12)
1221
1222         SekIdle(NeoCDDMACount * 2);
1223
1224         while (NeoCDDMACount--) {
1225            SekWriteWord(NeoCDDMAAddress1 + 0, NeoCDDMAAddress1 >> 16);
1226            SekWriteWord(NeoCDDMAAddress1 + 2, NeoCDDMAAddress1 >>  0);
1227            NeoCDDMAAddress1 += 4;
1228         }
1229
1230         break;
1231      }
1232
1233      case 0xFFC5: {
1234//          bprintf(PRINT_NORMAL, _T("    copy: 0x%08X - 0x%08X <- LC8951 external buffer\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 2);
1235
1236         //  - DMA controller 0x7E -> 0xFFC5 (PC: 0xC0A190)
1237         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1238         //  - DMA controller program[02] -> 0xA6F6 (PC: 0xC0A194)
1239         //  - DMA controller program[04] -> 0x2602 (PC: 0xC0A196)
1240         //  - DMA controller program[06] -> 0xFDFF (PC: 0xC0A198)
1241         //  - DMA controller program[08] -> 0xFC2D (PC: 0xC0A19A)
1242         //  - DMA controller program[10] -> 0xFCF5 (PC: 0xC0A19C)
1243         //  - DMA controller program[12] -> 0x8492 (PC: 0xC0A19E)
1244         //  - DMA controller program[14] -> 0xDA92 (PC: 0xC0A1A0)
1245
1246         char* data = LC8915InitTransfer();
1247         if (data == NULL) {
1248            break;
1249         }
1250
1251         SekIdle(NeoCDDMACount * 4);
1252
1253         while (NeoCDDMACount--) {
1254            SekWriteByte(NeoCDDMAAddress1 + 0, data[0]);
1255            SekWriteByte(NeoCDDMAAddress1 + 1, data[1]);
1256            NeoCDDMAAddress1 += 2;
1257            data += 2;
1258         }
1259
1260         LC8915EndTransfer();
1261
1262         break;
1263      }
1264
1265      case 0xFFCD:
1266
1267         //  - DMA controller 0x7E -> 0xFFCD (PC: 0xC0A190)
1268         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192)
1269         //  - DMA controller program[02] -> 0x92F6 (PC: 0xC0A194)
1270         //  - DMA controller program[04] -> 0x2602 (PC: 0xC0A196)
1271         //  - DMA controller program[06] -> 0xFDFF (PC: 0xC0A198)
1272         //  - DMA controller program[08] -> 0x7006 (PC: 0xC0A19A)
1273         //  - DMA controller program[10] -> 0x6100 (PC: 0xC0A19C)
1274         //  - DMA controller program[12] -> 0x2412 (PC: 0xC0A19E)
1275         //  - DMA controller program[14] -> 0x13FC (PC: 0xC0A1A0)
1276
1277      case 0xFFDD: {
1278//          bprintf(PRINT_NORMAL, _T("    Fill: 0x%08X - 0x%08X <- 0x%04X\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 2, NeoCDDMAValue1);
1279
1280         //  - DMA controller 0x7E -> 0xFFDD (PC: 0xC07CE2)
1281         //  - DMA controller program[00] -> 0xFCF5 (PC: 0xC07CE8)
1282         //  - DMA controller program[02] -> 0x92F6 (PC: 0xC07CEE)
1283         //  - DMA controller program[04] -> 0x2602 (PC: 0xC07CF4)
1284         //  - DMA controller program[06] -> 0xFDFF (PC: 0xC07CFA)
1285         //  - DMA controller program[08] -> 0xFFFF (PC: 0xC07D00)
1286         //  - DMA controller program[10] -> 0xFCF5 (PC: 0xC07D06)
1287         //  - DMA controller program[12] -> 0x8AF0 (PC: 0xC07D0C)
1288         //  - DMA controller program[14] -> 0x1609 (PC: 0xC07D12)
1289
1290         SekIdle(NeoCDDMACount * 1);
1291
1292         while (NeoCDDMACount--) {
1293            SekWriteWord(NeoCDDMAAddress1, NeoCDDMAValue1);
1294            NeoCDDMAAddress1 += 2;
1295         }
1296
1297         break;
1298      }
1299      default: {
1300         //bprintf(PRINT_ERROR, _T("    Unknown transfer type 0x%04X (PC: 0x%06X)\n"), NeoCDDMAMode, SekGetPC(-1));
1301         //bprintf(PRINT_NORMAL, _T("    ??? : 0x%08X  0x%08X 0x%04X 0x%04X 0x%08X\n"), NeoCDDMAAddress1, NeoCDDMAAddress2, NeoCDDMAValue1, NeoCDDMAValue2, NeoCDDMACount);
1302
1303//extern INT32 bRunPause;
1304//bRunPause = 1;
1305
1306      }
1307   }
1308}
1309
1310
13111051void lc89510_temp_device::NeoCDProcessCommand()
13121052{
13131053   memset(CDD_RX,  0, sizeof(CDD_RX));
r19315r19316
15061246   }
15071247}
15081248
1509char* lc89510_temp_device::LC8915InitTransfer()
1249char* lc89510_temp_device::LC8915InitTransfer(int NeoCDDMACount)
15101250{
15111251   if (!LC8951RegistersW[REG_W_DTTRG]) {
15121252      //bprintf(PRINT_ERROR, _T("    LC8951 DTTRG status invalid\n"));
r19315r19316
15501290   LC8951UpdateHeader();
15511291}
15521292
1553void lc89510_temp_device::set_DMA_regs(int offset, UINT16 wordValue)
1554{
1555   switch (offset)
1556   {
1557      case 0x0064:
1558         NeoCDDMAAddress1 &= 0x0000FFFF;
1559         NeoCDDMAAddress1 |= wordValue << 16;
1560         break;
1561      case 0x0066:
1562         NeoCDDMAAddress1 &= 0xFFFF0000;
1563         NeoCDDMAAddress1 |= wordValue;
1564         break;
1565      case 0x0068:
1566         NeoCDDMAAddress2 &= 0x0000FFFF;
1567         NeoCDDMAAddress2 |= wordValue << 16;
1568         break;
1569      case 0x006A:
1570         NeoCDDMAAddress2 &= 0xFFFF0000;
1571         NeoCDDMAAddress2 |= wordValue;
1572         break;
1573      case 0x006C:
1574         NeoCDDMAValue1 = wordValue;
1575         break;
1576      case 0x006E:
1577         NeoCDDMAValue2 = wordValue;
1578         break;
1579      case 0x0070:
1580         NeoCDDMACount &= 0x0000FFFF;
1581         NeoCDDMACount |= wordValue << 16;
1582         break;
1583      case 0x0072:
1584         NeoCDDMACount &= 0xFFFF0000;
1585         NeoCDDMACount |= wordValue;
1586         break;
1587
1588      case 0x007E:
1589         NeoCDDMAMode = wordValue;
1590//          bprintf(PRINT_NORMAL, _T("  - DMA controller 0x%2X -> 0x%04X (PC: 0x%06X)\n"), sekAddress & 0xFF, wordValue, SekGetPC(-1));
1591         break;
1592
1593   }
1594}
1595
15961293void lc89510_temp_device::reset_NeoCd(void)
15971294{
15981295   {
r19315r19316
17871484
17881485
17891486
1790void lc89510_temp_device::SekWriteWord(UINT32 a, UINT16 d)
1791{
1792//  printf("write word %08x %04x\n", a, d);
1793   dma_space->write_word(a,d);
1794}
1795
1796void lc89510_temp_device::SekWriteByte(UINT32 a, UINT8 d)
1797{
1798//  printf("write byte %08x %02x\n", a, d);
1799   dma_space->write_byte(a,d);
1800}
1801
1802UINT32 lc89510_temp_device::SekReadByte(UINT32 a)
1803{
1804//  printf("read byte %08x\n", a);
1805   return dma_space->read_byte(a);
1806}
1807
1808
1809UINT32 lc89510_temp_device::SekReadWord(UINT32 a)
1810{
1811//  printf("read WORD %08x\n", a);
1812   return dma_space->read_word(a);
1813}
1814
1815
18161487void lc89510_temp_device::NeoCDIRQUpdate(UINT8 byteValue)
18171488{
18181489   // do we also need to check the regular interrupts like FBA?
trunk/src/mame/machine/megacdcd.h
r19315r19316
33#include "imagedev/chd_cd.h"
44
55
6typedef device_delegate<void (int&, UINT8*, UINT16&, UINT16&, UINT16&)> segacd_dma_delegate;
6typedef device_delegate<void (int&, UINT8*, UINT16&, UINT16&)> segacd_dma_delegate;
77
88
99
r19315r19316
150150
151151   // HACK for DMA handling
152152   segacd_dma_delegate segacd_dma_callback;
153   void Fake_CDC_Do_DMA(int &dmacount, UINT8 *CDC_BUFFER, UINT16 &SEGACD_DMA_ADDRESS, UINT16 &dma_addrc, UINT16 &destination );
153   void Fake_CDC_Do_DMA(int &dmacount, UINT8 *CDC_BUFFER, UINT16 &dma_addrc, UINT16 &destination );
154154   static void set_CDC_Do_DMA(device_t &device,segacd_dma_delegate new_segacd_dma_callback);
155155
156156   static void set_is_neoCD(device_t &device, bool is_neoCD);
r19315r19316
182182   UINT16 CDC_DECODE;
183183   UINT16 CDC_REG0;
184184   UINT16 CDC_REG1;
185   UINT16 SEGACD_DMA_ADDRESS;
186185
187186   UINT8 CDC_BUFFER[(32 * 1024 * 2) + SECTOR_SIZE];
188187
r19315r19316
245244   WRITE16_MEMBER( segacd_cdd_ctrl_w );
246245   READ8_MEMBER( segacd_cdd_rx_r );
247246   WRITE8_MEMBER( segacd_cdd_tx_w );
248   READ16_MEMBER( cdc_dmaaddr_r );
249   WRITE16_MEMBER( cdc_dmaaddr_w );
250247   READ16_MEMBER( segacd_cdfader_r );
251248   WRITE16_MEMBER( segacd_cdfader_w );
252249
r19315r19316
285282
286283   bool bNeoCDLoadSector;
287284
288   INT32 NeoCDDMAAddress1;
289   INT32 NeoCDDMAAddress2;
290   INT32 NeoCDDMAValue1;
291   INT32 NeoCDDMAValue2;
292   INT32 NeoCDDMACount;
293285
294   INT32 NeoCDDMAMode;
295286   int nNeoCDIRQVectorAck;
296287   int get_nNeoCDIRQVectorAck(void) { return nNeoCDIRQVectorAck; }
297288   void set_nNeoCDIRQVectorAck(int val) { nNeoCDIRQVectorAck = val; }
r19315r19316
303294   void NeoCDCommsControl(UINT8 clock, UINT8 send);
304295   void NeoCDProcessCommand();
305296   void LC8951UpdateHeader();
306   char* LC8915InitTransfer();
297   char* LC8915InitTransfer(int NeoCDDMACount);
307298   void LC8915EndTransfer();
308299   void LC8951Reset();
309300   void neocd_cdd_tx_w(UINT8 data);
310301   UINT8 neocd_cdd_rx_r();
311302   void NeoCDCommsReset();
312   void NeoCDDoDMA();
313   void SekWriteWord(UINT32 a, UINT16 d);
314   void SekWriteByte(UINT32 a, UINT8 d);
315   UINT32 SekReadByte(UINT32 a);
316   UINT32 SekReadWord(UINT32 a);
317303
318304   INT32 CDEmuLoadSector(INT32 LBA, char* pBuffer);
319   void set_DMA_regs(int offset, UINT16 wordValue);
320305   void reset_NeoCd(void);
321   address_space* dma_space;
322306
323307   void nLC8951_w(UINT16 byteValue);
324308   UINT16 nLC8951_r(void);
trunk/src/mame/machine/megacd.c
r19315r19316
100100   AM_RANGE(0xff8004 ,0xff8005) AM_DEVREADWRITE("tempcdc",lc89510_temp_device, segacd_cdc_mode_address_r, segacd_cdc_mode_address_w)
101101   AM_RANGE(0xff8006 ,0xff8007) AM_DEVREADWRITE("tempcdc",lc89510_temp_device,segacd_cdc_data_r, segacd_cdc_data_w)
102102   AM_RANGE(0xff8008, 0xff8009) AM_DEVREAD("tempcdc",lc89510_temp_device, cdc_data_sub_r)
103   AM_RANGE(0xff800a, 0xff800b) AM_DEVREADWRITE("tempcdc",lc89510_temp_device,cdc_dmaaddr_r,cdc_dmaaddr_w) // CDC DMA Address
103   AM_RANGE(0xff800a, 0xff800b) AM_READWRITE(segacd_dmaaddr_r,segacd_dmaaddr_w) // DMA Address (not CDC, used in conjunction with)
104104   AM_RANGE(0xff800c, 0xff800d) AM_READWRITE(segacd_stopwatch_timer_r, segacd_stopwatch_timer_w)// Stopwatch timer
105105   AM_RANGE(0xff800e ,0xff800f) AM_READWRITE(segacd_comms_flags_r, segacd_comms_flags_subcpu_w)
106106   AM_RANGE(0xff8010 ,0xff801f) AM_READWRITE(segacd_comms_sub_part1_r, segacd_comms_sub_part1_w)
r19315r19316
16781678   // todo register save state stuff
16791679}
16801680
1681READ16_MEMBER( sega_segacd_device::segacd_dmaaddr_r )
1682{
1683   return m_dmaaddr;
1684}
1685
1686WRITE16_MEMBER( sega_segacd_device::segacd_dmaaddr_w )
1687{
1688   COMBINE_DATA(&m_dmaaddr);
1689}
1690
16811691void sega_segacd_device::device_reset()
16821692{
16831693
r19315r19316
16931703
16941704   lc89510_temp = machine().device<lc89510_temp_device>(":segacd:tempcdc");
16951705   lc89510_temp->reset_cd();
1706   m_dmaaddr = 0;
16961707   scd_dma_timer->adjust(attotime::zero);
16971708
16981709   stopwatch_timer = machine().device<timer_device>(":segacd:sw_timer");
r19315r19316
17531764}
17541765
17551766// todo: tidy up, too many CDC internals here
1756void sega_segacd_device::SegaCD_CDC_Do_DMA(int &dmacount, UINT8 *CDC_BUFFER, UINT16 &SEGACD_DMA_ADDRESS, UINT16 &dma_addrc, UINT16 &destination )
1767void sega_segacd_device::SegaCD_CDC_Do_DMA(int &dmacount, UINT8 *CDC_BUFFER, UINT16 &dma_addrc, UINT16 &destination )
17571768{
17581769   int length = dmacount;
17591770   UINT8 *dest;
r19315r19316
17651776
17661777   if (destination==DMA_PCM)
17671778   {
1768      dstoffset = (SEGACD_DMA_ADDRESS & 0x03FF) << 2;
1779      dstoffset = (m_dmaaddr & 0x03FF) << 2;
17691780      PCM_DMA = true;
17701781   }
17711782   else
17721783   {
1773      dstoffset = (SEGACD_DMA_ADDRESS & 0xFFFF) << 3;
1784      dstoffset = (m_dmaaddr & 0xFFFF) << 3;
17741785   }
17751786
17761787
r19315r19316
18491860
18501861   if (PCM_DMA)
18511862   {
1852      SEGACD_DMA_ADDRESS += length >> 1;
1863      m_dmaaddr += length >> 1;
18531864   }
18541865   else
18551866   {
1856      SEGACD_DMA_ADDRESS += length >> 2;
1867      m_dmaaddr += length >> 2;
18571868   }
18581869}
18591870
trunk/src/mame/machine/megacd.h
r19315r19316
272272   UINT16 segacd_1meg_mode_word_read(int offset, UINT16 mem_mask);
273273   void segacd_1meg_mode_word_write(running_machine& machine, int offset, UINT16 data, UINT16 mem_mask, int use_pm);
274274
275   DECLARE_READ16_MEMBER( segacd_dmaaddr_r );
276   DECLARE_WRITE16_MEMBER( segacd_dmaaddr_w );
277   UINT16 m_dmaaddr;
275278
276279
277280
r19315r19316
365368   READ16_MEMBER( segacd_font_converted_r );
366369   TIMER_DEVICE_CALLBACK_MEMBER( scd_dma_timer_callback );
367370
368   void SegaCD_CDC_Do_DMA( int &dmacount, UINT8 *CDC_BUFFER, UINT16 &SEGACD_DMA_ADDRESS, UINT16 &dma_addrc, UINT16 &destination );
371   void SegaCD_CDC_Do_DMA( int &dmacount, UINT8 *CDC_BUFFER, UINT16 &dma_addrc, UINT16 &destination );
369372   timer_device* scd_dma_timer;
370373
371374protected:

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