trunk/src/mess/drivers/pc9801.c
| r19180 | r19181 | |
| 374 | 374 | DECLARE_WRITE8_MEMBER(pc9810rs_fdc_ctrl_w); |
| 375 | 375 | DECLARE_READ8_MEMBER(pc9801rs_2hd_r); |
| 376 | 376 | DECLARE_WRITE8_MEMBER(pc9801rs_2hd_w); |
| 377 | | DECLARE_READ8_MEMBER(pc9801rs_2dd_r); |
| 378 | | DECLARE_WRITE8_MEMBER(pc9801rs_2dd_w); |
| 377 | // DECLARE_READ8_MEMBER(pc9801rs_2dd_r); |
| 378 | // DECLARE_WRITE8_MEMBER(pc9801rs_2dd_w); |
| 379 | 379 | DECLARE_WRITE8_MEMBER(pc9801rs_video_ff_w); |
| 380 | 380 | DECLARE_WRITE8_MEMBER(pc9801rs_a0_w); |
| 381 | 381 | DECLARE_READ8_MEMBER(pc980ux_memory_r); |
| r19180 | r19181 | |
| 1467 | 1467 | |
| 1468 | 1468 | READ8_MEMBER(pc9801_state::pc9810rs_fdc_ctrl_r) |
| 1469 | 1469 | { |
| 1470 | | |
| 1471 | | return (m_fdc_ctrl & 3) | 8; |
| 1470 | return (m_fdc_ctrl & 3) | 0xf0 | 8 | 4; |
| 1472 | 1471 | } |
| 1473 | 1472 | |
| 1474 | 1473 | WRITE8_MEMBER(pc9801_state::pc9810rs_fdc_ctrl_w) |
| r19180 | r19181 | |
| 1479 | 1478 | ---- ---x select irq |
| 1480 | 1479 | */ |
| 1481 | 1480 | |
| 1481 | machine().device<floppy_connector>("upd765_2hd:0")->get_device()->set_rpm(data & 0x02 ? 360 : 300); |
| 1482 | machine().device<floppy_connector>("upd765_2hd:1")->get_device()->set_rpm(data & 0x02 ? 360 : 300); |
| 1483 | |
| 1484 | machine().device<upd765a_device>("upd765_2hd")->set_rate(data & 0x02 ? 500000 : 250000); |
| 1485 | |
| 1482 | 1486 | m_fdc_ctrl = data; |
| 1483 | 1487 | if(data & 0xfc) |
| 1484 | 1488 | printf("FDC ctrl called with %02x\n",data); |
| r19180 | r19181 | |
| 1492 | 1496 | { |
| 1493 | 1497 | case 0: return machine().device<upd765a_device>("upd765_2hd")->msr_r(space, 0, 0xff); |
| 1494 | 1498 | case 2: return machine().device<upd765a_device>("upd765_2hd")->fifo_r(space, 0, 0xff); |
| 1495 | | case 4: return 0x40; //2hd flag |
| 1499 | case 4: return 0x44; //2hd flag |
| 1496 | 1500 | } |
| 1497 | 1501 | } |
| 1498 | 1502 | |
| r19180 | r19181 | |
| 1508 | 1512 | switch(offset & 6) |
| 1509 | 1513 | { |
| 1510 | 1514 | case 2: machine().device<upd765a_device>("upd765_2hd")->fifo_w(space, 0, data, 0xff); return; |
| 1511 | | case 4: printf("%02x 2HD FDC ctrl\n",data); return; |
| 1515 | case 4: |
| 1516 | if(data & 0x80) |
| 1517 | machine().device<upd765a_device>("upd765_2hd")->reset(); |
| 1518 | |
| 1519 | if(data & 0x40) |
| 1520 | machine().device<upd765a_device>("upd765_2hd")->ready_w(1); |
| 1521 | |
| 1522 | machine().device<floppy_connector>("upd765_2hd:0")->get_device()->mon_w(!(data & 0x08)); |
| 1523 | machine().device<floppy_connector>("upd765_2hd:1")->get_device()->mon_w(!(data & 0x08)); |
| 1524 | return; |
| 1512 | 1525 | } |
| 1513 | 1526 | } |
| 1514 | 1527 | |
| 1515 | 1528 | printf("Write to undefined port [%02x] %02x\n",offset+0x90,data); |
| 1516 | 1529 | } |
| 1517 | 1530 | |
| 1531 | #if 0 |
| 1518 | 1532 | READ8_MEMBER(pc9801_state::pc9801rs_2dd_r) |
| 1519 | 1533 | { |
| 1520 | 1534 | |
| r19180 | r19181 | |
| 1527 | 1541 | { |
| 1528 | 1542 | case 0: return machine().device<upd765a_device>("upd765_2hd")->msr_r(space, 0, 0xff); |
| 1529 | 1543 | case 2: return machine().device<upd765a_device>("upd765_2hd")->fifo_r(space, 0, 0xff); |
| 1530 | | case 4: return 0x70; //2dd flag |
| 1544 | case 4: return 0x44; //2dd flag |
| 1531 | 1545 | } |
| 1532 | 1546 | } |
| 1533 | 1547 | |
| r19180 | r19181 | |
| 1553 | 1567 | |
| 1554 | 1568 | printf("Write to undefined port [%02x] %02x\n",offset+0x90,data); |
| 1555 | 1569 | } |
| 1570 | #endif |
| 1556 | 1571 | |
| 1557 | 1572 | WRITE8_MEMBER(pc9801_state::pc9801rs_video_ff_w) |
| 1558 | 1573 | { |
| r19180 | r19181 | |
| 1637 | 1652 | AM_RANGE(0x0090, 0x0097) AM_READWRITE8(pc9801rs_2hd_r, pc9801rs_2hd_w, 0xffffffff) |
| 1638 | 1653 | AM_RANGE(0x00a0, 0x00af) AM_READWRITE8(pc9801_a0_r, pc9801rs_a0_w, 0xffffffff) //upd7220 bitmap ports / display registers |
| 1639 | 1654 | AM_RANGE(0x00bc, 0x00bf) AM_READWRITE8(pc9810rs_fdc_ctrl_r,pc9810rs_fdc_ctrl_w,0xffffffff) |
| 1640 | | AM_RANGE(0x00c8, 0x00cf) AM_READWRITE8(pc9801rs_2dd_r, pc9801rs_2dd_w, 0xffffffff) |
| 1655 | AM_RANGE(0x00c8, 0x00cf) AM_READWRITE8(pc9801rs_2hd_r, pc9801rs_2hd_w, 0xffffffff) |
| 1641 | 1656 | AM_RANGE(0x00f0, 0x00ff) AM_READWRITE8(pc9801rs_f0_r, pc9801rs_f0_w, 0xffffffff) |
| 1642 | 1657 | AM_RANGE(0x0438, 0x043b) AM_READWRITE8(pc9801rs_access_ctrl_r,pc9801rs_access_ctrl_w,0xffffffff) |
| 1643 | 1658 | AM_RANGE(0x043c, 0x043f) AM_WRITE8(pc9801rs_bank_w, 0xffffffff) //ROM/RAM bank |
| r19180 | r19181 | |
| 1697 | 1712 | AM_RANGE(0x0090, 0x0097) AM_READWRITE8(pc9801rs_2hd_r, pc9801rs_2hd_w, 0xffff) |
| 1698 | 1713 | AM_RANGE(0x00a0, 0x00af) AM_READWRITE8(pc9801_a0_r, pc9801rs_a0_w, 0xffff) //upd7220 bitmap ports / display registers |
| 1699 | 1714 | AM_RANGE(0x00bc, 0x00bf) AM_READWRITE8(pc9810rs_fdc_ctrl_r,pc9810rs_fdc_ctrl_w,0xffff) |
| 1700 | | AM_RANGE(0x00c8, 0x00cf) AM_READWRITE8(pc9801rs_2dd_r, pc9801rs_2dd_w, 0xffff) |
| 1715 | AM_RANGE(0x00c8, 0x00cf) AM_READWRITE8(pc9801rs_2hd_r, pc9801rs_2hd_w, 0xffff) |
| 1701 | 1716 | AM_RANGE(0x00f0, 0x00ff) AM_READWRITE8(pc9801rs_f0_r, pc9801rs_f0_w, 0xffff) |
| 1702 | 1717 | AM_RANGE(0x0438, 0x043b) AM_READWRITE8(pc9801rs_access_ctrl_r,pc9801rs_access_ctrl_w,0xffff) |
| 1703 | 1718 | AM_RANGE(0x043c, 0x043f) AM_WRITE8(pc9801rs_bank_w, 0xffff) //ROM/RAM bank |
| r19180 | r19181 | |
| 1987 | 2002 | // AM_RANGE(0x00b9, 0x00b9) PC9861k |
| 1988 | 2003 | // AM_RANGE(0x00bb, 0x00bb) PC9861k |
| 1989 | 2004 | AM_RANGE(0x00bc, 0x00bf) AM_READWRITE8(pc9810rs_fdc_ctrl_r,pc9810rs_fdc_ctrl_w,0xffffffff) |
| 1990 | | AM_RANGE(0x00c8, 0x00cf) AM_READWRITE8(pc9801rs_2dd_r, pc9801rs_2dd_w, 0xffffffff) |
| 2005 | AM_RANGE(0x00c8, 0x00cf) AM_READWRITE8(pc9801rs_2hd_r, pc9801rs_2hd_w, 0xffffffff) |
| 1991 | 2006 | // AM_RANGE(0x00d8, 0x00df) AMD98 (sound?) board |
| 1992 | 2007 | AM_RANGE(0x00f0, 0x00ff) AM_READWRITE8(pc9801rs_f0_r, pc9801rs_f0_w, 0xffffffff) |
| 1993 | 2008 | // AM_RANGE(0x0188, 0x018b) YM2203 OPN board / <undefined> |
| r19180 | r19181 | |
| 2559 | 2574 | DEVCB_DRIVER_LINE_MEMBER(pc9801_state, pc9801_tc_w), |
| 2560 | 2575 | DEVCB_DRIVER_MEMBER(pc9801_state, pc9801_dma_read_byte), |
| 2561 | 2576 | DEVCB_DRIVER_MEMBER(pc9801_state, pc9801_dma_write_byte), |
| 2562 | | { DEVCB_NULL, DEVCB_DRIVER_MEMBER(pc9801_state,fdc_r), DEVCB_NULL, DEVCB_NULL }, |
| 2563 | | { DEVCB_NULL, DEVCB_DRIVER_MEMBER(pc9801_state,fdc_w), DEVCB_NULL, DEVCB_NULL }, |
| 2577 | { DEVCB_NULL, DEVCB_DRIVER_MEMBER(pc9801_state,fdc_r), DEVCB_DRIVER_MEMBER(pc9801_state,fdc_r), DEVCB_DRIVER_MEMBER(pc9801_state,fdc_r) }, |
| 2578 | { DEVCB_NULL, DEVCB_DRIVER_MEMBER(pc9801_state,fdc_w), DEVCB_DRIVER_MEMBER(pc9801_state,fdc_w), DEVCB_DRIVER_MEMBER(pc9801_state,fdc_w) }, |
| 2564 | 2579 | { DEVCB_DRIVER_LINE_MEMBER(pc9801_state, pc9801_dack0_w), DEVCB_DRIVER_LINE_MEMBER(pc9801_state, pc9801_dack1_w), DEVCB_DRIVER_LINE_MEMBER(pc9801_state, pc9801_dack2_w), DEVCB_DRIVER_LINE_MEMBER(pc9801_state, pc9801_dack3_w) } |
| 2565 | 2580 | }; |
| 2566 | 2581 | |
| r19180 | r19181 | |
| 2669 | 2684 | { |
| 2670 | 2685 | /* 0xffaf8 */ |
| 2671 | 2686 | |
| 2687 | printf("%02x %d\n",m_fdc_ctrl,state); |
| 2688 | |
| 2672 | 2689 | if(m_fdc_ctrl & 1) |
| 2673 | 2690 | pic8259_ir3_w(machine().device("pic8259_slave"), state); |
| 2674 | 2691 | else |
| r19180 | r19181 | |
| 2809 | 2826 | |
| 2810 | 2827 | MACHINE_START_MEMBER(pc9801_state,pc9821) |
| 2811 | 2828 | { |
| 2812 | | MACHINE_START_CALL_MEMBER(pc9801); |
| 2829 | machine().device("maincpu")->execute().set_irq_acknowledge_callback(irq_callback); |
| 2813 | 2830 | |
| 2831 | m_rtc->cs_w(1); |
| 2832 | m_rtc->oe_w(1); |
| 2833 | |
| 2834 | upd765a_device *fdc; |
| 2835 | fdc = machine().device<upd765a_device>(":upd765_2hd"); |
| 2836 | fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(pc9801_state::pc9801rs_fdc_irq), this)); |
| 2837 | fdc->setup_drq_cb(upd765a_device::line_cb(FUNC(pc9801_state::fdc_2hd_drq), this)); |
| 2838 | |
| 2814 | 2839 | m_ideram = auto_alloc_array(machine(), UINT8, 0x2000); |
| 2815 | 2840 | m_vram256 = auto_alloc_array(machine(), UINT8, 0x8000); |
| 2816 | 2841 | m_ext_gvram = auto_alloc_array(machine(), UINT8, 0xa0000); |