trunk/src/emu/video/pc_vga.c
| r18228 | r18229 | |
| 333 | 333 | |
| 334 | 334 | #define LOG_8514 0 |
| 335 | 335 | |
| 336 | | static VIDEO_RESET( vga ); |
| 337 | | |
| 338 | 336 | /*************************************************************************** |
| 339 | 337 | |
| 340 | | MachineDriver stuff |
| 338 | Generic VGA |
| 341 | 339 | |
| 342 | 340 | ***************************************************************************/ |
| 341 | // device type definition |
| 342 | const device_type VGA = &device_creator<vga_device>; |
| 343 | const device_type TSENG_VGA = &device_creator<tseng_vga_device>; |
| 344 | const device_type TRIDENT_VGA = &device_creator<trident_vga_device>; |
| 345 | const device_type S3_VGA = &device_creator<s3_vga_device>; |
| 346 | const device_type GAMTOR_VGA = &device_creator<gamtor_vga_device>; |
| 347 | const device_type ATI_VGA = &device_creator<ati_vga_device>; |
| 348 | const device_type CIRRUS_VGA = &device_creator<cirrus_vga_device>; |
| 343 | 349 | |
| 344 | | void pc_video_start(running_machine &machine) |
| 350 | vga_device::vga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) |
| 351 | : device_t(mconfig, type, name, tag, owner, clock) |
| 345 | 352 | { |
| 346 | | // ... |
| 353 | } |
| 347 | 354 | |
| 355 | vga_device::vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 356 | : device_t(mconfig, VGA, "VGA", tag, owner, clock) |
| 357 | { |
| 358 | } |
| 359 | |
| 360 | svga_device::svga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) |
| 361 | : vga_device(mconfig, type, name, tag, owner, clock) |
| 362 | { |
| 363 | } |
| 364 | |
| 365 | tseng_vga_device::tseng_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 366 | : svga_device(mconfig, TSENG_VGA, "TSENG_VGA", tag, owner, clock) |
| 367 | { |
| 368 | } |
| 369 | |
| 370 | trident_vga_device::trident_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 371 | : svga_device(mconfig, TRIDENT_VGA, "TRIDENT_VGA", tag, owner, clock) |
| 372 | { |
| 373 | } |
| 374 | |
| 375 | s3_vga_device::s3_vga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) |
| 376 | : svga_device(mconfig, type, name, tag, owner, clock) |
| 377 | { |
| 378 | } |
| 379 | |
| 380 | s3_vga_device::s3_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 381 | : svga_device(mconfig, S3_VGA, "S3_VGA", tag, owner, clock) |
| 382 | { |
| 383 | } |
| 384 | |
| 385 | gamtor_vga_device::gamtor_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 386 | : svga_device(mconfig, GAMTOR_VGA, "GAMTOR_VGA", tag, owner, clock) |
| 387 | { |
| 388 | } |
| 389 | |
| 390 | ati_vga_device::ati_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 391 | : s3_vga_device(mconfig, ATI_VGA, "ATI_VGA", tag, owner, clock) |
| 392 | { |
| 393 | } |
| 394 | cirrus_vga_device::cirrus_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 395 | : svga_device(mconfig, CIRRUS_VGA, "CIRRUS_VGA", tag, owner, clock) |
| 396 | { |
| 397 | } |
| 398 | |
| 399 | |
| 400 | void vga_device::device_start() |
| 401 | { |
| 402 | memset(&vga, 0, sizeof(vga)); |
| 403 | |
| 404 | int i; |
| 405 | for (i = 0; i < 0x100; i++) |
| 406 | palette_set_color_rgb(machine(), i, 0, 0, 0); |
| 407 | |
| 348 | 408 | // Avoid an infinite loop when displaying. 0 is not possible anyway. |
| 349 | 409 | vga.crtc.maximum_scan_line = 1; |
| 410 | |
| 411 | |
| 412 | // copy over interfaces |
| 413 | vga.read_dipswitch = read8_delegate(); //read_dipswitch; |
| 414 | vga.svga_intf.vram_size = 0x100000; |
| 415 | vga.svga_intf.seq_regcount = 0x05; |
| 416 | vga.svga_intf.crtc_regcount = 0x19; |
| 417 | |
| 418 | vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size); |
| 350 | 419 | } |
| 351 | 420 | |
| 352 | | void s3_video_start(running_machine &machine) |
| 421 | void cirrus_vga_device::device_start() |
| 353 | 422 | { |
| 354 | | int x; |
| 423 | memset(&vga, 0, sizeof(vga)); |
| 424 | |
| 425 | int i; |
| 426 | for (i = 0; i < 0x100; i++) |
| 427 | palette_set_color_rgb(machine(), i, 0, 0, 0); |
| 428 | |
| 355 | 429 | // Avoid an infinite loop when displaying. 0 is not possible anyway. |
| 356 | 430 | vga.crtc.maximum_scan_line = 1; |
| 431 | |
| 432 | |
| 433 | // copy over interfaces |
| 434 | vga.read_dipswitch = read8_delegate(); //read_dipswitch; |
| 435 | vga.svga_intf.vram_size = 0x200000; |
| 436 | vga.svga_intf.seq_regcount = 0x08; |
| 437 | vga.svga_intf.crtc_regcount = 0x19; |
| 438 | |
| 439 | vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size); |
| 440 | } |
| 441 | |
| 442 | void s3_vga_device::device_start() |
| 443 | { |
| 444 | vga_device::device_start(); |
| 445 | int x; |
| 357 | 446 | // Initialise hardware graphics cursor colours, Windows 95 doesn't touch the registers for some reason |
| 358 | 447 | for(x=0;x<4;x++) |
| 359 | 448 | { |
| r18228 | r18229 | |
| 362 | 451 | } |
| 363 | 452 | } |
| 364 | 453 | |
| 365 | | static void vga_vh_text(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 454 | void vga_device::vga_vh_text(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 366 | 455 | { |
| 367 | 456 | UINT8 ch, attr; |
| 368 | 457 | UINT8 bits; |
| r18228 | r18229 | |
| 374 | 463 | pen_t pen; |
| 375 | 464 | |
| 376 | 465 | if(vga.crtc.cursor_enable) |
| 377 | | vga.cursor.visible = machine.primary_screen->frame_number() & 0x10; |
| 466 | vga.cursor.visible = machine().primary_screen->frame_number() & 0x10; |
| 378 | 467 | else |
| 379 | 468 | vga.cursor.visible = 0; |
| 380 | 469 | |
| r18228 | r18229 | |
| 387 | 476 | attr = vga.memory[(pos<<1) + 1]; |
| 388 | 477 | font_base = 0x20000+(ch<<5); |
| 389 | 478 | font_base += ((attr & 8) ? vga.sequencer.char_sel.B : vga.sequencer.char_sel.A)*0x2000; |
| 390 | | blink_en = (vga.attribute.data[0x10]&8&&machine.primary_screen->frame_number() & 0x20) ? attr & 0x80 : 0; |
| 479 | blink_en = (vga.attribute.data[0x10]&8&&machine().primary_screen->frame_number() & 0x20) ? attr & 0x80 : 0; |
| 391 | 480 | |
| 392 | 481 | fore_col = attr & 0xf; |
| 393 | 482 | back_col = (attr & 0x70) >> 4; |
| r18228 | r18229 | |
| 405 | 494 | else |
| 406 | 495 | pen = vga.pens[back_col]; |
| 407 | 496 | |
| 408 | | if(!machine.primary_screen->visible_area().contains(column*width+w, line+h)) |
| 497 | if(!machine().primary_screen->visible_area().contains(column*width+w, line+h)) |
| 409 | 498 | continue; |
| 410 | 499 | bitmapline[column*width+w] = pen; |
| 411 | 500 | |
| r18228 | r18229 | |
| 418 | 507 | else |
| 419 | 508 | pen = vga.pens[back_col]; |
| 420 | 509 | |
| 421 | | if(!machine.primary_screen->visible_area().contains(column*width+w, line+h)) |
| 510 | if(!machine().primary_screen->visible_area().contains(column*width+w, line+h)) |
| 422 | 511 | continue; |
| 423 | 512 | bitmapline[column*width+w] = pen; |
| 424 | 513 | } |
| r18228 | r18229 | |
| 429 | 518 | (h<=vga.crtc.cursor_scan_end)&&(h<height)&&(line+h<TEXT_LINES); |
| 430 | 519 | h++) |
| 431 | 520 | { |
| 432 | | if(!machine.primary_screen->visible_area().contains(column*width, line+h)) |
| 521 | if(!machine().primary_screen->visible_area().contains(column*width, line+h)) |
| 433 | 522 | continue; |
| 434 | 523 | bitmap.plot_box(column*width, line+h, width, 1, vga.pens[attr&0xf]); |
| 435 | 524 | } |
| r18228 | r18229 | |
| 438 | 527 | } |
| 439 | 528 | } |
| 440 | 529 | |
| 441 | | static void vga_vh_ega(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 530 | void vga_device::vga_vh_ega(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 442 | 531 | { |
| 443 | 532 | int pos, line, column, c, addr, i, yi; |
| 444 | 533 | int height = vga.crtc.maximum_scan_line * (vga.crtc.scan_doubling + 1); |
| r18228 | r18229 | |
| 465 | 554 | for (i = 7; i >= 0; i--) |
| 466 | 555 | { |
| 467 | 556 | pen = vga.pens[(data[0]&1) | (data[1]&2) | (data[2]&4) | (data[3]&8)]; |
| 468 | | if(!machine.primary_screen->visible_area().contains(c+i, line + yi)) |
| 557 | if(!machine().primary_screen->visible_area().contains(c+i, line + yi)) |
| 469 | 558 | continue; |
| 470 | 559 | bitmapline[c+i] = pen; |
| 471 | 560 | |
| r18228 | r18229 | |
| 480 | 569 | } |
| 481 | 570 | |
| 482 | 571 | /* TODO: I'm guessing that in 256 colors mode every pixel actually outputs two pixels. Is it right? */ |
| 483 | | static void vga_vh_vga(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 572 | void vga_device::vga_vh_vga(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 484 | 573 | { |
| 485 | 574 | int pos, line, column, c, addr, curr_addr; |
| 486 | 575 | UINT32 *bitmapline; |
| r18228 | r18229 | |
| 512 | 601 | |
| 513 | 602 | for(xi=0;xi<8;xi++) |
| 514 | 603 | { |
| 515 | | if(!machine.primary_screen->visible_area().contains(c+xi-pel_shift, line + yi)) |
| 604 | if(!machine().primary_screen->visible_area().contains(c+xi-pel_shift, line + yi)) |
| 516 | 605 | continue; |
| 517 | | bitmapline[c+xi-pel_shift] = machine.pens[vga.memory[(pos & 0xffff)+((xi >> 1)*0x10000)]]; |
| 606 | bitmapline[c+xi-pel_shift] = machine().pens[vga.memory[(pos & 0xffff)+((xi >> 1)*0x10000)]]; |
| 518 | 607 | } |
| 519 | 608 | } |
| 520 | 609 | } |
| r18228 | r18229 | |
| 539 | 628 | |
| 540 | 629 | for(xi=0;xi<0x10;xi++) |
| 541 | 630 | { |
| 542 | | if(!machine.primary_screen->visible_area().contains(c+xi-pel_shift, line + yi)) |
| 631 | if(!machine().primary_screen->visible_area().contains(c+xi-pel_shift, line + yi)) |
| 543 | 632 | continue; |
| 544 | | bitmapline[c+xi-pel_shift] = machine.pens[vga.memory[(pos+(xi >> 1)) & 0xffff]]; |
| 633 | bitmapline[c+xi-pel_shift] = machine().pens[vga.memory[(pos+(xi >> 1)) & 0xffff]]; |
| 545 | 634 | } |
| 546 | 635 | } |
| 547 | 636 | } |
| r18228 | r18229 | |
| 549 | 638 | } |
| 550 | 639 | } |
| 551 | 640 | |
| 552 | | static void vga_vh_cga(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 641 | void vga_device::vga_vh_cga(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 553 | 642 | { |
| 554 | 643 | UINT32 *bitmapline; |
| 555 | 644 | int height = (vga.crtc.scan_doubling + 1); |
| r18228 | r18229 | |
| 573 | 662 | for(xi=0;xi<4;xi++) |
| 574 | 663 | { |
| 575 | 664 | pen = vga.pens[(vga.memory[addr] >> (6-xi*2)) & 3]; |
| 576 | | if(!machine.primary_screen->visible_area().contains(x+xi, y * height + yi)) |
| 665 | if(!machine().primary_screen->visible_area().contains(x+xi, y * height + yi)) |
| 577 | 666 | continue; |
| 578 | 667 | bitmapline[x+xi] = pen; |
| 579 | 668 | } |
| r18228 | r18229 | |
| 584 | 673 | } |
| 585 | 674 | } |
| 586 | 675 | |
| 587 | | static void vga_vh_mono(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 676 | void vga_device::vga_vh_mono(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 588 | 677 | { |
| 589 | 678 | UINT32 *bitmapline; |
| 590 | 679 | int height = (vga.crtc.scan_doubling + 1); |
| r18228 | r18229 | |
| 608 | 697 | for(xi=0;xi<8;xi++) |
| 609 | 698 | { |
| 610 | 699 | pen = vga.pens[(vga.memory[addr] >> (7-xi)) & 1]; |
| 611 | | if(!machine.primary_screen->visible_area().contains(x+xi, y * height + yi)) |
| 700 | if(!machine().primary_screen->visible_area().contains(x+xi, y * height + yi)) |
| 612 | 701 | continue; |
| 613 | 702 | bitmapline[x+xi] = pen; |
| 614 | 703 | } |
| r18228 | r18229 | |
| 619 | 708 | } |
| 620 | 709 | } |
| 621 | 710 | |
| 622 | | static void svga_vh_rgb8(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 711 | void svga_device::svga_vh_rgb8(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 623 | 712 | { |
| 624 | 713 | int pos, line, column, c, addr, curr_addr; |
| 625 | 714 | UINT32 *bitmapline; |
| r18228 | r18229 | |
| 661 | 750 | |
| 662 | 751 | for(xi=0;xi<8;xi++) |
| 663 | 752 | { |
| 664 | | if(!machine.primary_screen->visible_area().contains(c+xi, line + yi)) |
| 753 | if(!machine().primary_screen->visible_area().contains(c+xi, line + yi)) |
| 665 | 754 | continue; |
| 666 | | bitmapline[c+xi] = machine.pens[vga.memory[(pos+(xi))]]; |
| 755 | bitmapline[c+xi] = machine().pens[vga.memory[(pos+(xi))]]; |
| 667 | 756 | } |
| 668 | 757 | } |
| 669 | 758 | } |
| r18228 | r18229 | |
| 671 | 760 | } |
| 672 | 761 | } |
| 673 | 762 | |
| 674 | | static void svga_vh_rgb15(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 763 | void svga_device::svga_vh_rgb15(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 675 | 764 | { |
| 676 | 765 | #define MV(x) (vga.memory[x]+(vga.memory[x+1]<<8)) |
| 677 | 766 | #define IV 0xff000000 |
| r18228 | r18229 | |
| 700 | 789 | { |
| 701 | 790 | int r,g,b; |
| 702 | 791 | |
| 703 | | if(!machine.primary_screen->visible_area().contains(c+xi, line + yi)) |
| 792 | if(!machine().primary_screen->visible_area().contains(c+xi, line + yi)) |
| 704 | 793 | continue; |
| 705 | 794 | |
| 706 | 795 | r = (MV(pos+xm)&0x7c00)>>10; |
| r18228 | r18229 | |
| 715 | 804 | } |
| 716 | 805 | } |
| 717 | 806 | |
| 718 | | static void svga_vh_rgb16(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 807 | void svga_device::svga_vh_rgb16(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 719 | 808 | { |
| 720 | 809 | #define MV(x) (vga.memory[x]+(vga.memory[x+1]<<8)) |
| 721 | 810 | #define IV 0xff000000 |
| r18228 | r18229 | |
| 744 | 833 | { |
| 745 | 834 | int r,g,b; |
| 746 | 835 | |
| 747 | | if(!machine.primary_screen->visible_area().contains(c+xi, line + yi)) |
| 836 | if(!machine().primary_screen->visible_area().contains(c+xi, line + yi)) |
| 748 | 837 | continue; |
| 749 | 838 | |
| 750 | 839 | r = (MV(pos+xm)&0xf800)>>11; |
| r18228 | r18229 | |
| 759 | 848 | } |
| 760 | 849 | } |
| 761 | 850 | |
| 762 | | static void svga_vh_rgb24(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 851 | void svga_device::svga_vh_rgb24(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 763 | 852 | { |
| 764 | 853 | #define MD(x) (vga.memory[x]+(vga.memory[x+1]<<8)+(vga.memory[x+2]<<16)) |
| 765 | 854 | #define ID 0xff000000 |
| r18228 | r18229 | |
| 788 | 877 | { |
| 789 | 878 | int r,g,b; |
| 790 | 879 | |
| 791 | | if(!machine.primary_screen->visible_area().contains(c+xi, line + yi)) |
| 880 | if(!machine().primary_screen->visible_area().contains(c+xi, line + yi)) |
| 792 | 881 | continue; |
| 793 | 882 | |
| 794 | 883 | r = (MD(pos+xm)&0xff0000)>>16; |
| r18228 | r18229 | |
| 800 | 889 | } |
| 801 | 890 | } |
| 802 | 891 | |
| 803 | | static void svga_vh_rgb32(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 892 | void svga_device::svga_vh_rgb32(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 804 | 893 | { |
| 805 | 894 | #define MD(x) (vga.memory[x]+(vga.memory[x+1]<<8)+(vga.memory[x+2]<<16)) |
| 806 | 895 | #define ID 0xff000000 |
| r18228 | r18229 | |
| 829 | 918 | { |
| 830 | 919 | int r,g,b; |
| 831 | 920 | |
| 832 | | if(!machine.primary_screen->visible_area().contains(c+xi, line + yi)) |
| 921 | if(!machine().primary_screen->visible_area().contains(c+xi, line + yi)) |
| 833 | 922 | continue; |
| 834 | 923 | |
| 835 | 924 | r = (MD(pos+xm)&0xff0000)>>16; |
| r18228 | r18229 | |
| 853 | 942 | RGB15_MODE, |
| 854 | 943 | RGB16_MODE, |
| 855 | 944 | RGB24_MODE, |
| 856 | | RGB32_MODE, |
| 857 | | SVGA_HACK |
| 945 | RGB32_MODE |
| 858 | 946 | }; |
| 859 | 947 | |
| 948 | UINT8 vga_device::pc_vga_choosevideomode() |
| 949 | { |
| 950 | int i; |
| 860 | 951 | |
| 861 | | static UINT8 pc_vga_choosevideomode(running_machine &machine) |
| 952 | if (vga.crtc.sync_en) |
| 953 | { |
| 954 | if (vga.dac.dirty) |
| 955 | { |
| 956 | for (i=0; i<256;i++) |
| 957 | { |
| 958 | /* TODO: color shifters? */ |
| 959 | palette_set_color_rgb(machine(), i, (vga.dac.color[i & vga.dac.mask].red & 0x3f) << 2, |
| 960 | (vga.dac.color[i & vga.dac.mask].green & 0x3f) << 2, |
| 961 | (vga.dac.color[i & vga.dac.mask].blue & 0x3f) << 2); |
| 962 | } |
| 963 | vga.dac.dirty = 0; |
| 964 | } |
| 965 | |
| 966 | if (vga.attribute.data[0x10] & 0x80) |
| 967 | { |
| 968 | for (i=0; i<16;i++) |
| 969 | { |
| 970 | vga.pens[i] = machine().pens[(vga.attribute.data[i]&0x0f) |
| 971 | |((vga.attribute.data[0x14]&0xf)<<4)]; |
| 972 | } |
| 973 | } |
| 974 | else |
| 975 | { |
| 976 | for (i=0; i<16;i++) |
| 977 | { |
| 978 | vga.pens[i]=machine().pens[(vga.attribute.data[i]&0x3f) |
| 979 | |((vga.attribute.data[0x14]&0xc)<<4)]; |
| 980 | } |
| 981 | } |
| 982 | |
| 983 | if (!GRAPHIC_MODE) |
| 984 | { |
| 985 | return TEXT_MODE; |
| 986 | } |
| 987 | else if (vga.gc.shift256) |
| 988 | { |
| 989 | return VGA_MODE; |
| 990 | } |
| 991 | else if (vga.gc.shift_reg) |
| 992 | { |
| 993 | return CGA_MODE; |
| 994 | } |
| 995 | else if (vga.gc.memory_map_sel == 0x03) |
| 996 | { |
| 997 | return MONO_MODE; |
| 998 | } |
| 999 | else |
| 1000 | { |
| 1001 | return EGA_MODE; |
| 1002 | } |
| 1003 | } |
| 1004 | |
| 1005 | return SCREEN_OFF; |
| 1006 | } |
| 1007 | |
| 1008 | |
| 1009 | UINT8 svga_device::pc_vga_choosevideomode() |
| 862 | 1010 | { |
| 863 | 1011 | int i; |
| 864 | 1012 | |
| r18228 | r18229 | |
| 869 | 1017 | for (i=0; i<256;i++) |
| 870 | 1018 | { |
| 871 | 1019 | /* TODO: color shifters? */ |
| 872 | | palette_set_color_rgb(machine, i, (vga.dac.color[i & vga.dac.mask].red & 0x3f) << 2, |
| 1020 | palette_set_color_rgb(machine(), i, (vga.dac.color[i & vga.dac.mask].red & 0x3f) << 2, |
| 873 | 1021 | (vga.dac.color[i & vga.dac.mask].green & 0x3f) << 2, |
| 874 | 1022 | (vga.dac.color[i & vga.dac.mask].blue & 0x3f) << 2); |
| 875 | 1023 | } |
| r18228 | r18229 | |
| 880 | 1028 | { |
| 881 | 1029 | for (i=0; i<16;i++) |
| 882 | 1030 | { |
| 883 | | vga.pens[i] = machine.pens[(vga.attribute.data[i]&0x0f) |
| 1031 | vga.pens[i] = machine().pens[(vga.attribute.data[i]&0x0f) |
| 884 | 1032 | |((vga.attribute.data[0x14]&0xf)<<4)]; |
| 885 | 1033 | } |
| 886 | 1034 | } |
| r18228 | r18229 | |
| 888 | 1036 | { |
| 889 | 1037 | for (i=0; i<16;i++) |
| 890 | 1038 | { |
| 891 | | vga.pens[i]=machine.pens[(vga.attribute.data[i]&0x3f) |
| 1039 | vga.pens[i]=machine().pens[(vga.attribute.data[i]&0x3f) |
| 892 | 1040 | |((vga.attribute.data[0x14]&0xc)<<4)]; |
| 893 | 1041 | } |
| 894 | 1042 | } |
| r18228 | r18229 | |
| 915 | 1063 | } |
| 916 | 1064 | else if (!GRAPHIC_MODE) |
| 917 | 1065 | { |
| 918 | | //proc = vga_vh_text; |
| 919 | | //*height = TEXT_LINES; |
| 920 | | //*width = TEXT_COLUMNS * CHAR_WIDTH; |
| 921 | | |
| 922 | 1066 | return TEXT_MODE; |
| 923 | 1067 | } |
| 924 | 1068 | else if (vga.gc.shift256) |
| 925 | 1069 | { |
| 926 | | //proc = vga_vh_vga; |
| 927 | | //*height = LINES; |
| 928 | | //*width = VGA_COLUMNS * 8; |
| 929 | 1070 | return VGA_MODE; |
| 930 | 1071 | } |
| 931 | 1072 | else if (vga.gc.shift_reg) |
| 932 | 1073 | { |
| 933 | | // cga |
| 934 | 1074 | return CGA_MODE; |
| 935 | 1075 | } |
| 936 | 1076 | else if (vga.gc.memory_map_sel == 0x03) |
| 937 | 1077 | { |
| 938 | | // mono |
| 939 | 1078 | return MONO_MODE; |
| 940 | 1079 | } |
| 941 | 1080 | else |
| 942 | 1081 | { |
| 943 | | //proc = vga_vh_ega; |
| 944 | | //*height = LINES; |
| 945 | | //*width = EGA_COLUMNS * 8; |
| 946 | 1082 | return EGA_MODE; |
| 947 | 1083 | } |
| 948 | 1084 | } |
| r18228 | r18229 | |
| 950 | 1086 | return SCREEN_OFF; |
| 951 | 1087 | } |
| 952 | 1088 | |
| 953 | | SCREEN_UPDATE_RGB32( pc_video ) |
| 1089 | |
| 1090 | UINT32 vga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 954 | 1091 | { |
| 955 | | UINT8 cur_mode = pc_vga_choosevideomode(screen.machine()); |
| 1092 | UINT8 cur_mode = pc_vga_choosevideomode(); |
| 1093 | switch(cur_mode) |
| 1094 | { |
| 1095 | case SCREEN_OFF: bitmap.fill (get_black_pen(machine()), cliprect);break; |
| 1096 | case TEXT_MODE: vga_vh_text (bitmap, cliprect); break; |
| 1097 | case VGA_MODE: vga_vh_vga (bitmap, cliprect); break; |
| 1098 | case EGA_MODE: vga_vh_ega (bitmap, cliprect); break; |
| 1099 | case CGA_MODE: vga_vh_cga (bitmap, cliprect); break; |
| 1100 | case MONO_MODE: vga_vh_mono (bitmap, cliprect); break; |
| 1101 | } |
| 956 | 1102 | |
| 957 | | //popmessage("%02x %02x",cur_mode,vga.attribute.data[0x13]); |
| 958 | | //popmessage("%d",vga.attribute.pel_shift); |
| 959 | | //popmessage("%d %d %d",vga.crtc.vert_blank_start,vga.crtc.vert_blank_end,vga.crtc.vert_total); |
| 960 | | |
| 1103 | return 0; |
| 1104 | } |
| 1105 | UINT32 svga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 1106 | { |
| 1107 | UINT8 cur_mode = pc_vga_choosevideomode(); |
| 961 | 1108 | switch(cur_mode) |
| 962 | 1109 | { |
| 963 | | case SCREEN_OFF: bitmap.fill (get_black_pen(screen.machine()), cliprect);break; |
| 964 | | case TEXT_MODE: vga_vh_text (screen.machine(), bitmap, cliprect); break; |
| 965 | | case VGA_MODE: vga_vh_vga (screen.machine(), bitmap, cliprect); break; |
| 966 | | case EGA_MODE: vga_vh_ega (screen.machine(), bitmap, cliprect); break; |
| 967 | | case CGA_MODE: vga_vh_cga (screen.machine(), bitmap, cliprect); break; |
| 968 | | case MONO_MODE: vga_vh_mono (screen.machine(), bitmap, cliprect); break; |
| 969 | | case RGB8_MODE: svga_vh_rgb8 (screen.machine(), bitmap, cliprect); break; |
| 970 | | case RGB15_MODE: svga_vh_rgb15(screen.machine(), bitmap, cliprect); break; |
| 971 | | case RGB16_MODE: svga_vh_rgb16(screen.machine(), bitmap, cliprect); break; |
| 972 | | case RGB24_MODE: svga_vh_rgb24(screen.machine(), bitmap, cliprect); break; |
| 973 | | case RGB32_MODE: svga_vh_rgb32(screen.machine(), bitmap, cliprect); break; |
| 1110 | case SCREEN_OFF: bitmap.fill (get_black_pen(machine()), cliprect);break; |
| 1111 | case TEXT_MODE: vga_vh_text (bitmap, cliprect); break; |
| 1112 | case VGA_MODE: vga_vh_vga (bitmap, cliprect); break; |
| 1113 | case EGA_MODE: vga_vh_ega (bitmap, cliprect); break; |
| 1114 | case CGA_MODE: vga_vh_cga (bitmap, cliprect); break; |
| 1115 | case MONO_MODE: vga_vh_mono (bitmap, cliprect); break; |
| 1116 | case RGB8_MODE: svga_vh_rgb8 (bitmap, cliprect); break; |
| 1117 | case RGB15_MODE: svga_vh_rgb15(bitmap, cliprect); break; |
| 1118 | case RGB16_MODE: svga_vh_rgb16(bitmap, cliprect); break; |
| 1119 | case RGB24_MODE: svga_vh_rgb24(bitmap, cliprect); break; |
| 1120 | case RGB32_MODE: svga_vh_rgb32(bitmap, cliprect); break; |
| 974 | 1121 | } |
| 975 | 1122 | |
| 976 | 1123 | return 0; |
| 977 | 1124 | } |
| 978 | 1125 | |
| 979 | | SCREEN_UPDATE_RGB32( pc_video_s3 ) |
| 1126 | UINT32 s3_vga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 980 | 1127 | { |
| 981 | 1128 | UINT8 cur_mode = 0; |
| 982 | 1129 | |
| 983 | | SCREEN_UPDATE32_CALL( pc_video ); |
| 1130 | svga_device::screen_update(screen, bitmap, cliprect); |
| 984 | 1131 | |
| 985 | | cur_mode = pc_vga_choosevideomode(screen.machine()); |
| 1132 | cur_mode = pc_vga_choosevideomode(); |
| 986 | 1133 | |
| 987 | 1134 | // draw hardware graphics cursor |
| 988 | 1135 | // TODO: support 16 bit and greater video modes |
| r18228 | r18229 | |
| 1055 | 1202 | |
| 1056 | 1203 | /***************************************************************************/ |
| 1057 | 1204 | |
| 1058 | | INLINE UINT8 rotate_right(UINT8 val) |
| 1205 | inline UINT8 vga_device::rotate_right(UINT8 val) |
| 1059 | 1206 | { |
| 1060 | 1207 | return (val >> vga.gc.rotate_count) | (val << (8 - vga.gc.rotate_count)); |
| 1061 | 1208 | } |
| 1062 | 1209 | |
| 1063 | | INLINE UINT8 vga_logical_op(UINT8 data, UINT8 plane, UINT8 mask) |
| 1210 | inline UINT8 vga_device::vga_logical_op(UINT8 data, UINT8 plane, UINT8 mask) |
| 1064 | 1211 | { |
| 1065 | 1212 | UINT8 res = 0; |
| 1066 | 1213 | |
| r18228 | r18229 | |
| 1083 | 1230 | return res; |
| 1084 | 1231 | } |
| 1085 | 1232 | |
| 1086 | | INLINE UINT8 vga_latch_write(int offs, UINT8 data) |
| 1233 | inline UINT8 vga_device::vga_latch_write(int offs, UINT8 data) |
| 1087 | 1234 | { |
| 1088 | 1235 | UINT8 res = 0; |
| 1089 | 1236 | |
| r18228 | r18229 | |
| 1110 | 1257 | return res; |
| 1111 | 1258 | } |
| 1112 | 1259 | |
| 1113 | | static UINT8 crtc_reg_read(UINT8 index) |
| 1260 | UINT8 vga_device::crtc_reg_read(UINT8 index) |
| 1114 | 1261 | { |
| 1115 | 1262 | UINT8 res; |
| 1116 | 1263 | |
| r18228 | r18229 | |
| 1224 | 1371 | return res; |
| 1225 | 1372 | } |
| 1226 | 1373 | |
| 1227 | | static void recompute_params_clock(running_machine &machine, int divisor, int xtal) |
| 1374 | void vga_device::recompute_params_clock(int divisor, int xtal) |
| 1228 | 1375 | { |
| 1229 | 1376 | int vblank_period,hblank_period; |
| 1230 | 1377 | attoseconds_t refresh; |
| r18228 | r18229 | |
| 1245 | 1392 | |
| 1246 | 1393 | refresh = HZ_TO_ATTOSECONDS(pixel_clock) * (hblank_period) * vblank_period; |
| 1247 | 1394 | |
| 1248 | | machine.primary_screen->configure((hblank_period), (vblank_period), visarea, refresh ); |
| 1395 | machine().primary_screen->configure((hblank_period), (vblank_period), visarea, refresh ); |
| 1249 | 1396 | // popmessage("%d %d\n",vga.crtc.horz_total * 8,vga.crtc.vert_total); |
| 1250 | 1397 | } |
| 1251 | 1398 | |
| 1252 | | static void recompute_params(running_machine &machine) |
| 1399 | void vga_device::recompute_params() |
| 1253 | 1400 | { |
| 1254 | | recompute_params_clock(machine, 1, (vga.miscellaneous_output & 0xc) ? XTAL_28_63636MHz : XTAL_25_1748MHz); |
| 1401 | recompute_params_clock(1, (vga.miscellaneous_output & 0xc) ? XTAL_28_63636MHz : XTAL_25_1748MHz); |
| 1255 | 1402 | if(vga.miscellaneous_output & 8) |
| 1256 | 1403 | logerror("Warning: VGA external clock latch selected\n"); |
| 1257 | 1404 | } |
| 1258 | 1405 | |
| 1259 | | static void crtc_reg_write(running_machine &machine, UINT8 index, UINT8 data) |
| 1406 | void vga_device::crtc_reg_write(UINT8 index, UINT8 data) |
| 1260 | 1407 | { |
| 1261 | 1408 | /* Doom does this */ |
| 1262 | 1409 | // if(vga.crtc.protect_enable && index <= 0x07) |
| r18228 | r18229 | |
| 1268 | 1415 | if(vga.crtc.protect_enable) |
| 1269 | 1416 | break; |
| 1270 | 1417 | vga.crtc.horz_total = (vga.crtc.horz_total & ~0xff) | (data & 0xff); |
| 1271 | | recompute_params(machine); |
| 1418 | recompute_params(); |
| 1272 | 1419 | break; |
| 1273 | 1420 | case 0x01: |
| 1274 | 1421 | if(vga.crtc.protect_enable) |
| 1275 | 1422 | break; |
| 1276 | 1423 | vga.crtc.horz_disp_end = (data & 0xff); |
| 1277 | | recompute_params(machine); |
| 1424 | recompute_params(); |
| 1278 | 1425 | break; |
| 1279 | 1426 | case 0x02: |
| 1280 | 1427 | if(vga.crtc.protect_enable) |
| r18228 | r18229 | |
| 1307 | 1454 | break; |
| 1308 | 1455 | vga.crtc.vert_total &= ~0xff; |
| 1309 | 1456 | vga.crtc.vert_total |= data & 0xff; |
| 1310 | | recompute_params(machine); |
| 1457 | recompute_params(); |
| 1311 | 1458 | break; |
| 1312 | 1459 | case 0x07: // Overflow Register |
| 1313 | 1460 | vga.crtc.line_compare &= ~0x100; |
| r18228 | r18229 | |
| 1325 | 1472 | vga.crtc.vert_retrace_start |= ((data & 0x04) << (8-2)); |
| 1326 | 1473 | vga.crtc.vert_disp_end |= ((data & 0x02) << (8-1)); |
| 1327 | 1474 | vga.crtc.vert_total |= ((data & 0x01) << (8-0)); |
| 1328 | | recompute_params(machine); |
| 1475 | recompute_params(); |
| 1329 | 1476 | break; |
| 1330 | 1477 | case 0x08: // Preset Row Scan Register |
| 1331 | 1478 | vga.crtc.byte_panning = (data & 0x60) >> 5; |
| r18228 | r18229 | |
| 1369 | 1516 | case 0x12: |
| 1370 | 1517 | vga.crtc.vert_disp_end &= ~0xff; |
| 1371 | 1518 | vga.crtc.vert_disp_end |= data & 0xff; |
| 1372 | | recompute_params(machine); |
| 1519 | recompute_params(); |
| 1373 | 1520 | break; |
| 1374 | 1521 | case 0x13: |
| 1375 | 1522 | vga.crtc.offset = data & 0xff; |
| r18228 | r18229 | |
| 1405 | 1552 | } |
| 1406 | 1553 | } |
| 1407 | 1554 | |
| 1408 | | static void seq_reg_write(running_machine &machine, UINT8 index, UINT8 data) |
| 1555 | void vga_device::seq_reg_write(UINT8 index, UINT8 data) |
| 1409 | 1556 | { |
| 1410 | 1557 | switch(index) |
| 1411 | 1558 | { |
| r18228 | r18229 | |
| 1423 | 1570 | } |
| 1424 | 1571 | } |
| 1425 | 1572 | |
| 1426 | | static UINT8 vga_vblank(running_machine &machine) |
| 1573 | UINT8 vga_device::vga_vblank() |
| 1427 | 1574 | { |
| 1428 | 1575 | UINT8 res; |
| 1429 | 1576 | UINT16 vblank_start,vblank_end,vpos; |
| r18228 | r18229 | |
| 1432 | 1579 | res = 0; |
| 1433 | 1580 | vblank_start = vga.crtc.vert_blank_start; |
| 1434 | 1581 | vblank_end = vga.crtc.vert_blank_start + vga.crtc.vert_blank_end; |
| 1435 | | vpos = machine.primary_screen->vpos(); |
| 1582 | vpos = machine().primary_screen->vpos(); |
| 1436 | 1583 | |
| 1437 | 1584 | /* check if we are under vblank period */ |
| 1438 | 1585 | if(vblank_end > vga.crtc.vert_total) |
| r18228 | r18229 | |
| 1452 | 1599 | return res; |
| 1453 | 1600 | } |
| 1454 | 1601 | |
| 1455 | | static READ8_HANDLER(vga_crtc_r) |
| 1602 | READ8_MEMBER(vga_device::vga_crtc_r) |
| 1456 | 1603 | { |
| 1457 | 1604 | UINT8 data = 0xff; |
| 1458 | 1605 | |
| r18228 | r18229 | |
| 1469 | 1616 | data = 0; |
| 1470 | 1617 | |
| 1471 | 1618 | hsync = space.machine().primary_screen->hblank() & 1; |
| 1472 | | vsync = vga_vblank(space.machine()); //space.machine().primary_screen->vblank() & 1; |
| 1619 | vsync = vga_vblank(); //space.machine().primary_screen->vblank() & 1; |
| 1473 | 1620 | |
| 1474 | 1621 | data |= (hsync | vsync) & 1; // DD - display disable register |
| 1475 | 1622 | data |= (vsync & 1) << 3; // VRetrace register |
| r18228 | r18229 | |
| 1502 | 1649 | return data; |
| 1503 | 1650 | } |
| 1504 | 1651 | |
| 1505 | | static WRITE8_HANDLER(vga_crtc_w) |
| 1652 | WRITE8_MEMBER(vga_device::vga_crtc_w) |
| 1506 | 1653 | { |
| 1507 | 1654 | switch (offset) |
| 1508 | 1655 | { |
| r18228 | r18229 | |
| 1519 | 1666 | data); |
| 1520 | 1667 | } |
| 1521 | 1668 | |
| 1522 | | crtc_reg_write(space.machine(),vga.crtc.index,data); |
| 1669 | crtc_reg_write(vga.crtc.index,data); |
| 1523 | 1670 | //space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos()); |
| 1524 | 1671 | #if 0 |
| 1525 | 1672 | if((vga.crtc.index & 0xfe) != 0x0e) |
| r18228 | r18229 | |
| 1535 | 1682 | |
| 1536 | 1683 | |
| 1537 | 1684 | |
| 1538 | | READ8_HANDLER( vga_port_03b0_r ) |
| 1685 | READ8_MEMBER(vga_device::port_03b0_r) |
| 1539 | 1686 | { |
| 1540 | 1687 | UINT8 data = 0xff; |
| 1541 | 1688 | if (CRTC_PORT_ADDR==0x3b0) |
| r18228 | r18229 | |
| 1543 | 1690 | return data; |
| 1544 | 1691 | } |
| 1545 | 1692 | |
| 1546 | | static UINT8 gc_reg_read(running_machine &machine,UINT8 index) |
| 1693 | UINT8 vga_device::gc_reg_read(UINT8 index) |
| 1547 | 1694 | { |
| 1548 | 1695 | UINT8 res; |
| 1549 | 1696 | |
| r18228 | r18229 | |
| 1591 | 1738 | return res; |
| 1592 | 1739 | } |
| 1593 | 1740 | |
| 1594 | | READ8_HANDLER( vga_port_03c0_r ) |
| 1741 | READ8_MEMBER(vga_device::port_03c0_r) |
| 1595 | 1742 | { |
| 1596 | 1743 | UINT8 data = 0xff; |
| 1597 | 1744 | |
| r18228 | r18229 | |
| 1615 | 1762 | case 3: |
| 1616 | 1763 | if (!vga.read_dipswitch.isnull() && vga.read_dipswitch(space, 0, mem_mask) & 0x01) |
| 1617 | 1764 | data |= 0x10; |
| 1765 | else |
| 1766 | data |= 0x10; |
| 1618 | 1767 | break; |
| 1619 | 1768 | case 2: |
| 1620 | 1769 | if (!vga.read_dipswitch.isnull() && vga.read_dipswitch(space, 0, mem_mask) & 0x02) |
| 1621 | 1770 | data |= 0x10; |
| 1771 | else |
| 1772 | data |= 0x10; |
| 1622 | 1773 | break; |
| 1623 | 1774 | case 1: |
| 1624 | 1775 | if (!vga.read_dipswitch.isnull() && vga.read_dipswitch(space, 0, mem_mask) & 0x04) |
| 1625 | 1776 | data |= 0x10; |
| 1777 | else |
| 1778 | data |= 0x10; |
| 1626 | 1779 | break; |
| 1627 | 1780 | case 0: |
| 1628 | 1781 | if (!vga.read_dipswitch.isnull() && vga.read_dipswitch(space, 0, mem_mask) & 0x08) |
| 1629 | 1782 | data |= 0x10; |
| 1783 | else |
| 1784 | data |= 0x10; |
| 1630 | 1785 | break; |
| 1631 | 1786 | } |
| 1632 | 1787 | break; |
| r18228 | r18229 | |
| 1693 | 1848 | break; |
| 1694 | 1849 | |
| 1695 | 1850 | case 0xf: |
| 1696 | | data = gc_reg_read(space.machine(),vga.gc.index); |
| 1851 | data = gc_reg_read(vga.gc.index); |
| 1697 | 1852 | break; |
| 1698 | 1853 | } |
| 1699 | 1854 | return data; |
| 1700 | 1855 | } |
| 1701 | 1856 | |
| 1702 | | READ8_HANDLER(vga_port_03d0_r) |
| 1857 | READ8_MEMBER(vga_device::port_03d0_r) |
| 1703 | 1858 | { |
| 1704 | 1859 | UINT8 data = 0xff; |
| 1705 | 1860 | if (CRTC_PORT_ADDR == 0x3d0) |
| r18228 | r18229 | |
| 1713 | 1868 | return data; |
| 1714 | 1869 | } |
| 1715 | 1870 | |
| 1716 | | WRITE8_HANDLER( vga_port_03b0_w ) |
| 1871 | WRITE8_MEMBER(vga_device::port_03b0_w) |
| 1717 | 1872 | { |
| 1718 | 1873 | if (LOG_ACCESSES) |
| 1719 | 1874 | logerror("vga_port_03b0_w(): port=0x%04x data=0x%02x\n", offset + 0x3b0, data); |
| r18228 | r18229 | |
| 1722 | 1877 | vga_crtc_w(space, offset, data, mem_mask); |
| 1723 | 1878 | } |
| 1724 | 1879 | |
| 1725 | | static void attribute_reg_write(UINT8 index, UINT8 data) |
| 1880 | void vga_device::attribute_reg_write(UINT8 index, UINT8 data) |
| 1726 | 1881 | { |
| 1727 | 1882 | if((index & 0x30) == 0) |
| 1728 | 1883 | { |
| r18228 | r18229 | |
| 1743 | 1898 | } |
| 1744 | 1899 | } |
| 1745 | 1900 | |
| 1746 | | static void gc_reg_write(running_machine &machine,UINT8 index,UINT8 data) |
| 1901 | void vga_device::gc_reg_write(UINT8 index,UINT8 data) |
| 1747 | 1902 | { |
| 1748 | 1903 | switch(index) |
| 1749 | 1904 | { |
| r18228 | r18229 | |
| 1788 | 1943 | } |
| 1789 | 1944 | } |
| 1790 | 1945 | |
| 1791 | | WRITE8_HANDLER(vga_port_03c0_w) |
| 1946 | WRITE8_MEMBER(vga_device::port_03c0_w) |
| 1792 | 1947 | { |
| 1793 | 1948 | if (LOG_ACCESSES) |
| 1794 | 1949 | logerror("vga_port_03c0_w(): port=0x%04x data=0x%02x\n", offset + 0x3c0, data); |
| r18228 | r18229 | |
| 1807 | 1962 | break; |
| 1808 | 1963 | case 2: |
| 1809 | 1964 | vga.miscellaneous_output=data; |
| 1810 | | recompute_params(space.machine()); |
| 1965 | recompute_params(); |
| 1811 | 1966 | break; |
| 1812 | 1967 | case 3: |
| 1813 | 1968 | vga.oak.reg = data; |
| r18228 | r18229 | |
| 1828 | 1983 | vga.sequencer.data[vga.sequencer.index] = data; |
| 1829 | 1984 | } |
| 1830 | 1985 | |
| 1831 | | seq_reg_write(space.machine(),vga.sequencer.index,data); |
| 1832 | | recompute_params(space.machine()); |
| 1986 | seq_reg_write(vga.sequencer.index,data); |
| 1987 | recompute_params(); |
| 1833 | 1988 | break; |
| 1834 | 1989 | case 6: |
| 1835 | 1990 | vga.dac.mask=data; |
| r18228 | r18229 | |
| 1869 | 2024 | vga.gc.index=data; |
| 1870 | 2025 | break; |
| 1871 | 2026 | case 0xf: |
| 1872 | | gc_reg_write(space.machine(),vga.gc.index,data); |
| 2027 | gc_reg_write(vga.gc.index,data); |
| 1873 | 2028 | break; |
| 1874 | 2029 | } |
| 1875 | 2030 | } |
| 1876 | 2031 | |
| 1877 | 2032 | |
| 1878 | 2033 | |
| 1879 | | WRITE8_HANDLER(vga_port_03d0_w) |
| 2034 | WRITE8_MEMBER(vga_device::port_03d0_w) |
| 1880 | 2035 | { |
| 1881 | 2036 | if (LOG_ACCESSES) |
| 1882 | 2037 | logerror("vga_port_03d0_w(): port=0x%04x data=0x%02x\n", offset + 0x3d0, data); |
| r18228 | r18229 | |
| 1885 | 2040 | vga_crtc_w(space, offset, data, mem_mask); |
| 1886 | 2041 | } |
| 1887 | 2042 | |
| 1888 | | void pc_vga_reset(running_machine &machine) |
| 2043 | void vga_device::device_reset() |
| 1889 | 2044 | { |
| 1890 | 2045 | /* clear out the VGA structure */ |
| 1891 | 2046 | memset(vga.pens, 0, sizeof(vga.pens)); |
| r18228 | r18229 | |
| 1912 | 2067 | vga.crtc.line_compare = 0x3ff; |
| 1913 | 2068 | } |
| 1914 | 2069 | |
| 1915 | | READ8_HANDLER(vga_mem_r) |
| 2070 | READ8_MEMBER(vga_device::mem_r) |
| 1916 | 2071 | { |
| 1917 | 2072 | /* TODO: check me */ |
| 1918 | 2073 | switch(vga.gc.memory_map_sel & 0x03) |
| r18228 | r18229 | |
| 1978 | 2133 | return 0; |
| 1979 | 2134 | } |
| 1980 | 2135 | |
| 1981 | | WRITE8_HANDLER(vga_mem_w) |
| 2136 | WRITE8_MEMBER(vga_device::mem_w) |
| 1982 | 2137 | { |
| 1983 | 2138 | //Inside each case must prevent writes to non-mapped VGA memory regions, not only mask the offset. |
| 1984 | 2139 | switch(vga.gc.memory_map_sel & 0x03) |
| r18228 | r18229 | |
| 2016 | 2171 | } |
| 2017 | 2172 | } |
| 2018 | 2173 | |
| 2019 | | void pc_vga_init(running_machine &machine, read8_delegate read_dipswitch) |
| 2174 | READ8_MEMBER(vga_device::mem_linear_r) |
| 2020 | 2175 | { |
| 2021 | | memset(&vga, 0, sizeof(vga)); |
| 2022 | | |
| 2023 | | /* copy over interfaces */ |
| 2024 | | vga.read_dipswitch = read_dipswitch; |
| 2025 | | vga.svga_intf.vram_size = 0x100000; |
| 2026 | | vga.svga_intf.seq_regcount = 0x05; |
| 2027 | | vga.svga_intf.crtc_regcount = 0x19; |
| 2028 | | |
| 2029 | | vga.memory = auto_alloc_array_clear(machine, UINT8, vga.svga_intf.vram_size); |
| 2030 | | pc_vga_reset(machine); |
| 2031 | | |
| 2032 | | } |
| 2033 | | |
| 2034 | | void pc_vga_cirrus_init(running_machine &machine, read8_delegate read_dipswitch) |
| 2035 | | { |
| 2036 | | memset(&vga, 0, sizeof(vga)); |
| 2037 | | |
| 2038 | | /* copy over interfaces */ |
| 2039 | | vga.read_dipswitch = read_dipswitch; |
| 2040 | | vga.svga_intf.vram_size = 0x200000; |
| 2041 | | vga.svga_intf.seq_regcount = 0x08; |
| 2042 | | vga.svga_intf.crtc_regcount = 0x19; |
| 2043 | | |
| 2044 | | vga.memory = auto_alloc_array_clear(machine, UINT8, vga.svga_intf.vram_size); |
| 2045 | | |
| 2046 | | pc_vga_reset(machine); |
| 2047 | | |
| 2048 | | } |
| 2049 | | |
| 2050 | | VIDEO_START( vga ) |
| 2051 | | { |
| 2052 | | int i; |
| 2053 | | for (i = 0; i < 0x100; i++) |
| 2054 | | palette_set_color_rgb(machine, i, 0, 0, 0); |
| 2055 | | pc_video_start(machine); |
| 2056 | | } |
| 2057 | | |
| 2058 | | static VIDEO_RESET( vga ) |
| 2059 | | { |
| 2060 | | pc_vga_reset(machine); |
| 2061 | | } |
| 2062 | | |
| 2063 | | READ8_HANDLER(vga_mem_linear_r) |
| 2064 | | { |
| 2065 | 2176 | return vga.memory[offset]; |
| 2066 | 2177 | } |
| 2067 | 2178 | |
| 2068 | | WRITE8_HANDLER(vga_mem_linear_w) |
| 2179 | WRITE8_MEMBER(vga_device::mem_linear_w) |
| 2069 | 2180 | { |
| 2070 | 2181 | vga.memory[offset] = data; |
| 2071 | 2182 | } |
| r18228 | r18229 | |
| 2085 | 2196 | MACHINE_CONFIG_FRAGMENT( pcvideo_vga ) |
| 2086 | 2197 | MCFG_SCREEN_ADD("screen", RASTER) |
| 2087 | 2198 | MCFG_SCREEN_RAW_PARAMS(XTAL_25_1748MHz,900,0,640,526,0,480) |
| 2088 | | MCFG_SCREEN_UPDATE_STATIC(pc_video) |
| 2199 | MCFG_SCREEN_UPDATE_DEVICE("vga", vga_device, screen_update) |
| 2089 | 2200 | |
| 2090 | 2201 | MCFG_PALETTE_LENGTH(0x100) |
| 2202 | MCFG_DEVICE_ADD("vga", VGA, 0) |
| 2203 | MACHINE_CONFIG_END |
| 2091 | 2204 | |
| 2092 | | MCFG_VIDEO_START(vga) |
| 2093 | | MCFG_VIDEO_RESET(vga) |
| 2205 | MACHINE_CONFIG_FRAGMENT( pcvideo_trident_vga ) |
| 2206 | MCFG_SCREEN_ADD("screen", RASTER) |
| 2207 | MCFG_SCREEN_RAW_PARAMS(XTAL_25_1748MHz,900,0,640,526,0,480) |
| 2208 | MCFG_SCREEN_UPDATE_DEVICE("vga", trident_vga_device, screen_update) |
| 2209 | |
| 2210 | MCFG_PALETTE_LENGTH(0x100) |
| 2211 | |
| 2212 | MCFG_DEVICE_ADD("vga", TRIDENT_VGA, 0) |
| 2094 | 2213 | MACHINE_CONFIG_END |
| 2095 | 2214 | |
| 2096 | | MACHINE_CONFIG_FRAGMENT( pcvideo_vga_isa ) |
| 2215 | MACHINE_CONFIG_FRAGMENT( pcvideo_cirrus_vga ) |
| 2097 | 2216 | MCFG_SCREEN_ADD("screen", RASTER) |
| 2098 | 2217 | MCFG_SCREEN_RAW_PARAMS(XTAL_25_1748MHz,900,0,640,526,0,480) |
| 2099 | | MCFG_SCREEN_UPDATE_STATIC(pc_video) |
| 2218 | MCFG_SCREEN_UPDATE_DEVICE("vga", cirrus_vga_device, screen_update) |
| 2100 | 2219 | |
| 2101 | 2220 | MCFG_PALETTE_LENGTH(0x100) |
| 2221 | |
| 2222 | MCFG_DEVICE_ADD("vga", CIRRUS_VGA, 0) |
| 2102 | 2223 | MACHINE_CONFIG_END |
| 2103 | 2224 | |
| 2104 | | MACHINE_CONFIG_FRAGMENT( pcvideo_s3_isa ) |
| 2225 | MACHINE_CONFIG_FRAGMENT( pcvideo_gamtor_vga ) |
| 2105 | 2226 | MCFG_SCREEN_ADD("screen", RASTER) |
| 2106 | 2227 | MCFG_SCREEN_RAW_PARAMS(XTAL_25_1748MHz,900,0,640,526,0,480) |
| 2107 | | MCFG_SCREEN_UPDATE_STATIC(pc_video_s3) |
| 2228 | MCFG_SCREEN_UPDATE_DEVICE("vga", gamtor_vga_device, screen_update) |
| 2108 | 2229 | |
| 2109 | 2230 | MCFG_PALETTE_LENGTH(0x100) |
| 2231 | MCFG_DEVICE_ADD("vga", GAMTOR_VGA, 0) |
| 2110 | 2232 | MACHINE_CONFIG_END |
| 2111 | 2233 | |
| 2112 | | MACHINE_CONFIG_FRAGMENT( pcvideo_ati_isa ) |
| 2234 | |
| 2235 | MACHINE_CONFIG_FRAGMENT( pcvideo_s3_isa ) |
| 2113 | 2236 | MCFG_SCREEN_ADD("screen", RASTER) |
| 2114 | 2237 | MCFG_SCREEN_RAW_PARAMS(XTAL_25_1748MHz,900,0,640,526,0,480) |
| 2115 | | MCFG_SCREEN_UPDATE_STATIC(pc_video) |
| 2238 | //MCFG_SCREEN_UPDATE_STATIC(pc_video_s3) |
| 2116 | 2239 | |
| 2117 | 2240 | MCFG_PALETTE_LENGTH(0x100) |
| 2241 | MACHINE_CONFIG_END |
| 2118 | 2242 | |
| 2243 | static MACHINE_CONFIG_FRAGMENT( ati_vga ) |
| 2119 | 2244 | MCFG_EEPROM_ADD("ati_eeprom",ati_eeprom_interface) |
| 2120 | 2245 | MACHINE_CONFIG_END |
| 2121 | 2246 | |
| 2247 | //------------------------------------------------- |
| 2248 | // machine_config_additions - device-specific |
| 2249 | // machine configurations |
| 2250 | //------------------------------------------------- |
| 2251 | |
| 2252 | machine_config_constructor ati_vga_device::device_mconfig_additions() const |
| 2253 | { |
| 2254 | return MACHINE_CONFIG_NAME( ati_vga ); |
| 2255 | } |
| 2256 | |
| 2122 | 2257 | /****************************************** |
| 2123 | 2258 | |
| 2124 | 2259 | Tseng ET4000k implementation |
| 2125 | 2260 | |
| 2126 | 2261 | ******************************************/ |
| 2127 | 2262 | |
| 2128 | | static void tseng_define_video_mode(running_machine &machine) |
| 2263 | void tseng_vga_device::tseng_define_video_mode() |
| 2129 | 2264 | { |
| 2130 | 2265 | int divisor; |
| 2131 | 2266 | int xtal = 0; |
| r18228 | r18229 | |
| 2180 | 2315 | divisor = 1; |
| 2181 | 2316 | break; |
| 2182 | 2317 | } |
| 2183 | | recompute_params_clock(machine, divisor, xtal); |
| 2318 | recompute_params_clock(divisor, xtal); |
| 2184 | 2319 | } |
| 2185 | 2320 | |
| 2186 | | static UINT8 tseng_crtc_reg_read(running_machine &machine, UINT8 index) |
| 2321 | UINT8 tseng_vga_device::tseng_crtc_reg_read(UINT8 index) |
| 2187 | 2322 | { |
| 2188 | 2323 | UINT8 res; |
| 2189 | 2324 | |
| r18228 | r18229 | |
| 2209 | 2344 | return res; |
| 2210 | 2345 | } |
| 2211 | 2346 | |
| 2212 | | static void tseng_crtc_reg_write(running_machine &machine, UINT8 index, UINT8 data) |
| 2347 | void tseng_vga_device::tseng_crtc_reg_write(UINT8 index, UINT8 data) |
| 2213 | 2348 | { |
| 2214 | 2349 | if(index <= 0x18) |
| 2215 | | crtc_reg_write(machine,index,data); |
| 2350 | crtc_reg_write(index,data); |
| 2216 | 2351 | else |
| 2217 | 2352 | { |
| 2218 | 2353 | switch(index) |
| r18228 | r18229 | |
| 2231 | 2366 | } |
| 2232 | 2367 | } |
| 2233 | 2368 | |
| 2234 | | static UINT8 tseng_seq_reg_read(running_machine &machine, UINT8 index) |
| 2369 | UINT8 tseng_vga_device::tseng_seq_reg_read(UINT8 index) |
| 2235 | 2370 | { |
| 2236 | 2371 | UINT8 res; |
| 2237 | 2372 | |
| r18228 | r18229 | |
| 2253 | 2388 | return res; |
| 2254 | 2389 | } |
| 2255 | 2390 | |
| 2256 | | static void tseng_seq_reg_write(running_machine &machine, UINT8 index, UINT8 data) |
| 2391 | void tseng_vga_device::tseng_seq_reg_write(UINT8 index, UINT8 data) |
| 2257 | 2392 | { |
| 2258 | 2393 | if(index <= 0x04) |
| 2259 | 2394 | { |
| 2260 | 2395 | vga.sequencer.data[vga.sequencer.index] = data; |
| 2261 | | seq_reg_write(machine,vga.sequencer.index,data); |
| 2396 | seq_reg_write(vga.sequencer.index,data); |
| 2262 | 2397 | } |
| 2263 | 2398 | else |
| 2264 | 2399 | { |
| r18228 | r18229 | |
| 2272 | 2407 | } |
| 2273 | 2408 | } |
| 2274 | 2409 | |
| 2275 | | READ8_HANDLER(tseng_et4k_03b0_r) |
| 2410 | READ8_MEMBER(tseng_vga_device::port_03b0_r) |
| 2276 | 2411 | { |
| 2277 | 2412 | UINT8 res = 0xff; |
| 2278 | 2413 | |
| r18228 | r18229 | |
| 2281 | 2416 | switch(offset) |
| 2282 | 2417 | { |
| 2283 | 2418 | case 5: |
| 2284 | | res = tseng_crtc_reg_read(space.machine(),vga.crtc.index); |
| 2419 | res = tseng_crtc_reg_read(vga.crtc.index); |
| 2285 | 2420 | break; |
| 2286 | 2421 | case 8: |
| 2287 | 2422 | res = et4k.reg_3d8; |
| 2288 | 2423 | break; |
| 2289 | 2424 | default: |
| 2290 | | res = vga_port_03b0_r(space,offset); |
| 2425 | res = vga_device::port_03b0_r(space,offset,mem_mask); |
| 2291 | 2426 | break; |
| 2292 | 2427 | } |
| 2293 | 2428 | } |
| r18228 | r18229 | |
| 2295 | 2430 | return res; |
| 2296 | 2431 | } |
| 2297 | 2432 | |
| 2298 | | WRITE8_HANDLER(tseng_et4k_03b0_w) |
| 2433 | WRITE8_MEMBER(tseng_vga_device::port_03b0_w) |
| 2299 | 2434 | { |
| 2300 | 2435 | if (CRTC_PORT_ADDR == 0x3b0) |
| 2301 | 2436 | { |
| r18228 | r18229 | |
| 2303 | 2438 | { |
| 2304 | 2439 | case 5: |
| 2305 | 2440 | vga.crtc.data[vga.crtc.index] = data; |
| 2306 | | tseng_crtc_reg_write(space.machine(),vga.crtc.index,data); |
| 2441 | tseng_crtc_reg_write(vga.crtc.index,data); |
| 2307 | 2442 | break; |
| 2308 | 2443 | case 8: |
| 2309 | 2444 | et4k.reg_3d8 = data; |
| r18228 | r18229 | |
| 2313 | 2448 | et4k.ext_reg_ena = false; |
| 2314 | 2449 | break; |
| 2315 | 2450 | default: |
| 2316 | | vga_port_03b0_w(space,offset,data); |
| 2451 | vga_device::port_03b0_w(space,offset,data,mem_mask); |
| 2317 | 2452 | break; |
| 2318 | 2453 | } |
| 2319 | 2454 | } |
| 2320 | | tseng_define_video_mode(space.machine()); |
| 2455 | tseng_define_video_mode(); |
| 2321 | 2456 | } |
| 2322 | 2457 | |
| 2323 | 2458 | |
| 2324 | | READ8_HANDLER(tseng_et4k_03c0_r) |
| 2459 | READ8_MEMBER(tseng_vga_device::port_03c0_r) |
| 2325 | 2460 | { |
| 2326 | 2461 | UINT8 res; |
| 2327 | 2462 | |
| 2328 | 2463 | switch(offset) |
| 2329 | 2464 | { |
| 2330 | 2465 | case 0x05: |
| 2331 | | res = tseng_seq_reg_read(space.machine(),vga.sequencer.index); |
| 2466 | res = tseng_seq_reg_read(vga.sequencer.index); |
| 2332 | 2467 | break; |
| 2333 | 2468 | case 0x0d: |
| 2334 | 2469 | res = svga.bank_w & 0xf; |
| r18228 | r18229 | |
| 2343 | 2478 | break; |
| 2344 | 2479 | } |
| 2345 | 2480 | et4k.dac_state++; |
| 2346 | | res = vga_port_03c0_r(space,offset); |
| 2481 | res = vga_device::port_03c0_r(space,offset,mem_mask); |
| 2347 | 2482 | break; |
| 2348 | 2483 | case 0x08: |
| 2349 | 2484 | et4k.dac_state = 0; |
| 2350 | 2485 | default: |
| 2351 | | res = vga_port_03c0_r(space,offset); |
| 2486 | res = vga_device::port_03c0_r(space,offset,mem_mask); |
| 2352 | 2487 | break; |
| 2353 | 2488 | } |
| 2354 | 2489 | |
| 2355 | 2490 | return res; |
| 2356 | 2491 | } |
| 2357 | 2492 | |
| 2358 | | WRITE8_HANDLER(tseng_et4k_03c0_w) |
| 2493 | WRITE8_MEMBER(tseng_vga_device::port_03c0_w) |
| 2359 | 2494 | { |
| 2360 | 2495 | switch(offset) |
| 2361 | 2496 | { |
| 2362 | 2497 | case 0x05: |
| 2363 | | tseng_seq_reg_write(space.machine(),vga.sequencer.index,data); |
| 2498 | tseng_seq_reg_write(vga.sequencer.index,data); |
| 2364 | 2499 | break; |
| 2365 | 2500 | case 0x0d: |
| 2366 | 2501 | svga.bank_w = data & 0xf; |
| r18228 | r18229 | |
| 2373 | 2508 | break; |
| 2374 | 2509 | } |
| 2375 | 2510 | default: |
| 2376 | | vga_port_03c0_w(space,offset,data); |
| 2511 | vga_device::port_03c0_w(space,offset,data,mem_mask); |
| 2377 | 2512 | break; |
| 2378 | 2513 | } |
| 2379 | | tseng_define_video_mode(space.machine()); |
| 2514 | tseng_define_video_mode(); |
| 2380 | 2515 | } |
| 2381 | 2516 | |
| 2382 | | READ8_HANDLER(tseng_et4k_03d0_r) |
| 2517 | READ8_MEMBER(tseng_vga_device::port_03d0_r) |
| 2383 | 2518 | { |
| 2384 | 2519 | UINT8 res = 0xff; |
| 2385 | 2520 | |
| r18228 | r18229 | |
| 2388 | 2523 | switch(offset) |
| 2389 | 2524 | { |
| 2390 | 2525 | case 5: |
| 2391 | | res = tseng_crtc_reg_read(space.machine(),vga.crtc.index); |
| 2526 | res = tseng_crtc_reg_read(vga.crtc.index); |
| 2392 | 2527 | break; |
| 2393 | 2528 | case 8: |
| 2394 | 2529 | res = et4k.reg_3d8; |
| 2395 | 2530 | break; |
| 2396 | 2531 | default: |
| 2397 | | res = vga_port_03d0_r(space,offset); |
| 2532 | res = vga_device::port_03d0_r(space,offset,mem_mask); |
| 2398 | 2533 | break; |
| 2399 | 2534 | } |
| 2400 | 2535 | } |
| r18228 | r18229 | |
| 2402 | 2537 | return res; |
| 2403 | 2538 | } |
| 2404 | 2539 | |
| 2405 | | WRITE8_HANDLER(tseng_et4k_03d0_w) |
| 2540 | WRITE8_MEMBER(tseng_vga_device::port_03d0_w) |
| 2406 | 2541 | { |
| 2407 | 2542 | if (CRTC_PORT_ADDR == 0x3d0) |
| 2408 | 2543 | { |
| r18228 | r18229 | |
| 2410 | 2545 | { |
| 2411 | 2546 | case 5: |
| 2412 | 2547 | vga.crtc.data[vga.crtc.index] = data; |
| 2413 | | tseng_crtc_reg_write(space.machine(),vga.crtc.index,data); |
| 2548 | tseng_crtc_reg_write(vga.crtc.index,data); |
| 2414 | 2549 | //if((vga.crtc.index & 0xfe) != 0x0e) |
| 2415 | 2550 | // printf("%02x %02x %d\n",vga.crtc.index,data,space.machine().primary_screen->vpos()); |
| 2416 | 2551 | break; |
| r18228 | r18229 | |
| 2422 | 2557 | et4k.ext_reg_ena = false; |
| 2423 | 2558 | break; |
| 2424 | 2559 | default: |
| 2425 | | vga_port_03d0_w(space,offset,data); |
| 2560 | vga_device::port_03d0_w(space,offset,data,mem_mask); |
| 2426 | 2561 | break; |
| 2427 | 2562 | } |
| 2428 | 2563 | } |
| 2429 | | tseng_define_video_mode(space.machine()); |
| 2564 | tseng_define_video_mode(); |
| 2430 | 2565 | } |
| 2431 | 2566 | |
| 2432 | | READ8_HANDLER( tseng_mem_r ) |
| 2567 | READ8_MEMBER(tseng_vga_device::mem_r) |
| 2433 | 2568 | { |
| 2434 | 2569 | if(svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en) |
| 2435 | 2570 | { |
| r18228 | r18229 | |
| 2437 | 2572 | return vga.memory[(offset+svga.bank_r*0x10000)]; |
| 2438 | 2573 | } |
| 2439 | 2574 | |
| 2440 | | return vga_mem_r(space,offset); |
| 2575 | return vga_device::mem_r(space,offset,mem_mask); |
| 2441 | 2576 | } |
| 2442 | 2577 | |
| 2443 | | WRITE8_HANDLER( tseng_mem_w ) |
| 2578 | WRITE8_MEMBER(tseng_vga_device::mem_w) |
| 2444 | 2579 | { |
| 2445 | 2580 | if(svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en) |
| 2446 | 2581 | { |
| r18228 | r18229 | |
| 2448 | 2583 | vga.memory[(offset+svga.bank_w*0x10000)] = data; |
| 2449 | 2584 | } |
| 2450 | 2585 | else |
| 2451 | | vga_mem_w(space,offset,data); |
| 2586 | vga_device::mem_w(space,offset,data,mem_mask); |
| 2452 | 2587 | } |
| 2453 | 2588 | |
| 2454 | 2589 | /****************************************** |
| r18228 | r18229 | |
| 2456 | 2591 | Trident implementation |
| 2457 | 2592 | |
| 2458 | 2593 | ******************************************/ |
| 2459 | | static UINT8 trident_seq_reg_read(running_machine &machine, UINT8 index) |
| 2594 | UINT8 trident_vga_device::trident_seq_reg_read(UINT8 index) |
| 2460 | 2595 | { |
| 2461 | 2596 | UINT8 res; |
| 2462 | 2597 | |
| r18228 | r18229 | |
| 2481 | 2616 | return res; |
| 2482 | 2617 | } |
| 2483 | 2618 | |
| 2484 | | static void trident_seq_reg_write(running_machine &machine, UINT8 index, UINT8 data) |
| 2619 | void trident_vga_device::trident_seq_reg_write(UINT8 index, UINT8 data) |
| 2485 | 2620 | { |
| 2486 | 2621 | if(index <= 0x04) |
| 2487 | 2622 | { |
| 2488 | 2623 | vga.sequencer.data[vga.sequencer.index] = data; |
| 2489 | | seq_reg_write(machine,vga.sequencer.index,data); |
| 2490 | | recompute_params(machine); |
| 2624 | seq_reg_write(vga.sequencer.index,data); |
| 2625 | recompute_params(); |
| 2491 | 2626 | } |
| 2492 | 2627 | else |
| 2493 | 2628 | { |
| r18228 | r18229 | |
| 2504 | 2639 | } |
| 2505 | 2640 | |
| 2506 | 2641 | |
| 2507 | | READ8_HANDLER(trident_03c0_r) |
| 2642 | READ8_MEMBER(trident_vga_device::port_03c0_r) |
| 2508 | 2643 | { |
| 2509 | 2644 | UINT8 res; |
| 2510 | 2645 | |
| 2511 | 2646 | switch(offset) |
| 2512 | 2647 | { |
| 2513 | 2648 | case 0x05: |
| 2514 | | res = trident_seq_reg_read(space.machine(),vga.sequencer.index); |
| 2649 | res = trident_seq_reg_read(vga.sequencer.index); |
| 2515 | 2650 | break; |
| 2516 | 2651 | default: |
| 2517 | | res = vga_port_03c0_r(space,offset); |
| 2652 | res = vga_device::port_03c0_r(space,offset,mem_mask); |
| 2518 | 2653 | break; |
| 2519 | 2654 | } |
| 2520 | 2655 | |
| 2521 | 2656 | return res; |
| 2522 | 2657 | } |
| 2523 | 2658 | |
| 2524 | | WRITE8_HANDLER(trident_03c0_w) |
| 2659 | WRITE8_MEMBER(trident_vga_device::port_03c0_w) |
| 2525 | 2660 | { |
| 2526 | 2661 | switch(offset) |
| 2527 | 2662 | { |
| 2528 | 2663 | case 0x05: |
| 2529 | | trident_seq_reg_write(space.machine(),vga.sequencer.index,data); |
| 2664 | trident_seq_reg_write(vga.sequencer.index,data); |
| 2530 | 2665 | break; |
| 2531 | 2666 | default: |
| 2532 | | vga_port_03c0_w(space,offset,data); |
| 2667 | vga_device::port_03c0_w(space,offset,data,mem_mask); |
| 2533 | 2668 | break; |
| 2534 | 2669 | } |
| 2535 | 2670 | } |
| 2536 | 2671 | |
| 2537 | 2672 | |
| 2538 | | READ8_HANDLER(trident_03d0_r) |
| 2673 | READ8_MEMBER(trident_vga_device::port_03d0_r) |
| 2539 | 2674 | { |
| 2540 | 2675 | UINT8 res = 0xff; |
| 2541 | 2676 | |
| r18228 | r18229 | |
| 2547 | 2682 | res = svga.bank_w & 0x1f; // TODO: a lot more complex than this |
| 2548 | 2683 | break; |
| 2549 | 2684 | default: |
| 2550 | | res = vga_port_03d0_r(space,offset); |
| 2685 | res = vga_device::port_03d0_r(space,offset,mem_mask); |
| 2551 | 2686 | break; |
| 2552 | 2687 | } |
| 2553 | 2688 | } |
| r18228 | r18229 | |
| 2555 | 2690 | return res; |
| 2556 | 2691 | } |
| 2557 | 2692 | |
| 2558 | | WRITE8_HANDLER(trident_03d0_w) |
| 2693 | WRITE8_MEMBER(trident_vga_device::port_03d0_w) |
| 2559 | 2694 | { |
| 2560 | 2695 | if (CRTC_PORT_ADDR == 0x3d0) |
| 2561 | 2696 | { |
| r18228 | r18229 | |
| 2565 | 2700 | svga.bank_w = data & 0x1f; // TODO: a lot more complex than this |
| 2566 | 2701 | break; |
| 2567 | 2702 | default: |
| 2568 | | vga_port_03d0_w(space,offset,data); |
| 2703 | vga_device::port_03d0_w(space,offset,data,mem_mask); |
| 2569 | 2704 | break; |
| 2570 | 2705 | } |
| 2571 | 2706 | } |
| 2572 | 2707 | } |
| 2573 | 2708 | |
| 2574 | | READ8_HANDLER( trident_mem_r ) |
| 2709 | READ8_MEMBER(trident_vga_device::mem_r ) |
| 2575 | 2710 | { |
| 2576 | 2711 | if (svga.rgb15_en & 0x30) |
| 2577 | 2712 | { |
| r18228 | r18229 | |
| 2582 | 2717 | return data; |
| 2583 | 2718 | } |
| 2584 | 2719 | |
| 2585 | | return vga_mem_r(space,offset); |
| 2720 | return vga_device::mem_r(space,offset,mem_mask); |
| 2586 | 2721 | } |
| 2587 | 2722 | |
| 2588 | | WRITE8_HANDLER( trident_mem_w ) |
| 2723 | WRITE8_MEMBER(trident_vga_device::mem_w) |
| 2589 | 2724 | { |
| 2590 | 2725 | if (svga.rgb15_en & 0x30) |
| 2591 | 2726 | { |
| r18228 | r18229 | |
| 2595 | 2730 | return; |
| 2596 | 2731 | } |
| 2597 | 2732 | |
| 2598 | | vga_mem_w(space,offset,data); |
| 2733 | vga_device::mem_w(space,offset,data,mem_mask); |
| 2599 | 2734 | } |
| 2600 | 2735 | |
| 2601 | 2736 | /****************************************** |
| r18228 | r18229 | |
| 2604 | 2739 | |
| 2605 | 2740 | ******************************************/ |
| 2606 | 2741 | |
| 2607 | | static UINT8 s3_crtc_reg_read(running_machine &machine, UINT8 index) |
| 2742 | UINT8 s3_vga_device::s3_crtc_reg_read(UINT8 index) |
| 2608 | 2743 | { |
| 2609 | 2744 | UINT8 res; |
| 2610 | 2745 | |
| r18228 | r18229 | |
| 2703 | 2838 | return res; |
| 2704 | 2839 | } |
| 2705 | 2840 | |
| 2706 | | static void s3_define_video_mode(void) |
| 2841 | void s3_vga_device::s3_define_video_mode() |
| 2707 | 2842 | { |
| 2708 | 2843 | if((s3.ext_misc_ctrl_2) >> 4) |
| 2709 | 2844 | { |
| r18228 | r18229 | |
| 2728 | 2863 | } |
| 2729 | 2864 | } |
| 2730 | 2865 | |
| 2731 | | static void s3_crtc_reg_write(running_machine &machine, UINT8 index, UINT8 data) |
| 2866 | void s3_vga_device::s3_crtc_reg_write(UINT8 index, UINT8 data) |
| 2732 | 2867 | { |
| 2733 | 2868 | if(index <= 0x18) |
| 2734 | | crtc_reg_write(machine,index,data); |
| 2869 | crtc_reg_write(index,data); |
| 2735 | 2870 | else |
| 2736 | 2871 | { |
| 2737 | 2872 | switch(index) |
| r18228 | r18229 | |
| 2947 | 3082 | } |
| 2948 | 3083 | |
| 2949 | 3084 | |
| 2950 | | READ8_HANDLER(s3_port_03b0_r) |
| 3085 | READ8_MEMBER(s3_vga_device::port_03b0_r) |
| 2951 | 3086 | { |
| 2952 | 3087 | UINT8 res = 0xff; |
| 2953 | 3088 | |
| r18228 | r18229 | |
| 2956 | 3091 | switch(offset) |
| 2957 | 3092 | { |
| 2958 | 3093 | case 5: |
| 2959 | | res = s3_crtc_reg_read(space.machine(),vga.crtc.index); |
| 3094 | res = s3_crtc_reg_read(vga.crtc.index); |
| 2960 | 3095 | break; |
| 2961 | 3096 | default: |
| 2962 | | res = vga_port_03b0_r(space,offset); |
| 3097 | res = vga_device::port_03b0_r(space,offset,mem_mask); |
| 2963 | 3098 | break; |
| 2964 | 3099 | } |
| 2965 | 3100 | } |
| r18228 | r18229 | |
| 2967 | 3102 | return res; |
| 2968 | 3103 | } |
| 2969 | 3104 | |
| 2970 | | WRITE8_HANDLER(s3_port_03b0_w) |
| 3105 | WRITE8_MEMBER(s3_vga_device::port_03b0_w) |
| 2971 | 3106 | { |
| 2972 | 3107 | if (CRTC_PORT_ADDR == 0x3b0) |
| 2973 | 3108 | { |
| r18228 | r18229 | |
| 2975 | 3110 | { |
| 2976 | 3111 | case 5: |
| 2977 | 3112 | vga.crtc.data[vga.crtc.index] = data; |
| 2978 | | s3_crtc_reg_write(space.machine(),vga.crtc.index,data); |
| 3113 | s3_crtc_reg_write(vga.crtc.index,data); |
| 2979 | 3114 | break; |
| 2980 | 3115 | default: |
| 2981 | | vga_port_03b0_w(space,offset,data); |
| 3116 | vga_device::port_03b0_w(space,offset,data,mem_mask); |
| 2982 | 3117 | break; |
| 2983 | 3118 | } |
| 2984 | 3119 | } |
| 2985 | 3120 | } |
| 2986 | 3121 | |
| 2987 | | READ8_HANDLER(s3_port_03c0_r) |
| 3122 | READ8_MEMBER(s3_vga_device::port_03c0_r) |
| 2988 | 3123 | { |
| 2989 | 3124 | UINT8 res; |
| 2990 | 3125 | |
| 2991 | 3126 | switch(offset) |
| 2992 | 3127 | { |
| 2993 | 3128 | default: |
| 2994 | | res = vga_port_03c0_r(space,offset); |
| 3129 | res = vga_device::port_03c0_r(space,offset,mem_mask); |
| 2995 | 3130 | break; |
| 2996 | 3131 | } |
| 2997 | 3132 | |
| 2998 | 3133 | return res; |
| 2999 | 3134 | } |
| 3000 | 3135 | |
| 3001 | | WRITE8_HANDLER(s3_port_03c0_w) |
| 3136 | WRITE8_MEMBER(s3_vga_device::port_03c0_w) |
| 3002 | 3137 | { |
| 3003 | 3138 | switch(offset) |
| 3004 | 3139 | { |
| 3005 | 3140 | default: |
| 3006 | | vga_port_03c0_w(space,offset,data); |
| 3141 | vga_device::port_03c0_w(space,offset,data,mem_mask); |
| 3007 | 3142 | break; |
| 3008 | 3143 | } |
| 3009 | 3144 | } |
| 3010 | 3145 | |
| 3011 | | READ8_HANDLER(s3_port_03d0_r) |
| 3146 | READ8_MEMBER(s3_vga_device::port_03d0_r) |
| 3012 | 3147 | { |
| 3013 | 3148 | UINT8 res = 0xff; |
| 3014 | 3149 | |
| r18228 | r18229 | |
| 3017 | 3152 | switch(offset) |
| 3018 | 3153 | { |
| 3019 | 3154 | case 5: |
| 3020 | | res = s3_crtc_reg_read(space.machine(),vga.crtc.index); |
| 3155 | res = s3_crtc_reg_read(vga.crtc.index); |
| 3021 | 3156 | break; |
| 3022 | 3157 | default: |
| 3023 | | res = vga_port_03d0_r(space,offset); |
| 3158 | res = vga_device::port_03d0_r(space,offset,mem_mask); |
| 3024 | 3159 | break; |
| 3025 | 3160 | } |
| 3026 | 3161 | } |
| r18228 | r18229 | |
| 3028 | 3163 | return res; |
| 3029 | 3164 | } |
| 3030 | 3165 | |
| 3031 | | WRITE8_HANDLER(s3_port_03d0_w) |
| 3166 | WRITE8_MEMBER(s3_vga_device::port_03d0_w) |
| 3032 | 3167 | { |
| 3033 | 3168 | if (CRTC_PORT_ADDR == 0x3d0) |
| 3034 | 3169 | { |
| r18228 | r18229 | |
| 3036 | 3171 | { |
| 3037 | 3172 | case 5: |
| 3038 | 3173 | vga.crtc.data[vga.crtc.index] = data; |
| 3039 | | s3_crtc_reg_write(space.machine(),vga.crtc.index,data); |
| 3174 | s3_crtc_reg_write(vga.crtc.index,data); |
| 3040 | 3175 | break; |
| 3041 | 3176 | default: |
| 3042 | | vga_port_03d0_w(space,offset,data); |
| 3177 | vga_device::port_03d0_w(space,offset,data,mem_mask); |
| 3043 | 3178 | break; |
| 3044 | 3179 | } |
| 3045 | 3180 | } |
| 3046 | 3181 | } |
| 3047 | 3182 | |
| 3048 | | READ8_HANDLER( ati_port_03c0_r ) |
| 3183 | READ8_MEMBER(ati_vga_device::port_03c0_r) |
| 3049 | 3184 | { |
| 3050 | 3185 | UINT8 data = 0xff; |
| 3051 | 3186 | |
| r18228 | r18229 | |
| 3056 | 3191 | data = vga.attribute.data[vga.attribute.index&0x1f]; |
| 3057 | 3192 | break; |
| 3058 | 3193 | default: |
| 3059 | | data = vga_port_03c0_r(space,offset); |
| 3194 | data = vga_device::port_03c0_r(space,offset,mem_mask); |
| 3060 | 3195 | break; |
| 3061 | 3196 | } |
| 3062 | 3197 | return data; |
| r18228 | r18229 | |
| 3065 | 3200 | |
| 3066 | 3201 | /* accelerated ports, TBD ... */ |
| 3067 | 3202 | |
| 3068 | | static void s3_write_fg(UINT32 offset) |
| 3203 | void s3_vga_device::s3_write_fg(UINT32 offset) |
| 3069 | 3204 | { |
| 3070 | 3205 | UINT8 dst = vga.memory[offset]; |
| 3071 | 3206 | UINT8 src = 0; |
| r18228 | r18229 | |
| 3146 | 3281 | } |
| 3147 | 3282 | } |
| 3148 | 3283 | |
| 3149 | | static void s3_write_bg(UINT32 offset) |
| 3284 | void s3_vga_device::s3_write_bg(UINT32 offset) |
| 3150 | 3285 | { |
| 3151 | 3286 | UINT8 dst = vga.memory[offset]; |
| 3152 | 3287 | UINT8 src = 0; |
| r18228 | r18229 | |
| 3227 | 3362 | } |
| 3228 | 3363 | } |
| 3229 | 3364 | |
| 3230 | | void s3_write(UINT32 offset, UINT32 src) |
| 3365 | void s3_vga_device::s3_write(UINT32 offset, UINT32 src) |
| 3231 | 3366 | { |
| 3232 | 3367 | int data_size = 8; |
| 3233 | 3368 | UINT32 xfer = 0; |
| r18228 | r18229 | |
| 3291 | 3426 | the major or independent axis). |
| 3292 | 3427 | 0-13 (80x +) LINE PARAMETER/ERROR TERM. See above. |
| 3293 | 3428 | */ |
| 3294 | | READ16_HANDLER(s3_line_error_r) |
| 3429 | READ16_MEMBER(s3_vga_device::s3_line_error_r) |
| 3295 | 3430 | { |
| 3296 | 3431 | return ibm8514.line_errorterm; |
| 3297 | 3432 | } |
| 3298 | 3433 | |
| 3299 | | WRITE16_HANDLER(s3_line_error_w) |
| 3434 | WRITE16_MEMBER(s3_vga_device::s3_line_error_w) |
| 3300 | 3435 | { |
| 3301 | 3436 | ibm8514.line_errorterm = data; |
| 3302 | 3437 | if(LOG_8514) logerror("S3: Line Parameter/Error Term write %04x\n",data); |
| r18228 | r18229 | |
| 3323 | 3458 | available, Fh for 9 words, 7 for 10 words, 3 for 11 words, 1 for |
| 3324 | 3459 | 12 words and 0 for 13 words available. |
| 3325 | 3460 | */ |
| 3326 | | READ16_HANDLER(ibm8514_gpstatus_r) |
| 3461 | READ16_MEMBER(s3_vga_device::ibm8514_gpstatus_r) |
| 3327 | 3462 | { |
| 3328 | 3463 | UINT16 ret = 0x0000; |
| 3329 | 3464 | |
| r18228 | r18229 | |
| 3335 | 3470 | return ret; |
| 3336 | 3471 | } |
| 3337 | 3472 | |
| 3338 | | static void ibm8514_draw_vector(UINT8 len, UINT8 dir, bool draw) |
| 3473 | void s3_vga_device::ibm8514_draw_vector(UINT8 len, UINT8 dir, bool draw) |
| 3339 | 3474 | { |
| 3340 | 3475 | UINT32 offset; |
| 3341 | 3476 | int x = 0; |
| r18228 | r18229 | |
| 3380 | 3515 | } |
| 3381 | 3516 | } |
| 3382 | 3517 | |
| 3383 | | READ16_HANDLER(s3_gpstatus_r) |
| 3518 | READ16_MEMBER(s3_vga_device::s3_gpstatus_r) |
| 3384 | 3519 | { |
| 3385 | 3520 | UINT16 ret = 0x0000; |
| 3386 | 3521 | |
| r18228 | r18229 | |
| 3480 | 3615 | rectangle, which is copied repeatably to the destination |
| 3481 | 3616 | rectangle. |
| 3482 | 3617 | */ |
| 3483 | | WRITE16_HANDLER(ibm8514_cmd_w) |
| 3618 | WRITE16_MEMBER(s3_vga_device::ibm8514_cmd_w) |
| 3484 | 3619 | { |
| 3485 | 3620 | int x,y; |
| 3486 | 3621 | int pattern_x,pattern_y; |
| r18228 | r18229 | |
| 3743 | 3878 | } |
| 3744 | 3879 | } |
| 3745 | 3880 | |
| 3746 | | WRITE16_HANDLER(s3_cmd_w) |
| 3881 | WRITE16_MEMBER(s3_vga_device::s3_cmd_w) |
| 3747 | 3882 | { |
| 3748 | 3883 | if(s3.enable_8514 != 0) |
| 3749 | 3884 | ibm8514_cmd_w(space,offset,data,mem_mask); |
| r18228 | r18229 | |
| 3760 | 3895 | 0-13 (80 x+) LINE PARAMETER AXIAL STEP CONSTANT. Se above |
| 3761 | 3896 | |
| 3762 | 3897 | */ |
| 3763 | | READ16_HANDLER( ibm8514_desty_r ) |
| 3898 | READ16_MEMBER(s3_vga_device::ibm8514_desty_r) |
| 3764 | 3899 | { |
| 3765 | 3900 | return ibm8514.line_axial_step; |
| 3766 | 3901 | } |
| 3767 | 3902 | |
| 3768 | | WRITE16_HANDLER( ibm8514_desty_w ) |
| 3903 | WRITE16_MEMBER(s3_vga_device::ibm8514_desty_w) |
| 3769 | 3904 | { |
| 3770 | 3905 | ibm8514.line_axial_step = data; |
| 3771 | 3906 | ibm8514.dest_y = data; |
| r18228 | r18229 | |
| 3785 | 3920 | 0-13 (80x +) LINE PARAMETER DIAGONAL STEP CONSTANT. Se above |
| 3786 | 3921 | |
| 3787 | 3922 | */ |
| 3788 | | READ16_HANDLER( ibm8514_destx_r ) |
| 3923 | READ16_MEMBER(s3_vga_device::ibm8514_destx_r) |
| 3789 | 3924 | { |
| 3790 | 3925 | return ibm8514.line_diagonal_step; |
| 3791 | 3926 | } |
| 3792 | 3927 | |
| 3793 | | WRITE16_HANDLER( ibm8514_destx_w ) |
| 3928 | WRITE16_MEMBER(s3_vga_device::ibm8514_destx_w) |
| 3794 | 3929 | { |
| 3795 | 3930 | ibm8514.line_diagonal_step = data; |
| 3796 | 3931 | ibm8514.dest_x = data; |
| r18228 | r18229 | |
| 3819 | 3954 | 9EE9h before execution starts. A single 16bit write will do. |
| 3820 | 3955 | If only one SSV is desired the other byte can be set to 0. |
| 3821 | 3956 | */ |
| 3822 | | static void ibm8514_wait_draw_ssv() |
| 3957 | void s3_vga_device::ibm8514_wait_draw_ssv() |
| 3823 | 3958 | { |
| 3824 | 3959 | UINT8 len = ibm8514.wait_vector_len; |
| 3825 | 3960 | UINT8 dir = ibm8514.wait_vector_dir; |
| r18228 | r18229 | |
| 3907 | 4042 | } |
| 3908 | 4043 | } |
| 3909 | 4044 | |
| 3910 | | static void ibm8514_draw_ssv(UINT8 data) |
| 4045 | void s3_vga_device::ibm8514_draw_ssv(UINT8 data) |
| 3911 | 4046 | { |
| 3912 | 4047 | UINT8 len = data & 0x0f; |
| 3913 | 4048 | UINT8 dir = (data & 0xe0) >> 5; |
| r18228 | r18229 | |
| 3916 | 4051 | ibm8514_draw_vector(len,dir,draw); |
| 3917 | 4052 | } |
| 3918 | 4053 | |
| 3919 | | READ16_HANDLER(ibm8514_ssv_r) |
| 4054 | READ16_MEMBER(s3_vga_device::ibm8514_ssv_r) |
| 3920 | 4055 | { |
| 3921 | 4056 | return ibm8514.ssv; |
| 3922 | 4057 | } |
| 3923 | 4058 | |
| 3924 | | WRITE16_HANDLER(ibm8514_ssv_w) |
| 4059 | WRITE16_MEMBER(s3_vga_device::ibm8514_ssv_w) |
| 3925 | 4060 | { |
| 3926 | 4061 | ibm8514.ssv = data; |
| 3927 | 4062 | |
| r18228 | r18229 | |
| 3949 | 4084 | if(LOG_8514) logerror("8514/A: Short Stroke Vector write %04x\n",data); |
| 3950 | 4085 | } |
| 3951 | 4086 | |
| 3952 | | static void ibm8514_wait_draw_vector() |
| 4087 | void s3_vga_device::ibm8514_wait_draw_vector() |
| 3953 | 4088 | { |
| 3954 | 4089 | UINT8 len = ibm8514.wait_vector_len; |
| 3955 | 4090 | UINT8 dir = ibm8514.wait_vector_dir; |
| r18228 | r18229 | |
| 4028 | 4163 | independent axis). Must be positive. |
| 4029 | 4164 | 0-11 (80x +) RECTANGLE WIDTH/LINE PARAMETER MAX. See above |
| 4030 | 4165 | */ |
| 4031 | | READ16_HANDLER( s3_width_r ) |
| 4166 | READ16_MEMBER(s3_vga_device::s3_width_r) |
| 4032 | 4167 | { |
| 4033 | 4168 | return s3.rect_width; |
| 4034 | 4169 | } |
| 4035 | 4170 | |
| 4036 | | WRITE16_HANDLER( s3_width_w ) |
| 4171 | WRITE16_MEMBER(s3_vga_device::s3_width_w) |
| 4037 | 4172 | { |
| 4038 | 4173 | s3.rect_width = data & 0x1fff; |
| 4039 | 4174 | if(LOG_8514) logerror("S3: Major Axis Pixel Count / Rectangle Width write %04x\n",data); |
| 4040 | 4175 | } |
| 4041 | 4176 | |
| 4042 | | READ16_HANDLER(ibm8514_currentx_r) |
| 4177 | READ16_MEMBER(s3_vga_device::ibm8514_currentx_r) |
| 4043 | 4178 | { |
| 4044 | 4179 | return ibm8514.curr_x; |
| 4045 | 4180 | } |
| 4046 | 4181 | |
| 4047 | | WRITE16_HANDLER(ibm8514_currentx_w) |
| 4182 | WRITE16_MEMBER(s3_vga_device::ibm8514_currentx_w) |
| 4048 | 4183 | { |
| 4049 | 4184 | ibm8514.curr_x = data; |
| 4050 | 4185 | ibm8514.prev_x = data; |
| 4051 | 4186 | if(LOG_8514) logerror("8514/A: Current X set to %04x (%i)\n",data,ibm8514.curr_x); |
| 4052 | 4187 | } |
| 4053 | 4188 | |
| 4054 | | READ16_HANDLER(ibm8514_currenty_r) |
| 4189 | READ16_MEMBER(s3_vga_device::ibm8514_currenty_r) |
| 4055 | 4190 | { |
| 4056 | 4191 | return ibm8514.curr_y; |
| 4057 | 4192 | } |
| 4058 | 4193 | |
| 4059 | | WRITE16_HANDLER(ibm8514_currenty_w) |
| 4194 | WRITE16_MEMBER(s3_vga_device::ibm8514_currenty_w) |
| 4060 | 4195 | { |
| 4061 | 4196 | ibm8514.curr_y = data; |
| 4062 | 4197 | ibm8514.prev_y = data; |
| 4063 | 4198 | if(LOG_8514) logerror("8514/A: Current Y set to %04x (%i)\n",data,ibm8514.curr_y); |
| 4064 | 4199 | } |
| 4065 | 4200 | |
| 4066 | | READ16_HANDLER(s3_fgcolour_r) |
| 4201 | READ16_MEMBER(s3_vga_device::s3_fgcolour_r) |
| 4067 | 4202 | { |
| 4068 | 4203 | return s3.fgcolour; |
| 4069 | 4204 | } |
| 4070 | 4205 | |
| 4071 | | WRITE16_HANDLER(s3_fgcolour_w) |
| 4206 | WRITE16_MEMBER(s3_vga_device::s3_fgcolour_w) |
| 4072 | 4207 | { |
| 4073 | 4208 | s3.fgcolour = data; |
| 4074 | 4209 | if(LOG_8514) logerror("S3: Foreground Colour write %04x\n",data); |
| 4075 | 4210 | } |
| 4076 | 4211 | |
| 4077 | | READ16_HANDLER(s3_bgcolour_r) |
| 4212 | READ16_MEMBER(s3_vga_device::s3_bgcolour_r) |
| 4078 | 4213 | { |
| 4079 | 4214 | return s3.bgcolour; |
| 4080 | 4215 | } |
| 4081 | 4216 | |
| 4082 | | WRITE16_HANDLER(s3_bgcolour_w) |
| 4217 | WRITE16_MEMBER(s3_vga_device::s3_bgcolour_w) |
| 4083 | 4218 | { |
| 4084 | 4219 | s3.bgcolour = data; |
| 4085 | 4220 | if(LOG_8514) logerror("S3: Background Colour write %04x\n",data); |
| 4086 | 4221 | } |
| 4087 | 4222 | |
| 4088 | | READ16_HANDLER( s3_multifunc_r ) |
| 4223 | READ16_MEMBER(s3_vga_device::s3_multifunc_r ) |
| 4089 | 4224 | { |
| 4090 | 4225 | switch(s3.multifunc_sel) |
| 4091 | 4226 | { |
| r18228 | r18229 | |
| 4106 | 4241 | } |
| 4107 | 4242 | } |
| 4108 | 4243 | |
| 4109 | | WRITE16_HANDLER( s3_multifunc_w ) |
| 4244 | WRITE16_MEMBER(s3_vga_device::s3_multifunc_w ) |
| 4110 | 4245 | { |
| 4111 | 4246 | switch(data & 0xf000) |
| 4112 | 4247 | { |
| r18228 | r18229 | |
| 4197 | 4332 | } |
| 4198 | 4333 | } |
| 4199 | 4334 | |
| 4200 | | static void s3_wait_draw() |
| 4335 | void s3_vga_device::s3_wait_draw() |
| 4201 | 4336 | { |
| 4202 | 4337 | int x, data_size = 8; |
| 4203 | 4338 | UINT32 off; |
| r18228 | r18229 | |
| 4381 | 4516 | 2 BSS is Pixel Data from the PIX_TRANS register (E2E8h) |
| 4382 | 4517 | 3 BSS is Bitmap Data (Source data from display buffer). |
| 4383 | 4518 | */ |
| 4384 | | READ16_HANDLER(s3_backmix_r) |
| 4519 | READ16_MEMBER(s3_vga_device::s3_backmix_r) |
| 4385 | 4520 | { |
| 4386 | 4521 | return s3.bgmix; |
| 4387 | 4522 | } |
| 4388 | 4523 | |
| 4389 | | WRITE16_HANDLER(s3_backmix_w) |
| 4524 | WRITE16_MEMBER(s3_vga_device::s3_backmix_w) |
| 4390 | 4525 | { |
| 4391 | 4526 | s3.bgmix = data; |
| 4392 | 4527 | if(LOG_8514) logerror("S3: BG Mix write %04x\n",data); |
| 4393 | 4528 | } |
| 4394 | 4529 | |
| 4395 | | READ16_HANDLER(s3_foremix_r) |
| 4530 | READ16_MEMBER(s3_vga_device::s3_foremix_r) |
| 4396 | 4531 | { |
| 4397 | 4532 | return s3.fgmix; |
| 4398 | 4533 | } |
| 4399 | 4534 | |
| 4400 | | WRITE16_HANDLER(s3_foremix_w) |
| 4535 | WRITE16_MEMBER(s3_vga_device::s3_foremix_w) |
| 4401 | 4536 | { |
| 4402 | 4537 | s3.fgmix = data; |
| 4403 | 4538 | if(LOG_8514) logerror("S3: FG Mix write %04x\n",data); |
| 4404 | 4539 | } |
| 4405 | 4540 | |
| 4406 | | READ16_HANDLER(s3_pixel_xfer_r) |
| 4541 | READ16_MEMBER(s3_vga_device::s3_pixel_xfer_r) |
| 4407 | 4542 | { |
| 4408 | 4543 | if(offset == 1) |
| 4409 | 4544 | return (s3.pixel_xfer & 0xffff0000) >> 16; |
| r18228 | r18229 | |
| 4411 | 4546 | return s3.pixel_xfer & 0x0000ffff; |
| 4412 | 4547 | } |
| 4413 | 4548 | |
| 4414 | | WRITE16_HANDLER(s3_pixel_xfer_w) |
| 4549 | WRITE16_MEMBER(s3_vga_device::s3_pixel_xfer_w) |
| 4415 | 4550 | { |
| 4416 | 4551 | if(offset == 1) |
| 4417 | 4552 | s3.pixel_xfer = (s3.pixel_xfer & 0x0000ffff) | (data << 16); |
| r18228 | r18229 | |
| 4430 | 4565 | if(LOG_8514) logerror("S3: Pixel Transfer = %08x\n",s3.pixel_xfer); |
| 4431 | 4566 | } |
| 4432 | 4567 | |
| 4433 | | READ8_HANDLER( s3_mem_r ) |
| 4568 | READ8_MEMBER(s3_vga_device::mem_r) |
| 4434 | 4569 | { |
| 4435 | 4570 | if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb32_en) |
| 4436 | 4571 | { |
| r18228 | r18229 | |
| 4452 | 4587 | } |
| 4453 | 4588 | return data; |
| 4454 | 4589 | } |
| 4455 | | return vga_mem_r(space,offset); |
| 4590 | return vga_device::mem_r(space,offset,mem_mask); |
| 4456 | 4591 | } |
| 4457 | 4592 | |
| 4458 | | WRITE8_HANDLER( s3_mem_w ) |
| 4593 | WRITE8_MEMBER(s3_vga_device::mem_w) |
| 4459 | 4594 | { |
| 4460 | 4595 | // bit 4 of CR53 enables memory-mapped I/O |
| 4461 | 4596 | // 0xA0000-0xA7ffff maps to port 0xE2E8 (pixel transfer) |
| r18228 | r18229 | |
| 4685 | 4820 | return; |
| 4686 | 4821 | } |
| 4687 | 4822 | |
| 4688 | | vga_mem_w(space,offset,data); |
| 4823 | vga_device::mem_w(space,offset,data,mem_mask); |
| 4689 | 4824 | } |
| 4690 | 4825 | |
| 4691 | 4826 | /****************************************** |
| r18228 | r18229 | |
| 4694 | 4829 | |
| 4695 | 4830 | ******************************************/ |
| 4696 | 4831 | |
| 4697 | | READ8_HANDLER(vga_gamtor_mem_r) |
| 4832 | READ8_MEMBER(gamtor_vga_device::mem_r) |
| 4698 | 4833 | { |
| 4699 | 4834 | return vga.memory[offset]; |
| 4700 | 4835 | } |
| 4701 | 4836 | |
| 4702 | | WRITE8_HANDLER(vga_gamtor_mem_w) |
| 4837 | WRITE8_MEMBER(gamtor_vga_device::mem_w) |
| 4703 | 4838 | { |
| 4704 | 4839 | vga.memory[offset] = data; |
| 4705 | 4840 | } |
| 4706 | 4841 | |
| 4707 | 4842 | |
| 4708 | | READ8_HANDLER(vga_port_gamtor_03b0_r) |
| 4843 | READ8_MEMBER(gamtor_vga_device::port_03b0_r) |
| 4709 | 4844 | { |
| 4710 | 4845 | UINT8 res; |
| 4711 | 4846 | |
| 4712 | 4847 | switch(offset) |
| 4713 | 4848 | { |
| 4714 | 4849 | default: |
| 4715 | | res = vga_port_03b0_r(space,offset ^ 3); |
| 4850 | res = vga_device::port_03b0_r(space,offset ^ 3,mem_mask); |
| 4716 | 4851 | break; |
| 4717 | 4852 | } |
| 4718 | 4853 | |
| 4719 | 4854 | return res; |
| 4720 | 4855 | } |
| 4721 | 4856 | |
| 4722 | | WRITE8_HANDLER(vga_port_gamtor_03b0_w) |
| 4857 | WRITE8_MEMBER(gamtor_vga_device::port_03b0_w) |
| 4723 | 4858 | { |
| 4724 | 4859 | switch(offset) |
| 4725 | 4860 | { |
| 4726 | 4861 | default: |
| 4727 | | vga_port_03b0_w(space,offset ^ 3,data); |
| 4862 | vga_device::port_03b0_w(space,offset ^ 3,data,mem_mask); |
| 4728 | 4863 | break; |
| 4729 | 4864 | } |
| 4730 | 4865 | } |
| 4731 | 4866 | |
| 4732 | | READ8_HANDLER(vga_port_gamtor_03c0_r) |
| 4867 | READ8_MEMBER(gamtor_vga_device::port_03c0_r) |
| 4733 | 4868 | { |
| 4734 | 4869 | UINT8 res; |
| 4735 | 4870 | |
| 4736 | 4871 | switch(offset) |
| 4737 | 4872 | { |
| 4738 | 4873 | default: |
| 4739 | | res = vga_port_03c0_r(space,offset ^ 3); |
| 4874 | res = vga_device::port_03c0_r(space,offset ^ 3,mem_mask); |
| 4740 | 4875 | break; |
| 4741 | 4876 | } |
| 4742 | 4877 | |
| 4743 | 4878 | return res; |
| 4744 | 4879 | } |
| 4745 | 4880 | |
| 4746 | | WRITE8_HANDLER(vga_port_gamtor_03c0_w) |
| 4881 | WRITE8_MEMBER(gamtor_vga_device::port_03c0_w) |
| 4747 | 4882 | { |
| 4748 | 4883 | switch(offset) |
| 4749 | 4884 | { |
| 4750 | 4885 | default: |
| 4751 | | vga_port_03c0_w(space,offset ^ 3,data); |
| 4886 | vga_device::port_03c0_w(space,offset ^ 3,data,mem_mask); |
| 4752 | 4887 | break; |
| 4753 | 4888 | } |
| 4754 | 4889 | } |
| 4755 | 4890 | |
| 4756 | | READ8_HANDLER(vga_port_gamtor_03d0_r) |
| 4891 | READ8_MEMBER(gamtor_vga_device::port_03d0_r) |
| 4757 | 4892 | { |
| 4758 | 4893 | UINT8 res; |
| 4759 | 4894 | |
| 4760 | 4895 | switch(offset) |
| 4761 | 4896 | { |
| 4762 | 4897 | default: |
| 4763 | | res = vga_port_03d0_r(space,offset ^ 3); |
| 4898 | res = vga_device::port_03d0_r(space,offset ^ 3,mem_mask); |
| 4764 | 4899 | break; |
| 4765 | 4900 | } |
| 4766 | 4901 | |
| 4767 | 4902 | return res; |
| 4768 | 4903 | } |
| 4769 | 4904 | |
| 4770 | | WRITE8_HANDLER(vga_port_gamtor_03d0_w) |
| 4905 | WRITE8_MEMBER(gamtor_vga_device::port_03d0_w) |
| 4771 | 4906 | { |
| 4772 | 4907 | switch(offset) |
| 4773 | 4908 | { |
| 4774 | 4909 | default: |
| 4775 | | vga_port_03d0_w(space,offset ^ 3,data); |
| 4910 | vga_device::port_03d0_w(space,offset ^ 3,data,mem_mask); |
| 4776 | 4911 | break; |
| 4777 | 4912 | } |
| 4778 | 4913 | } |
| 4779 | 4914 | |
| 4780 | 4915 | |
| 4781 | | static void ati_define_video_mode(running_machine &machine) |
| 4916 | void ati_vga_device::ati_define_video_mode() |
| 4782 | 4917 | { |
| 4783 | 4918 | int clock; |
| 4784 | 4919 | UINT8 clock_type; |
| r18228 | r18229 | |
| 4849 | 4984 | logerror("Invalid dot clock %i selected.\n",clock_type); |
| 4850 | 4985 | } |
| 4851 | 4986 | // logerror("ATI: Clock select type %i (%iHz / %i)\n",clock_type,clock,div); |
| 4852 | | recompute_params_clock(machine,divisor,clock / div); |
| 4987 | recompute_params_clock(divisor,clock / div); |
| 4853 | 4988 | } |
| 4854 | 4989 | |
| 4855 | | READ8_HANDLER( ati_mem_r ) |
| 4990 | READ8_MEMBER(ati_vga_device::mem_r) |
| 4856 | 4991 | { |
| 4857 | 4992 | if(svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en) |
| 4858 | 4993 | { |
| r18228 | r18229 | |
| 4860 | 4995 | return vga.memory[(offset+svga.bank_r*0x10000)]; |
| 4861 | 4996 | } |
| 4862 | 4997 | |
| 4863 | | return vga_mem_r(space,offset); |
| 4998 | return vga_device::mem_r(space,offset,mem_mask); |
| 4864 | 4999 | } |
| 4865 | 5000 | |
| 4866 | | WRITE8_HANDLER( ati_mem_w ) |
| 5001 | WRITE8_MEMBER(ati_vga_device::mem_w) |
| 4867 | 5002 | { |
| 4868 | 5003 | if(svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en) |
| 4869 | 5004 | { |
| r18228 | r18229 | |
| 4871 | 5006 | vga.memory[(offset+svga.bank_w*0x10000)] = data; |
| 4872 | 5007 | } |
| 4873 | 5008 | else |
| 4874 | | vga_mem_w(space,offset,data); |
| 5009 | vga_device::mem_w(space,offset,data,mem_mask); |
| 4875 | 5010 | } |
| 4876 | 5011 | |
| 4877 | 5012 | |
| 4878 | | READ8_DEVICE_HANDLER(ati_port_ext_r) |
| 5013 | READ8_MEMBER(ati_vga_device::ati_port_ext_r) |
| 4879 | 5014 | { |
| 4880 | 5015 | UINT8 ret = 0xff; |
| 4881 | 5016 | |
| r18228 | r18229 | |
| 4894 | 5029 | break; |
| 4895 | 5030 | case 0x37: |
| 4896 | 5031 | { |
| 4897 | | eeprom_device* eep = device->subdevice<eeprom_device>("ati_eeprom"); |
| 5032 | eeprom_device* eep = subdevice<eeprom_device>("ati_eeprom"); |
| 4898 | 5033 | ret = 0x00; |
| 4899 | 5034 | ret |= eep->read_bit() << 3; |
| 4900 | 5035 | } |
| r18228 | r18229 | |
| 4907 | 5042 | return ret; |
| 4908 | 5043 | } |
| 4909 | 5044 | |
| 4910 | | WRITE8_DEVICE_HANDLER(ati_port_ext_w) |
| 5045 | WRITE8_MEMBER(ati_vga_device::ati_port_ext_w) |
| 4911 | 5046 | { |
| 4912 | 5047 | switch(offset) |
| 4913 | 5048 | { |
| r18228 | r18229 | |
| 4953 | 5088 | case 0x33: // EEPROM |
| 4954 | 5089 | if(data & 0x04) |
| 4955 | 5090 | { |
| 4956 | | eeprom_device* eep = device->subdevice<eeprom_device>("ati_eeprom"); |
| 5091 | eeprom_device* eep = subdevice<eeprom_device>("ati_eeprom"); |
| 4957 | 5092 | if(eep != NULL) |
| 4958 | 5093 | { |
| 4959 | 5094 | eep->write_bit((data & 0x01) ? ASSERT_LINE : CLEAR_LINE); |
| r18228 | r18229 | |
| 4969 | 5104 | } |
| 4970 | 5105 | break; |
| 4971 | 5106 | } |
| 4972 | | ati_define_video_mode(device->machine()); |
| 5107 | ati_define_video_mode(); |
| 4973 | 5108 | } |
| 4974 | 5109 | |
| 4975 | 5110 | /* |
| r18228 | r18229 | |
| 4985 | 5120 | This bit toggles every time a HSYNC pulse starts |
| 4986 | 5121 | 3-15 Reserved(0) |
| 4987 | 5122 | */ |
| 4988 | | READ16_HANDLER(ibm8514_status_r) |
| 5123 | READ16_MEMBER(ati_vga_device::ibm8514_status_r) |
| 4989 | 5124 | { |
| 4990 | | return vga_vblank(space.machine()) << 1; |
| 5125 | return vga_vblank() << 1; |
| 4991 | 5126 | } |
| 4992 | 5127 | |
| 4993 | | WRITE16_HANDLER(ibm8514_htotal_w) |
| 5128 | WRITE16_MEMBER(ati_vga_device::ibm8514_htotal_w) |
| 4994 | 5129 | { |
| 4995 | 5130 | ibm8514.htotal = data & 0x01ff; |
| 4996 | 5131 | //vga.crtc.horz_total = data & 0x01ff; |
| r18228 | r18229 | |
| 5017 | 5152 | 8-11 CHIP_REV. Chip revision number. |
| 5018 | 5153 | 12-15 (CT82c480) CHIP_ID. 0=CT 82c480. |
| 5019 | 5154 | */ |
| 5020 | | READ16_HANDLER(ibm8514_substatus_r) |
| 5155 | READ16_MEMBER(ati_vga_device::ibm8514_substatus_r) |
| 5021 | 5156 | { |
| 5022 | 5157 | // TODO: |
| 5023 | | if(vga_vblank(space.machine()) != 0) // not correct, but will do for now |
| 5158 | if(vga_vblank() != 0) // not correct, but will do for now |
| 5024 | 5159 | ibm8514.substatus |= 0x01; |
| 5025 | 5160 | return ibm8514.substatus; |
| 5026 | 5161 | } |
| r18228 | r18229 | |
| 5042 | 5177 | 12-13 CHPTEST. Used for chip testing. |
| 5043 | 5178 | 14-15 Graphics Processor Control (GPCTRL). |
| 5044 | 5179 | */ |
| 5045 | | WRITE16_HANDLER(ibm8514_subcontrol_w) |
| 5180 | WRITE16_MEMBER(ati_vga_device::ibm8514_subcontrol_w) |
| 5046 | 5181 | { |
| 5047 | 5182 | ibm8514.subctrl = data; |
| 5048 | 5183 | ibm8514.substatus &= ~(data & 0x0f); // reset interrupts |
| 5049 | 5184 | // if(LOG_8514) logerror("8514/A: Subsystem control write %04x\n",data); |
| 5050 | 5185 | } |
| 5051 | 5186 | |
| 5052 | | READ16_HANDLER(ibm8514_subcontrol_r) |
| 5187 | READ16_MEMBER(ati_vga_device::ibm8514_subcontrol_r) |
| 5053 | 5188 | { |
| 5054 | 5189 | return ibm8514.subctrl; |
| 5055 | 5190 | } |
| 5056 | 5191 | |
| 5057 | | READ16_HANDLER(ibm8514_htotal_r) |
| 5192 | READ16_MEMBER(ati_vga_device::ibm8514_htotal_r) |
| 5058 | 5193 | { |
| 5059 | 5194 | return ibm8514.htotal; |
| 5060 | 5195 | } |
| 5061 | 5196 | |
| 5062 | | READ16_HANDLER(ibm8514_vtotal_r) |
| 5197 | READ16_MEMBER(ati_vga_device::ibm8514_vtotal_r) |
| 5063 | 5198 | { |
| 5064 | 5199 | return ibm8514.vtotal; |
| 5065 | 5200 | } |
| 5066 | 5201 | |
| 5067 | | WRITE16_HANDLER(ibm8514_vtotal_w) |
| 5202 | WRITE16_MEMBER(ati_vga_device::ibm8514_vtotal_w) |
| 5068 | 5203 | { |
| 5069 | 5204 | ibm8514.vtotal = data; |
| 5070 | 5205 | // vga.crtc.vert_total = data; |
| 5071 | 5206 | if(LOG_8514) logerror("8514/A: Vertical total write %04x\n",data); |
| 5072 | 5207 | } |
| 5073 | 5208 | |
| 5074 | | READ16_HANDLER(ibm8514_vdisp_r) |
| 5209 | READ16_MEMBER(ati_vga_device::ibm8514_vdisp_r) |
| 5075 | 5210 | { |
| 5076 | 5211 | return ibm8514.vdisp; |
| 5077 | 5212 | } |
| 5078 | 5213 | |
| 5079 | | WRITE16_HANDLER(ibm8514_vdisp_w) |
| 5214 | WRITE16_MEMBER(ati_vga_device::ibm8514_vdisp_w) |
| 5080 | 5215 | { |
| 5081 | 5216 | ibm8514.vdisp = data; |
| 5082 | 5217 | // vga.crtc.vert_disp_end = data >> 3; |
| 5083 | 5218 | if(LOG_8514) logerror("8514/A: Vertical Displayed write %04x\n",data); |
| 5084 | 5219 | } |
| 5085 | 5220 | |
| 5086 | | READ16_HANDLER(ibm8514_vsync_r) |
| 5221 | READ16_MEMBER(ati_vga_device::ibm8514_vsync_r) |
| 5087 | 5222 | { |
| 5088 | 5223 | return ibm8514.vsync; |
| 5089 | 5224 | } |
| 5090 | 5225 | |
| 5091 | | WRITE16_HANDLER(ibm8514_vsync_w) |
| 5226 | WRITE16_MEMBER(ati_vga_device::ibm8514_vsync_w) |
| 5092 | 5227 | { |
| 5093 | 5228 | ibm8514.vsync = data; |
| 5094 | 5229 | if(LOG_8514) logerror("8514/A: Vertical Sync write %04x\n",data); |
| 5095 | 5230 | } |
| 5096 | 5231 | |
| 5097 | | READ16_HANDLER(mach8_ec0_r) |
| 5232 | READ16_MEMBER(ati_vga_device::mach8_ec0_r) |
| 5098 | 5233 | { |
| 5099 | 5234 | return ibm8514.ec0; |
| 5100 | 5235 | } |
| 5101 | 5236 | |
| 5102 | | WRITE16_HANDLER(mach8_ec0_w) |
| 5237 | WRITE16_MEMBER(ati_vga_device::mach8_ec0_w) |
| 5103 | 5238 | { |
| 5104 | 5239 | ibm8514.ec0 = data; |
| 5105 | 5240 | if(LOG_8514) logerror("8514/A: Extended configuration 0 write %04x\n",data); |
| 5106 | 5241 | } |
| 5107 | 5242 | |
| 5108 | | READ16_HANDLER(mach8_ec1_r) |
| 5243 | READ16_MEMBER(ati_vga_device::mach8_ec1_r) |
| 5109 | 5244 | { |
| 5110 | 5245 | return ibm8514.ec1; |
| 5111 | 5246 | } |
| 5112 | 5247 | |
| 5113 | | WRITE16_HANDLER(mach8_ec1_w) |
| 5248 | WRITE16_MEMBER(ati_vga_device::mach8_ec1_w) |
| 5114 | 5249 | { |
| 5115 | 5250 | ibm8514.ec1 = data; |
| 5116 | 5251 | if(LOG_8514) logerror("8514/A: Extended configuration 1 write %04x\n",data); |
| 5117 | 5252 | } |
| 5118 | 5253 | |
| 5119 | | READ16_HANDLER(mach8_ec2_r) |
| 5254 | READ16_MEMBER(ati_vga_device::mach8_ec2_r) |
| 5120 | 5255 | { |
| 5121 | 5256 | return ibm8514.ec2; |
| 5122 | 5257 | } |
| 5123 | 5258 | |
| 5124 | | WRITE16_HANDLER(mach8_ec2_w) |
| 5259 | WRITE16_MEMBER(ati_vga_device::mach8_ec2_w) |
| 5125 | 5260 | { |
| 5126 | 5261 | ibm8514.ec2 = data; |
| 5127 | 5262 | if(LOG_8514) logerror("8514/A: Extended configuration 2 write %04x\n",data); |
| 5128 | 5263 | } |
| 5129 | 5264 | |
| 5130 | | READ16_HANDLER(mach8_ec3_r) |
| 5265 | READ16_MEMBER(ati_vga_device::mach8_ec3_r) |
| 5131 | 5266 | { |
| 5132 | 5267 | return ibm8514.ec3; |
| 5133 | 5268 | } |
| 5134 | 5269 | |
| 5135 | | WRITE16_HANDLER(mach8_ec3_w) |
| 5270 | WRITE16_MEMBER(ati_vga_device::mach8_ec3_w) |
| 5136 | 5271 | { |
| 5137 | 5272 | ibm8514.ec3 = data; |
| 5138 | 5273 | if(LOG_8514) logerror("8514/A: Extended configuration 3 write %04x\n",data); |
| 5139 | 5274 | } |
| 5140 | 5275 | |
| 5141 | | READ16_HANDLER(mach8_ext_fifo_r) |
| 5276 | READ16_MEMBER(ati_vga_device::mach8_ext_fifo_r) |
| 5142 | 5277 | { |
| 5143 | 5278 | return 0x00; // for now, report all FIFO slots at free |
| 5144 | 5279 | } |
| 5145 | 5280 | |
| 5146 | | WRITE16_HANDLER(mach8_linedraw_index_w) |
| 5281 | WRITE16_MEMBER(ati_vga_device::mach8_linedraw_index_w) |
| 5147 | 5282 | { |
| 5148 | 5283 | ati.linedraw = data & 0x07; |
| 5149 | 5284 | if(LOG_8514) logerror("Mach8: Line Draw Index write %04x\n",data); |
| 5150 | 5285 | } |
| 5151 | 5286 | |
| 5152 | | READ16_HANDLER(mach8_bresenham_count_r) |
| 5287 | READ16_MEMBER(ati_vga_device::mach8_bresenham_count_r) |
| 5153 | 5288 | { |
| 5154 | 5289 | return s3.rect_width & 0x1fff; |
| 5155 | 5290 | } |
| 5156 | 5291 | |
| 5157 | | WRITE16_HANDLER(mach8_bresenham_count_w) |
| 5292 | WRITE16_MEMBER(ati_vga_device::mach8_bresenham_count_w) |
| 5158 | 5293 | { |
| 5159 | 5294 | s3.rect_width = data & 0x1fff; |
| 5160 | 5295 | if(LOG_8514) logerror("Mach8: Bresenham count write %04x\n",data); |
| 5161 | 5296 | } |
| 5162 | 5297 | |
| 5163 | | WRITE16_HANDLER(mach8_linedraw_w) |
| 5298 | WRITE16_MEMBER(ati_vga_device::mach8_linedraw_w) |
| 5164 | 5299 | { |
| 5165 | 5300 | // TODO: actually draw the lines |
| 5166 | 5301 | switch(ati.linedraw) |
| r18228 | r18229 | |
| 5193 | 5328 | logerror("ATI: Linedraw register write %04x, mode %i\n",data,ati.linedraw); |
| 5194 | 5329 | } |
| 5195 | 5330 | |
| 5196 | | READ16_HANDLER(mach8_scratch0_r) |
| 5331 | READ16_MEMBER(ati_vga_device::mach8_scratch0_r) |
| 5197 | 5332 | { |
| 5198 | 5333 | return ati.scratch0; |
| 5199 | 5334 | } |
| 5200 | 5335 | |
| 5201 | | WRITE16_HANDLER(mach8_scratch0_w) |
| 5336 | WRITE16_MEMBER(ati_vga_device::mach8_scratch0_w) |
| 5202 | 5337 | { |
| 5203 | 5338 | ati.scratch0 = data; |
| 5204 | 5339 | if(LOG_8514) logerror("Mach8: Scratch Pad 0 write %04x\n",data); |
| 5205 | 5340 | } |
| 5206 | 5341 | |
| 5207 | | READ16_HANDLER(mach8_scratch1_r) |
| 5342 | READ16_MEMBER(ati_vga_device::mach8_scratch1_r) |
| 5208 | 5343 | { |
| 5209 | 5344 | return ati.scratch1; |
| 5210 | 5345 | } |
| 5211 | 5346 | |
| 5212 | | WRITE16_HANDLER(mach8_scratch1_w) |
| 5347 | WRITE16_MEMBER(ati_vga_device::mach8_scratch1_w) |
| 5213 | 5348 | { |
| 5214 | 5349 | ati.scratch1 = data; |
| 5215 | 5350 | if(LOG_8514) logerror("Mach8: Scratch Pad 1 write %04x\n",data); |
| r18228 | r18229 | |
| 5228 | 5363 | 9-15 ROM_LOCATION. If bit 2 and 3 are 0 the ROM will be at this location: |
| 5229 | 5364 | 0: C000h, 1: C080h, 2: C100h, .. 127: FF80h (unlikely) |
| 5230 | 5365 | */ |
| 5231 | | READ16_HANDLER(mach8_config1_r) |
| 5366 | READ16_MEMBER(ati_vga_device::mach8_config1_r) |
| 5232 | 5367 | { |
| 5233 | 5368 | return 0x0082; |
| 5234 | 5369 | } |
| r18228 | r18229 | |
| 5241 | 5376 | 3 WRITE_PER_BIT. Write masked VRAM operations supported if set |
| 5242 | 5377 | 4 FLASH_ENA. Flash page writes supported if set |
| 5243 | 5378 | */ |
| 5244 | | READ16_HANDLER(mach8_config2_r) |
| 5379 | READ16_MEMBER(ati_vga_device::mach8_config2_r) |
| 5245 | 5380 | { |
| 5246 | 5381 | return 0x0002; |
| 5247 | 5382 | } |
| r18228 | r18229 | |
| 5252 | 5387 | |
| 5253 | 5388 | ******************************************/ |
| 5254 | 5389 | |
| 5255 | | static void cirrus_define_video_mode(running_machine &machine) |
| 5390 | void cirrus_vga_device::cirrus_define_video_mode() |
| 5256 | 5391 | { |
| 5257 | 5392 | svga.rgb8_en = 0; |
| 5258 | 5393 | svga.rgb15_en = 0; |
| r18228 | r18229 | |
| 5272 | 5407 | } |
| 5273 | 5408 | } |
| 5274 | 5409 | |
| 5275 | | static UINT8 cirrus_seq_reg_read(running_machine &machine, UINT8 index) |
| 5410 | UINT8 cirrus_vga_device::cirrus_seq_reg_read(UINT8 index) |
| 5276 | 5411 | { |
| 5277 | 5412 | UINT8 res; |
| 5278 | 5413 | |
| r18228 | r18229 | |
| 5295 | 5430 | return res; |
| 5296 | 5431 | } |
| 5297 | 5432 | |
| 5298 | | static void cirrus_seq_reg_write(running_machine &machine, UINT8 index, UINT8 data) |
| 5433 | void cirrus_vga_device::cirrus_seq_reg_write(UINT8 index, UINT8 data) |
| 5299 | 5434 | { |
| 5300 | 5435 | if(index <= 0x04) |
| 5301 | 5436 | { |
| 5302 | 5437 | vga.sequencer.data[vga.sequencer.index] = data; |
| 5303 | | seq_reg_write(machine,vga.sequencer.index,data); |
| 5438 | seq_reg_write(vga.sequencer.index,data); |
| 5304 | 5439 | } |
| 5305 | 5440 | else |
| 5306 | 5441 | { |
| r18228 | r18229 | |
| 5314 | 5449 | } |
| 5315 | 5450 | } |
| 5316 | 5451 | } |
| 5317 | | READ8_HANDLER(cirrus_03c0_r) |
| 5452 | READ8_MEMBER(cirrus_vga_device::port_03c0_r) |
| 5318 | 5453 | { |
| 5319 | 5454 | UINT8 res; |
| 5320 | 5455 | |
| 5321 | 5456 | switch(offset) |
| 5322 | 5457 | { |
| 5323 | 5458 | case 0x05: |
| 5324 | | res = cirrus_seq_reg_read(space.machine(),vga.sequencer.index); |
| 5459 | res = cirrus_seq_reg_read(vga.sequencer.index); |
| 5325 | 5460 | break; |
| 5326 | 5461 | default: |
| 5327 | | res = vga_port_03c0_r(space,offset); |
| 5462 | res = vga_device::port_03c0_r(space,offset,mem_mask); |
| 5328 | 5463 | break; |
| 5329 | 5464 | } |
| 5330 | 5465 | |
| 5331 | 5466 | return res; |
| 5332 | 5467 | } |
| 5333 | 5468 | |
| 5334 | | WRITE8_HANDLER(cirrus_03c0_w) |
| 5469 | WRITE8_MEMBER(cirrus_vga_device::port_03c0_w) |
| 5335 | 5470 | { |
| 5336 | 5471 | switch(offset) |
| 5337 | 5472 | { |
| 5338 | 5473 | case 0x05: |
| 5339 | | cirrus_seq_reg_write(space.machine(),vga.sequencer.index,data); |
| 5474 | cirrus_seq_reg_write(vga.sequencer.index,data); |
| 5340 | 5475 | break; |
| 5341 | 5476 | default: |
| 5342 | | vga_port_03c0_w(space,offset,data); |
| 5477 | vga_device::port_03c0_w(space,offset,data,mem_mask); |
| 5343 | 5478 | break; |
| 5344 | 5479 | } |
| 5345 | | cirrus_define_video_mode(space.machine()); |
| 5480 | cirrus_define_video_mode(); |
| 5346 | 5481 | } |
trunk/src/emu/video/pc_vga.h
| r18228 | r18229 | |
| 10 | 10 | #define PC_VGA_H |
| 11 | 11 | |
| 12 | 12 | MACHINE_CONFIG_EXTERN( pcvideo_vga ); |
| 13 | | MACHINE_CONFIG_EXTERN( pcvideo_vga_isa ); |
| 14 | | MACHINE_CONFIG_EXTERN( pcvideo_s3_isa ); |
| 15 | | MACHINE_CONFIG_EXTERN( pcvideo_ati_isa ); |
| 13 | MACHINE_CONFIG_EXTERN( pcvideo_trident_vga ); |
| 14 | MACHINE_CONFIG_EXTERN( pcvideo_gamtor_vga ); |
| 15 | MACHINE_CONFIG_EXTERN( pcvideo_cirrus_vga ); |
| 16 | 16 | |
| 17 | | VIDEO_START( vga ); |
| 18 | | void pc_vga_init(running_machine &machine, read8_delegate read_dipswitch); |
| 19 | | void pc_vga_cirrus_init(running_machine &machine, read8_delegate read_dipswitch); |
| 20 | | void pc_vga_reset(running_machine &machine); |
| 21 | | void pc_video_start(running_machine &machine); |
| 22 | | void s3_video_start(running_machine &machine); |
| 17 | // ======================> vga_device |
| 23 | 18 | |
| 24 | | DECLARE_READ8_HANDLER(vga_port_03b0_r); |
| 25 | | DECLARE_READ8_HANDLER(vga_port_03c0_r); |
| 26 | | DECLARE_READ8_HANDLER(vga_port_03d0_r); |
| 27 | | DECLARE_READ8_HANDLER(vga_mem_r); |
| 28 | | DECLARE_READ8_HANDLER(vga_mem_linear_r); |
| 29 | | DECLARE_WRITE8_HANDLER(vga_port_03b0_w); |
| 30 | | DECLARE_WRITE8_HANDLER(vga_port_03c0_w); |
| 31 | | DECLARE_WRITE8_HANDLER(vga_port_03d0_w); |
| 32 | | DECLARE_WRITE8_HANDLER(vga_mem_w); |
| 33 | | DECLARE_WRITE8_HANDLER(vga_mem_linear_w); |
| 19 | class vga_device : public device_t |
| 20 | { |
| 21 | public: |
| 22 | // construction/destruction |
| 23 | vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 24 | vga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock); |
| 34 | 25 | |
| 35 | | /* per-device implementations */ |
| 36 | | DECLARE_READ8_HANDLER(tseng_et4k_03b0_r); |
| 37 | | DECLARE_WRITE8_HANDLER(tseng_et4k_03b0_w); |
| 38 | | DECLARE_READ8_HANDLER(tseng_et4k_03c0_r); |
| 39 | | DECLARE_WRITE8_HANDLER(tseng_et4k_03c0_w); |
| 40 | | DECLARE_READ8_HANDLER(tseng_et4k_03d0_r); |
| 41 | | DECLARE_WRITE8_HANDLER(tseng_et4k_03d0_w); |
| 42 | | DECLARE_READ8_HANDLER(tseng_mem_r); |
| 43 | | DECLARE_WRITE8_HANDLER(tseng_mem_w); |
| 44 | 26 | |
| 45 | | DECLARE_READ8_HANDLER(trident_03c0_r); |
| 46 | | DECLARE_WRITE8_HANDLER(trident_03c0_w); |
| 47 | | DECLARE_READ8_HANDLER(trident_03d0_r); |
| 48 | | DECLARE_WRITE8_HANDLER(trident_03d0_w); |
| 49 | | DECLARE_READ8_HANDLER(trident_mem_r); |
| 50 | | DECLARE_WRITE8_HANDLER(trident_mem_w); |
| 27 | virtual UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 28 | |
| 29 | virtual READ8_MEMBER(port_03b0_r); |
| 30 | virtual WRITE8_MEMBER(port_03b0_w); |
| 31 | virtual READ8_MEMBER(port_03c0_r); |
| 32 | virtual WRITE8_MEMBER(port_03c0_w); |
| 33 | virtual READ8_MEMBER(port_03d0_r); |
| 34 | virtual WRITE8_MEMBER(port_03d0_w); |
| 35 | virtual READ8_MEMBER(mem_r); |
| 36 | virtual WRITE8_MEMBER(mem_w); |
| 37 | virtual READ8_MEMBER(mem_linear_r); |
| 38 | virtual WRITE8_MEMBER(mem_linear_w); |
| 39 | protected: |
| 40 | // device-level overrides |
| 41 | virtual void device_start(); |
| 42 | virtual void device_reset(); |
| 51 | 43 | |
| 52 | | DECLARE_READ8_HANDLER(s3_port_03b0_r); |
| 53 | | DECLARE_WRITE8_HANDLER(s3_port_03b0_w); |
| 54 | | DECLARE_READ8_HANDLER(s3_port_03c0_r); |
| 55 | | DECLARE_WRITE8_HANDLER(s3_port_03c0_w); |
| 56 | | DECLARE_READ8_HANDLER(s3_port_03d0_r); |
| 57 | | DECLARE_WRITE8_HANDLER(s3_port_03d0_w); |
| 58 | | DECLARE_READ16_HANDLER(s3_gpstatus_r); |
| 59 | | DECLARE_WRITE16_HANDLER(s3_cmd_w); |
| 60 | | DECLARE_READ16_HANDLER(ibm8514_ssv_r); |
| 61 | | DECLARE_WRITE16_HANDLER(ibm8514_ssv_w); |
| 62 | | DECLARE_READ16_HANDLER(ibm8514_desty_r); |
| 63 | | DECLARE_WRITE16_HANDLER(ibm8514_desty_w); |
| 64 | | DECLARE_READ16_HANDLER(ibm8514_destx_r); |
| 65 | | DECLARE_WRITE16_HANDLER(ibm8514_destx_w); |
| 66 | | DECLARE_READ16_HANDLER(ibm8514_currentx_r); |
| 67 | | DECLARE_WRITE16_HANDLER(ibm8514_currentx_w); |
| 68 | | DECLARE_READ16_HANDLER(ibm8514_currenty_r); |
| 69 | | DECLARE_WRITE16_HANDLER(ibm8514_currenty_w); |
| 70 | | DECLARE_READ16_HANDLER(s3_line_error_r); |
| 71 | | DECLARE_WRITE16_HANDLER(s3_line_error_w); |
| 72 | | DECLARE_READ16_HANDLER(s3_width_r); |
| 73 | | DECLARE_WRITE16_HANDLER(s3_width_w); |
| 74 | | DECLARE_READ16_HANDLER(s3_multifunc_r); |
| 75 | | DECLARE_WRITE16_HANDLER(s3_multifunc_w); |
| 76 | | DECLARE_READ16_HANDLER(s3_fgcolour_r); |
| 77 | | DECLARE_WRITE16_HANDLER(s3_fgcolour_w); |
| 78 | | DECLARE_READ16_HANDLER(s3_bgcolour_r); |
| 79 | | DECLARE_WRITE16_HANDLER(s3_bgcolour_w); |
| 80 | | DECLARE_READ16_HANDLER(s3_backmix_r); |
| 81 | | DECLARE_WRITE16_HANDLER(s3_backmix_w); |
| 82 | | DECLARE_READ16_HANDLER(s3_foremix_r); |
| 83 | | DECLARE_WRITE16_HANDLER(s3_foremix_w); |
| 84 | | DECLARE_READ16_HANDLER(s3_pixel_xfer_r); |
| 85 | | DECLARE_WRITE16_HANDLER(s3_pixel_xfer_w); |
| 86 | | DECLARE_READ8_HANDLER(s3_mem_r); |
| 87 | | DECLARE_WRITE8_HANDLER(s3_mem_w); |
| 44 | void vga_vh_text(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 45 | void vga_vh_ega(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 46 | void vga_vh_vga(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 47 | void vga_vh_cga(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 48 | void vga_vh_mono(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 49 | virtual UINT8 pc_vga_choosevideomode(); |
| 50 | void recompute_params_clock(int divisor, int xtal); |
| 51 | UINT8 crtc_reg_read(UINT8 index); |
| 52 | void recompute_params(); |
| 53 | void crtc_reg_write(UINT8 index, UINT8 data); |
| 54 | void seq_reg_write(UINT8 index, UINT8 data); |
| 55 | UINT8 vga_vblank(); |
| 56 | READ8_MEMBER(vga_crtc_r); |
| 57 | WRITE8_MEMBER(vga_crtc_w); |
| 58 | UINT8 gc_reg_read(UINT8 index); |
| 59 | void attribute_reg_write(UINT8 index, UINT8 data); |
| 60 | void gc_reg_write(UINT8 index,UINT8 data); |
| 61 | private: |
| 62 | inline UINT8 rotate_right(UINT8 val); |
| 63 | inline UINT8 vga_logical_op(UINT8 data, UINT8 plane, UINT8 mask); |
| 64 | inline UINT8 vga_latch_write(int offs, UINT8 data); |
| 65 | }; |
| 88 | 66 | |
| 89 | | DECLARE_READ8_HANDLER( ati_port_03c0_r ); |
| 90 | | DECLARE_READ8_DEVICE_HANDLER(ati_port_ext_r); |
| 91 | | DECLARE_WRITE8_DEVICE_HANDLER(ati_port_ext_w); |
| 92 | | DECLARE_READ16_HANDLER(ibm8514_gpstatus_r); |
| 93 | | DECLARE_WRITE16_HANDLER(ibm8514_cmd_w); |
| 94 | | DECLARE_READ16_HANDLER(mach8_ext_fifo_r); |
| 95 | | DECLARE_WRITE16_HANDLER(mach8_linedraw_index_w); |
| 96 | | DECLARE_READ16_HANDLER(mach8_bresenham_count_r); |
| 97 | | DECLARE_WRITE16_HANDLER(mach8_bresenham_count_w); |
| 98 | | DECLARE_READ16_HANDLER(mach8_scratch0_r); |
| 99 | | DECLARE_WRITE16_HANDLER(mach8_scratch0_w); |
| 100 | | DECLARE_READ16_HANDLER(mach8_scratch1_r); |
| 101 | | DECLARE_WRITE16_HANDLER(mach8_scratch1_w); |
| 102 | | DECLARE_READ16_HANDLER(mach8_config1_r); |
| 103 | | DECLARE_READ16_HANDLER(mach8_config2_r); |
| 104 | | DECLARE_READ16_HANDLER(ibm8514_status_r); |
| 105 | | DECLARE_READ16_HANDLER(ibm8514_substatus_r); |
| 106 | | DECLARE_WRITE16_HANDLER(ibm8514_subcontrol_w); |
| 107 | | DECLARE_READ16_HANDLER(ibm8514_subcontrol_r); |
| 108 | | DECLARE_READ16_HANDLER(ibm8514_htotal_r); |
| 109 | | DECLARE_WRITE16_HANDLER(ibm8514_htotal_w); |
| 110 | | DECLARE_READ16_HANDLER(ibm8514_vtotal_r); |
| 111 | | DECLARE_WRITE16_HANDLER(ibm8514_vtotal_w); |
| 112 | | DECLARE_READ16_HANDLER(ibm8514_vdisp_r); |
| 113 | | DECLARE_WRITE16_HANDLER(ibm8514_vdisp_w); |
| 114 | | DECLARE_READ16_HANDLER(ibm8514_vsync_r); |
| 115 | | DECLARE_WRITE16_HANDLER(ibm8514_vsync_w); |
| 116 | | DECLARE_WRITE16_HANDLER(mach8_linedraw_w); |
| 117 | | DECLARE_READ16_HANDLER(mach8_ec0_r); |
| 118 | | DECLARE_WRITE16_HANDLER(mach8_ec0_w); |
| 119 | | DECLARE_READ16_HANDLER(mach8_ec1_r); |
| 120 | | DECLARE_WRITE16_HANDLER(mach8_ec1_w); |
| 121 | | DECLARE_READ16_HANDLER(mach8_ec2_r); |
| 122 | | DECLARE_WRITE16_HANDLER(mach8_ec2_w); |
| 123 | | DECLARE_READ16_HANDLER(mach8_ec3_r); |
| 124 | | DECLARE_WRITE16_HANDLER(mach8_ec3_w); |
| 125 | | DECLARE_READ8_HANDLER(ati_mem_r); |
| 126 | | DECLARE_WRITE8_HANDLER(ati_mem_w); |
| 127 | 67 | |
| 128 | | DECLARE_READ8_HANDLER(cirrus_03c0_r); |
| 129 | | DECLARE_WRITE8_HANDLER(cirrus_03c0_w); |
| 68 | // device type definition |
| 69 | extern const device_type VGA; |
| 130 | 70 | |
| 131 | | DECLARE_READ8_HANDLER(vga_gamtor_mem_r); |
| 132 | | DECLARE_WRITE8_HANDLER(vga_gamtor_mem_w); |
| 133 | | DECLARE_READ8_HANDLER(vga_port_gamtor_03b0_r); |
| 134 | | DECLARE_WRITE8_HANDLER(vga_port_gamtor_03b0_w); |
| 135 | | DECLARE_READ8_HANDLER(vga_port_gamtor_03c0_r); |
| 136 | | DECLARE_WRITE8_HANDLER(vga_port_gamtor_03c0_w); |
| 137 | | DECLARE_READ8_HANDLER(vga_port_gamtor_03d0_r); |
| 138 | | DECLARE_WRITE8_HANDLER(vga_port_gamtor_03d0_w); |
| 71 | // ======================> svga_device |
| 72 | |
| 73 | class svga_device : public vga_device |
| 74 | { |
| 75 | public: |
| 76 | // construction/destruction |
| 77 | svga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock); |
| 78 | |
| 79 | virtual UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 80 | protected: |
| 81 | void svga_vh_rgb8(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 82 | void svga_vh_rgb15(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 83 | void svga_vh_rgb16(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 84 | void svga_vh_rgb24(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 85 | void svga_vh_rgb32(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 86 | virtual UINT8 pc_vga_choosevideomode(); |
| 87 | private: |
| 88 | }; |
| 89 | |
| 90 | // ======================> tseng_vga_device |
| 91 | |
| 92 | class tseng_vga_device : public svga_device |
| 93 | { |
| 94 | public: |
| 95 | // construction/destruction |
| 96 | tseng_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 97 | |
| 98 | virtual READ8_MEMBER(port_03b0_r); |
| 99 | virtual WRITE8_MEMBER(port_03b0_w); |
| 100 | virtual READ8_MEMBER(port_03c0_r); |
| 101 | virtual WRITE8_MEMBER(port_03c0_w); |
| 102 | virtual READ8_MEMBER(port_03d0_r); |
| 103 | virtual WRITE8_MEMBER(port_03d0_w); |
| 104 | virtual READ8_MEMBER(mem_r); |
| 105 | virtual WRITE8_MEMBER(mem_w); |
| 106 | |
| 107 | protected: |
| 108 | |
| 109 | private: |
| 110 | void tseng_define_video_mode(); |
| 111 | UINT8 tseng_crtc_reg_read(UINT8 index); |
| 112 | void tseng_crtc_reg_write(UINT8 index, UINT8 data); |
| 113 | UINT8 tseng_seq_reg_read(UINT8 index); |
| 114 | void tseng_seq_reg_write(UINT8 index, UINT8 data); |
| 115 | |
| 116 | }; |
| 117 | |
| 118 | |
| 119 | // device type definition |
| 120 | extern const device_type TSENG_VGA; |
| 121 | |
| 122 | // ======================> trident_vga_device |
| 123 | |
| 124 | class trident_vga_device : public svga_device |
| 125 | { |
| 126 | public: |
| 127 | // construction/destruction |
| 128 | trident_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 129 | |
| 130 | virtual READ8_MEMBER(port_03c0_r); |
| 131 | virtual WRITE8_MEMBER(port_03c0_w); |
| 132 | virtual READ8_MEMBER(port_03d0_r); |
| 133 | virtual WRITE8_MEMBER(port_03d0_w); |
| 134 | virtual READ8_MEMBER(mem_r); |
| 135 | virtual WRITE8_MEMBER(mem_w); |
| 136 | |
| 137 | protected: |
| 138 | |
| 139 | private: |
| 140 | UINT8 trident_seq_reg_read(UINT8 index); |
| 141 | void trident_seq_reg_write(UINT8 index, UINT8 data); |
| 142 | |
| 143 | }; |
| 144 | |
| 145 | |
| 146 | // device type definition |
| 147 | extern const device_type TRIDENT_VGA; |
| 148 | |
| 149 | |
| 150 | // ======================> s3_vga_device |
| 151 | |
| 152 | class s3_vga_device : public svga_device |
| 153 | { |
| 154 | public: |
| 155 | // construction/destruction |
| 156 | s3_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 157 | s3_vga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock); |
| 158 | |
| 159 | virtual READ8_MEMBER(port_03b0_r); |
| 160 | virtual WRITE8_MEMBER(port_03b0_w); |
| 161 | virtual READ8_MEMBER(port_03c0_r); |
| 162 | virtual WRITE8_MEMBER(port_03c0_w); |
| 163 | virtual READ8_MEMBER(port_03d0_r); |
| 164 | virtual WRITE8_MEMBER(port_03d0_w); |
| 165 | virtual READ8_MEMBER(mem_r); |
| 166 | virtual WRITE8_MEMBER(mem_w); |
| 167 | |
| 168 | virtual UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 169 | |
| 170 | READ16_MEMBER(s3_line_error_r); |
| 171 | WRITE16_MEMBER(s3_line_error_w); |
| 172 | READ16_MEMBER(ibm8514_gpstatus_r); |
| 173 | READ16_MEMBER(s3_gpstatus_r); |
| 174 | WRITE16_MEMBER(ibm8514_cmd_w); |
| 175 | WRITE16_MEMBER(s3_cmd_w); |
| 176 | READ16_MEMBER(ibm8514_desty_r); |
| 177 | WRITE16_MEMBER(ibm8514_desty_w); |
| 178 | READ16_MEMBER(ibm8514_destx_r); |
| 179 | WRITE16_MEMBER(ibm8514_destx_w); |
| 180 | READ16_MEMBER(ibm8514_ssv_r); |
| 181 | WRITE16_MEMBER(ibm8514_ssv_w); |
| 182 | READ16_MEMBER(s3_width_r); |
| 183 | WRITE16_MEMBER(s3_width_w); |
| 184 | READ16_MEMBER(ibm8514_currentx_r); |
| 185 | WRITE16_MEMBER(ibm8514_currentx_w); |
| 186 | READ16_MEMBER(ibm8514_currenty_r); |
| 187 | WRITE16_MEMBER(ibm8514_currenty_w); |
| 188 | READ16_MEMBER(s3_fgcolour_r); |
| 189 | WRITE16_MEMBER(s3_fgcolour_w); |
| 190 | READ16_MEMBER(s3_bgcolour_r); |
| 191 | WRITE16_MEMBER(s3_bgcolour_w); |
| 192 | READ16_MEMBER(s3_multifunc_r); |
| 193 | WRITE16_MEMBER(s3_multifunc_w); |
| 194 | READ16_MEMBER(s3_backmix_r); |
| 195 | WRITE16_MEMBER(s3_backmix_w); |
| 196 | READ16_MEMBER(s3_foremix_r); |
| 197 | WRITE16_MEMBER(s3_foremix_w); |
| 198 | READ16_MEMBER(s3_pixel_xfer_r); |
| 199 | WRITE16_MEMBER(s3_pixel_xfer_w); |
| 200 | |
| 201 | protected: |
| 202 | // device-level overrides |
| 203 | virtual void device_start(); |
| 204 | |
| 205 | private: |
| 206 | UINT8 s3_crtc_reg_read(UINT8 index); |
| 207 | void s3_define_video_mode(void); |
| 208 | void s3_crtc_reg_write(UINT8 index, UINT8 data); |
| 209 | void s3_write_fg(UINT32 offset); |
| 210 | void s3_write_bg(UINT32 offset); |
| 211 | void s3_write(UINT32 offset, UINT32 src); |
| 212 | void ibm8514_draw_vector(UINT8 len, UINT8 dir, bool draw); |
| 213 | void ibm8514_wait_draw_ssv(); |
| 214 | void ibm8514_draw_ssv(UINT8 data); |
| 215 | void ibm8514_wait_draw_vector(); |
| 216 | void s3_wait_draw(); |
| 217 | }; |
| 218 | |
| 219 | |
| 220 | // device type definition |
| 221 | extern const device_type S3_VGA; |
| 222 | |
| 223 | |
| 224 | // ======================> gamtor_vga_device |
| 225 | |
| 226 | class gamtor_vga_device : public svga_device |
| 227 | { |
| 228 | public: |
| 229 | // construction/destruction |
| 230 | gamtor_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 231 | |
| 232 | |
| 233 | virtual READ8_MEMBER(port_03b0_r); |
| 234 | virtual WRITE8_MEMBER(port_03b0_w); |
| 235 | virtual READ8_MEMBER(port_03c0_r); |
| 236 | virtual WRITE8_MEMBER(port_03c0_w); |
| 237 | virtual READ8_MEMBER(port_03d0_r); |
| 238 | virtual WRITE8_MEMBER(port_03d0_w); |
| 239 | virtual READ8_MEMBER(mem_r); |
| 240 | virtual WRITE8_MEMBER(mem_w); |
| 241 | |
| 242 | protected: |
| 243 | private: |
| 244 | }; |
| 245 | |
| 246 | |
| 247 | // device type definition |
| 248 | extern const device_type GAMTOR_VGA; |
| 249 | |
| 250 | // ======================> ati_vga_device |
| 251 | |
| 252 | class ati_vga_device : public s3_vga_device |
| 253 | { |
| 254 | public: |
| 255 | // construction/destruction |
| 256 | ati_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 257 | |
| 258 | virtual READ8_MEMBER(mem_r); |
| 259 | virtual WRITE8_MEMBER(mem_w); |
| 260 | virtual READ8_MEMBER(port_03c0_r); |
| 261 | READ8_MEMBER(ati_port_ext_r); |
| 262 | WRITE8_MEMBER(ati_port_ext_w); |
| 263 | READ16_MEMBER(ibm8514_status_r); |
| 264 | WRITE16_MEMBER(ibm8514_htotal_w); |
| 265 | READ16_MEMBER(ibm8514_substatus_r); |
| 266 | WRITE16_MEMBER(ibm8514_subcontrol_w); |
| 267 | READ16_MEMBER(ibm8514_subcontrol_r); |
| 268 | READ16_MEMBER(ibm8514_htotal_r); |
| 269 | READ16_MEMBER(ibm8514_vtotal_r); |
| 270 | WRITE16_MEMBER(ibm8514_vtotal_w); |
| 271 | READ16_MEMBER(ibm8514_vdisp_r); |
| 272 | WRITE16_MEMBER(ibm8514_vdisp_w); |
| 273 | READ16_MEMBER(ibm8514_vsync_r); |
| 274 | WRITE16_MEMBER(ibm8514_vsync_w); |
| 275 | READ16_MEMBER(mach8_ec0_r); |
| 276 | WRITE16_MEMBER(mach8_ec0_w); |
| 277 | READ16_MEMBER(mach8_ec1_r); |
| 278 | WRITE16_MEMBER(mach8_ec1_w); |
| 279 | READ16_MEMBER(mach8_ec2_r); |
| 280 | WRITE16_MEMBER(mach8_ec2_w); |
| 281 | READ16_MEMBER(mach8_ec3_r); |
| 282 | WRITE16_MEMBER(mach8_ec3_w); |
| 283 | READ16_MEMBER(mach8_ext_fifo_r); |
| 284 | WRITE16_MEMBER(mach8_linedraw_index_w); |
| 285 | READ16_MEMBER(mach8_bresenham_count_r); |
| 286 | WRITE16_MEMBER(mach8_bresenham_count_w); |
| 287 | WRITE16_MEMBER(mach8_linedraw_w); |
| 288 | READ16_MEMBER(mach8_scratch0_r); |
| 289 | WRITE16_MEMBER(mach8_scratch0_w); |
| 290 | READ16_MEMBER(mach8_scratch1_r); |
| 291 | WRITE16_MEMBER(mach8_scratch1_w); |
| 292 | READ16_MEMBER(mach8_config1_r); |
| 293 | READ16_MEMBER(mach8_config2_r); |
| 294 | protected: |
| 295 | virtual machine_config_constructor device_mconfig_additions() const; |
| 296 | private: |
| 297 | void ati_define_video_mode(); |
| 298 | |
| 299 | }; |
| 300 | |
| 301 | |
| 302 | // device type definition |
| 303 | extern const device_type ATI_VGA; |
| 304 | |
| 305 | // ======================> cirrus_vga_device |
| 306 | |
| 307 | class cirrus_vga_device : public svga_device |
| 308 | { |
| 309 | public: |
| 310 | // construction/destruction |
| 311 | cirrus_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 312 | |
| 313 | virtual READ8_MEMBER(port_03c0_r); |
| 314 | virtual WRITE8_MEMBER(port_03c0_w); |
| 315 | protected: |
| 316 | // device-level overrides |
| 317 | virtual void device_start(); |
| 318 | private: |
| 319 | void cirrus_define_video_mode(); |
| 320 | UINT8 cirrus_seq_reg_read(UINT8 index); |
| 321 | void cirrus_seq_reg_write(UINT8 index, UINT8 data); |
| 322 | }; |
| 323 | |
| 324 | // device type definition |
| 325 | extern const device_type CIRRUS_VGA; |
| 139 | 326 | /* |
| 140 | 327 | pega notes (paradise) |
| 141 | 328 | build in amstrad pc1640 |
trunk/src/mess/video/isa_vga_ati.c
| r18228 | r18229 | |
| 23 | 23 | |
| 24 | 24 | const device_type ISA16_VGA_GFXULTRA = &device_creator<isa16_vga_gfxultra_device>; |
| 25 | 25 | |
| 26 | static MACHINE_CONFIG_FRAGMENT( vga_ati ) |
| 27 | MCFG_SCREEN_ADD("screen", RASTER) |
| 28 | MCFG_SCREEN_RAW_PARAMS(XTAL_25_1748MHz,900,0,640,526,0,480) |
| 29 | MCFG_SCREEN_UPDATE_DEVICE("vga", ati_vga_device, screen_update) |
| 26 | 30 | |
| 31 | MCFG_PALETTE_LENGTH(0x100) |
| 32 | |
| 33 | MCFG_DEVICE_ADD("vga", ATI_VGA, 0) |
| 34 | MACHINE_CONFIG_END |
| 35 | |
| 27 | 36 | //------------------------------------------------- |
| 28 | 37 | // machine_config_additions - device-specific |
| 29 | 38 | // machine configurations |
| r18228 | r18229 | |
| 31 | 40 | |
| 32 | 41 | machine_config_constructor isa16_vga_gfxultra_device::device_mconfig_additions() const |
| 33 | 42 | { |
| 34 | | return MACHINE_CONFIG_NAME( pcvideo_ati_isa ); |
| 43 | return MACHINE_CONFIG_NAME( vga_ati ); |
| 35 | 44 | } |
| 36 | 45 | |
| 37 | 46 | //------------------------------------------------- |
| r18228 | r18229 | |
| 67 | 76 | { |
| 68 | 77 | set_isa_device(); |
| 69 | 78 | |
| 70 | | video_start_vga( machine() ); |
| 71 | | |
| 72 | | pc_vga_init(machine(), read8_delegate(FUNC(isa16_vga_gfxultra_device::input_port_0_r),this)); |
| 73 | | |
| 74 | | int i; |
| 75 | | for (i = 0; i < 0x100; i++) |
| 76 | | palette_set_color_rgb(machine(), i, 0, 0, 0); |
| 77 | | pc_video_start(machine()); |
| 78 | | |
| 79 | m_vga = subdevice<ati_vga_device>("vga"); |
| 80 | |
| 79 | 81 | m_isa->install_rom(this, 0xc0000, 0xc7fff, 0, 0, "vga", "gfxultra"); |
| 80 | 82 | |
| 81 | | m_isa->install_device(this, 0x1ce, 0x1cf, 0, 0, FUNC(ati_port_ext_r), FUNC(ati_port_ext_w)); |
| 82 | | m_isa->install16_device(0x2e8, 0x2eb, 0, 0, FUNC(ibm8514_status_r), FUNC(ibm8514_htotal_w)); |
| 83 | | m_isa->install_device(0x3b0, 0x3bf, 0, 0, FUNC(vga_port_03b0_r), FUNC(vga_port_03b0_w)); |
| 84 | | m_isa->install_device(0x3c0, 0x3cf, 0, 0, FUNC(ati_port_03c0_r), FUNC(vga_port_03c0_w)); |
| 85 | | m_isa->install_device(0x3d0, 0x3df, 0, 0, FUNC(vga_port_03d0_r), FUNC(vga_port_03d0_w)); |
| 86 | | m_isa->install16_device(0x12e8, 0x12eb, 0, 0, FUNC(ibm8514_vtotal_r),FUNC(ibm8514_vtotal_w)); |
| 87 | | m_isa->install16_device(0x12ec, 0x12ef, 0, 0, FUNC(mach8_config1_r),NULL,NULL); |
| 88 | | m_isa->install16_device(0x16e8, 0x16eb, 0, 0, FUNC(ibm8514_vdisp_r),FUNC(ibm8514_vdisp_w)); |
| 89 | | m_isa->install16_device(0x16ec, 0x16ef, 0, 0, FUNC(mach8_config2_r),NULL,NULL); |
| 90 | | m_isa->install16_device(0x1ae8, 0x1aeb, 0, 0, FUNC(ibm8514_vsync_r),FUNC(ibm8514_vsync_w)); |
| 91 | | m_isa->install16_device(0x26e8, 0x26eb, 0, 0, FUNC(ibm8514_htotal_r),NULL,NULL); |
| 92 | | m_isa->install16_device(0x2ee8, 0x2eeb, 0, 0, FUNC(ibm8514_subcontrol_r),NULL,NULL); |
| 93 | | m_isa->install16_device(0x42e8, 0x42eb, 0, 0, FUNC(ibm8514_substatus_r), FUNC(ibm8514_subcontrol_w)); |
| 94 | | m_isa->install16_device(0x52e8, 0x52eb, 0, 0, FUNC(mach8_ec0_r), FUNC(mach8_ec0_w)); |
| 95 | | m_isa->install16_device(0x52ec, 0x52ef, 0, 0, FUNC(mach8_scratch0_r), FUNC(mach8_scratch0_w)); |
| 96 | | m_isa->install16_device(0x56e8, 0x56eb, 0, 0, FUNC(mach8_ec1_r), FUNC(mach8_ec1_w)); |
| 97 | | m_isa->install16_device(0x56ec, 0x56ef, 0, 0, FUNC(mach8_scratch0_r), FUNC(mach8_scratch0_w)); |
| 98 | | m_isa->install16_device(0x5ae8, 0x5aeb, 0, 0, FUNC(mach8_ec2_r), FUNC(mach8_ec2_w)); |
| 99 | | m_isa->install16_device(0x5ee8, 0x5eeb, 0, 0, FUNC(mach8_ec3_r), FUNC(mach8_ec3_w)); |
| 100 | | m_isa->install16_device(0x82e8, 0x82eb, 0, 0, FUNC(ibm8514_currenty_r), FUNC(ibm8514_currenty_w)); |
| 101 | | m_isa->install16_device(0x86e8, 0x86eb, 0, 0, FUNC(ibm8514_currentx_r), FUNC(ibm8514_currentx_w)); |
| 102 | | m_isa->install16_device(0x8ae8, 0x8aeb, 0, 0, FUNC(ibm8514_desty_r), FUNC(ibm8514_desty_w)); |
| 103 | | m_isa->install16_device(0x8ee8, 0x8eeb, 0, 0, FUNC(ibm8514_destx_r), FUNC(ibm8514_destx_w)); |
| 104 | | m_isa->install16_device(0x92e8, 0x92eb, 0, 0, FUNC(s3_line_error_r), FUNC(s3_line_error_w)); |
| 105 | | m_isa->install16_device(0x96e8, 0x96eb, 0, 0, FUNC(s3_width_r), FUNC(s3_width_w)); |
| 106 | | m_isa->install16_device(0x96ec, 0x96ef, 0, 0, FUNC(mach8_bresenham_count_r), FUNC(mach8_bresenham_count_w)); |
| 107 | | m_isa->install16_device(0x9ae8, 0x9aeb, 0, 0, FUNC(ibm8514_gpstatus_r), FUNC(ibm8514_cmd_w)); |
| 108 | | m_isa->install16_device(0x9aec, 0x9aef, 0, 0, FUNC(mach8_ext_fifo_r), FUNC(mach8_linedraw_index_w)); |
| 109 | | m_isa->install16_device(0x9ee8, 0x9eeb, 0, 0, FUNC(ibm8514_ssv_r), FUNC(ibm8514_ssv_w)); |
| 110 | | m_isa->install16_device(0xa2e8, 0xa2eb, 0, 0, FUNC(s3_bgcolour_r), FUNC(s3_bgcolour_w)); |
| 111 | | m_isa->install16_device(0xa6e8, 0xa6eb, 0, 0, FUNC(s3_fgcolour_r), FUNC(s3_fgcolour_w)); |
| 112 | | m_isa->install16_device(0xb6e8, 0xb6eb, 0, 0, FUNC(s3_backmix_r), FUNC(s3_backmix_w)); |
| 113 | | m_isa->install16_device(0xbae8, 0xbaeb, 0, 0, FUNC(s3_foremix_r), FUNC(s3_foremix_w)); |
| 114 | | m_isa->install16_device(0xbee8, 0xbeeb, 0, 0, FUNC(s3_multifunc_r), FUNC(s3_multifunc_w)); |
| 115 | | m_isa->install16_device(0xe2e8, 0xe2eb, 0, 0, FUNC(s3_pixel_xfer_r), FUNC(s3_pixel_xfer_w)); |
| 116 | | m_isa->install16_device(0xfeec, 0xfeef, 0, 0, NULL, NULL, FUNC(mach8_linedraw_w)); |
| 83 | m_isa->install_device(0x1ce, 0x1cf, 0, 0, read8_delegate(FUNC(ati_vga_device::ati_port_ext_r),m_vga), write8_delegate(FUNC(ati_vga_device::ati_port_ext_w),m_vga)); |
| 84 | m_isa->install16_device(0x2e8, 0x2eb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_status_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_htotal_w),m_vga)); |
| 85 | m_isa->install_device(0x3b0, 0x3bf, 0, 0, read8_delegate(FUNC(ati_vga_device::port_03b0_r),m_vga), write8_delegate(FUNC(vga_device::port_03b0_w),m_vga)); |
| 86 | m_isa->install_device(0x3c0, 0x3cf, 0, 0, read8_delegate(FUNC(ati_vga_device::port_03c0_r),m_vga), write8_delegate(FUNC(vga_device::port_03c0_w),m_vga)); |
| 87 | m_isa->install_device(0x3d0, 0x3df, 0, 0, read8_delegate(FUNC(ati_vga_device::port_03d0_r),m_vga), write8_delegate(FUNC(vga_device::port_03d0_w),m_vga)); |
| 88 | m_isa->install16_device(0x12e8, 0x12eb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_vtotal_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_vtotal_w),m_vga)); |
| 89 | m_isa->install16_device(0x12ec, 0x12ef, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_config1_r),m_vga), write16_delegate()); |
| 90 | m_isa->install16_device(0x16e8, 0x16eb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_vdisp_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_vdisp_w),m_vga)); |
| 91 | m_isa->install16_device(0x16ec, 0x16ef, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_config2_r),m_vga), write16_delegate()); |
| 92 | m_isa->install16_device(0x1ae8, 0x1aeb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_vsync_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_vsync_w),m_vga)); |
| 93 | m_isa->install16_device(0x26e8, 0x26eb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_htotal_r),m_vga),write16_delegate()); |
| 94 | m_isa->install16_device(0x2ee8, 0x2eeb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_subcontrol_r),m_vga),write16_delegate()); |
| 95 | m_isa->install16_device(0x42e8, 0x42eb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_substatus_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_subcontrol_w),m_vga)); |
| 96 | m_isa->install16_device(0x52e8, 0x52eb, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_ec0_r),m_vga), write16_delegate(FUNC(ati_vga_device::mach8_ec0_w),m_vga)); |
| 97 | m_isa->install16_device(0x52ec, 0x52ef, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_scratch0_r),m_vga), write16_delegate(FUNC(ati_vga_device::mach8_scratch0_w),m_vga)); |
| 98 | m_isa->install16_device(0x56e8, 0x56eb, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_ec1_r),m_vga), write16_delegate(FUNC(ati_vga_device::mach8_ec1_w),m_vga)); |
| 99 | m_isa->install16_device(0x56ec, 0x56ef, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_scratch0_r),m_vga), write16_delegate(FUNC(ati_vga_device::mach8_scratch0_w),m_vga)); |
| 100 | m_isa->install16_device(0x5ae8, 0x5aeb, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_ec2_r),m_vga), write16_delegate(FUNC(ati_vga_device::mach8_ec2_w),m_vga)); |
| 101 | m_isa->install16_device(0x5ee8, 0x5eeb, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_ec3_r),m_vga), write16_delegate(FUNC(ati_vga_device::mach8_ec3_w),m_vga)); |
| 102 | m_isa->install16_device(0x82e8, 0x82eb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_currenty_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_currenty_w),m_vga)); |
| 103 | m_isa->install16_device(0x86e8, 0x86eb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_currentx_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_currentx_w),m_vga)); |
| 104 | m_isa->install16_device(0x8ae8, 0x8aeb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_desty_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_desty_w),m_vga)); |
| 105 | m_isa->install16_device(0x8ee8, 0x8eeb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_destx_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_destx_w),m_vga)); |
| 106 | m_isa->install16_device(0x92e8, 0x92eb, 0, 0, read16_delegate(FUNC(ati_vga_device::s3_line_error_r),m_vga), write16_delegate(FUNC(ati_vga_device::s3_line_error_w),m_vga)); |
| 107 | m_isa->install16_device(0x96e8, 0x96eb, 0, 0, read16_delegate(FUNC(ati_vga_device::s3_width_r),m_vga), write16_delegate(FUNC(ati_vga_device::s3_width_w),m_vga)); |
| 108 | m_isa->install16_device(0x96ec, 0x96ef, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_bresenham_count_r),m_vga), write16_delegate(FUNC(ati_vga_device::mach8_bresenham_count_w),m_vga)); |
| 109 | m_isa->install16_device(0x9ae8, 0x9aeb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_gpstatus_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_cmd_w),m_vga)); |
| 110 | m_isa->install16_device(0x9aec, 0x9aef, 0, 0, read16_delegate(FUNC(ati_vga_device::mach8_ext_fifo_r),m_vga), write16_delegate(FUNC(ati_vga_device::mach8_linedraw_index_w),m_vga)); |
| 111 | m_isa->install16_device(0x9ee8, 0x9eeb, 0, 0, read16_delegate(FUNC(ati_vga_device::ibm8514_ssv_r),m_vga), write16_delegate(FUNC(ati_vga_device::ibm8514_ssv_w),m_vga)); |
| 112 | m_isa->install16_device(0xa2e8, 0xa2eb, 0, 0, read16_delegate(FUNC(ati_vga_device::s3_bgcolour_r),m_vga), write16_delegate(FUNC(ati_vga_device::s3_bgcolour_w),m_vga)); |
| 113 | m_isa->install16_device(0xa6e8, 0xa6eb, 0, 0, read16_delegate(FUNC(ati_vga_device::s3_fgcolour_r),m_vga), write16_delegate(FUNC(ati_vga_device::s3_fgcolour_w),m_vga)); |
| 114 | m_isa->install16_device(0xb6e8, 0xb6eb, 0, 0, read16_delegate(FUNC(ati_vga_device::s3_backmix_r),m_vga), write16_delegate(FUNC(ati_vga_device::s3_backmix_w),m_vga)); |
| 115 | m_isa->install16_device(0xbae8, 0xbaeb, 0, 0, read16_delegate(FUNC(ati_vga_device::s3_foremix_r),m_vga), write16_delegate(FUNC(ati_vga_device::s3_foremix_w),m_vga)); |
| 116 | m_isa->install16_device(0xbee8, 0xbeeb, 0, 0, read16_delegate(FUNC(ati_vga_device::s3_multifunc_r),m_vga), write16_delegate(FUNC(ati_vga_device::s3_multifunc_w),m_vga)); |
| 117 | m_isa->install16_device(0xe2e8, 0xe2eb, 0, 0, read16_delegate(FUNC(ati_vga_device::s3_pixel_xfer_r),m_vga), write16_delegate(FUNC(ati_vga_device::s3_pixel_xfer_w),m_vga)); |
| 118 | m_isa->install16_device(0xfeec, 0xfeef, 0, 0, read16_delegate(), write16_delegate(FUNC(ati_vga_device::mach8_linedraw_w),m_vga)); |
| 117 | 119 | |
| 118 | | m_isa->install_memory(0xa0000, 0xbffff, 0, 0, FUNC(ati_mem_r), FUNC(ati_mem_w)); |
| 120 | m_isa->install_memory(0xa0000, 0xbffff, 0, 0, read8_delegate(FUNC(ati_vga_device::mem_r),m_vga), write8_delegate(FUNC(ati_vga_device::mem_w),m_vga)); |
| 119 | 121 | } |
| 120 | 122 | |
| 121 | 123 | //------------------------------------------------- |
| r18228 | r18229 | |
| 124 | 126 | |
| 125 | 127 | void isa16_vga_gfxultra_device::device_reset() |
| 126 | 128 | { |
| 127 | | pc_vga_reset(machine()); |
| 128 | 129 | } |