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r18228 Monday 1st October, 2012 at 10:47:49 UTC by Robbbert
AFTOR - more wip
[src/mame/drivers]wico.c

trunk/src/mame/drivers/wico.c
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2121public:
2222   wico_state(const machine_config &mconfig, device_type type, const char *tag)
2323      : driver_device(mconfig, type, tag),
24   m_maincpu(*this, "maincpu"),
25   m_cpu2(*this, "maincpu"),
24   m_ccpu(*this, "ccpu"),
25   m_hcpu(*this, "hcpu"),
2626   m_shared_ram(*this, "sharedram"),
2727   m_samples(*this, "samples")
2828   { }
2929
3030   DECLARE_WRITE8_MEMBER(zcres_w);
31   DECLARE_WRITE8_MEMBER(wdogcl_w);
32   DECLARE_READ8_MEMBER(gentmrcl_r);
3133   TIMER_DEVICE_CALLBACK_MEMBER(irq_housekeeping);
3234   TIMER_DEVICE_CALLBACK_MEMBER(firq_housekeeping);
3335protected:
3436
3537   // devices
36   required_device<cpu_device> m_maincpu;
37   required_device<cpu_device> m_cpu2;
38   required_device<cpu_device> m_ccpu;
39   required_device<cpu_device> m_hcpu;
3840   required_shared_ptr<UINT8> m_shared_ram;
3941   required_device<samples_device> m_samples;
4042
4143   // driver_device overrides
4244   virtual void machine_reset();
4345private:
44   UINT8 m_zcen;
45   UINT8 m_gten;
46   bool m_zcen;
47   bool m_gten;
4648   UINT8 m_firqtimer;
4749public:
4850   DECLARE_DRIVER_INIT(wico);
4951};
5052
5153// housekeeping cpu
52static ADDRESS_MAP_START( wico_map, AS_PROGRAM, 8, wico_state )
54static ADDRESS_MAP_START( hcpu_map, AS_PROGRAM, 8, wico_state )
5355   AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("sharedram")
54   AM_RANGE(0x1fe0, 0x1fe0) AM_NOP //AM_WRITE(muxld_w)
56   //AM_RANGE(0x1fe0, 0x1fe0) AM_NOP //AM_WRITE(muxld_w)
5557   //AM_RANGE(0x1fe1, 0x1fe1) AM_WRITE(store_w)
5658   //AM_RANGE(0x1fe2, 0x1fe2) AM_WRITE(muxen_w)
5759   //AM_RANGE(0x1fe3, 0x1fe3) AM_WRITE(csols_w)
58   //AM_RANGE(0x1fe4, 0x1fe4) AM_WRITE(msols_w)
59   //AM_RANGE(0x1fe5, 0x1fe5) AM_DEVWRITE("sn76494", sn76494_new_device, write)
60   AM_RANGE(0x1fe6, 0x1fe6) AM_NOP //WRITE(wdogcl_w)
60   //AM_RANGE(0x1fe4, 0x1fe4) AM_READWRITE(msols_r,msols_w)
61   AM_RANGE(0x1fe5, 0x1fe5) AM_DEVWRITE("sn76494", sn76494_new_device, write)
62   AM_RANGE(0x1fe6, 0x1fe6) AM_WRITE(wdogcl_w)
6163   AM_RANGE(0x1fe7, 0x1fe7) AM_WRITE(zcres_w)
6264   //AM_RANGE(0x1fe8, 0x1fe8) AM_WRITE(dled0_w)
6365   //AM_RANGE(0x1fe9, 0x1fe9) AM_WRITE(dled1_w)
64   //AM_RANGE(0x1fea, 0x1fea) AM_WRITE(gentmrcl_w)
66   AM_RANGE(0x1fea, 0x1fea) AM_READ(gentmrcl_r)
6567   //AM_RANGE(0x1feb, 0x1feb) AM_READ(lampst_r)
6668   //AM_RANGE(0x1fec, 0x1fec) AM_READ(sast_r)
6769   //AM_RANGE(0x1fed, 0x1fed) AM_READ(solst1_r)
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7173ADDRESS_MAP_END
7274
7375// command cpu
74static ADDRESS_MAP_START( wico_sub_map, AS_PROGRAM, 8, wico_state )
76static ADDRESS_MAP_START( ccpu_map, AS_PROGRAM, 8, wico_state )
7577   AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("sharedram") // 2128  2k RAM
7678   //AM_RANGE(0x1fe0, 0x1fe0) AM_WRITE(muxld_w) // to display module
7779   //AM_RANGE(0x1fe1, 0x1fe1) AM_WRITE(store_w) // enable save to nvram
7880   //AM_RANGE(0x1fe2, 0x1fe2) AM_WRITE(muxen_w) // digit to display on diagnostic LED; d0=L will disable main displays
7981   //AM_RANGE(0x1fe3, 0x1fe3) AM_WRITE(csols_w) // solenoid column
8082   //AM_RANGE(0x1fe4, 0x1fe4) AM_WRITE(msols_w) // solenoid row
81   //AM_RANGE(0x1fe5, 0x1fe5) AM_DEVWRITE("sn76494", sn76494_new_device, write)
82   //AM_RANGE(0x1fe6, 0x1fe6) AM_WRITE(wdogcl_w) // watchdog clear
83   AM_RANGE(0x1fe7, 0x1fe7) AM_WRITE(zcres_w) // enable IRQ on maincpu
83   AM_RANGE(0x1fe5, 0x1fe5) AM_DEVWRITE("sn76494", sn76494_new_device, write)
84   AM_RANGE(0x1fe6, 0x1fe6) AM_WRITE(wdogcl_w) // watchdog clear
85   AM_RANGE(0x1fe7, 0x1fe7) AM_WRITE(zcres_w) // enable IRQ on hcpu
8486   //AM_RANGE(0x1fe8, 0x1fe8) AM_WRITE(dled0_w) // turn off diagnostic LED
85   //AM_RANGE(0x1fe9, 0x1fe9) AM_WRITE(dled1_w) // turn on diagnotic LED
86   //AM_RANGE(0x1fea, 0x1fea) AM_WRITE(gentmrcl_w) // enable IRQ on cpu2
87   //AM_RANGE(0x1fe9, 0x1fe9) AM_WRITE(dled1_w) // turn on diagnostic LED
88   AM_RANGE(0x1fea, 0x1fea) AM_READ(gentmrcl_r) // enable IRQ on ccpu
8789   //AM_RANGE(0x1feb, 0x1feb) AM_READ(lampst_r) // lamps?
8890   //AM_RANGE(0x1fec, 0x1fec) AM_READ(sast_r) // a pwron pulse to d0 L->H
8991   //AM_RANGE(0x1fed, 0x1fed) AM_READ(solst1_r) // switches
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9597ADDRESS_MAP_END
9698
9799static INPUT_PORTS_START( wico )
100   PORT_START("X0")
101   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_COIN1)
102   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_COIN2)
103   PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_START1)
104   PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Top Lane 4") PORT_CODE(KEYCODE_Q)
105   PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Top Lane 3") PORT_CODE(KEYCODE_W)
106   PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Top Lane 2") PORT_CODE(KEYCODE_E)
107   PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Top Lane 1") PORT_CODE(KEYCODE_R)
108   PORT_START("X1")
109   PORT_START("X2")
110   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Bumper BR") PORT_CODE(KEYCODE_Y)
111   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Bumper BL") PORT_CODE(KEYCODE_U)
112   PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Bumper TR") PORT_CODE(KEYCODE_I)
113   PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Bumper TL") PORT_CODE(KEYCODE_O)
114   PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Target BR") PORT_CODE(KEYCODE_OPENBRACE)
115   PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Target BL") PORT_CODE(KEYCODE_CLOSEBRACE)
116   PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Target TR") PORT_CODE(KEYCODE_BACKSLASH)
117   PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Target TL") PORT_CODE(KEYCODE_BACKSPACE)
118   PORT_START("X3")
119   PORT_START("X4")
120   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Oil Pit Release") PORT_CODE(KEYCODE_Z)
121   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Oil Pit Target") PORT_CODE(KEYCODE_C)
122   PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Waterhole Release") PORT_CODE(KEYCODE_V)
123   PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Outhole") PORT_CODE(KEYCODE_X)
124   PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Spinner") PORT_CODE(KEYCODE_B)
125   PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Rollunder") PORT_CODE(KEYCODE_N)
126   PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Spinner") PORT_CODE(KEYCODE_M)
127   PORT_START("X5")
128   PORT_START("X6")
129   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L SLingshot") PORT_CODE(KEYCODE_COMMA)
130   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Slingshot") PORT_CODE(KEYCODE_STOP)
131   PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Drop Bank E")
132   PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Drop Bank P")
133   PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Drop Bank A")
134   PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Drop Bank C")
135   PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Drop Bank S")
136   PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Drop Bank E")
137   PORT_START("X7")
138   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Target Zone E")
139   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Target Zone D")
140   PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Target Zone I")
141   PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Target Zone")
142   PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Target Zone T")
143   PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Target Zone S")
144   PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Target Zone A")
145   PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Target Zone F")
146   PORT_START("X8")
147   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Outlane Target")
148   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Outlane Target")
149   PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Rollover R Outlane")
150   PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Rollover M Outlane")
151   PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Rollover L Outlane")
152   PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Rollover R Outlane")
153   PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Rollover M Outlane")
154   PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("L Rollover L Outlane")
155   PORT_START("X9")
156   PORT_START("XA")
157   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Door Slam") PORT_CODE(KEYCODE_B)
158   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_TILT) PORT_NAME("Playfield Tilt")
159   PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Pendulum Tilt")
160   PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("R Flipper Lane Change")
161   PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Ball Feed Middle")
162   PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Ball Feed Lower")
163   PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("10 points") PORT_CODE(KEYCODE_COLON)
164   PORT_START("XB")
165   PORT_START("XC")
166   PORT_DIPNAME( 0x0f, 0x00, "Chute 1" )
167   PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
168   PORT_DIPSETTING(    0x01, DEF_STR( 1C_2C ) )
169   PORT_DIPSETTING(    0x02, DEF_STR( 1C_3C ) )
170   PORT_DIPSETTING(    0x03, DEF_STR( 1C_4C ) )
171   PORT_DIPSETTING(    0x04, DEF_STR( 1C_5C ) )
172   PORT_DIPSETTING(    0x05, DEF_STR( 1C_6C ) )
173   PORT_DIPSETTING(    0x06, DEF_STR( 1C_7C ) )
174   PORT_DIPSETTING(    0x07, "1 coin 10 credits" )
175   PORT_DIPSETTING(    0x08, "1 coin 14 credits" )
176   PORT_DIPSETTING(    0x09, DEF_STR( 2C_1C ) )
177   PORT_DIPSETTING(    0x0a, DEF_STR( 2C_5C ) )
178   PORT_DIPSETTING(    0x0b, DEF_STR( 2C_7C ) )
179   PORT_DIPSETTING(    0x0c, "2 coins 1 credit then 2 coins for 2 more credits" )
180   PORT_DIPSETTING(    0x0d, "1 coin 1 credit up to 3, then 4th coin gives 2 credits" )
181   PORT_DIPSETTING(    0x0e, "1 coin 1 credit, next coin gives 2 credits" )
182   PORT_DIPSETTING(    0x0f, "1st coin 1 credit, 2nd coin 2 more credits, 3rd coin 1 credit, 4th coin 3 more credits" )
183   PORT_DIPNAME( 0x10, 0x00, "Release Targets Spot Wico" )
184   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
185   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
186   PORT_DIPNAME( 0x20, 0x00, "Saving Top Lane Lights" )
187   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
188   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
189   PORT_DIPNAME( 0x40, 0x00, "Fast Ride Lights Extra Ball" )
190   PORT_DIPSETTING(    0x00, "2" )
191   PORT_DIPSETTING(    0x40, "3" )
192   PORT_DIPNAME( 0x80, 0x80, "Free Play" )
193   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
194   PORT_DIPSETTING(    0x80, DEF_STR( On ) )
195   PORT_START("XD")
196   PORT_DIPNAME( 0x0f, 0x00, "Chute 2" )
197   PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
198   PORT_DIPSETTING(    0x01, DEF_STR( 1C_2C ) )
199   PORT_DIPSETTING(    0x02, DEF_STR( 1C_3C ) )
200   PORT_DIPSETTING(    0x03, DEF_STR( 1C_4C ) )
201   PORT_DIPSETTING(    0x04, DEF_STR( 1C_5C ) )
202   PORT_DIPSETTING(    0x05, DEF_STR( 1C_6C ) )
203   PORT_DIPSETTING(    0x06, DEF_STR( 1C_7C ) )
204   PORT_DIPSETTING(    0x07, "1 coin 10 credits" )
205   PORT_DIPSETTING(    0x08, "1 coin 14 credits" )
206   PORT_DIPSETTING(    0x09, DEF_STR( 2C_1C ) )
207   PORT_DIPSETTING(    0x0a, DEF_STR( 2C_5C ) )
208   PORT_DIPSETTING(    0x0b, DEF_STR( 2C_7C ) )
209   PORT_DIPSETTING(    0x0c, "2 coins 1 credit then 2 coins for 2 more credits" )
210   PORT_DIPSETTING(    0x0d, "1 coin 1 credit up to 3, then 4th coin gives 2 credits" )
211   PORT_DIPSETTING(    0x0e, "1 coin 1 credit, next coin gives 2 credits" )
212   PORT_DIPSETTING(    0x0f, "1st coin 1 credit, 2nd coin 2 more credits, 3rd coin 1 credit, 4th coin 3 more credits" )
213   PORT_DIPNAME( 0x10, 0x00, "Drain eject hole on outhole" )
214   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
215   PORT_DIPSETTING(    0x20, DEF_STR( On ) )
216   PORT_DIPNAME( 0x20, 0x00, "2x multi during multiball" )
217   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
218   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
219   PORT_DIPNAME( 0xc0, 0x40, "Credits for new High score" )
220   PORT_DIPSETTING(    0x00, "3" )
221   PORT_DIPSETTING(    0x40, "2" )
222   PORT_DIPSETTING(    0x80, "1" )
223   PORT_DIPSETTING(    0xc0, "0" )
224   PORT_START("XE")
225   PORT_DIPNAME( 0x01, 0x00, "Reset left outlane gate" )
226   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
227   PORT_DIPSETTING(    0x20, DEF_STR( On ) )
228   PORT_DIPNAME( 0x06, 0x02, "Maximum credits" )
229   PORT_DIPSETTING(    0x00, "10" )
230   PORT_DIPSETTING(    0x02, "15" )
231   PORT_DIPSETTING(    0x04, "25" )
232   PORT_DIPSETTING(    0x06, "40" )
233   PORT_DIPNAME( 0x08, 0x00, "Extra ball allowed" )
234   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
235   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
236   PORT_DIPNAME( 0x10, 0x00, "Level pass payout" )
237   PORT_DIPSETTING(    0x00, "Free Game" )
238   PORT_DIPSETTING(    0x10, "Extra Ball" )
239   PORT_DIPNAME( 0x20, 0x20, "Capture ball in multiball" )
240   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
241   PORT_DIPSETTING(    0x20, DEF_STR( On ) )
242   PORT_DIPNAME( 0x40, 0x00, "Saves multi-lights" )
243   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
244   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
245   PORT_DIPNAME( 0x80, 0x80, "One extra ball per ball" )
246   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
247   PORT_DIPSETTING(    0x80, DEF_STR( On ) )
248   PORT_START("XF")
249   PORT_DIPNAME( 0x03, 0x00, "Special bonus" )
250   PORT_DIPSETTING(    0x00, "Free Game" )
251   PORT_DIPSETTING(    0x01, "Extra Ball" )
252   PORT_DIPSETTING(    0x02, "100k points" )
253   PORT_DIPSETTING(    0x03, "Nothing" )
254   PORT_DIPNAME( 0x04, 0x00, "Flip special lights" )
255   PORT_DIPSETTING(    0x00, "Alternate" )
256   PORT_DIPSETTING(    0x04, "Both on" )
257   PORT_DIPNAME( 0x18, 0x08, "Balls" )
258   PORT_DIPSETTING(    0x00, "2" )
259   PORT_DIPSETTING(    0x08, "3" )
260   PORT_DIPSETTING(    0x10, "4" )
261   PORT_DIPSETTING(    0x18, "5" )
262   PORT_DIPNAME( 0x20, 0x00, "Disable Credits display" )
263   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
264   PORT_DIPSETTING(    0x20, DEF_STR( On ) )
265   PORT_DIPNAME( 0x40, 0x00, "Disable Match display" )
266   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
267   PORT_DIPSETTING(    0x40, DEF_STR( On ) )
268   PORT_DIPNAME( 0x80, 0x00, "Self Test" )
269   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
270   PORT_DIPSETTING(    0x80, DEF_STR( On ) )
98271INPUT_PORTS_END
99272
100273void wico_state::machine_reset()
101274{
275   m_hcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
102276   m_zcen = 0;
103277   m_gten = 0;
278   m_firqtimer = 0;
104279}
105280
106281DRIVER_INIT_MEMBER(wico_state,wico)
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112287   m_zcen = 1;
113288}
114289
290READ8_MEMBER( wico_state::gentmrcl_r )
291{
292   m_gten = 1;
293   return 0xff;
294}
115295
296WRITE8_MEMBER( wico_state::wdogcl_w )
297{
298   m_hcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
299}
300
301
116302TIMER_DEVICE_CALLBACK_MEMBER( wico_state::irq_housekeeping )
117303{
118304   if (m_zcen)
119      generic_pulse_irq_line(m_maincpu, M6809_IRQ_LINE,1);
305      generic_pulse_irq_line(m_hcpu, M6809_IRQ_LINE,1);
120306}
121307
122308TIMER_DEVICE_CALLBACK_MEMBER( wico_state::firq_housekeeping )
123309{
124   if (!m_gten)
125      generic_pulse_irq_line(m_maincpu, M6809_FIRQ_LINE,1);
310   if (m_gten)
311      generic_pulse_irq_line(m_hcpu, M6809_FIRQ_LINE,1);
126312
127313   // Gen. timer irq of command CPU kicks in every 4 interrupts of this timer
128314   m_firqtimer++;
129   if (m_firqtimer > 3)
315   if (m_firqtimer > 3) // divided by 4 by U2 74LS393.
130316   {
131      generic_pulse_irq_line(m_cpu2, M6809_IRQ_LINE,1);
317      //m_cpu2->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
318      generic_pulse_irq_line(m_ccpu, M6809_IRQ_LINE,1);
132319      m_firqtimer = 0;
133320   }
134321}
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145332
146333static MACHINE_CONFIG_START( wico, wico_state )
147334   /* basic machine hardware */
148   MCFG_CPU_ADD("maincpu", M6809, 10000000 / 8)
149   MCFG_CPU_PROGRAM_MAP(wico_map)
335   MCFG_CPU_ADD("ccpu", M6809, 10000000 / 8)
336   MCFG_CPU_PROGRAM_MAP(ccpu_map)
337   MCFG_CPU_ADD("hcpu", M6809, 10000000 / 8)
338   MCFG_CPU_PROGRAM_MAP(hcpu_map)
150339   MCFG_TIMER_DRIVER_ADD_PERIODIC("irq", wico_state, irq_housekeeping, attotime::from_hz(120)) // zero crossing
151340   MCFG_TIMER_DRIVER_ADD_PERIODIC("firq", wico_state, firq_housekeeping, attotime::from_hz(750)) // time generator
152   MCFG_CPU_ADD("cpu2", M6809, 10000000 / 8)
153   MCFG_CPU_PROGRAM_MAP(wico_sub_map)
154341   MCFG_NVRAM_ADD_0FILL("nvram")
155342
156343   /* Video */
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158345
159346   /* Sound */
160347   MCFG_FRAGMENT_ADD( genpin_audio )
161   MCFG_SOUND_ADD("sn76494", SN76494, 10000000 / 8)
348   MCFG_SOUND_ADD("sn76494", SN76494_NEW, 10000000 / 64)
162349   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
163350   MCFG_SOUND_CONFIG(psg_intf)
164351MACHINE_CONFIG_END
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167354/ Af-Tor (1984)
168355/-------------------------------------------------------------------*/
169356ROM_START(aftor)
170   ROM_REGION(0x10000, "maincpu", 0)
357   ROM_REGION(0x10000, "hcpu", 0)
171358   ROM_LOAD("u25.bin", 0xf000, 0x1000, CRC(d66e95ff) SHA1(f7e8c51f1b37e7ef560406f1968c12a2043646c5))
172359
173   ROM_REGION(0x10000, "cpu2", 0)
360   ROM_REGION(0x10000, "ccpu", 0)
174361   ROM_LOAD("u52.bin", 0x8000, 0x2000, CRC(8035b446) SHA1(3ec59015e259c315bf09f4e2046f9d98e2d7a732))
175362   ROM_LOAD("u48.bin", 0xe000, 0x2000, CRC(b4406563) SHA1(6d1a9086eb1f6f947eae3a92ccf7a9b7375d85d3))
176363ROM_END

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