trunk/src/emu/video/pc_vga.h
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|---|
| 62 | 62 | inline UINT8 rotate_right(UINT8 val); |
| 63 | 63 | inline UINT8 vga_logical_op(UINT8 data, UINT8 plane, UINT8 mask); |
| 64 | 64 | inline UINT8 vga_latch_write(int offs, UINT8 data); |
| 65 | |
| 66 | protected: |
| 67 | struct |
| 68 | { |
| 69 | read8_delegate read_dipswitch; |
| 70 | struct |
| 71 | { |
| 72 | size_t vram_size; |
| 73 | int seq_regcount; |
| 74 | int crtc_regcount; |
| 75 | } svga_intf; |
| 76 | |
| 77 | UINT8 *memory; |
| 78 | UINT32 pens[16]; /* the current 16 pens */ |
| 79 | |
| 80 | UINT8 miscellaneous_output; |
| 81 | UINT8 feature_control; |
| 82 | |
| 83 | struct |
| 84 | { |
| 85 | UINT8 index; |
| 86 | UINT8 data[0x100]; |
| 87 | UINT8 map_mask; |
| 88 | struct |
| 89 | { |
| 90 | UINT8 A, B; |
| 91 | }char_sel; |
| 92 | } sequencer; |
| 93 | |
| 94 | /* An empty comment at the start of the line indicates that register is currently unused */ |
| 95 | struct |
| 96 | { |
| 97 | UINT8 index; |
| 98 | UINT8 data[0x100]; |
| 99 | UINT16 horz_total; |
| 100 | UINT16 horz_disp_end; |
| 101 | /**/ UINT8 horz_blank_start; |
| 102 | /**/ UINT8 horz_blank_end; |
| 103 | /**/ UINT8 horz_retrace_start; |
| 104 | /**/ UINT8 horz_retrace_skew; |
| 105 | /**/ UINT8 horz_retrace_end; |
| 106 | /**/ UINT8 disp_enable_skew; |
| 107 | /**/ UINT8 evra; |
| 108 | UINT16 vert_total; |
| 109 | UINT16 vert_disp_end; |
| 110 | /**/ UINT16 vert_retrace_start; |
| 111 | /**/ UINT8 vert_retrace_end; |
| 112 | /**/ UINT16 vert_blank_start; |
| 113 | UINT16 line_compare; |
| 114 | /**/ UINT32 cursor_addr; |
| 115 | /**/ UINT8 byte_panning; |
| 116 | /**/ UINT8 preset_row_scan; |
| 117 | UINT8 scan_doubling; |
| 118 | /**/ UINT8 maximum_scan_line; |
| 119 | /**/ UINT8 cursor_enable; |
| 120 | /**/ UINT8 cursor_scan_start; |
| 121 | /**/ UINT8 cursor_skew; |
| 122 | /**/ UINT8 cursor_scan_end; |
| 123 | UINT32 start_addr; |
| 124 | /**/ UINT8 protect_enable; |
| 125 | /**/ UINT8 bandwidth; |
| 126 | /**/ UINT8 offset; |
| 127 | /**/ UINT8 word_mode; |
| 128 | /**/ UINT8 dw; |
| 129 | /**/ UINT8 div4; |
| 130 | /**/ UINT8 underline_loc; |
| 131 | /**/ UINT8 vert_blank_end; |
| 132 | UINT8 sync_en; |
| 133 | /**/ UINT8 aw; |
| 134 | /**/ UINT8 div2; |
| 135 | /**/ UINT8 sldiv; |
| 136 | /**/ UINT8 map14; |
| 137 | /**/ UINT8 map13; |
| 138 | } crtc; |
| 139 | |
| 140 | struct |
| 141 | { |
| 142 | UINT8 index; |
| 143 | UINT8 latch[4]; |
| 144 | UINT8 set_reset; |
| 145 | UINT8 enable_set_reset; |
| 146 | UINT8 color_compare; |
| 147 | UINT8 logical_op; |
| 148 | UINT8 rotate_count; |
| 149 | UINT8 shift256; |
| 150 | UINT8 shift_reg; |
| 151 | UINT8 read_map_sel; |
| 152 | UINT8 read_mode; |
| 153 | UINT8 write_mode; |
| 154 | UINT8 color_dont_care; |
| 155 | UINT8 bit_mask; |
| 156 | UINT8 alpha_dis; |
| 157 | UINT8 memory_map_sel; |
| 158 | UINT8 host_oe; |
| 159 | UINT8 chain_oe; |
| 160 | } gc; |
| 161 | |
| 162 | struct |
| 163 | { |
| 164 | UINT8 index, data[0x15]; int state; |
| 165 | UINT8 prot_bit; |
| 166 | UINT8 pel_shift; |
| 167 | } attribute; |
| 168 | |
| 169 | |
| 170 | struct { |
| 171 | UINT8 read_index, write_index, mask; |
| 172 | int read; |
| 173 | int state; |
| 174 | struct { UINT8 red, green, blue; } color[0x100]; |
| 175 | int dirty; |
| 176 | } dac; |
| 177 | |
| 178 | struct { |
| 179 | UINT8 visible; |
| 180 | } cursor; |
| 181 | |
| 182 | /* oak vga */ |
| 183 | struct { UINT8 reg; } oak; |
| 184 | } vga; |
| 65 | 185 | }; |
| 66 | 186 | |
| 67 | 187 | |
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| 84 | 204 | void svga_vh_rgb24(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 85 | 205 | void svga_vh_rgb32(bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 86 | 206 | virtual UINT8 pc_vga_choosevideomode(); |
| 207 | struct |
| 208 | { |
| 209 | UINT8 bank_r,bank_w; |
| 210 | UINT8 rgb8_en; |
| 211 | UINT8 rgb15_en; |
| 212 | UINT8 rgb16_en; |
| 213 | UINT8 rgb24_en; |
| 214 | UINT8 rgb32_en; |
| 215 | UINT8 id; |
| 216 | }svga; |
| 87 | 217 | private: |
| 88 | 218 | }; |
| 89 | 219 | |
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| 113 | 243 | UINT8 tseng_seq_reg_read(UINT8 index); |
| 114 | 244 | void tseng_seq_reg_write(UINT8 index, UINT8 data); |
| 115 | 245 | |
| 246 | struct |
| 247 | { |
| 248 | UINT8 reg_3d8; |
| 249 | UINT8 dac_ctrl; |
| 250 | UINT8 dac_state; |
| 251 | UINT8 horz_overflow; |
| 252 | UINT8 aux_ctrl; |
| 253 | bool ext_reg_ena; |
| 254 | }et4k; |
| 255 | |
| 116 | 256 | }; |
| 117 | 257 | |
| 118 | 258 | |
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| 202 | 342 | // device-level overrides |
| 203 | 343 | virtual void device_start(); |
| 204 | 344 | |
| 345 | struct |
| 346 | { |
| 347 | UINT8 memory_config; |
| 348 | UINT8 ext_misc_ctrl_2; |
| 349 | UINT8 crt_reg_lock; |
| 350 | UINT8 reg_lock1; |
| 351 | UINT8 reg_lock2; |
| 352 | UINT8 enable_8514; |
| 353 | UINT8 cr53; |
| 354 | UINT16 current_cmd; |
| 355 | UINT16 src_x; |
| 356 | UINT16 src_y; |
| 357 | UINT16 rect_width; |
| 358 | UINT16 rect_height; |
| 359 | UINT32 fgcolour; |
| 360 | UINT32 bgcolour; |
| 361 | UINT16 fgmix; |
| 362 | UINT16 bgmix; |
| 363 | UINT32 pixel_xfer; |
| 364 | INT16 scissors_left; |
| 365 | INT16 scissors_right; |
| 366 | INT16 scissors_top; |
| 367 | INT16 scissors_bottom; |
| 368 | UINT16 pixel_control; |
| 369 | UINT8 bus_size; |
| 370 | UINT8 multifunc_sel; |
| 371 | UINT8 write_count; |
| 372 | |
| 373 | // data for memory-mapped I/O |
| 374 | UINT16 mmio_9ae8; |
| 375 | UINT16 mmio_bee8; |
| 376 | |
| 377 | // hardware graphics cursor |
| 378 | UINT8 cursor_mode; |
| 379 | UINT16 cursor_x; |
| 380 | UINT16 cursor_y; |
| 381 | UINT16 cursor_start_addr; |
| 382 | UINT8 cursor_pattern_x; // cursor pattern origin |
| 383 | UINT8 cursor_pattern_y; |
| 384 | UINT8 cursor_fg[4]; |
| 385 | UINT8 cursor_bg[4]; |
| 386 | UINT8 cursor_fg_ptr; |
| 387 | UINT8 cursor_bg_ptr; |
| 388 | UINT8 extended_dac_ctrl; |
| 389 | } s3; |
| 390 | struct |
| 391 | { |
| 392 | UINT16 htotal; // Horizontal total (9 bits) |
| 393 | UINT16 vtotal; // Vertical total adjust (3 bits), Vertical total base (9 bit) |
| 394 | UINT16 vdisp; |
| 395 | UINT16 vsync; |
| 396 | UINT16 subctrl; |
| 397 | UINT16 substatus; |
| 398 | UINT16 ssv; |
| 399 | UINT16 ec0; |
| 400 | UINT16 ec1; |
| 401 | UINT16 ec2; |
| 402 | UINT16 ec3; |
| 403 | bool gpbusy; |
| 404 | bool data_avail; |
| 405 | INT16 dest_x; |
| 406 | INT16 dest_y; |
| 407 | INT16 curr_x; |
| 408 | INT16 curr_y; |
| 409 | INT16 prev_x; |
| 410 | INT16 prev_y; |
| 411 | INT16 line_axial_step; |
| 412 | INT16 line_diagonal_step; |
| 413 | INT16 line_errorterm; |
| 414 | int state; |
| 415 | |
| 416 | UINT8 wait_vector_len; |
| 417 | UINT8 wait_vector_dir; |
| 418 | bool wait_vector_draw; |
| 419 | UINT8 wait_vector_count; |
| 420 | |
| 421 | } ibm8514; |
| 205 | 422 | private: |
| 206 | 423 | UINT8 s3_crtc_reg_read(UINT8 index); |
| 207 | 424 | void s3_define_video_mode(void); |
| r18229 | r18230 | |
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| 295 | 512 | virtual machine_config_constructor device_mconfig_additions() const; |
| 296 | 513 | private: |
| 297 | 514 | void ati_define_video_mode(); |
| 298 | | |
| 515 | struct |
| 516 | { |
| 517 | UINT8 ext_reg[64]; |
| 518 | UINT8 ext_reg_select; |
| 519 | UINT16 scratch0; |
| 520 | UINT16 scratch1; |
| 521 | UINT16 linedraw; |
| 522 | } ati; |
| 299 | 523 | }; |
| 300 | 524 | |
| 301 | 525 | |
trunk/src/emu/video/pc_vga.c
| r18229 | r18230 | |
|---|
| 52 | 52 | |
| 53 | 53 | ***************************************************************************/ |
| 54 | 54 | |
| 55 | | static struct |
| 56 | | { |
| 57 | | read8_delegate read_dipswitch; |
| 58 | | struct |
| 59 | | { |
| 60 | | size_t vram_size; |
| 61 | | int seq_regcount; |
| 62 | | int crtc_regcount; |
| 63 | | } svga_intf; |
| 64 | | |
| 65 | | UINT8 *memory; |
| 66 | | UINT32 pens[16]; /* the current 16 pens */ |
| 67 | | |
| 68 | | UINT8 miscellaneous_output; |
| 69 | | UINT8 feature_control; |
| 70 | | |
| 71 | | struct |
| 72 | | { |
| 73 | | UINT8 index; |
| 74 | | UINT8 data[0x100]; |
| 75 | | UINT8 map_mask; |
| 76 | | struct |
| 77 | | { |
| 78 | | UINT8 A, B; |
| 79 | | }char_sel; |
| 80 | | } sequencer; |
| 81 | | |
| 82 | | /* An empty comment at the start of the line indicates that register is currently unused */ |
| 83 | | struct |
| 84 | | { |
| 85 | | UINT8 index; |
| 86 | | UINT8 data[0x100]; |
| 87 | | UINT16 horz_total; |
| 88 | | UINT16 horz_disp_end; |
| 89 | | /**/ UINT8 horz_blank_start; |
| 90 | | /**/ UINT8 horz_blank_end; |
| 91 | | /**/ UINT8 horz_retrace_start; |
| 92 | | /**/ UINT8 horz_retrace_skew; |
| 93 | | /**/ UINT8 horz_retrace_end; |
| 94 | | /**/ UINT8 disp_enable_skew; |
| 95 | | /**/ UINT8 evra; |
| 96 | | UINT16 vert_total; |
| 97 | | UINT16 vert_disp_end; |
| 98 | | /**/ UINT16 vert_retrace_start; |
| 99 | | /**/ UINT8 vert_retrace_end; |
| 100 | | /**/ UINT16 vert_blank_start; |
| 101 | | UINT16 line_compare; |
| 102 | | /**/ UINT32 cursor_addr; |
| 103 | | /**/ UINT8 byte_panning; |
| 104 | | /**/ UINT8 preset_row_scan; |
| 105 | | UINT8 scan_doubling; |
| 106 | | /**/ UINT8 maximum_scan_line; |
| 107 | | /**/ UINT8 cursor_enable; |
| 108 | | /**/ UINT8 cursor_scan_start; |
| 109 | | /**/ UINT8 cursor_skew; |
| 110 | | /**/ UINT8 cursor_scan_end; |
| 111 | | UINT32 start_addr; |
| 112 | | /**/ UINT8 protect_enable; |
| 113 | | /**/ UINT8 bandwidth; |
| 114 | | /**/ UINT8 offset; |
| 115 | | /**/ UINT8 word_mode; |
| 116 | | /**/ UINT8 dw; |
| 117 | | /**/ UINT8 div4; |
| 118 | | /**/ UINT8 underline_loc; |
| 119 | | /**/ UINT8 vert_blank_end; |
| 120 | | UINT8 sync_en; |
| 121 | | /**/ UINT8 aw; |
| 122 | | /**/ UINT8 div2; |
| 123 | | /**/ UINT8 sldiv; |
| 124 | | /**/ UINT8 map14; |
| 125 | | /**/ UINT8 map13; |
| 126 | | } crtc; |
| 127 | | |
| 128 | | struct |
| 129 | | { |
| 130 | | UINT8 index; |
| 131 | | UINT8 latch[4]; |
| 132 | | UINT8 set_reset; |
| 133 | | UINT8 enable_set_reset; |
| 134 | | UINT8 color_compare; |
| 135 | | UINT8 logical_op; |
| 136 | | UINT8 rotate_count; |
| 137 | | UINT8 shift256; |
| 138 | | UINT8 shift_reg; |
| 139 | | UINT8 read_map_sel; |
| 140 | | UINT8 read_mode; |
| 141 | | UINT8 write_mode; |
| 142 | | UINT8 color_dont_care; |
| 143 | | UINT8 bit_mask; |
| 144 | | UINT8 alpha_dis; |
| 145 | | UINT8 memory_map_sel; |
| 146 | | UINT8 host_oe; |
| 147 | | UINT8 chain_oe; |
| 148 | | } gc; |
| 149 | | |
| 150 | | struct |
| 151 | | { |
| 152 | | UINT8 index, data[0x15]; int state; |
| 153 | | UINT8 prot_bit; |
| 154 | | UINT8 pel_shift; |
| 155 | | } attribute; |
| 156 | | |
| 157 | | |
| 158 | | struct { |
| 159 | | UINT8 read_index, write_index, mask; |
| 160 | | int read; |
| 161 | | int state; |
| 162 | | struct { UINT8 red, green, blue; } color[0x100]; |
| 163 | | int dirty; |
| 164 | | } dac; |
| 165 | | |
| 166 | | struct { |
| 167 | | UINT8 visible; |
| 168 | | } cursor; |
| 169 | | |
| 170 | | /* oak vga */ |
| 171 | | struct { UINT8 reg; } oak; |
| 172 | | } vga; |
| 173 | | |
| 174 | | static struct |
| 175 | | { |
| 176 | | UINT8 bank_r,bank_w; |
| 177 | | UINT8 rgb8_en; |
| 178 | | UINT8 rgb15_en; |
| 179 | | UINT8 rgb16_en; |
| 180 | | UINT8 rgb24_en; |
| 181 | | UINT8 rgb32_en; |
| 182 | | UINT8 id; |
| 183 | | }svga; |
| 184 | | |
| 185 | | static struct |
| 186 | | { |
| 187 | | UINT8 reg_3d8; |
| 188 | | UINT8 dac_ctrl; |
| 189 | | UINT8 dac_state; |
| 190 | | UINT8 horz_overflow; |
| 191 | | UINT8 aux_ctrl; |
| 192 | | bool ext_reg_ena; |
| 193 | | }et4k; |
| 194 | | |
| 195 | 55 | enum |
| 196 | 56 | { |
| 197 | 57 | IBM8514_IDLE = 0, |
| r18229 | r18230 | |
|---|
| 203 | 63 | IBM8514_DRAWING_SSV_2 |
| 204 | 64 | }; |
| 205 | 65 | |
| 206 | | static struct |
| 207 | | { |
| 208 | | UINT8 memory_config; |
| 209 | | UINT8 ext_misc_ctrl_2; |
| 210 | | UINT8 crt_reg_lock; |
| 211 | | UINT8 reg_lock1; |
| 212 | | UINT8 reg_lock2; |
| 213 | | UINT8 enable_8514; |
| 214 | | UINT8 cr53; |
| 215 | | UINT16 current_cmd; |
| 216 | | UINT16 src_x; |
| 217 | | UINT16 src_y; |
| 218 | | UINT16 rect_width; |
| 219 | | UINT16 rect_height; |
| 220 | | UINT32 fgcolour; |
| 221 | | UINT32 bgcolour; |
| 222 | | UINT16 fgmix; |
| 223 | | UINT16 bgmix; |
| 224 | | UINT32 pixel_xfer; |
| 225 | | INT16 scissors_left; |
| 226 | | INT16 scissors_right; |
| 227 | | INT16 scissors_top; |
| 228 | | INT16 scissors_bottom; |
| 229 | | UINT16 pixel_control; |
| 230 | | UINT8 bus_size; |
| 231 | | UINT8 multifunc_sel; |
| 232 | | UINT8 write_count; |
| 233 | | |
| 234 | | // data for memory-mapped I/O |
| 235 | | UINT16 mmio_9ae8; |
| 236 | | UINT16 mmio_bee8; |
| 237 | | |
| 238 | | // hardware graphics cursor |
| 239 | | UINT8 cursor_mode; |
| 240 | | UINT16 cursor_x; |
| 241 | | UINT16 cursor_y; |
| 242 | | UINT16 cursor_start_addr; |
| 243 | | UINT8 cursor_pattern_x; // cursor pattern origin |
| 244 | | UINT8 cursor_pattern_y; |
| 245 | | UINT8 cursor_fg[4]; |
| 246 | | UINT8 cursor_bg[4]; |
| 247 | | UINT8 cursor_fg_ptr; |
| 248 | | UINT8 cursor_bg_ptr; |
| 249 | | UINT8 extended_dac_ctrl; |
| 250 | | } s3; |
| 251 | | |
| 252 | | static struct |
| 253 | | { |
| 254 | | UINT8 ext_reg[64]; |
| 255 | | UINT8 ext_reg_select; |
| 256 | | UINT16 scratch0; |
| 257 | | UINT16 scratch1; |
| 258 | | UINT16 linedraw; |
| 259 | | } ati; |
| 260 | | |
| 261 | | static struct |
| 262 | | { |
| 263 | | UINT16 htotal; // Horizontal total (9 bits) |
| 264 | | UINT16 vtotal; // Vertical total adjust (3 bits), Vertical total base (9 bit) |
| 265 | | UINT16 vdisp; |
| 266 | | UINT16 vsync; |
| 267 | | UINT16 subctrl; |
| 268 | | UINT16 substatus; |
| 269 | | UINT16 ssv; |
| 270 | | UINT16 ec0; |
| 271 | | UINT16 ec1; |
| 272 | | UINT16 ec2; |
| 273 | | UINT16 ec3; |
| 274 | | bool gpbusy; |
| 275 | | bool data_avail; |
| 276 | | INT16 dest_x; |
| 277 | | INT16 dest_y; |
| 278 | | INT16 curr_x; |
| 279 | | INT16 curr_y; |
| 280 | | INT16 prev_x; |
| 281 | | INT16 prev_y; |
| 282 | | INT16 line_axial_step; |
| 283 | | INT16 line_diagonal_step; |
| 284 | | INT16 line_errorterm; |
| 285 | | int state; |
| 286 | | |
| 287 | | UINT8 wait_vector_len; |
| 288 | | UINT8 wait_vector_dir; |
| 289 | | bool wait_vector_draw; |
| 290 | | UINT8 wait_vector_count; |
| 291 | | |
| 292 | | } ibm8514; |
| 293 | | |
| 294 | 66 | #define CRTC_PORT_ADDR ((vga.miscellaneous_output&1)?0x3d0:0x3b0) |
| 295 | 67 | |
| 296 | 68 | //#define TEXT_LINES (LINES_HELPER) |