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r18043 Thursday 20th September, 2012 at 13:29:39 UTC by Miodrag Milanović
vtech2 cleanup (no whatsnew)
[src/mess/includes]vtech2.h
[src/mess/machine]vtech2.c

trunk/src/mess/machine/vtech2.c
r18042r18043
2727
2828static const UINT8 laser_fdc_wrprot[2] = {0x80, 0x80};
2929
30/* write to banked memory (handle memory mapped i/o and videoram) */
31static void mwa_bank(running_machine &machine, int bank, int offs, int data);
32
3330/* wrappers for bank #1 to #4 */
34static WRITE8_HANDLER ( mwa_bank1 ) { mwa_bank(space.machine(), 0,offset,data); }
35static WRITE8_HANDLER ( mwa_bank2 ) { mwa_bank(space.machine(), 1,offset,data); }
36static WRITE8_HANDLER ( mwa_bank3 ) { mwa_bank(space.machine(), 2,offset,data); }
37static WRITE8_HANDLER ( mwa_bank4 ) { mwa_bank(space.machine(), 3,offset,data); }
31WRITE8_MEMBER(vtech2_state::mwa_bank1 ) { mwa_bank(0,offset,data); }
32WRITE8_MEMBER(vtech2_state::mwa_bank2 ) { mwa_bank(1,offset,data); }
33WRITE8_MEMBER(vtech2_state::mwa_bank3 ) { mwa_bank(2,offset,data); }
34WRITE8_MEMBER(vtech2_state::mwa_bank4 ) { mwa_bank(3,offset,data); }
3835
39/* read from banked memory (handle memory mapped i/o) */
40static int mra_bank(running_machine &machine, int bank, int offs);
41
4236/* wrappers for bank #1 to #4 */
43static READ8_HANDLER ( mra_bank1 ) { return mra_bank(space.machine(),0,offset); }
44static READ8_HANDLER ( mra_bank2 ) { return mra_bank(space.machine(),1,offset); }
45static READ8_HANDLER ( mra_bank3 ) { return mra_bank(space.machine(),2,offset); }
46static READ8_HANDLER ( mra_bank4 ) { return mra_bank(space.machine(),3,offset); }
37READ8_MEMBER(vtech2_state::mra_bank1 ) { return mra_bank(0,offset); }
38READ8_MEMBER(vtech2_state::mra_bank2 ) { return mra_bank(1,offset); }
39READ8_MEMBER(vtech2_state::mra_bank3 ) { return mra_bank(2,offset); }
40READ8_MEMBER(vtech2_state::mra_bank4 ) { return mra_bank(3,offset); }
4741
48/* read banked memory (handle memory mapped i/o) */
49static const struct { read8_space_func func; const char *name; }  mra_bank_soft[4] =
50{
51    { FUNC(mra_bank1) },  /* mapped in 0000-3fff */
52    { FUNC(mra_bank2) },  /* mapped in 4000-7fff */
53    { FUNC(mra_bank3) },  /* mapped in 8000-bfff */
54    { FUNC(mra_bank4) }   /* mapped in c000-ffff */
55};
56
57/* write banked memory (handle memory mapped i/o and videoram) */
58static const struct { write8_space_func func; const char *name; }  mwa_bank_soft[4] =
59{
60    { FUNC(mwa_bank1) },  /* mapped in 0000-3fff */
61    { FUNC(mwa_bank2) },  /* mapped in 4000-7fff */
62    { FUNC(mwa_bank3) },  /* mapped in 8000-bfff */
63    { FUNC(mwa_bank4) }   /* mapped in c000-ffff */
64};
65
6642/* read banked memory (plain ROM/RAM) */
6743static const char *const mra_bank_hard[4] =
6844{
r18042r18043
155131        /* memory mapped I/O bank selected? */
156132      if (data == 2)
157133      {
158         machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(offset * 0x4000, offset * 0x4000 + 0x3fff, mra_bank_soft[offset].func, mra_bank_soft[offset].name);
159         machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(offset * 0x4000, offset * 0x4000 + 0x3fff, mwa_bank_soft[offset].func, mwa_bank_soft[offset].name);
134         static read8_delegate mra_bank_soft[] =
135         {
136            read8_delegate(FUNC(vtech2_state::mra_bank1), this),
137            read8_delegate(FUNC(vtech2_state::mra_bank2), this),
138            read8_delegate(FUNC(vtech2_state::mra_bank3), this),
139            read8_delegate(FUNC(vtech2_state::mra_bank4), this),
140         };
141
142         static write8_delegate mwa_bank_soft[] =
143         {
144            write8_delegate(FUNC(vtech2_state::mwa_bank1), this),
145            write8_delegate(FUNC(vtech2_state::mwa_bank2), this),
146            write8_delegate(FUNC(vtech2_state::mwa_bank3), this),
147            write8_delegate(FUNC(vtech2_state::mwa_bank4), this),
148         };
149     
150         machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(offset * 0x4000, offset * 0x4000 + 0x3fff, mra_bank_soft[offset], mwa_bank_soft[offset]);
160151      }
161152      else
162153      {
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200191 * 1    column 1
201192 * 0    column 0
202193 ************************************************/
203static int mra_bank(running_machine &machine, int bank, int offs)
194int vtech2_state::mra_bank(int bank, int offs)
204195{
205   vtech2_state *state = machine.driver_data<vtech2_state>();
206196    int level, data = 0xff;
207197
208198    /* Laser 500/700 only: keyboard rows A through D */
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210200   {
211201      if( (offs & 0x0300) == 0x0000 ) /* keyboard row A */
212202      {
213         if( machine.root_device().ioport("ROWA")->read() != state->m_row_a )
203         if( machine().root_device().ioport("ROWA")->read() != m_row_a )
214204         {
215            state->m_row_a = machine.root_device().ioport("ROWA")->read();
216            data &= state->m_row_a;
205            m_row_a = machine().root_device().ioport("ROWA")->read();
206            data &= m_row_a;
217207         }
218208      }
219209      if( (offs & 0x0300) == 0x0100 ) /* keyboard row B */
220210      {
221         if( machine.root_device().ioport("ROWB")->read() != state->m_row_b )
211         if( machine().root_device().ioport("ROWB")->read() != m_row_b )
222212         {
223            state->m_row_b = machine.root_device().ioport("ROWB")->read();
224            data &= state->m_row_b;
213            m_row_b = machine().root_device().ioport("ROWB")->read();
214            data &= m_row_b;
225215         }
226216      }
227217      if( (offs & 0x0300) == 0x0200 ) /* keyboard row C */
228218      {
229         if( machine.root_device().ioport("ROWC")->read() != state->m_row_c )
219         if( machine().root_device().ioport("ROWC")->read() != m_row_c )
230220         {
231            state->m_row_c = machine.root_device().ioport("ROWC")->read();
232            data &= state->m_row_c;
221            m_row_c = machine().root_device().ioport("ROWC")->read();
222            data &= m_row_c;
233223         }
234224      }
235225      if( (offs & 0x0300) == 0x0300 ) /* keyboard row D */
236226      {
237         if( machine.root_device().ioport("ROWD")->read() != state->m_row_d )
227         if( machine().root_device().ioport("ROWD")->read() != m_row_d )
238228         {
239            state->m_row_d = machine.root_device().ioport("ROWD")->read();
240            data &= state->m_row_d;
229            m_row_d = machine().root_device().ioport("ROWD")->read();
230            data &= m_row_d;
241231         }
242232      }
243233   }
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245235   {
246236      /* All Lasers keyboard rows 0 through 7 */
247237        if( !(offs & 0x01) )
248         data &= machine.root_device().ioport("ROW0")->read();
238         data &= machine().root_device().ioport("ROW0")->read();
249239      if( !(offs & 0x02) )
250         data &= machine.root_device().ioport("ROW1")->read();
240         data &= machine().root_device().ioport("ROW1")->read();
251241      if( !(offs & 0x04) )
252         data &= machine.root_device().ioport("ROW2")->read();
242         data &= machine().root_device().ioport("ROW2")->read();
253243      if( !(offs & 0x08) )
254         data &= machine.root_device().ioport("ROW3")->read();
244         data &= machine().root_device().ioport("ROW3")->read();
255245      if( !(offs & 0x10) )
256         data &= machine.root_device().ioport("ROW4")->read();
246         data &= machine().root_device().ioport("ROW4")->read();
257247      if( !(offs & 0x20) )
258         data &= machine.root_device().ioport("ROW5")->read();
248         data &= machine().root_device().ioport("ROW5")->read();
259249      if( !(offs & 0x40) )
260         data &= machine.root_device().ioport("ROW6")->read();
250         data &= machine().root_device().ioport("ROW6")->read();
261251      if( !(offs & 0x80) )
262         data &= machine.root_device().ioport("ROW7")->read();
252         data &= machine().root_device().ioport("ROW7")->read();
263253   }
264254
265255    /* what's bit 7 good for? tape input maybe? */
266   level = (vtech2_cassette_image(machine))->input() * 65536.0;
267   if( level < state->m_level_old - 511 )
268      state->m_cassette_bit = 0x00;
269   if( level > state->m_level_old + 511 )
270      state->m_cassette_bit = 0x80;
271   state->m_level_old = level;
256   level = (vtech2_cassette_image(machine()))->input() * 65536.0;
257   if( level < m_level_old - 511 )
258      m_cassette_bit = 0x00;
259   if( level > m_level_old + 511 )
260      m_cassette_bit = 0x80;
261   m_level_old = level;
272262
273   data &= ~state->m_cassette_bit;
263   data &= ~m_cassette_bit;
274264    // logerror("bank #%d keyboard_r [$%04X] $%02X\n", bank, offs, data);
275265
276266    return data;
r18042r18043
287277 * 1    cassette out (LSB)
288278 * 0    speaker A
289279 ************************************************/
290static void mwa_bank(running_machine &machine, int bank, int offs, int data)
280void vtech2_state::mwa_bank(int bank, int offs, int data)
291281{
292   vtech2_state *state = machine.driver_data<vtech2_state>();
293   device_t *speaker = machine.device(SPEAKER_TAG);
294   offs += 0x4000 * state->m_laser_bank[bank];
295    switch (state->m_laser_bank[bank])
282   device_t *speaker = machine().device(SPEAKER_TAG);
283   offs += 0x4000 * m_laser_bank[bank];
284    switch (m_laser_bank[bank])
296285    {
297286    case  0:    /* ROM lower 16K */
298287    case  1:    /* ROM upper 16K */
299288      logerror("bank #%d write to ROM [$%05X] $%02X\n", bank+1, offs, data);
300289        break;
301290    case  2:    /* memory mapped output */
302        if (data != state->m_laser_latch)
291        if (data != m_laser_latch)
303292        {
304293            logerror("bank #%d write to I/O [$%05X] $%02X\n", bank+1, offs, data);
305294            /* Toggle between graphics and text modes? */
306         if ((data ^ state->m_laser_latch) & 0x01)
295         if ((data ^ m_laser_latch) & 0x01)
307296            speaker_level_w(speaker, data & 1);
308            state->m_laser_latch = data;
297            m_laser_latch = data;
309298        }
310299        break;
311300    case 12:    /* ext. ROM #1 */
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315304      logerror("bank #%d write to ROM [$%05X] $%02X\n", bank+1, offs, data);
316305        break;
317306    default:    /* RAM */
318        if( state->m_laser_bank[bank] == state->m_laser_video_bank && state->m_mem[offs] != data )
307        if( m_laser_bank[bank] == m_laser_video_bank && m_mem[offs] != data )
319308      {
320309         logerror("bank #%d write to videoram [$%05X] $%02X\n", bank+1, offs, data);
321310      }
322        state->m_mem[offs] = data;
311        m_mem[offs] = data;
323312        break;
324313    }
325314}
trunk/src/mess/includes/vtech2.h
r18042r18043
5656   DECLARE_MACHINE_RESET(laser700);
5757   UINT32 screen_update_laser(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
5858   INTERRUPT_GEN_MEMBER(vtech2_interrupt);
59   
60   int mra_bank(int bank, int offs);
61   void mwa_bank(int bank, int offs, int data);
62   
63   DECLARE_WRITE8_MEMBER(mwa_bank1);
64   DECLARE_WRITE8_MEMBER(mwa_bank2);
65   DECLARE_WRITE8_MEMBER(mwa_bank3);
66   DECLARE_WRITE8_MEMBER(mwa_bank4);
67   DECLARE_READ8_MEMBER(mra_bank1);
68   DECLARE_READ8_MEMBER(mra_bank2);
69   DECLARE_READ8_MEMBER(mra_bank3);
70   DECLARE_READ8_MEMBER(mra_bank4);   
5971};
6072
6173

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