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r18044 Thursday 20th September, 2012 at 13:40:07 UTC by Miodrag Milanović
concept cleanup (nw)
[src/mess/includes]concept.h
[src/mess/machine]concept.c

trunk/src/mess/machine/concept.c
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6262
6363/* Expansion slots */
6464
65static void concept_fdc_init(running_machine &machine, int slot);
66static void concept_hdc_init(running_machine &machine, int slot);
67
6865void concept_state::machine_start()
6966{
7067   /* initialize int state */
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8077   /* initialize expansion slots */
8178   memset(m_expansion_slots, 0, sizeof(m_expansion_slots));
8279
83   concept_hdc_init(machine(), 1);   /* Flat cable Hard Disk Controller in Slot 2 */
84   concept_fdc_init(machine(), 2);   /* Floppy Disk Controller in Slot 3 */
80   concept_hdc_init(1);   /* Flat cable Hard Disk Controller in Slot 2 */
81   concept_fdc_init(2);   /* Floppy Disk Controller in Slot 3 */
8582}
8683
87static void install_expansion_slot(running_machine &machine, int slot,
88   read8_space_func reg_read, write8_space_func reg_write,
89   read8_space_func rom_read, write8_space_func rom_write)
84void concept_state::install_expansion_slot( int slot,
85   read8_delegate reg_read, write8_delegate reg_write,
86   read8_delegate rom_read, write8_delegate rom_write)
9087{
91   concept_state *state = machine.driver_data<concept_state>();
92   state->m_expansion_slots[slot].reg_read = reg_read;
93   state->m_expansion_slots[slot].reg_write = reg_write;
94   state->m_expansion_slots[slot].rom_read = rom_read;
95   state->m_expansion_slots[slot].rom_write = rom_write;
88   m_expansion_slots[slot].reg_read = reg_read;
89   m_expansion_slots[slot].reg_write = reg_write;
90   m_expansion_slots[slot].rom_read = rom_read;
91   m_expansion_slots[slot].rom_write = rom_write;
9692}
9793
9894void concept_state::video_start()
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274270         /* IO4 registers */
275271         {
276272            int slot = ((offset >> 4) & 7) - 1;
277            if (m_expansion_slots[slot].reg_read)
273            if (!m_expansion_slots[slot].reg_read.isnull())
278274               return m_expansion_slots[slot].reg_read(space, offset & 0xf, mem_mask);
279275         }
280276         break;
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297293      {
298294         int slot = ((offset >> 8) & 7) - 1;
299295         LOG(("concept_io_r: Slot ROM memory accessed for slot %d at address 0x03%4.4x\n", slot, offset << 1));
300         if (m_expansion_slots[slot].rom_read)
296         if (!m_expansion_slots[slot].rom_read.isnull())
301297            return m_expansion_slots[slot].rom_read(space, offset & 0xff, mem_mask);
302298      }
303299      break;
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416412            int slot = ((offset >> 4) & 7) - 1;
417413            LOG(("concept_io_w: Slot I/O register written for slot %d at address 0x03%4.4x, data: 0x%4.4x\n",
418414               slot, offset << 1, data));
419            if (m_expansion_slots[slot].reg_write)
415            if (!m_expansion_slots[slot].reg_write.isnull())
420416               m_expansion_slots[slot].reg_write(space, offset & 0xf, data, mem_mask);
421417         }
422418         break;
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439435      {
440436         int slot = ((offset >> 8) & 7) - 1;
441437         LOG(("concept_io_w: Slot ROM memory written to for slot %d at address 0x03%4.4x, data: 0x%4.4x\n", slot, offset << 1, data));
442         if (m_expansion_slots[slot].rom_write)
438         if (!m_expansion_slots[slot].rom_write.isnull())
443439            m_expansion_slots[slot].rom_write(space, offset & 0xff, data, mem_mask);
444440      }
445441      break;
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547543};
548544
549545
550static  DECLARE_READ8_HANDLER(concept_fdc_reg_r);
551static DECLARE_WRITE8_HANDLER(concept_fdc_reg_w);
552static  DECLARE_READ8_HANDLER(concept_fdc_rom_r);
553
554static void concept_fdc_init(running_machine &machine, int slot)
546void concept_state::concept_fdc_init(int slot)
555547{
556   concept_state *state = machine.driver_data<concept_state>();
557   state->m_fdc_local_status = 0;
558   state->m_fdc_local_command = 0;
548   m_fdc_local_status = 0;
549   m_fdc_local_command = 0;
559550
560   install_expansion_slot(machine, slot, concept_fdc_reg_r, concept_fdc_reg_w, concept_fdc_rom_r, NULL);
551   install_expansion_slot(slot, read8_delegate(FUNC(concept_state::concept_fdc_reg_r),this), write8_delegate(FUNC(concept_state::concept_fdc_reg_w),this), read8_delegate(FUNC(concept_state::concept_fdc_rom_r),this), write8_delegate());
561552}
562553
563554static WRITE_LINE_DEVICE_HANDLER( concept_fdc_intrq_w )
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586577   {FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
587578};
588579
589static  READ8_HANDLER(concept_fdc_reg_r)
580READ8_MEMBER(concept_state::concept_fdc_reg_r)
590581{
591   concept_state *state = space.machine().driver_data<concept_state>();
592   device_t *fdc = space.machine().device("wd179x");
582   device_t *fdc = machine().device("wd179x");
593583   switch (offset)
594584   {
595585   case 0:
596586      /* local Status reg */
597      return state->m_fdc_local_status;
587      return m_fdc_local_status;
598588
599589   case 8:
600590      /* FDC STATUS REG */
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616606   return 0;
617607}
618608
619static WRITE8_HANDLER(concept_fdc_reg_w)
609WRITE8_MEMBER(concept_state::concept_fdc_reg_w)
620610{
621   concept_state *state = space.machine().driver_data<concept_state>();
622611   int current_drive;
623   device_t *fdc = space.machine().device("wd179x");
612   device_t *fdc = machine().device("wd179x");
624613   switch (offset)
625614   {
626615   case 0:
627616      /* local command reg */
628      state->m_fdc_local_command = data;
617      m_fdc_local_command = data;
629618
630619      wd17xx_set_side(fdc,(data & LC_FLPSD1_mask) != 0);
631620      current_drive = ((data >> LC_DE0_bit) & 1) | ((data >> (LC_DE1_bit-1)) & 2);
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634623      // floppy_drive_set_motor_state(floppy_get_device(machine,  current_drive), (data & LC_MOTOROF_mask) == 0 ? 1 : 0);
635624      /*flp_8in = (data & LC_FLP8IN_mask) != 0;*/
636625      wd17xx_dden_w(fdc, BIT(data, 7));
637      floppy_drive_set_ready_state(floppy_get_device(space.machine(), current_drive), 1, 0);
626      floppy_drive_set_ready_state(floppy_get_device(machine(), current_drive), 1, 0);
638627      break;
639628
640629   case 8:
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659648   }
660649}
661650
662static  READ8_HANDLER(concept_fdc_rom_r)
651READ8_MEMBER(concept_state::concept_fdc_rom_r)
663652{
664653   static const UINT8 data[] = "CORVUS01";
665654   return (offset < 8) ? data[offset] : 0;
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669658 *  Concept Hard Disk Controller (hdc)
670659 */
671660
672static  DECLARE_READ8_HANDLER(concept_hdc_reg_r);
673static DECLARE_WRITE8_HANDLER(concept_hdc_reg_w);
674static  DECLARE_READ8_HANDLER(concept_hdc_rom_r);
675
676661/*
677662 *  Hook up the Register and ROM R/W routines into the Slot I/O Space
678663 */
679664
680static void concept_hdc_init(running_machine &machine, int slot)
665void concept_state::concept_hdc_init(int slot)
681666{
682   if(corvus_hdc_init(machine))
683      install_expansion_slot(machine, slot, concept_hdc_reg_r, concept_hdc_reg_w, concept_hdc_rom_r, NULL);
667   if(corvus_hdc_init(machine()))
668      install_expansion_slot(slot, read8_delegate(FUNC(concept_state::concept_hdc_reg_r),this), write8_delegate(FUNC(concept_state::concept_hdc_reg_w),this), read8_delegate(FUNC(concept_state::concept_hdc_rom_r),this), write8_delegate());
684669}
685670
686671/*
687672 *  Handle reads against the Hard Disk Controller's onboard registers
688673 */
689static READ8_HANDLER(concept_hdc_reg_r)
674READ8_MEMBER(concept_state::concept_hdc_reg_r)
690675{
691676   switch (offset)
692677   {
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705690/*
706691 *  Handle writes against the Hard Disk Controller's onboard registers
707692 */
708static WRITE8_HANDLER(concept_hdc_reg_w)
693WRITE8_MEMBER(concept_state::concept_hdc_reg_w)
709694{
710695   switch (offset)
711696   {
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719704/*
720705 *  Handle reads agsint the Hard Disk Controller's onboard ROM
721706 */
722static  READ8_HANDLER(concept_hdc_rom_r)
707READ8_MEMBER(concept_state::concept_hdc_rom_r)
723708{
724709   static const UINT8 data[8] = { 0xa9, 0x20, 0xa9, 0x00, 0xa9, 0x03, 0xa9, 0x3c };         /* Same as Apple II */
725710   return (offset < 8) ? data[offset] : 0;
trunk/src/mess/includes/concept.h
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2323
2424struct expansion_slot_t
2525{
26   read8_space_func reg_read;
27   write8_space_func reg_write;
28   read8_space_func rom_read;
29   write8_space_func rom_write;
26   read8_delegate reg_read;
27   write8_delegate reg_write;
28   read8_delegate rom_read;
29   write8_delegate rom_write;
3030};
3131
3232
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5050   expansion_slot_t m_expansion_slots[4];
5151   DECLARE_READ16_MEMBER(concept_io_r);
5252   DECLARE_WRITE16_MEMBER(concept_io_w);
53   DECLARE_WRITE8_MEMBER(concept_fdc_reg_w);
54   DECLARE_READ8_MEMBER(concept_hdc_reg_r);
55   DECLARE_WRITE8_MEMBER(concept_hdc_reg_w);
5653   virtual void machine_start();
5754   virtual void video_start();
5855   UINT32 screen_update_concept(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
5956   INTERRUPT_GEN_MEMBER(concept_interrupt);
57   
58   void install_expansion_slot(int slot,
59      read8_delegate reg_read, write8_delegate reg_write,
60      read8_delegate rom_read, write8_delegate rom_write);
61   
62   void concept_fdc_init(int slot);
63   void concept_hdc_init(int slot);
64
65   DECLARE_READ8_MEMBER(concept_fdc_reg_r);
66   DECLARE_WRITE8_MEMBER(concept_fdc_reg_w);
67   DECLARE_READ8_MEMBER(concept_fdc_rom_r);
68
69   DECLARE_READ8_MEMBER(concept_hdc_reg_r);
70   DECLARE_WRITE8_MEMBER(concept_hdc_reg_w);
71   DECLARE_READ8_MEMBER(concept_hdc_rom_r);   
6072};
6173
6274

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