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r17798 Tuesday 11th September, 2012 at 15:58:04 UTC by Aaron Giles
In device_state_interface, rename state() to state_int()
and set_state() to set_state_int() for consistency.
Update all callers. Also add set_pc() helper and updated
all callers to use that instead of set_state_int(STATE_GENPC)
[Aaron Giles]

Added device_t::state() method to get the state interface.
Added redundant device_state_interface::state() method to
catch redundant use of it. [Aaron Giles]

Removed cpu_get_reg() and cpu_set_reg() macros in favor of
using the above methods. [Aaron Giles]
[src/emu]devcpu.h device.h distate.c distate.h
[src/emu/cpu/i8085]i8085.h
[src/emu/cpu/pdp1]pdp1.c pdp1.h tx0.h
[src/emu/debug]debugcpu.c dvstate.c
[src/emu/drivers]testcpu.c
[src/mame/audio]cage.c cinemat.c dcs.c jaguar.c leland.c meadows.c
[src/mame/drivers]1943.c atarigt.c atarigx2.c atvtrack.c beathead.c bfm_sc4h.c bmcbowl.c calchase.c cd32.c cinemat.c cobra.c flicker.c gaelco3d.c gstream.c jaguar.c model1.c model2.c mpu4hw.c mrdo.c namcos23.c popeye.c qdrmfgp.c raiden2.c sigmab98.c solomon.c st0016.c taito_l.c tmnt.c vamphalf.c voyager.c
[src/mame/includes]slapfght.h
[src/mame/machine]fd1094.c fddebug.c harddriv.c leland.c md_cart.c megasvp.c n64.c nb1413m3.c pgmprot2.c segas32.c slapstic.c slikshot.c
[src/mame/video]cinemat.c ojankohs.c
[src/mess/drivers]alphatro.c altair.c apexc.c atm.c bigbord2.c bw2.c ccs2810.c cd2650.c cxhumax.c d6800.c gba.c gmaster.c horizon.c instruct.c ipc.c jupiter.c lynx.c mmodular.c mpf1.c mz2500.c p8k.c pda600.c pdp1.c pdp11.c pegasus.c pentagon.c pipbug.c pockstat.c psx.c scorpion.c smc777.c spectrum.c ssem.c ti89.c tx0.c unior.c vc4000.c vector4.c vii.c vtech1.c x07.c xerox820.c z1013.c z9001.c
[src/mess/formats]ace_ace.c atom_atm.c m65_snqk.c spec_snqk.c trs_cmd.c z80bin.c
[src/mess/machine]amstrad.c apple2.c at.c bebox.c c128.c c64_cpm.c dai.c galaxy.c intv.c isa_aha1542.c isa_fdc.c isa_hdc.c kaypro.c kc.c lisa.c lviv.c mac.c mbc55x.c mbee.c mz700.c pc.c pc_fdc.c pecom.c poly88.c primo.c radio86.c rmnimbus.c sorcerer.c ti85.c
[src/mess/video]galaxy.c pdp1.c tx0.c vc4000.c zx.c

trunk/src/mame/audio/jaguar.c
r17797r17798
267267   if (&space.device() == m_dsp && ACCESSING_BITS_8_15 && (data & 0x400))
268268   {
269269      /* see if we're going back to the spin loop */
270      if (!(data & 0x04000) && m_dsp->state(JAGUAR_R22) != 0)
270      if (!(data & 0x04000) && m_dsp->state_int(JAGUAR_R22) != 0)
271271      {
272         UINT32 r30 = m_dsp->state(JAGUAR_R30) & 0xffffff;
272         UINT32 r30 = m_dsp->state_int(JAGUAR_R30) & 0xffffff;
273273         if (r30 >= 0xf1b124 && r30 <= 0xf1b126)
274274            dsp_suspend();
275275      }
trunk/src/mame/audio/cage.c
r17797r17798
494494   }
495495
496496   /* set the IOF input lines */
497   val = cpu_get_reg(state->cpu, TMS3203X_IOF);
497   val = state->cpu->state_int(TMS3203X_IOF);
498498   val &= ~0x88;
499499   if (state->cpu_to_cage_ready) val |= 0x08;
500500   if (state->cage_to_cpu_ready) val |= 0x80;
501   state->cpu->set_state(TMS3203X_IOF, val);
501   state->cpu->set_state_int(TMS3203X_IOF, val);
502502}
503503
504504
trunk/src/mame/audio/leland.c
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19301930   cpu_device *master = machine.device<cpu_device>("master");
19311931   int checkpc = param;
19321932   int pc = master->pc();
1933   int oldaf = master->state(Z80_AF);
1933   int oldaf = master->state_int(Z80_AF);
19341934
19351935   /* This is pretty cheesy, but necessary. Since the CPUs run in round-robin order,
19361936       synchronizing on the write to this register from the slave side does nothing.
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19431943      if (LOG_COMM) logerror("(Updated sound response latch to %02X)\n", state->m_sound_response);
19441944
19451945      oldaf = (oldaf & 0x00ff) | (state->m_sound_response << 8);
1946      master->set_state(Z80_AF, oldaf);
1946      master->set_state_int(Z80_AF, oldaf);
19471947   }
19481948   else
19491949      logerror("ERROR: delayed_response_r - current PC = %04X, checkPC = %04X\n", pc, checkpc);
trunk/src/mame/audio/dcs.c
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19521952static TIMER_DEVICE_CALLBACK( dcs_irq )
19531953{
19541954   /* get the index register */
1955   int reg = cpu_get_reg(dcs.cpu, ADSP2100_I0 + dcs.ireg);
1955   int reg = dcs.cpu->state_int(ADSP2100_I0 + dcs.ireg);
19561956
19571957   /* copy the current data into the buffer */
19581958   {
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19811981   }
19821982
19831983   /* store it */
1984   dcs.cpu->set_state(ADSP2100_I0 + dcs.ireg, reg);
1984   dcs.cpu->set_state_int(ADSP2100_I0 + dcs.ireg, reg);
19851985}
19861986
19871987
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20432043
20442044         /* now get the register contents in a more legible format */
20452045         /* we depend on register indexes to be continuous (wich is the case in our core) */
2046         source = device.state(ADSP2100_I0 + dcs.ireg);
2047         dcs.incs = device.state(ADSP2100_M0 + mreg);
2048         dcs.size = device.state(ADSP2100_L0 + lreg);
2046         source = device.state_int(ADSP2100_I0 + dcs.ireg);
2047         dcs.incs = device.state_int(ADSP2100_M0 + mreg);
2048         dcs.size = device.state_int(ADSP2100_L0 + lreg);
20492049
20502050         /* get the base value, since we need to keep it around for wrapping */
20512051         source -= dcs.incs;
20522052
20532053         /* make it go back one so we dont lose the first sample */
2054         device.set_state(ADSP2100_I0 + dcs.ireg, source);
2054         device.set_state_int(ADSP2100_I0 + dcs.ireg, source);
20552055
20562056         /* save it as it is now */
20572057         dcs.ireg_base = source;
trunk/src/mame/audio/cinemat.c
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14841484
14851485WRITE8_MEMBER(cinemat_state::qb3_sound_w)
14861486{
1487   UINT16 rega = cpu_get_reg(machine().device("maincpu"), CCPU_A);
1487   UINT16 rega = machine().device("maincpu")->state().state_int(CCPU_A);
14881488   demon_sound_w(machine(), 0x00 | (~rega & 0x0f), 0x10);
14891489}
14901490
trunk/src/mame/audio/meadows.c
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5858      /* amplitude is a combination of the upper 4 bits of 0c01 */
5959      /* and bit 4 merged from S2650's flag output */
6060      amp = ((state->m_0c03 & ENABLE_CTR1) == 0) ? 0 : (state->m_0c01 & 0xf0) >> 1;
61      if( cpu_get_reg(machine.device("maincpu"), S2650_FO) )
61      if( machine.device("maincpu")->state().state_int(S2650_FO) )
6262         amp += 0x80;
6363      /* calculate frequency for counter #1 */
6464      /* bit 0..3 of 0c01 are ctr preset */
trunk/src/mame/machine/megasvp.c
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7171      state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
7272   }
7373
74   if (reg == 4 || (cpu_get_reg(&space->device(), SSP_ST) & 0x60))
74   if (reg == 4 || (space->device().state().state_int(SSP_ST) & 0x60))
7575   {
7676      #define CADDR ((((mode<<16)&0x7f0000)|addr)<<1)
7777      UINT16 *dram = (UINT16 *)state->m_dram;
trunk/src/mame/machine/pgmprot2.c
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265265   if (pc==0x080109b4)
266266   {
267267      /* if we've hit the loop where this is read and both values are 0 then the only way out is an interrupt */
268      int r4 = (cpu_get_reg(&space->device(), ARM7_R4));
268      int r4 = (space->device().state().state_int(ARM7_R4));
269269      r4 += 0xe;
270270
271271      if (r4==0x18002f9e)
trunk/src/mame/machine/harddriv.c
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961961   if (&space->device() == state->m_maincpu && pc == state->m_ds3_transfer_pc &&
962962      !(!state->m_ds3_g68flag && state->m_ds3_g68irqs) && !(state->m_ds3_gflag && state->m_ds3_gfirqs))
963963   {
964      UINT32 destaddr = state->m_maincpu->state(M68K_A1);
965      UINT16 count68k = state->m_maincpu->state(M68K_D1);
966      UINT16 mstat = state->m_adsp->state(ADSP2100_MSTAT);
967      UINT16 i6 = state->m_adsp->state((mstat & 1) ? ADSP2100_MR0 : ADSP2100_MR0_SEC);
968      UINT16 l6 = state->m_adsp->state(ADSP2100_L6) - 1;
969      UINT16 m7 = state->m_adsp->state(ADSP2100_M7);
964      UINT32 destaddr = state->m_maincpu->state_int(M68K_A1);
965      UINT16 count68k = state->m_maincpu->state_int(M68K_D1);
966      UINT16 mstat = state->m_adsp->state_int(ADSP2100_MSTAT);
967      UINT16 i6 = state->m_adsp->state_int((mstat & 1) ? ADSP2100_MR0 : ADSP2100_MR0_SEC);
968      UINT16 l6 = state->m_adsp->state_int(ADSP2100_L6) - 1;
969      UINT16 m7 = state->m_adsp->state_int(ADSP2100_M7);
970970
971971      logerror("%06X:optimizing 68k transfer, %d words\n", state->m_maincpu->pcbase(), count68k);
972972
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980980         }
981981         count68k--;
982982      }
983      state->m_maincpu->set_state(M68K_D1, count68k);
984      state->m_adsp->set_state((mstat & 1) ? ADSP2100_MR0 : ADSP2100_MR0_SEC, i6);
983      state->m_maincpu->set_state_int(M68K_D1, count68k);
984      state->m_adsp->set_state_int((mstat & 1) ? ADSP2100_MR0 : ADSP2100_MR0_SEC, i6);
985985      state->m_adsp_speedup_count[1]++;
986986   }
987987
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15961596
15971597   /* if this address is equal to $f000, spin until something gets written */
15981598   if (&space->device() == state->m_gsp && space->device().safe_pc() == state->m_gsp_speedup_pc &&
1599      (result & 0xff) < cpu_get_reg(&space->device(), TMS34010_A1))
1599      (result & 0xff) < space->device().state().state_int(TMS34010_A1))
16001600   {
16011601      state->m_gsp_speedup_count[0]++;
16021602      device_spin_until_interrupt(&space->device());
trunk/src/mame/machine/md_cart.c
r17797r17798
437437
438438   if (space->device().safe_pc() == 0x01782) // makes 'VS' screen appear
439439   {
440      retdat = cpu_get_reg(&space->device(), M68K_D3) & 0xff;
440      retdat = space->device().state().state_int(M68K_D3) & 0xff;
441441      retdat <<= 8;
442442      return retdat;
443443   }
444444   else if (space->device().safe_pc() == 0x1c24) // background gfx etc.
445445   {
446      retdat = cpu_get_reg(&space->device(), M68K_D3) & 0xff;
446      retdat = space->device().state().state_int(M68K_D3) & 0xff;
447447      retdat <<= 8;
448448      return retdat;
449449   }
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457457   }
458458   else if (space->device().safe_pc() == 0x10c52) // relates to the game speed..
459459   {
460      retdat = cpu_get_reg(&space->device(), M68K_D4) & 0xff;
460      retdat = space->device().state().state_int(M68K_D4) & 0xff;
461461      retdat <<= 8;
462462      return retdat;
463463   }
464464   else if (space->device().safe_pc() == 0x061ae)
465465   {
466      retdat = cpu_get_reg(&space->device(), M68K_D3) & 0xff;
466      retdat = space->device().state().state_int(M68K_D3) & 0xff;
467467      retdat <<= 8;
468468      return retdat;
469469   }
470470   else if (space->device().safe_pc() == 0x061b0)
471471   {
472      retdat = cpu_get_reg(&space->device(), M68K_D3) & 0xff;
472      retdat = space->device().state().state_int(M68K_D3) & 0xff;
473473      retdat <<= 8;
474474      return retdat;
475475   }
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757757
758758   if (space->device().safe_pc()==0x4C94E)
759759   {
760      return cpu_get_reg(space->machine().device("maincpu"), (M68K_D0)) & 0xff;
760      return space->machine().device("maincpu")->state().state_int((M68K_D0)) & 0xff;
761761   }
762762   else
763763   {
trunk/src/mame/machine/segas32.c
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289289
290290   if (PC == 0xfe0325 || PC == 0xfe01e5 || PC == 0xfe035e || PC == 0xfe03cc)
291291   {
292      cmpVal = cpu_get_reg(&space.device(), 1);
292      cmpVal = space.device().state().state_int(1);
293293
294294      // R0 always contains the value the protection is supposed to return (!)
295295      return cmpVal;
trunk/src/mame/machine/fd1094.c
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665665   m_state_change(state());
666666
667667   // force a flush of the prefetch cache on any state change
668   set_state(M68K_PREF_ADDR, 0x0010);
668   set_state_int(M68K_PREF_ADDR, 0x0010);
669669}
670670
671671
trunk/src/mame/machine/leland.c
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10961096
10971097      case 0x01:   /* /GIN1 */
10981098         result = ioport("IN1")->read();
1099         if (cpu_get_reg(machine().device("slave"), Z80_HALT))
1099         if (machine().device("slave")->state().state_int(Z80_HALT))
11001100            result ^= 0x01;
11011101         break;
11021102
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11781178
11791179      case 0x07:   /* /SLVBLK */
11801180         result = ioport("IN1")->read();
1181         if (cpu_get_reg(machine().device("slave"), Z80_HALT))
1181         if (machine().device("slave")->state().state_int(Z80_HALT))
11821182            result ^= 0x01;
11831183         break;
11841184
trunk/src/mame/machine/fddebug.c
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10631063      newpc = cpu->safe_pc();
10641064
10651065   /* set the new PC */
1066   cpu_set_reg(cpu, STATE_GENPC, newpc);
1066   cpu->state().set_pc(newpc);
10671067
10681068   /* recompute around that */
10691069   instruction_hook(*cpu, newpc);
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11161116         }
11171117
11181118         /* set this as our current PC and run the instruction hook */
1119         cpu_set_reg(&space->device(), STATE_GENPC, pc);
1119         space->device().state().set_pc(pc);
11201120         if (instruction_hook(space->device(), pc))
11211121            break;
11221122      }
trunk/src/mame/machine/n64.c
r17797r17798
565565   if (status & 0x1)
566566   {
567567      device_set_input_line(rspcpu, INPUT_LINE_HALT, ASSERT_LINE);
568        cpu_set_reg(rspcpu, RSP_SR, cpu_get_reg(rspcpu, RSP_SR) | RSP_STATUS_HALT);
568        rspcpu->state().set_state_int(RSP_SR, rspcpu->state().state_int(RSP_SR) | RSP_STATUS_HALT);
569569   }
570570
571571   if (status & 0x2)
572572   {
573        cpu_set_reg(rspcpu, RSP_SR, cpu_get_reg(rspcpu, RSP_SR) | RSP_STATUS_BROKE);
573        rspcpu->state().set_state_int(RSP_SR, rspcpu->state().state_int(RSP_SR) | RSP_STATUS_BROKE);
574574
575        if (cpu_get_reg(rspcpu, RSP_SR) & RSP_STATUS_INTR_BREAK)
575        if (rspcpu->state().state_int(RSP_SR) & RSP_STATUS_INTR_BREAK)
576576      {
577577         signal_rcp_interrupt(SP_INTERRUPT);
578578      }
r17797r17798
599599      case 0x10/4:      // SP_STATUS_REG
600600         //machine().scheduler().synchronize();
601601         //machine().scheduler().boost_interleave(attotime::from_msec(1), attotime::from_msec(m));
602            ret = cpu_get_reg(rspcpu, RSP_SR);
602            ret = rspcpu->state().state_int(RSP_SR);
603603         break;
604604
605605      case 0x14/4:      // SP_DMA_FULL_REG
r17797r17798
669669      }
670670
671671        case 0x40000/4:     // PC
672            ret = cpu_get_reg(rspcpu, RSP_PC) & 0x00000fff;
672            ret = rspcpu->state().state_int(RSP_PC) & 0x00000fff;
673673         break;
674674
675675        default:
r17797r17798
677677            break;
678678   }
679679
680   //printf("%08x sp_reg_r %08x = %08x\n", (UINT32)cpu_get_reg(maincpu, MIPS3_PC), offset * 4, ret); fflush(stdout);
680   //printf("%08x sp_reg_r %08x = %08x\n", (UINT32)maincpu->state().state_int(MIPS3_PC), offset * 4, ret); fflush(stdout);
681681   return ret;
682682}
683683
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688688
689689void n64_periphs::sp_reg_w(UINT32 offset, UINT32 data, UINT32 mem_mask)
690690{
691   //printf("%08x sp_reg_w %08x %08x %08x\n", (UINT32)cpu_get_reg(maincpu, MIPS3_PC), offset * 4, data, mem_mask); fflush(stdout);
691   //printf("%08x sp_reg_w %08x %08x %08x\n", (UINT32)maincpu->state().state_int(MIPS3_PC), offset * 4, data, mem_mask); fflush(stdout);
692692
693693   if ((offset & 0x10000) == 0)
694694   {
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718718
719719            case 0x10/4:        // RSP_STATUS_REG
720720            {
721               UINT32 oldstatus = cpu_get_reg(rspcpu, RSP_SR);
721               UINT32 oldstatus = rspcpu->state().state_int(RSP_SR);
722722               UINT32 newstatus = oldstatus;
723723
724724                // printf( "RSP_STATUS_REG Write; %08x\n", data );
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760760               //printf("***SP SSTEP SET***\n"); fflush(stdout);
761761                    if(!(oldstatus & (RSP_STATUS_BROKE | RSP_STATUS_HALT)))
762762                    {
763                        cpu_set_reg(rspcpu, RSP_STEPCNT, 1 );
763                        rspcpu->state().set_state_int(RSP_STEPCNT, 1 );
764764                        device_yield(machine().device("rsp"));
765765                    }
766766                }
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854854                    newstatus |= RSP_STATUS_SIGNAL7;      // set signal 7
855855               //printf("***SP SIG7 SET***\n"); fflush(stdout);
856856                }
857                cpu_set_reg(rspcpu, RSP_SR, newstatus);
857                rspcpu->state().set_state_int(RSP_SR, newstatus);
858858                break;
859859            }
860860
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877877        switch (offset & 0xffff)
878878        {
879879            case 0x00/4:        // SP_PC_REG
880                if( cpu_get_reg(rspcpu, RSP_NEXTPC) != 0xffffffff )
880                if( rspcpu->state().state_int(RSP_NEXTPC) != 0xffffffff )
881881                {
882                    cpu_set_reg(rspcpu, RSP_NEXTPC, 0x1000 | (data & 0xfff));
882                    rspcpu->state().set_state_int(RSP_NEXTPC, 0x1000 | (data & 0xfff));
883883                }
884884                else
885885                {
886                    cpu_set_reg(rspcpu, RSP_PC, 0x1000 | (data & 0xfff));
886                    rspcpu->state().set_state_int(RSP_PC, 0x1000 | (data & 0xfff));
887887                }
888888                break;
889889
r17797r17798
944944         break;
945945   }
946946
947   //printf("%08x dp_reg_r %08x = %08x\n", (UINT32)cpu_get_reg(device->machine().device("rsp"), RSP_PC), offset, ret); fflush(stdout);
947   //printf("%08x dp_reg_r %08x = %08x\n", (UINT32)device->machine().device("rsp")->state().state_int(RSP_PC), offset, ret); fflush(stdout);
948948   return ret;
949949}
950950
r17797r17798
953953   n64_state *state = device->machine().driver_data<n64_state>();
954954   n64_periphs *periphs = device->machine().device<n64_periphs>("rcp");
955955
956   //printf("%08x dp_reg_w %08x %08x %08x\n", (UINT32)cpu_get_reg(device->machine().device("rsp"), RSP_PC), offset, data, mem_mask); fflush(stdout);
956   //printf("%08x dp_reg_w %08x %08x %08x\n", (UINT32)device->machine().device("rsp")->state().state_int(RSP_PC), offset, data, mem_mask); fflush(stdout);
957957   switch (offset)
958958   {
959959      case 0x00/4:      // DP_START_REG
trunk/src/mame/machine/slikshot.c
r17797r17798
494494
495495   /* this is a big kludge: only allow a reset if the Z80 is stopped */
496496   /* at its endpoint; otherwise, we never get a result from the Z80 */
497   if ((data & 0x10) || cpu_get_reg(machine.device("sub"), Z80_PC) == 0x13a)
497   if ((data & 0x10) || machine.device("sub")->state().state_int(Z80_PC) == 0x13a)
498498   {
499499      cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
500500
trunk/src/mame/machine/nb1413m3.c
r17797r17798
209209   int rombank;
210210
211211   /* get top 8 bits of the I/O port address */
212   offset = (offset << 8) | (cpu_get_reg(&space->device(), Z80_BC) >> 8);
212   offset = (offset << 8) | (space->device().state().state_int(Z80_BC) >> 8);
213213
214214   switch (nb1413m3_type)
215215   {
trunk/src/mame/machine/slapstic.c
r17797r17798
884884         {
885885            /* fetch the value of the register for the second operand, and see */
886886            /* if it matches the third alternate */
887            UINT32 regval = cpu_get_reg(&space->device(), M68K_A0 + ((opcode >> 9) & 7)) >> 1;
887            UINT32 regval = space->device().state().state_int(M68K_A0 + ((opcode >> 9) & 7)) >> 1;
888888            if (MATCHES_MASK_VALUE(regval, slapstic.alt3))
889889            {
890890               alt_bank = (regval >> slapstic.altshift) & 3;
trunk/src/mame/video/cinemat.c
r17797r17798
8686         /* X register as the intensity */
8787         if (data != m_last_control && data)
8888         {
89            int xval = cpu->state(CCPU_X) & 0x0f;
89            int xval = cpu->state_int(CCPU_X) & 0x0f;
9090            i = (xval + 1) * 255 / 16;
9191            m_vector_color = MAKE_RGB(i,i,i);
9292         }
r17797r17798
9797         /* X register as the intensity */
9898         if (data != m_last_control && data)
9999         {
100            int xval = cpu->state(CCPU_X);
100            int xval = cpu->state_int(CCPU_X);
101101            xval = (~xval >> 2) & 0x3f;
102102            i = (xval + 1) * 255 / 64;
103103            m_vector_color = MAKE_RGB(i,i,i);
r17797r17798
109109         /* as 4-4-4 BGR values */
110110         if (data != m_last_control && data)
111111         {
112            int xval = cpu->state(CCPU_X);
112            int xval = cpu->state_int(CCPU_X);
113113            r = (~xval >> 0) & 0x0f;
114114            r = r * 255 / 15;
115115            g = (~xval >> 4) & 0x0f;
r17797r17798
128128            /* on an IV instruction if data == 0 here */
129129            if (data != m_last_control && !data)
130130            {
131               m_qb3_lastx = cpu->state(CCPU_X);
132               m_qb3_lasty = cpu->state(CCPU_Y);
131               m_qb3_lastx = cpu->state_int(CCPU_X);
132               m_qb3_lasty = cpu->state_int(CCPU_Y);
133133            }
134134
135135            /* on the rising edge of the data value, latch the Y register */
136136            /* as 2-3-3 BGR values */
137137            if (data != m_last_control && data)
138138            {
139               int yval = cpu->state(CCPU_Y);
139               int yval = cpu->state_int(CCPU_Y);
140140               r = (~yval >> 0) & 0x07;
141141               r = r * 255 / 7;
142142               g = (~yval >> 3) & 0x07;
r17797r17798
146146               m_vector_color = MAKE_RGB(r,g,b);
147147
148148               /* restore the original X,Y values */
149               cpu->set_state(CCPU_X, m_qb3_lastx);
150               cpu->set_state(CCPU_Y, m_qb3_lasty);
149               cpu->set_state_int(CCPU_X, m_qb3_lastx);
150               cpu->set_state_int(CCPU_Y, m_qb3_lasty);
151151            }
152152         }
153153         break;
trunk/src/mame/video/ojankohs.c
r17797r17798
6969   int r, g, b;
7070
7171   /* get top 8 bits of the I/O port address */
72   offset = (offset << 8) | (cpu_get_reg(&space.device(), Z80_BC) >> 8);
72   offset = (offset << 8) | (space.device().state().state_int(Z80_BC) >> 8);
7373
7474   m_paletteram[offset] = data;
7575
trunk/src/mame/includes/slapfght.h
r17797r17798
128128/* due to code at 0x108d (GUARDIAN) or 0x1152 (GETSTARJ),
129129   register C is a unaltered copy of register A */
130130
131#define GS_SAVE_REGS  m_gs_a = cpu_get_reg(&space.device(), Z80_BC) >> 0; \
132                      m_gs_d = cpu_get_reg(&space.device(), Z80_DE) >> 8; \
133                      m_gs_e = cpu_get_reg(&space.device(), Z80_DE) >> 0;
131#define GS_SAVE_REGS  m_gs_a = space.device().state().state_int(Z80_BC) >> 0; \
132                      m_gs_d = space.device().state().state_int(Z80_DE) >> 8; \
133                      m_gs_e = space.device().state().state_int(Z80_DE) >> 0;
134134
135135#define GS_RESET_REGS m_gs_a = 0; \
136136                      m_gs_d = 0; \
trunk/src/mame/drivers/atvtrack.c
r17797r17798
344344   // Here there is the setup of the cpu, the boot program is copied in machine_start
345345   as = machine.device("maincpu")->memory().space(AS_PROGRAM);
346346   // set cpu PC register to 0x0c7f0000
347   cpu_set_reg(machine.device("maincpu"), STATE_GENPC, 0x0c7f0000);
347   machine.device("maincpu")->state().set_pc(0x0c7f0000);
348348   // set BCR2 to 1
349349   sh4_internal_w(as, 0x3001, 1, 0xffffffff);
350350   device_execute_interface *exec = dynamic_cast<device_execute_interface *>(machine.device("subcpu"));
trunk/src/mame/drivers/gaelco3d.c
r17797r17798
634634   cpu_device *adsp = timer.machine().device<cpu_device>("adsp");
635635
636636   /* get the index register */
637   int reg = adsp->state(ADSP2100_I0 + state->m_adsp_ireg);
637   int reg = adsp->state_int(ADSP2100_I0 + state->m_adsp_ireg);
638638
639639   /* copy the current data into the buffer */
640640// logerror("ADSP buffer: I%d=%04X incs=%04X size=%04X\n", state->m_adsp_ireg, reg, state->m_adsp_incs, state->m_adsp_size);
r17797r17798
655655   }
656656
657657   /* store it */
658   adsp->set_state(ADSP2100_I0 + state->m_adsp_ireg, reg);
658   adsp->set_state_int(ADSP2100_I0 + state->m_adsp_ireg, reg);
659659}
660660
661661
r17797r17798
684684
685685         /* now get the register contents in a more legible format */
686686         /* we depend on register indexes to be continuous (wich is the case in our core) */
687         source = device.state(ADSP2100_I0 + state->m_adsp_ireg);
688         state->m_adsp_incs = device.state(ADSP2100_M0 + mreg);
689         state->m_adsp_size = device.state(ADSP2100_L0 + lreg);
687         source = device.state_int(ADSP2100_I0 + state->m_adsp_ireg);
688         state->m_adsp_incs = device.state_int(ADSP2100_M0 + mreg);
689         state->m_adsp_size = device.state_int(ADSP2100_L0 + lreg);
690690
691691         /* get the base value, since we need to keep it around for wrapping */
692692         source -= state->m_adsp_incs;
693693
694694         /* make it go back one so we dont lose the first sample */
695         device.set_state(ADSP2100_I0 + state->m_adsp_ireg, source);
695         device.set_state_int(ADSP2100_I0 + state->m_adsp_ireg, source);
696696
697697         /* save it as it is now */
698698         state->m_adsp_ireg_base = source;
trunk/src/mame/drivers/model2.c
r17797r17798
972972
973973static int snd_68k_ready_r(address_space *space)
974974{
975   int sr = cpu_get_reg(space->machine().device("audiocpu"), M68K_SR);
975   int sr = space->machine().device("audiocpu")->state().state_int(M68K_SR);
976976
977977   if ((sr & 0x0700) > 0x0100)
978978   {
trunk/src/mame/drivers/popeye.c
r17797r17798
2424static INTERRUPT_GEN( popeye_interrupt )
2525{
2626   /* NMIs are enabled by the I register?? How can that be? */
27   if (cpu_get_reg(device, Z80_I) & 1)   /* skyskipr: 0/1, popeye: 2/3 but also 0/1 */
27   if (device->state().state_int(Z80_I) & 1)   /* skyskipr: 0/1, popeye: 2/3 but also 0/1 */
2828      device_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
2929}
3030
trunk/src/mame/drivers/gstream.c
r17797r17798
633633
634634READ32_MEMBER(gstream_state::gstream_speedup_r)
635635{
636   if (m_maincpu->state(STATE_GENPC) == 0xc0001592)
636   if (m_maincpu->pc() == 0xc0001592)
637637   {
638638      m_maincpu->eat_cycles(50);
639639   }
trunk/src/mame/drivers/st0016.c
r17797r17798
425425   if(scanline == 240)
426426      device_set_input_line(state->m_maincpu,0,HOLD_LINE);
427427   else if((scanline % 64) == 0)
428      if(cpu_get_reg(state->m_maincpu, Z80_IFF1)) /* dirty hack ... */
428      if(state->m_maincpu->state_int(Z80_IFF1)) /* dirty hack ... */
429429         device_set_input_line(state->m_maincpu, INPUT_LINE_NMI, PULSE_LINE );
430430}
431431
trunk/src/mame/drivers/beathead.c
r17797r17798
498498READ32_MEMBER( beathead_state::speedup_r )
499499{
500500   int result = *m_speedup_data;
501   if ((space.device().safe_pcbase() & 0xfffff) == 0x006f0 && result == cpu_get_reg(&space.device(), ASAP_R3))
501   if ((space.device().safe_pcbase() & 0xfffff) == 0x006f0 && result == space.device().state().state_int(ASAP_R3))
502502      device_spin_until_interrupt(&space.device());
503503   return result;
504504}
r17797r17798
507507READ32_MEMBER( beathead_state::movie_speedup_r )
508508{
509509   int result = *m_movie_speedup_data;
510   if ((space.device().safe_pcbase() & 0xfffff) == 0x00a88 && (cpu_get_reg(&space.device(), ASAP_R28) & 0xfffff) == 0x397c0 &&
511      m_movie_speedup_data[4] == cpu_get_reg(&space.device(), ASAP_R1))
510   if ((space.device().safe_pcbase() & 0xfffff) == 0x00a88 && (space.device().state().state_int(ASAP_R28) & 0xfffff) == 0x397c0 &&
511      m_movie_speedup_data[4] == space.device().state().state_int(ASAP_R1))
512512   {
513513      UINT32 temp = (INT16)result + m_movie_speedup_data[4] * 262;
514      if (temp - (UINT32)cpu_get_reg(&space.device(), ASAP_R15) < (UINT32)cpu_get_reg(&space.device(), ASAP_R23))
514      if (temp - (UINT32)space.device().state().state_int(ASAP_R15) < (UINT32)space.device().state().state_int(ASAP_R23))
515515         device_spin_until_interrupt(&space.device());
516516   }
517517   return result;
trunk/src/mame/drivers/cinemat.c
r17797r17798
148148      return 0;
149149   else
150150   {
151      int xval = (INT16)(cpu_get_reg(device, CCPU_X) << 4) >> 4;
151      int xval = (INT16)(device->state().state_int(CCPU_X) << 4) >> 4;
152152      return (state->ioport(state->m_mux_select ? "ANALOGX" : "ANALOGY")->read_safe(0) - xval) < 0x800;
153153   }
154154}
r17797r17798
273273
274274WRITE8_MEMBER(cinemat_state::qb3_ram_bank_w)
275275{
276   membank("bank1")->set_entry(cpu_get_reg(machine().device("maincpu"), CCPU_P) & 3);
276   membank("bank1")->set_entry(machine().device("maincpu")->state().state_int(CCPU_P) & 3);
277277}
278278
279279
trunk/src/mame/drivers/voyager.c
r17797r17798
249249            #if 0
250250            if ((state->m_mxtc_config_reg[0x63] & 0x50) | ( state->m_mxtc_config_reg[0x63] & 0xA0)) // Only DO if comes a change to disable ROM.
251251            {
252               if ( busdevice->machine(->safe_pc().device("maincpu"))==0xff74e) cpu_set_reg(busdevice->machine().device("maincpu"), STATE_GENPC, 0xff74d);
252               if ( busdevice->machine(->safe_pc().device("maincpu"))==0xff74e) busdevice->machine().device("maincpu")->state().set_pc(0xff74d);
253253            }
254254            #endif
255255
trunk/src/mame/drivers/namcos23.c
r17797r17798
15181518   case 0: return 0x8e | (machine().primary_screen->vblank() ? 0x0000 : 0x8000);
15191519   case 1: return c417.adr;
15201520   case 4:
1521      //      logerror("c417_r %04x = %04x (%08x, %08x)\n", c417.adr, c417.ram[c417.adr], space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1521      //      logerror("c417_r %04x = %04x (%08x, %08x)\n", c417.adr, c417.ram[c417.adr], space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
15221522      return c417.ram[c417.adr];
15231523   case 5:
15241524      if(c417.pointrom_adr >= m_ptrom_limit)
r17797r17798
15311531
15321532   }
15331533
1534   logerror("c417_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1534   logerror("c417_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
15351535   return 0;
15361536}
15371537
r17797r17798
15531553      c417.pointrom_adr = 0;
15541554      break;
15551555   case 4:
1556      //        logerror("c417_w %04x = %04x (%08x, %08x)\n", c417.adr, data, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1556      //        logerror("c417_w %04x = %04x (%08x, %08x)\n", c417.adr, data, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
15571557      COMBINE_DATA(c417.ram + c417.adr);
15581558      break;
15591559   case 7:
r17797r17798
15611561      cputag_set_input_line(machine(), "maincpu", MIPS3_IRQ2, CLEAR_LINE);
15621562      break;
15631563   default:
1564      logerror("c417_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1564      logerror("c417_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
15651565      break;
15661566   }
15671567}
r17797r17798
15701570{
15711571   c412_t &c412 = m_c412;
15721572
1573   //  logerror("c412_ram_r %06x (%08x, %08x)\n", offset, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1573   //  logerror("c412_ram_r %06x (%08x, %08x)\n", offset, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
15741574   if(offset < 0x100000)
15751575      return c412.sdram_a[offset & 0xfffff];
15761576   else if(offset < 0x200000)
r17797r17798
15871587{
15881588   c412_t &c412 = m_c412;
15891589
1590   //  logerror("c412_ram_w %06x = %04x (%08x, %08x)\n", offset, data, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1590   //  logerror("c412_ram_w %06x = %04x (%08x, %08x)\n", offset, data, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
15911591   if(offset < 0x100000)
15921592      COMBINE_DATA(c412.sdram_a + (offset & 0xfffff));
15931593   else if(offset < 0x200000)
r17797r17798
16111611   case 10: return s23_c412_ram_r(space, c412.adr, mem_mask);
16121612   }
16131613
1614   logerror("c412_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1614   logerror("c412_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
16151615   return 0;
16161616}
16171617
r17797r17798
16241624   case 9: c412.adr = ((data & mem_mask) << 16) | (c412.adr & (0xffffffff ^ (mem_mask << 16))); break;
16251625   case 10: s23_c412_ram_w(space, c412.adr, data, mem_mask); c412.adr += 2; break;
16261626   default:
1627      logerror("c412_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1627      logerror("c412_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
16281628      break;
16291629   }
16301630}
r17797r17798
16331633{
16341634   c421_t &c421 = m_c421;
16351635
1636   //  logerror("c421_ram_r %06x (%08x, %08x)\n", offset, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1636   //  logerror("c421_ram_r %06x (%08x, %08x)\n", offset, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
16371637   if(offset < 0x40000)
16381638      return c421.dram_a[offset & 0x3ffff];
16391639   else if(offset < 0x80000)
r17797r17798
16481648{
16491649   c421_t &c421 = m_c421;
16501650
1651   //  logerror("c421_ram_w %06x = %04x (%08x, %08x)\n", offset, data, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1651   //  logerror("c421_ram_w %06x = %04x (%08x, %08x)\n", offset, data, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
16521652   if(offset < 0x40000)
16531653      COMBINE_DATA(c421.dram_a + (offset & 0x3ffff));
16541654   else if(offset < 0x80000)
r17797r17798
16671667   case 3: return c421.adr;
16681668   }
16691669
1670   logerror("c421_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1670   logerror("c421_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
16711671   return 0;
16721672}
16731673
r17797r17798
16801680   case 2: c421.adr = ((data & mem_mask) << 16) | (c421.adr & (0xffffffff ^ (mem_mask << 16))); break;
16811681   case 3: c421.adr = (data & mem_mask) | (c421.adr & (0xffffffff ^ mem_mask)); break;
16821682   default:
1683      logerror("c421_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1683      logerror("c421_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
16841684      break;
16851685   }
16861686}
r17797r17798
17171717
17181718   case 6:   // gmen wars spams this heavily with 0 prior to starting the GMEN board test
17191719      if (data != 0)
1720         logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1720         logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
17211721      break;
17221722
17231723   default:
1724      logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1724      logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
17251725   }
17261726}
17271727
r17797r17798
17361736      return res;
17371737   }
17381738   }
1739   logerror("ctl_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1739   logerror("ctl_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
17401740   return 0xffff;
17411741}
17421742
r17797r17798
17801780      break;
17811781
17821782   default:
1783      logerror("c361_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1783      logerror("c361_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
17841784   }
17851785}
17861786
r17797r17798
17901790   case 5: return machine().primary_screen->vpos()*2 | (machine().primary_screen->vblank() ? 1 : 0);
17911791   case 6: return machine().primary_screen->vblank();
17921792   }
1793   logerror("c361_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1793   logerror("c361_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
17941794   return 0xffff;
17951795}
17961796
r17797r17798
21852185   case 0xa: return 1; // Busy flag
21862186   }
21872187
2188   logerror("p3d_r %02x @ %08x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
2188   logerror("p3d_r %02x @ %08x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
21892189   return 0;
21902190}
21912191
r17797r17798
22032203      m_c361.timer->adjust(attotime::never);
22042204      return;
22052205   }
2206   logerror("p3d_w %02x, %08x @ %08x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
2206   logerror("p3d_w %02x, %08x @ %08x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
22072207}
22082208
22092209static void render_apply_transform(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, poly_vertex &pv)
trunk/src/mame/drivers/jaguar.c
r17797r17798
17751775
17761776
17771777   /* Some programs are too lazy to set a stack pointer */
1778   m_main_cpu->set_state(STATE_GENSP, 0x1000);
1778   m_main_cpu->set_state_int(STATE_GENSP, 0x1000);
17791779   m_shared_ram[0]=0x1000;
17801780
17811781   /* Transfer control to image */
1782   m_main_cpu->set_state(STATE_GENPC, quickload_begin);
1782   m_main_cpu->set_pc(quickload_begin);
17831783   m_shared_ram[1]=quickload_begin;
17841784   return IMAGE_INIT_PASS;
17851785}
r17797r17798
18351835//  m_cart_base[0x102] = 1;
18361836
18371837   /* Transfer control to the bios */
1838   m_main_cpu->set_state(STATE_GENPC, m_rom_base[1]);
1838   m_main_cpu->set_pc(m_rom_base[1]);
18391839   return IMAGE_INIT_PASS;
18401840}
18411841
trunk/src/mame/drivers/flicker.c
r17797r17798
116116
117117READ8_MEMBER( flicker_state::port02_r )
118118{
119   offset = cpu_get_reg(m_maincpu, I4004_RAM) & 0x0f; // we need the full address
119   offset = m_maincpu->state_int(I4004_RAM) & 0x0f; // we need the full address
120120
121121   if (offset < 7)
122122   {
r17797r17798
130130WRITE8_MEMBER( flicker_state::port00_w )
131131{
132132   static const UINT8 patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7d, 0x07, 0x7f, 0x6f, 0, 0, 0, 0, 0, 0 };
133   offset = cpu_get_reg(m_maincpu, I4004_RAM); // we need the full address
133   offset = m_maincpu->state_int(I4004_RAM); // we need the full address
134134   output_set_digit_value(offset, patterns[data]);
135135}
136136
137137WRITE8_MEMBER( flicker_state::port01_w )
138138{
139139// The output lines operate the various lamps (44 of them)
140   offset = cpu_get_reg(m_maincpu, I4004_RAM) & 0x0f; // we need the full address
140   offset = m_maincpu->state_int(I4004_RAM) & 0x0f; // we need the full address
141141
142142   UINT16 test_port = ioport("TEST")->read() & 0xf81e;
143143   UINT16 coin_port = ioport("COIN")->read() & 0x07e0;
r17797r17798
162162    9 = knocker
163163    A = coin counter
164164    B = coin acceptor */
165   offset = cpu_get_reg(m_maincpu, I4004_RAM) & 0x0f; // we need the full address
165   offset = m_maincpu->state_int(I4004_RAM) & 0x0f; // we need the full address
166166   if (data && data != offset)
167167   {
168168      switch (offset)
trunk/src/mame/drivers/vamphalf.c
r17797r17798
22092209
22102210static int irq_active(address_space *space)
22112211{
2212   UINT32 FCR = cpu_get_reg(&space->device(), 27);
2212   UINT32 FCR = space->device().state().state_int(27);
22132213   if( !(FCR&(1<<29)) ) // int 2 (irq 4)
22142214      return 1;
22152215   else
trunk/src/mame/drivers/mrdo.c
r17797r17798
3535READ8_MEMBER(mrdo_state::mrdo_SECRE_r)
3636{
3737   UINT8 *RAM = memregion("maincpu")->base();
38   return RAM[cpu_get_reg(&space.device(), Z80_HL)];
38   return RAM[space.device().state().state_int(Z80_HL)];
3939}
4040
4141
trunk/src/mame/drivers/cd32.c
r17797r17798
12401240   {
12411241      //(*state->m_chip_ram_w)(0x051c02, 0x0000);
12421242
1243      UINT32 r_A5 = cpu_get_reg(machine.device("maincpu"), M68K_A5);
1243      UINT32 r_A5 = machine.device("maincpu")->state().state_int(M68K_A5);
12441244      (*state->m_chip_ram_w)(state, r_A5 - 0x7ebe, 0x0000);
12451245   }
12461246}
r17797r17798
12591259   {
12601260      //amiga_chip_ram_w8(state, 0x002907, 0x00);
12611261
1262      UINT32 r_A5 = cpu_get_reg(machine.device("maincpu"), M68K_A5);
1262      UINT32 r_A5 = machine.device("maincpu")->state().state_int(M68K_A5);
12631263      UINT32 r_A2 = ((*state->m_chip_ram_r)(state, r_A5 - 0x7f00 + 0) << 16) | ((*state->m_chip_ram_r)(state, r_A5 - 0x7f00 + 2));
12641264      amiga_chip_ram_w8(state, r_A2 + 0x1f, 0x00);
12651265   }
r17797r17798
12791279   {
12801280      //amiga_chip_ram_w8(state, 0x001e1b, 0x00);
12811281
1282      UINT32 r_A5 = cpu_get_reg(machine.device("maincpu"), M68K_A5);
1282      UINT32 r_A5 = machine.device("maincpu")->state().state_int(M68K_A5);
12831283      UINT32 r_A2 = ((*state->m_chip_ram_r)(state, r_A5 - 0x7fe0 + 0) << 16) | ((*state->m_chip_ram_r)(state, r_A5 - 0x7fe0 + 2));
12841284      amiga_chip_ram_w8(state, r_A2 + 0x13, 0x00);
12851285   }
r17797r17798
13001300   {
13011301      //amiga_chip_ram_w8(state, 0x046107, 0x00);
13021302
1303      UINT32 r_A5 = cpu_get_reg(machine.device("maincpu"), M68K_A5);
1303      UINT32 r_A5 = machine.device("maincpu")->state().state_int(M68K_A5);
13041304      UINT32 r_A2 = ((*state->m_chip_ram_r)(state, r_A5 - 0x7fdc + 0) << 16) | ((*state->m_chip_ram_r)(state, r_A5 - 0x7fdc + 2));
13051305      amiga_chip_ram_w8(state, r_A2 + 0x17, 0x00);
13061306   }
r17797r17798
13201320   {
13211321      //amiga_chip_ram_w8(state, 0x00281c, 0x00);
13221322
1323      UINT32 r_A5 = cpu_get_reg(machine.device("maincpu"), M68K_A5);
1323      UINT32 r_A5 = machine.device("maincpu")->state().state_int(M68K_A5);
13241324      UINT32 r_A2 = ((*state->m_chip_ram_r)(state, r_A5 - 0x7fa2 + 0) << 16) | ((*state->m_chip_ram_r)(state, r_A5 - 0x7fa2 + 2));
13251325      amiga_chip_ram_w8(state, r_A2 + 0x24, 0x00);
13261326   }
r17797r17798
13401340   {
13411341      //(*state->m_chip_ram_w)(0x04bfa0, 0x0000);
13421342
1343      UINT32 r_A5 = cpu_get_reg(machine.device("maincpu"), M68K_A5);
1343      UINT32 r_A5 = machine.device("maincpu")->state().state_int(M68K_A5);
13441344      (*state->m_chip_ram_w)(state, r_A5 - 0x7ed8, 0x0000);
13451345   }
13461346}
r17797r17798
13591359   {
13601360      //amiga_chip_ram_w8(state, 0x044f7e, 0x00);
13611361
1362      UINT32 r_A5 = cpu_get_reg(machine.device("maincpu"), M68K_A5);
1362      UINT32 r_A5 = machine.device("maincpu")->state().state_int(M68K_A5);
13631363      amiga_chip_ram_w8(state, r_A5 - 0x7eca, 0x00);
13641364   }
13651365}
trunk/src/mame/drivers/bfm_sc4h.c
r17797r17798
7171      // allow some sets to boot, should probably return this data on Mbus once we figure out what it is
7272      if ((pc == m_chk41addr) && (offset == m_chk41addr>>1))
7373      {
74         UINT32 r_A0 = cpu_get_reg(&space.device(), M68K_A0);
75         UINT32 r_A1 = cpu_get_reg(&space.device(), M68K_A1);
76         UINT32 r_D1 = cpu_get_reg(&space.device(), M68K_D1);
74         UINT32 r_A0 = space.device().state().state_int(M68K_A0);
75         UINT32 r_A1 = space.device().state().state_int(M68K_A1);
76         UINT32 r_D1 = space.device().state().state_int(M68K_D1);
7777
7878         if (r_D1 == 0x7)
7979         {
trunk/src/mame/drivers/taito_l.c
r17797r17798
315315   device_set_irq_callback(state->m_maincpu, irq_callback);
316316
317317   /* kludge to make plgirls boot */
318   if (cpu_get_reg(state->m_maincpu, Z80_IM) != 2)
318   if (state->m_maincpu->state().state_int(Z80_IM) != 2)
319319      return;
320320
321321   // What is really generating interrupts 0 and 1 is still to be found
trunk/src/mame/drivers/mpu4hw.c
r17797r17798
21482148      logerror("No Characteriser Table @ %04x", space.device().safe_pcbase());
21492149
21502150      /* a cheat ... many early games use a standard check */
2151      int addr = cpu_get_reg(&space.device(), M6809_X);
2151      int addr = space.device().state().state_int(M6809_X);
21522152      if ((addr>=0x800) && (addr<=0xfff)) return 0x00; // prevent recursion, only care about ram/rom areas for this cheat.
21532153
21542154      UINT8 ret = space.read_byte(addr);
trunk/src/mame/drivers/cobra.c
r17797r17798
12461246
12471247         // EXISR needs to update for the *next* instruction during FIFO tests
12481248         // TODO: try to abort the timeslice before the next instruction?
1249         cpu_set_reg(m_subcpu, PPC_EXISR, cpu_get_reg(m_subcpu, PPC_EXISR) & ~0x10);
1249         m_subcpu->set_state_int(PPC_EXISR, m_subcpu->state_int(PPC_EXISR) & ~0x10);
12501250         break;
12511251      }
12521252
r17797r17798
14311431
14321432      // EXISR needs to update for the *next* instruction during FIFO tests
14331433      // TODO: try to abort the timeslice before the next instruction?
1434      cpu_set_reg(m_subcpu, PPC_EXISR, cpu_get_reg(m_subcpu, PPC_EXISR) | 0x10);
1434      m_subcpu->set_state_int(PPC_EXISR, m_subcpu->state_int(PPC_EXISR) | 0x10);
14351435   }
14361436   if (ACCESSING_BITS_32_39)
14371437   {
r17797r17798
17391739      {
17401740         if (!m_s2mfifo->is_half_full())
17411741         {
1742            cpu_set_reg(m_subcpu, PPC_EXISR, cpu_get_reg(m_subcpu, PPC_EXISR) | 0x08);
1742            m_subcpu->set_state_int(PPC_EXISR, m_subcpu->state_int(PPC_EXISR) | 0x08);
17431743         }
17441744         else
17451745         {
1746            cpu_set_reg(m_subcpu, PPC_EXISR, cpu_get_reg(m_subcpu, PPC_EXISR) & ~0x08);
1746            m_subcpu->set_state_int(PPC_EXISR, m_subcpu->state_int(PPC_EXISR) & ~0x08);
17471747         }
17481748      }
17491749      else
17501750      {
17511751         if (m_s2mfifo->is_empty())
17521752         {
1753            cpu_set_reg(m_subcpu, PPC_EXISR, cpu_get_reg(m_subcpu, PPC_EXISR) | 0x08);
1753            m_subcpu->set_state_int(PPC_EXISR, m_subcpu->state_int(PPC_EXISR) | 0x08);
17541754         }
17551755         else
17561756         {
1757            cpu_set_reg(m_subcpu, PPC_EXISR, cpu_get_reg(m_subcpu, PPC_EXISR) & ~0x08);
1757            m_subcpu->set_state_int(PPC_EXISR, m_subcpu->state_int(PPC_EXISR) & ~0x08);
17581758         }
17591759      }
17601760   }
trunk/src/mame/drivers/sigmab98.c
r17797r17798
17431743
17441744static MACHINE_RESET( sammymdl )
17451745{
1746   cpu_set_reg(machine.device("maincpu"), Z80_PC, 0x400);   // code starts at 400 ??? (000 = cart header)
1746   machine.device("maincpu")->state().set_state_int(Z80_PC, 0x400);   // code starts at 400 ??? (000 = cart header)
17471747}
17481748
17491749static MACHINE_CONFIG_START( sammymdl, sigmab98_state )
trunk/src/mame/drivers/calchase.c
r17797r17798
356356            #if 0
357357            if ((state->m_mxtc_config_reg[0x63] & 0x50) | ( state->m_mxtc_config_reg[0x63] & 0xA0)) // Only DO if comes a change to disable ROM.
358358            {
359               if ( busdevice->machine(->safe_pc().device("maincpu"))==0xff74e) cpu_set_reg(busdevice->machine().device("maincpu"), STATE_GENPC, 0xff74d);
359               if ( busdevice->machine(->safe_pc().device("maincpu"))==0xff74e) busdevice->machine().device("maincpu")->state().set_pc(0xff74d);
360360            }
361361            #endif
362362
trunk/src/mame/drivers/model1.c
r17797r17798
850850
851851READ16_MEMBER(model1_state::snd_68k_ready_r)
852852{
853   int sr = cpu_get_reg(machine().device("audiocpu"), M68K_SR);
853   int sr = machine().device("audiocpu")->state().state_int(M68K_SR);
854854
855855   if ((sr & 0x0700) > 0x0100)
856856   {
trunk/src/mame/drivers/qdrmfgp.c
r17797r17798
242242         switch (space.device().safe_pcbase())
243243         {
244244            case 0xdb4c:
245               if ((m_workram[0x5fa4/2] - cpu_get_reg(&space.device(), M68K_D0)) <= 0x10)
245               if ((m_workram[0x5fa4/2] - space.device().state().state_int(M68K_D0)) <= 0x10)
246246                  m_gp2_irq_control = 1;
247247               break;
248248            case 0xdec2:
trunk/src/mame/drivers/bmcbowl.c
r17797r17798
206206   switch(space.device().safe_pcbase())
207207   {
208208      case 0xca68:
209         switch(cpu_get_reg(&space.device(), M68K_D2))
209         switch(space.device().state().state_int(M68K_D2))
210210         {
211211            case 0:        return 0x37<<8;
212212            case 0x1013: return 0;
trunk/src/mame/drivers/tmnt.c
r17797r17798
381381
382382      default:
383383         popmessage("%06x: unknown protection read",space.device().safe_pc());
384         logerror("%06x: read 1c0800 (D7=%02x 1058fc=%02x 105a0a=%02x)\n",space.device().safe_pc(),(UINT32)cpu_get_reg(&space.device(), M68K_D7),cmd,data);
384         logerror("%06x: read 1c0800 (D7=%02x 1058fc=%02x 105a0a=%02x)\n",space.device().safe_pc(),(UINT32)space.device().state().state_int(M68K_D7),cmd,data);
385385         return 0xffff;
386386    }
387387}
trunk/src/mame/drivers/raiden2.c
r17797r17798
143143
144144static UINT16 rps(running_machine &machine)
145145{
146   return cpu_get_reg(machine.device("maincpu"), NEC_CS);
146   return machine.device("maincpu")->state().state_int(NEC_CS);
147147}
148148
149149static UINT16 rpc(running_machine &machine)
150150{
151   return cpu_get_reg(machine.device("maincpu"), NEC_IP);
151   return machine.device("maincpu")->state().state_int(NEC_IP);
152152}
153153
154154WRITE16_MEMBER(raiden2_state::cop_pgm_data_w)
trunk/src/mame/drivers/1943.c
r17797r17798
4343        if a read from this address doesn't return the value it expects.
4444    */
4545
46   int data = cpu_get_reg(&space.device(), Z80_BC) >> 8;
46   int data = space.device().state().state_int(Z80_BC) >> 8;
4747//  logerror("protection read, PC: %04x Result:%02x\n", space.device().safe_pc(), data);
4848   return data;
4949}
trunk/src/mame/drivers/solomon.c
r17797r17798
2929   }
3030   else if (space.device().safe_pc() == 0x4cf0) // stop it clearing the screen at certain scores
3131   {
32      return (cpu_get_reg(&space.device(), Z80_BC) & 0x08);
32      return (space.device().state().state_int(Z80_BC) & 0x08);
3333   }
3434   else
3535   {
trunk/src/mame/drivers/atarigx2.c
r17797r17798
148148   {
149149      int pc = space.device().safe_pcbase();
150150//      if (pc == 0x11cbe || pc == 0x11c30)
151//          logerror("%06X:Protection W@%04X = %04X  (result to %06X)\n", pc, offset, data, cpu_get_reg(&space.device(), M68K_A2));
151//          logerror("%06X:Protection W@%04X = %04X  (result to %06X)\n", pc, offset, data, space.device().state().state_int(M68K_A2));
152152//      else
153153      if (ACCESSING_BITS_16_31)
154154         logerror("%06X:Protection W@%04X = %04X\n", pc, offset * 4, data >> 16);
trunk/src/mame/drivers/atarigt.c
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462462      case 0x275bc:
463463         break;
464464      case 0x275cc:
465         a6 = cpu_get_reg(&space->device(), M68K_A6);
465         a6 = space->device().state().state_int(M68K_A6);
466466         p1 = (space->read_word(a6+8) << 16) | space->read_word(a6+10);
467467         p2 = (space->read_word(a6+12) << 16) | space->read_word(a6+14);
468468         logerror("Known Protection @ 275BC(%08X, %08X): R@%06X ", p1, p2, offset);
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480480
481481      /* protection code from 3d8dc - 3d95a */
482482      case 0x3d8f4:
483         a6 = cpu_get_reg(&space->device(), M68K_A6);
483         a6 = space->device().state().state_int(M68K_A6);
484484         p1 = (space->read_word(a6+12) << 16) | space->read_word(a6+14);
485485         logerror("Known Protection @ 3D8F4(%08X): R@%06X ", p1, offset);
486486         break;
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491491
492492      /* protection code from 437fa - 43860 */
493493      case 0x43814:
494         a6 = cpu_get_reg(&space->device(), M68K_A6);
494         a6 = space->device().state().state_int(M68K_A6);
495495         p1 = space->read_dword(a6+14) & 0xffffff;
496496         logerror("Known Protection @ 43814(%08X): R@%06X ", p1, offset);
497497         break;
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12491249   /* protected version */
12501250   if (pc == 0x2EB3C || pc == 0x2EB48)
12511251   {
1252      logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", space.device().safe_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A4) - 2);
1252      logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", space.device().safe_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)space.device().state().state_int(M68K_A4) - 2);
12531253      /* skip these writes to make more stuff visible */
12541254      return;
12551255   }
12561256
12571257   /* unprotected version */
12581258   if (pc == 0x25834 || pc == 0x25860)
1259      logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", space.device().safe_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A3) - 2);
1259      logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", space.device().safe_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)space.device().state().state_int(M68K_A3) - 2);
12601260
12611261   atarigen_playfield32_w(&space, offset, data, mem_mask);
12621262}
trunk/src/emu/debug/debugcpu.c
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31263126UINT64 device_debug::get_state(symbol_table &table, void *ref)
31273127{
31283128   device_t *device = reinterpret_cast<device_t *>(table.globalref());
3129   return device->debug()->m_state->state(reinterpret_cast<FPTR>(ref));
3129   return device->debug()->m_state->state_int(reinterpret_cast<FPTR>(ref));
31303130}
31313131
31323132
r17797r17798
31383138void device_debug::set_state(symbol_table &table, void *ref, UINT64 value)
31393139{
31403140   device_t *device = reinterpret_cast<device_t *>(table.globalref());
3141   device->debug()->m_state->set_state(reinterpret_cast<FPTR>(ref), value);
3141   device->debug()->m_state->set_state_int(reinterpret_cast<FPTR>(ref), value);
31423142}
31433143
31443144
trunk/src/emu/debug/dvstate.c
r17797r17798
299299         {
300300            if (m_last_update != total_cycles)
301301               curitem->m_lastval = curitem->m_currval;
302            curitem->m_currval = source.m_stateintf->state(curitem->m_index);
302            curitem->m_currval = source.m_stateintf->state_int(curitem->m_index);
303303            source.m_stateintf->state_string(curitem->m_index, valstr);
304304         }
305305
trunk/src/emu/cpu/i8085/i8085.h
r17797r17798
5656
5757CPU_DISASSEMBLE( i8085 );
5858
59#define i8085_set_sid(cpu, sid)      cpu_set_reg(cpu, I8085_SID, sid)
59#define i8085_set_sid(cpu, sid)      (cpu)->state().set_state_int(I8085_SID, sid)
6060
6161#endif
trunk/src/emu/cpu/pdp1/tx0.h
r17797r17798
2020   TX0_IO_COMPLETE      /* hack, do not use directly, use tx0_pulse_io_complete instead */
2121};
2222
23#define tx0_pulse_reset(cpudevice)         cpu_set_reg(cpudevice, TX0_RESET, 0)
24#define tx0_pulse_io_complete(cpudevice)   cpu_set_reg(cpudevice, TX0_IO_COMPLETE, 0)
23#define tx0_pulse_reset(cpudevice)         (cpudevice)->state().set_state_int(TX0_RESET, 0)
24#define tx0_pulse_io_complete(cpudevice)   (cpudevice)->state().set_state_int(TX0_IO_COMPLETE, 0)
2525
2626typedef struct _tx0_reset_param_t tx0_reset_param_t;
2727struct _tx0_reset_param_t
trunk/src/emu/cpu/pdp1/pdp1.c
r17797r17798
17071707   if (LOG_IOT_EXTRA)
17081708   {
17091709      if (op2 == 000)
1710         logerror("IOT sync instruction: mb=0%06o, pc=0%06o\n", (unsigned) mb, (unsigned) cpu_get_reg(device, PDP1_PC));
1710         logerror("IOT sync instruction: mb=0%06o, pc=0%06o\n", (unsigned) mb, (unsigned) device->state().state_int(PDP1_PC));
17111711   }
17121712   if (LOG)
17131713   {
trunk/src/emu/cpu/pdp1/pdp1.h
r17797r17798
1919   PDP1_IO_COMPLETE   /* hack, do not use directly, use pdp1_pulse_iot_done instead */
2020};
2121
22#define pdp1_pulse_start_clear(cpudevice)   cpu_set_reg(cpudevice, PDP1_START_CLEAR, (UINT64)0)
23#define pdp1_pulse_iot_done(cpudevice)      cpu_set_reg(cpudevice, PDP1_IO_COMPLETE, (UINT64)0)
22#define pdp1_pulse_start_clear(cpudevice)   (cpudevice)->state().set_state_int(PDP1_START_CLEAR, (UINT64)0)
23#define pdp1_pulse_iot_done(cpudevice)      (cpudevice)->state().set_state_int(PDP1_IO_COMPLETE, (UINT64)0)
2424
2525typedef void (*pdp1_extern_iot_func)(device_t *device, int op2, int nac, int mb, int *io, int ac);
2626typedef void (*pdp1_read_binary_word_func)(device_t *device);
trunk/src/emu/distate.c
r17797r17798
403403
404404
405405//-------------------------------------------------
406//  state - return the value of the given piece
406//  state_int - return the value of the given piece
407407//  of indexed state as a UINT64
408408//-------------------------------------------------
409409
410UINT64 device_state_interface::state(int index)
410UINT64 device_state_interface::state_int(int index)
411411{
412412   // NULL or out-of-range entry returns 0
413413   const device_state_entry *entry = state_find_entry(index);
r17797r17798
464464
465465
466466//-------------------------------------------------
467//  set_state - set the value of the given piece
468//  of indexed state from a UINT64
467//  set_state_int - set the value of the given
468//   piece of indexed state from a UINT64
469469//-------------------------------------------------
470470
471void device_state_interface::set_state(int index, UINT64 value)
471void device_state_interface::set_state_int(int index, UINT64 value)
472472{
473473   // NULL or out-of-range entry is a no-op
474474   const device_state_entry *entry = state_find_entry(index);
trunk/src/emu/distate.h
r17797r17798
151151   const device_state_entry *state_first() const { return m_state_list.first(); }
152152
153153   // state getters
154   UINT64 state(int index);
155   offs_t pc() { return state(STATE_GENPC); }
156   offs_t pcbase() { return state(STATE_GENPCBASE); }
157   offs_t sp() { return state(STATE_GENSP); }
158   UINT64 flags() { return state(STATE_GENFLAGS); }
154   UINT64 state_int(int index);
159155   astring &state_string(int index, astring &dest);
160156   int state_string_max_length(int index);
157   offs_t pc() { return state_int(STATE_GENPC); }
158   offs_t pcbase() { return state_int(STATE_GENPCBASE); }
159   offs_t sp() { return state_int(STATE_GENSP); }
160   UINT64 flags() { return state_int(STATE_GENFLAGS); }
161161
162162   // state setters
163   void set_state(int index, UINT64 value);
163   void set_state_int(int index, UINT64 value);
164164   void set_state_string(int index, const char *string);
165   void set_pc(offs_t pc) { set_state_int(STATE_GENPC, pc); }
165166   
166167   // deliberately ambiguous functions; if you have the state interface
167   // just use pc() and pcbase() directly
168   // just use it or pc() and pcbase() directly
169   device_state_interface &state() { return *this; }
168170   offs_t safe_pc() { return pc(); }
169171   offs_t safe_pcbase() { return pcbase(); }
170172
trunk/src/emu/drivers/testcpu.c
r17797r17798
8888         m_space->write_dword(RAM_BASE + 4, 0x4e800020);
8989
9090         // initialize the register state
91         m_cpu->set_state(PPC_PC, RAM_BASE);
91         m_cpu->set_state_int(PPC_PC, RAM_BASE);
9292         for (int regnum = 0; regnum < 32; regnum++)
93            m_cpu->set_state(PPC_R0 + regnum, regnum | (regnum << 8) | (regnum << 16) | (regnum << 24));
94         m_cpu->set_state(PPC_CR, 0);
95         m_cpu->set_state(PPC_LR, 0x12345678);
96         m_cpu->set_state(PPC_CTR, 0x1000);
97         m_cpu->set_state(PPC_XER, 0);
93            m_cpu->set_state_int(PPC_R0 + regnum, regnum | (regnum << 8) | (regnum << 16) | (regnum << 24));
94         m_cpu->set_state_int(PPC_CR, 0);
95         m_cpu->set_state_int(PPC_LR, 0x12345678);
96         m_cpu->set_state_int(PPC_CTR, 0x1000);
97         m_cpu->set_state_int(PPC_XER, 0);
9898         for (int regnum = 0; regnum < 32; regnum++)
9999         {
100100            double value = double(regnum | (regnum << 8) | (regnum << 16) | (regnum << 24));
101            m_cpu->set_state(PPC_F0 + regnum, d2u(value));
101            m_cpu->set_state_int(PPC_F0 + regnum, d2u(value));
102102         }
103103
104104         // output initial state
r17797r17798
151151      }
152152
153153      // output the registers
154      printf("PC : %08X", UINT32(m_cpu->state(PPC_PC)));
154      printf("PC : %08X", UINT32(m_cpu->state_int(PPC_PC)));
155155      if (disassemble && bytes > 0)
156156      {
157157         printf(" => ");
r17797r17798
162162      printf("\n");
163163      for (int regnum = 0; regnum < 32; regnum++)
164164      {
165         printf("R%-2d: %08X   ", regnum, UINT32(m_cpu->state(PPC_R0 + regnum)));
165         printf("R%-2d: %08X   ", regnum, UINT32(m_cpu->state_int(PPC_R0 + regnum)));
166166         if (regnum % 4 == 3) printf("\n");
167167      }
168168      printf("CR : %08X   LR : %08X   CTR: %08X   XER: %08X\n",
169            UINT32(m_cpu->state(PPC_CR)), UINT32(m_cpu->state(PPC_LR)),
170            UINT32(m_cpu->state(PPC_CTR)), UINT32(m_cpu->state(PPC_XER)));
169            UINT32(m_cpu->state_int(PPC_CR)), UINT32(m_cpu->state_int(PPC_LR)),
170            UINT32(m_cpu->state_int(PPC_CTR)), UINT32(m_cpu->state_int(PPC_XER)));
171171      for (int regnum = 0; regnum < 32; regnum++)
172172      {
173         printf("F%-2d: %10g   ", regnum, u2d(m_cpu->state(PPC_F0 + regnum)));
173         printf("F%-2d: %10g   ", regnum, u2d(m_cpu->state_int(PPC_F0 + regnum)));
174174         if (regnum % 4 == 3) printf("\n");
175175      }
176176   }
trunk/src/emu/devcpu.h
r17797r17798
292292#define CPU_EXPORT_STRING_CALL(name)   CPU_EXPORT_STRING_NAME(name)(device, entry, string)
293293
294294
295// CPU timing
296#define cpu_get_reg(cpu, _reg)            device_state(cpu)->state(_reg)
297#define cpu_set_reg(cpu, _reg, val)         device_state(cpu)->set_state(_reg, val)
298
299295// helpers for using machine/cputag instead of cpu objects
300296#define cputag_set_input_line(mach, tag, line, state)               device_execute((mach).device(tag))->set_input_line(line, state)
301297#define cputag_set_input_line_and_vector(mach, tag, line, state, vec)   device_execute((mach).device(tag))->set_input_line_and_vector(line, state, vec)
trunk/src/emu/device.h
r17797r17798
180180   bool interface(device_state_interface *&intf) const { intf = m_state; return (intf != NULL); }
181181   device_execute_interface &execute() const { assert(m_execute != NULL); return *m_execute; }
182182   device_memory_interface &memory() const { assert(m_memory != NULL); return *m_memory; }
183   device_state_interface &state() const { assert(m_state != NULL); return *m_state; }
183184
184185   // owned object helpers
185186   device_t *first_subdevice() const { return m_subdevice_list.first(); }
trunk/src/mess/machine/isa_fdc.c
r17797r17798
371371    }
372372
373373   if (LOG_FDC)
374      logerror("pc_fdc_r(): pc=0x%08x offset=%d result=0x%02X\n", (unsigned) cpu_get_reg(device->machine().firstcpu,STATE_GENPC), offset, data);
374      logerror("pc_fdc_r(): pc=0x%08x offset=%d result=0x%02X\n", (unsigned) device->machine().firstcpu->pc(), offset, data);
375375   return data;
376376}
377377
r17797r17798
382382   isa8_fdc_device   *fdc  = downcast<isa8_fdc_device *>(device);
383383
384384   if (LOG_FDC)
385      logerror("pc_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) cpu_get_reg(device->machine().firstcpu,STATE_GENPC), offset, data);
385      logerror("pc_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) device->machine().firstcpu->pc(), offset, data);
386386   pc_fdc_check_data_rate(fdc,device->machine());  // check every time a command may start
387387   device_t *hdd = NULL;
388388
trunk/src/mess/machine/c64_cpm.c
r17797r17798
9595        if (m_reset)
9696        {
9797           m_maincpu->reset();
98            m_maincpu->set_state(Z80_PC, 0);
98            m_maincpu->set_state_int(Z80_PC, 0);
9999           m_reset = 0;
100100        }
101101   }
trunk/src/mess/machine/dai.c
r17797r17798
3636
3737static TIMER_CALLBACK(dai_bootstrap_callback)
3838{
39   cpu_set_reg(machine.device("maincpu"), STATE_GENPC, 0xc000);
39   machine.device("maincpu")->state().set_pc(0xc000);
4040}
4141
4242
trunk/src/mess/machine/mbee.c
r17797r17798
789789      if (sw)
790790      {
791791         space->write_word(0xa2,0x801e);   /* fix warm-start vector to get around some copy-protections */
792         cpu_set_reg(cpu, STATE_GENPC, 0x801e);
792         cpu->state().set_pc(0x801e);
793793      }
794794      else
795795         space->write_word(0xa2,0x8517);
r17797r17798
816816         }
817817      }
818818
819      if (sw) cpu_set_reg(cpu, STATE_GENPC, 0x100);
819      if (sw) cpu->state().set_pc(0x100);
820820   }
821821
822822   return IMAGE_INIT_PASS;
trunk/src/mess/machine/at.c
r17797r17798
132132   if (LOG_PORT80 && (offset == 0))
133133   {
134134      logerror(" at_page8_w(): Port 80h <== 0x%02x (PC=0x%08x)\n", data,
135                     (unsigned) cpu_get_reg(m_maincpu, STATE_GENPC));
135                     (unsigned) m_maincpu->pc());
136136   }
137137
138138   switch(offset % 8)
trunk/src/mess/machine/poly88.c
r17797r17798
302302               break;
303303         case 3 :
304304               /* 03 Auto Start @ Address */
305               cpu_set_reg(image.device().machine().device("maincpu"), I8085_PC, address);
305               image.device().machine().device("maincpu")->state().set_state_int(I8085_PC, address);
306306               theend = 1;
307307               break;
308308         case 4 :
trunk/src/mess/machine/primo.c
r17797r17798
273273
274274   /* Z80 registers */
275275
276   cpu_set_reg(machine.device("maincpu"), Z80_BC, snapshot_data[4] + snapshot_data[5]*256);
277   cpu_set_reg(machine.device("maincpu"), Z80_DE, snapshot_data[6] + snapshot_data[7]*256);
278   cpu_set_reg(machine.device("maincpu"), Z80_HL, snapshot_data[8] + snapshot_data[9]*256);
279   cpu_set_reg(machine.device("maincpu"), Z80_AF, snapshot_data[10] + snapshot_data[11]*256);
280   cpu_set_reg(machine.device("maincpu"), Z80_BC2, snapshot_data[12] + snapshot_data[13]*256);
281   cpu_set_reg(machine.device("maincpu"), Z80_DE2, snapshot_data[14] + snapshot_data[15]*256);
282   cpu_set_reg(machine.device("maincpu"), Z80_HL2, snapshot_data[16] + snapshot_data[17]*256);
283   cpu_set_reg(machine.device("maincpu"), Z80_AF2, snapshot_data[18] + snapshot_data[19]*256);
284   cpu_set_reg(machine.device("maincpu"), Z80_PC, snapshot_data[20] + snapshot_data[21]*256);
285   cpu_set_reg(machine.device("maincpu"), Z80_SP, snapshot_data[22] + snapshot_data[23]*256);
286   cpu_set_reg(machine.device("maincpu"), Z80_I, snapshot_data[24]);
287   cpu_set_reg(machine.device("maincpu"), Z80_R, snapshot_data[25]);
288   cpu_set_reg(machine.device("maincpu"), Z80_IX, snapshot_data[26] + snapshot_data[27]*256);
289   cpu_set_reg(machine.device("maincpu"), Z80_IY, snapshot_data[28] + snapshot_data[29]*256);
276   machine.device("maincpu")->state().set_state_int(Z80_BC, snapshot_data[4] + snapshot_data[5]*256);
277   machine.device("maincpu")->state().set_state_int(Z80_DE, snapshot_data[6] + snapshot_data[7]*256);
278   machine.device("maincpu")->state().set_state_int(Z80_HL, snapshot_data[8] + snapshot_data[9]*256);
279   machine.device("maincpu")->state().set_state_int(Z80_AF, snapshot_data[10] + snapshot_data[11]*256);
280   machine.device("maincpu")->state().set_state_int(Z80_BC2, snapshot_data[12] + snapshot_data[13]*256);
281   machine.device("maincpu")->state().set_state_int(Z80_DE2, snapshot_data[14] + snapshot_data[15]*256);
282   machine.device("maincpu")->state().set_state_int(Z80_HL2, snapshot_data[16] + snapshot_data[17]*256);
283   machine.device("maincpu")->state().set_state_int(Z80_AF2, snapshot_data[18] + snapshot_data[19]*256);
284   machine.device("maincpu")->state().set_state_int(Z80_PC, snapshot_data[20] + snapshot_data[21]*256);
285   machine.device("maincpu")->state().set_state_int(Z80_SP, snapshot_data[22] + snapshot_data[23]*256);
286   machine.device("maincpu")->state().set_state_int(Z80_I, snapshot_data[24]);
287   machine.device("maincpu")->state().set_state_int(Z80_R, snapshot_data[25]);
288   machine.device("maincpu")->state().set_state_int(Z80_IX, snapshot_data[26] + snapshot_data[27]*256);
289   machine.device("maincpu")->state().set_state_int(Z80_IY, snapshot_data[28] + snapshot_data[29]*256);
290290
291291
292292   /* IO ports */
r17797r17798
349349   for (i=4; i<quickload_size; i++)
350350      machine.device("maincpu")->memory().space(AS_PROGRAM)->write_byte(start_addr+i-4, quickload_data[i]);
351351
352   cpu_set_reg(machine.device("maincpu"), Z80_PC, start_addr);
352   machine.device("maincpu")->state().set_state_int(Z80_PC, start_addr);
353353
354354   logerror ("Quickload .pp l: %04x r: %04x s: %04x\n", load_addr, start_addr, quickload_size-4);
355355}
trunk/src/mess/machine/isa_hdc.c
r17797r17798
506506   {
507507      command_name = hdc_command_names[cmd] ? hdc_command_names[cmd] : "Unknown";
508508      logerror("pc_hdc_command(): Executing command; pc=0x%08x cmd=0x%02x (%s) drv=%d\n",
509         (unsigned) cpu_get_reg(machine().firstcpu, STATE_GENPC), cmd, command_name, drv);
509         (unsigned) machine().firstcpu->pc(), cmd, command_name, drv);
510510   }
511511
512512   switch (cmd)
r17797r17798
544544         if (LOG_HDC_STATUS)
545545         {
546546            logerror("hdc read pc=0x%08x D:%d C:%d H:%d S:%d N:%d CTL:$%02x\n",
547               (unsigned) cpu_get_reg(machine().firstcpu, STATE_GENPC), drv, cylinder[drv], head[drv], sector[drv], sector_cnt[drv], control[drv]);
547               (unsigned) machine().firstcpu->pc(), drv, cylinder[drv], head[drv], sector[drv], sector_cnt[drv], control[drv]);
548548         }
549549
550550         if (test_ready())
r17797r17798
559559         if (LOG_HDC_STATUS)
560560         {
561561            logerror("hdc write pc=0x%08x  D:%d C:%d H:%d S:%d N:%d CTL:$%02x\n",
562               (unsigned) cpu_get_reg(machine().firstcpu, STATE_GENPC), drv, cylinder[drv], head[drv], sector[drv], sector_cnt[drv], control[drv]);
562               (unsigned) machine().firstcpu->pc(), drv, cylinder[drv], head[drv], sector[drv], sector_cnt[drv], control[drv]);
563563         }
564564
565565         if (test_ready())
r17797r17798
673673      if (--data_cnt == 0)
674674      {
675675         if (LOG_HDC_STATUS)
676            logerror("pc_hdc_data_w(): Launching command; pc=0x%08x\n", (unsigned) cpu_get_reg(machine().firstcpu, STATE_GENPC));
676            logerror("pc_hdc_data_w(): Launching command; pc=0x%08x\n", (unsigned) machine().firstcpu->pc());
677677
678678            status &= ~STA_COMMAND;
679679         status &= ~STA_REQUEST;
trunk/src/mess/machine/kaypro.c
r17797r17798
280280
281281static TIMER_CALLBACK( kaypro_timer_callback )
282282{
283   if (cpu_get_reg(machine.device("maincpu"), Z80_HALT))
283   if (machine.device("maincpu")->state().state_int(Z80_HALT))
284284      cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
285285}
286286
r17797r17798
364364   state->common_pio_system_w(*space, 0, state->m_system_port & 0x7f);   // switch TPA in
365365   RAM[0x80]=0;                     // clear out command tail
366366   RAM[0x81]=0;
367   cpu_set_reg(state->m_maincpu, STATE_GENPC, 0x100);            // start program
367   state->m_maincpu->set_pc(0x100);            // start program
368368   return IMAGE_INIT_PASS;
369369}
370370
r17797r17798
386386   state->kaypro2x_system_port_w(*space, 0, state->m_system_port & 0x7f);
387387   RAM[0x80]=0;
388388   RAM[0x81]=0;
389   cpu_set_reg(state->m_maincpu, STATE_GENPC, 0x100);
389   state->m_maincpu->set_pc(0x100);
390390   return IMAGE_INIT_PASS;
391391}
trunk/src/mess/machine/pc_fdc.c
r17797r17798
513513    }
514514
515515   if (LOG_FDC)
516      logerror("pc_fdc_r(): pc=0x%08x offset=%d result=0x%02X\n", (unsigned) cpu_get_reg(space->machine().firstcpu,STATE_GENPC), offset, data);
516      logerror("pc_fdc_r(): pc=0x%08x offset=%d result=0x%02X\n", (unsigned) space->machine().firstcpu->pc(), offset, data);
517517   return data;
518518}
519519
r17797r17798
522522WRITE8_HANDLER ( pc_fdc_w )
523523{
524524   if (LOG_FDC)
525      logerror("pc_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) cpu_get_reg(space->machine().firstcpu,STATE_GENPC), offset, data);
525      logerror("pc_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) space->machine().firstcpu->pc(), offset, data);
526526
527527   pc_fdc_check_data_rate(space->machine());  // check every time a command may start
528528   switch(offset)
r17797r17798
563563WRITE8_HANDLER ( pcjr_fdc_w )
564564{
565565   if (LOG_FDC)
566      logerror("pcjr_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) cpu_get_reg(space->machine().firstcpu,STATE_GENPC), offset, data);
566      logerror("pcjr_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) space->machine().firstcpu->pc(), offset, data);
567567
568568   switch(offset)
569569   {
trunk/src/mess/machine/bebox.c
r17797r17798
333333      assert_always((interrupt_bit < ARRAY_LENGTH(interrupt_names)) && (interrupt_names[interrupt_bit] != NULL), "Raising invalid interrupt");
334334
335335      logerror("bebox_set_irq_bit(): pc[0]=0x%08x pc[1]=0x%08x %s interrupt #%u (%s)\n",
336         (unsigned) cpu_get_reg(machine.device("ppc1"), STATE_GENPC),
337         (unsigned) cpu_get_reg(machine.device("ppc2"), STATE_GENPC),
336         (unsigned) machine.device("ppc1")->safe_pc(),
337         (unsigned) machine.device("ppc2")->safe_pc(),
338338         val ? "Asserting" : "Clearing",
339339         interrupt_bit, interrupt_names[interrupt_bit]);
340340   }
trunk/src/mess/machine/intv.c
r17797r17798
625625   device_set_input_line_vector(machine.device("maincpu"), CP1610_INT_INTR,  0x1004);
626626
627627   /* Set initial PC */
628   cpu_set_reg(machine.device("maincpu"), CP1610_R7, 0x1000);
628   machine.device("maincpu")->state().set_state_int(CP1610_R7, 0x1000);
629629
630630   return;
631631}
r17797r17798
645645   device_set_input_line_vector(machine.device("maincpu"), CP1610_INT_INTR,  0x1004);
646646
647647   /* Set initial PC */
648   cpu_set_reg(machine.device("maincpu"), CP1610_R7, 0x1000);
648   machine.device("maincpu")->state().set_state_int(CP1610_R7, 0x1000);
649649
650650   return;
651651}
trunk/src/mess/machine/pc.c
r17797r17798
296296
297297static WRITE_LINE_DEVICE_HANDLER( pcjr_pic8259_set_int_line )
298298{
299   if ( cpu_get_reg( device->machine().firstcpu, STATE_GENPC ) == 0xF0454 )
299   if ( device->machine().firstcpu->pc() == 0xF0454 )
300300   {
301301      pc_int_delay_timer->adjust( device->machine().firstcpu->cycles_to_attotime(1), state );
302302   }
r17797r17798
12651265   data = wd17xx_drq_r(device);
12661266   if (!data && !wd17xx_intrq_r(device)) {
12671267      /* fake cpu halt by resetting PC one insn back */
1268      newpc = cpu_get_reg( device->machine().firstcpu, STATE_GENPC );
1269      cpu_set_reg( device->machine().firstcpu, STATE_GENPC, newpc - 1 );
1268      newpc = device->machine().firstcpu->pc();
1269      device->machine().firstcpu->set_pc( newpc - 1 );
12701270   }
12711271
12721272   return data;
trunk/src/mess/machine/pecom.c
r17797r17798
106106       Address is available on address bus during reading of value from port, and that is
107107       used to determine keyboard line reading
108108    */
109   UINT16 addr = cpu_get_reg(machine().device(CDP1802_TAG), COSMAC_R0 + cpu_get_reg(machine().device(CDP1802_TAG), COSMAC_X));
109   UINT16 addr = machine().device(CDP1802_TAG)->state().state_int(COSMAC_R0 + machine().device(CDP1802_TAG)->state().state_int(COSMAC_X));
110110   /* just in case somone is reading non existing ports */
111111   if (addr<0x7cca || addr>0x7ce3) return 0;
112112   return ioport(keynames[addr - 0x7cca])->read() & 0x03;
trunk/src/mess/machine/radio86.c
r17797r17798
163163
164164READ8_MEMBER(radio86_state::radio_cpu_state_r)
165165{
166   return cpu_get_reg(&space.device(), I8085_STATUS);
166   return space.device().state().state_int(I8085_STATUS);
167167}
168168
169169READ8_MEMBER(radio86_state::radio_io_r)
trunk/src/mess/machine/c128.c
r17797r17798
758758             * driver used to work with this behavior, so I am doing this hack
759759             * where I set CPU #1's PC to 0x1100 on reset.
760760             */
761         if (cpu_get_reg(m_subcpu, STATE_GENPC) == 0x0000)
762            cpu_set_reg(m_subcpu, STATE_GENPC, 0x1100);
761         if (m_subcpu->pc() == 0x0000)
762            m_subcpu->set_pc(0x1100);
763763      }
764764      m_mmu_cpu = MMU_CPU8502;
765765      return;
trunk/src/mess/machine/sorcerer.c
r17797r17798
330330   image.fread( RAM+0xc000, 0x4000);
331331
332332   /* patch CPU registers */
333   cpu_set_reg(cpu, Z80_I, header[0]);
334   cpu_set_reg(cpu, Z80_HL2, header[1] | (header[2] << 8));
335   cpu_set_reg(cpu, Z80_DE2, header[3] | (header[4] << 8));
336   cpu_set_reg(cpu, Z80_BC2, header[5] | (header[6] << 8));
337   cpu_set_reg(cpu, Z80_AF2, header[7] | (header[8] << 8));
338   cpu_set_reg(cpu, Z80_HL, header[9] | (header[10] << 8));
339   cpu_set_reg(cpu, Z80_DE, header[11] | (header[12] << 8));
340   cpu_set_reg(cpu, Z80_BC, header[13] | (header[14] << 8));
341   cpu_set_reg(cpu, Z80_IY, header[15] | (header[16] << 8));
342   cpu_set_reg(cpu, Z80_IX, header[17] | (header[18] << 8));
343   cpu_set_reg(cpu, Z80_IFF1, header[19]&2 ? 1 : 0);
344   cpu_set_reg(cpu, Z80_IFF2, header[19]&4 ? 1 : 0);
345   cpu_set_reg(cpu, Z80_R, header[20]);
346   cpu_set_reg(cpu, Z80_AF, header[21] | (header[22] << 8));
347   cpu_set_reg(cpu, STATE_GENSP, header[23] | (header[24] << 8));
348   cpu_set_reg(cpu, Z80_IM, header[25]);
349   cpu_set_reg(cpu, STATE_GENPC, header[26] | (header[27] << 8));
333   cpu->state().set_state_int(Z80_I, header[0]);
334   cpu->state().set_state_int(Z80_HL2, header[1] | (header[2] << 8));
335   cpu->state().set_state_int(Z80_DE2, header[3] | (header[4] << 8));
336   cpu->state().set_state_int(Z80_BC2, header[5] | (header[6] << 8));
337   cpu->state().set_state_int(Z80_AF2, header[7] | (header[8] << 8));
338   cpu->state().set_state_int(Z80_HL, header[9] | (header[10] << 8));
339   cpu->state().set_state_int(Z80_DE, header[11] | (header[12] << 8));
340   cpu->state().set_state_int(Z80_BC, header[13] | (header[14] << 8));
341   cpu->state().set_state_int(Z80_IY, header[15] | (header[16] << 8));
342   cpu->state().set_state_int(Z80_IX, header[17] | (header[18] << 8));
343   cpu->state().set_state_int(Z80_IFF1, header[19]&2 ? 1 : 0);
344   cpu->state().set_state_int(Z80_IFF2, header[19]&4 ? 1 : 0);
345   cpu->state().set_state_int(Z80_R, header[20]);
346   cpu->state().set_state_int(Z80_AF, header[21] | (header[22] << 8));
347   cpu->state().set_state_int(STATE_GENSP, header[23] | (header[24] << 8));
348   cpu->state().set_state_int(Z80_IM, header[25]);
349   cpu->state().set_pc(header[26] | (header[27] << 8));
350350
351351   return IMAGE_INIT_PASS;
352352}
trunk/src/mess/machine/amstrad.c
r17797r17798
21842184
21852185   /* init Z80 */
21862186   RegData = (pSnapshot[0x011] & 0x0ff) | ((pSnapshot[0x012] & 0x0ff)<<8);
2187   cpu_set_reg(state->m_maincpu, Z80_AF, RegData);
2187   state->m_maincpu->set_state_int(Z80_AF, RegData);
21882188
21892189   RegData = (pSnapshot[0x013] & 0x0ff) | ((pSnapshot[0x014] & 0x0ff)<<8);
2190   cpu_set_reg(state->m_maincpu, Z80_BC, RegData);
2190   state->m_maincpu->set_state_int(Z80_BC, RegData);
21912191
21922192   RegData = (pSnapshot[0x015] & 0x0ff) | ((pSnapshot[0x016] & 0x0ff)<<8);
2193   cpu_set_reg(state->m_maincpu, Z80_DE, RegData);
2193   state->m_maincpu->set_state_int(Z80_DE, RegData);
21942194
21952195   RegData = (pSnapshot[0x017] & 0x0ff) | ((pSnapshot[0x018] & 0x0ff)<<8);
2196   cpu_set_reg(state->m_maincpu, Z80_HL, RegData);
2196   state->m_maincpu->set_state_int(Z80_HL, RegData);
21972197
21982198   RegData = (pSnapshot[0x019] & 0x0ff) ;
2199   cpu_set_reg(state->m_maincpu, Z80_R, RegData);
2199   state->m_maincpu->set_state_int(Z80_R, RegData);
22002200
22012201   RegData = (pSnapshot[0x01a] & 0x0ff);
2202   cpu_set_reg(state->m_maincpu, Z80_I, RegData);
2202   state->m_maincpu->set_state_int(Z80_I, RegData);
22032203
22042204   if ((pSnapshot[0x01b] & 1)==1)
22052205   {
2206      cpu_set_reg(state->m_maincpu, Z80_IFF1, (UINT64)1);
2206      state->m_maincpu->set_state_int(Z80_IFF1, (UINT64)1);
22072207   }
22082208   else
22092209   {
2210      cpu_set_reg(state->m_maincpu, Z80_IFF1, (UINT64)0);
2210      state->m_maincpu->set_state_int(Z80_IFF1, (UINT64)0);
22112211   }
22122212
22132213   if ((pSnapshot[0x01c] & 1)==1)
22142214   {
2215      cpu_set_reg(state->m_maincpu, Z80_IFF2, (UINT64)1);
2215      state->m_maincpu->set_state_int(Z80_IFF2, (UINT64)1);
22162216   }
22172217   else
22182218   {
2219      cpu_set_reg(state->m_maincpu, Z80_IFF2, (UINT64)0);
2219      state->m_maincpu->set_state_int(Z80_IFF2, (UINT64)0);
22202220   }
22212221
22222222   RegData = (pSnapshot[0x01d] & 0x0ff) | ((pSnapshot[0x01e] & 0x0ff)<<8);
2223   cpu_set_reg(state->m_maincpu, Z80_IX, RegData);
2223   state->m_maincpu->set_state_int(Z80_IX, RegData);
22242224
22252225   RegData = (pSnapshot[0x01f] & 0x0ff) | ((pSnapshot[0x020] & 0x0ff)<<8);
2226   cpu_set_reg(state->m_maincpu, Z80_IY, RegData);
2226   state->m_maincpu->set_state_int(Z80_IY, RegData);
22272227
22282228   RegData = (pSnapshot[0x021] & 0x0ff) | ((pSnapshot[0x022] & 0x0ff)<<8);
2229   cpu_set_reg(state->m_maincpu, Z80_SP, RegData);
2230   cpu_set_reg(state->m_maincpu, STATE_GENSP, RegData);
2229   state->m_maincpu->set_state_int(Z80_SP, RegData);
2230   state->m_maincpu->set_state_int(STATE_GENSP, RegData);
22312231
22322232   RegData = (pSnapshot[0x023] & 0x0ff) | ((pSnapshot[0x024] & 0x0ff)<<8);
22332233
2234   cpu_set_reg(state->m_maincpu, Z80_PC, RegData);
2235//  cpu_set_reg(state->m_maincpu, REG_SP, RegData);
2234   state->m_maincpu->set_state_int(Z80_PC, RegData);
2235//  state->m_maincpu->set_state_int(REG_SP, RegData);
22362236
22372237   RegData = (pSnapshot[0x025] & 0x0ff);
2238   cpu_set_reg(state->m_maincpu, Z80_IM, RegData);
2238   state->m_maincpu->set_state_int(Z80_IM, RegData);
22392239
22402240   RegData = (pSnapshot[0x026] & 0x0ff) | ((pSnapshot[0x027] & 0x0ff)<<8);
2241   cpu_set_reg(state->m_maincpu, Z80_AF2, RegData);
2241   state->m_maincpu->set_state_int(Z80_AF2, RegData);
22422242
22432243   RegData = (pSnapshot[0x028] & 0x0ff) | ((pSnapshot[0x029] & 0x0ff)<<8);
2244   cpu_set_reg(state->m_maincpu, Z80_BC2, RegData);
2244   state->m_maincpu->set_state_int(Z80_BC2, RegData);
22452245
22462246   RegData = (pSnapshot[0x02a] & 0x0ff) | ((pSnapshot[0x02b] & 0x0ff)<<8);
2247   cpu_set_reg(state->m_maincpu, Z80_DE2, RegData);
2247   state->m_maincpu->set_state_int(Z80_DE2, RegData);
22482248
22492249   RegData = (pSnapshot[0x02c] & 0x0ff) | ((pSnapshot[0x02d] & 0x0ff)<<8);
2250   cpu_set_reg(state->m_maincpu, Z80_HL2, RegData);
2250   state->m_maincpu->set_state_int(Z80_HL2, RegData);
22512251
22522252   /* init GA */
22532253   for (i=0; i<17; i++)
trunk/src/mess/machine/ti85.c
r17797r17798
523523         if (file)
524524         {
525525            file->read(state->m_ti8x_ram, sizeof(unsigned char)*32*1024);
526            cpu_set_reg(state->m_maincpu, Z80_PC,0x0c59);
526            state->m_maincpu->set_state_int(Z80_PC,0x0c59);
527527         }
528528         else
529529            memset(state->m_ti8x_ram, 0, sizeof(unsigned char)*32*1024);
r17797r17798
542542         if (file)
543543         {
544544            file->read(state->m_ti8x_ram, sizeof(unsigned char)*128*1024);
545            cpu_set_reg(state->m_maincpu, Z80_PC,0x0c59);
545            state->m_maincpu->set_state_int(Z80_PC,0x0c59);
546546         }
547547         else
548548            memset(state->m_ti8x_ram, 0, sizeof(unsigned char)*128*1024);
r17797r17798
562562   /* Set registers */
563563   lo = reg[0x00] & 0x0ff;
564564   hi = reg[0x01] & 0x0ff;
565   cpu_set_reg(state->m_maincpu, Z80_AF, (hi << 8) | lo);
565   state->m_maincpu->set_state_int(Z80_AF, (hi << 8) | lo);
566566   lo = reg[0x04] & 0x0ff;
567567   hi = reg[0x05] & 0x0ff;
568   cpu_set_reg(state->m_maincpu, Z80_BC, (hi << 8) | lo);
568   state->m_maincpu->set_state_int(Z80_BC, (hi << 8) | lo);
569569   lo = reg[0x08] & 0x0ff;
570570   hi = reg[0x09] & 0x0ff;
571   cpu_set_reg(state->m_maincpu, Z80_DE, (hi << 8) | lo);
571   state->m_maincpu->set_state_int(Z80_DE, (hi << 8) | lo);
572572   lo = reg[0x0c] & 0x0ff;
573573   hi = reg[0x0d] & 0x0ff;
574   cpu_set_reg(state->m_maincpu, Z80_HL, (hi << 8) | lo);
574   state->m_maincpu->set_state_int(Z80_HL, (hi << 8) | lo);
575575   lo = reg[0x10] & 0x0ff;
576576   hi = reg[0x11] & 0x0ff;
577   cpu_set_reg(state->m_maincpu, Z80_IX, (hi << 8) | lo);
577   state->m_maincpu->set_state_int(Z80_IX, (hi << 8) | lo);
578578   lo = reg[0x14] & 0x0ff;
579579   hi = reg[0x15] & 0x0ff;
580   cpu_set_reg(state->m_maincpu, Z80_IY, (hi << 8) | lo);
580   state->m_maincpu->set_state_int(Z80_IY, (hi << 8) | lo);
581581   lo = reg[0x18] & 0x0ff;
582582   hi = reg[0x19] & 0x0ff;
583   cpu_set_reg(state->m_maincpu, Z80_PC, (hi << 8) | lo);
583   state->m_maincpu->set_state_int(Z80_PC, (hi << 8) | lo);
584584   lo = reg[0x1c] & 0x0ff;
585585   hi = reg[0x1d] & 0x0ff;
586   cpu_set_reg(state->m_maincpu, Z80_SP, (hi << 8) | lo);
586   state->m_maincpu->set_state_int(Z80_SP, (hi << 8) | lo);
587587   lo = reg[0x20] & 0x0ff;
588588   hi = reg[0x21] & 0x0ff;
589   cpu_set_reg(state->m_maincpu, Z80_AF2, (hi << 8) | lo);
589   state->m_maincpu->set_state_int(Z80_AF2, (hi << 8) | lo);
590590   lo = reg[0x24] & 0x0ff;
591591   hi = reg[0x25] & 0x0ff;
592   cpu_set_reg(state->m_maincpu, Z80_BC2, (hi << 8) | lo);
592   state->m_maincpu->set_state_int(Z80_BC2, (hi << 8) | lo);
593593   lo = reg[0x28] & 0x0ff;
594594   hi = reg[0x29] & 0x0ff;
595   cpu_set_reg(state->m_maincpu, Z80_DE2, (hi << 8) | lo);
595   state->m_maincpu->set_state_int(Z80_DE2, (hi << 8) | lo);
596596   lo = reg[0x2c] & 0x0ff;
597597   hi = reg[0x2d] & 0x0ff;
598   cpu_set_reg(state->m_maincpu, Z80_HL2, (hi << 8) | lo);
599   cpu_set_reg(state->m_maincpu, Z80_IFF1, reg[0x30]&0x0ff);
600   cpu_set_reg(state->m_maincpu, Z80_IFF2, reg[0x34]&0x0ff);
601   cpu_set_reg(state->m_maincpu, Z80_HALT, reg[0x38]&0x0ff);
602   cpu_set_reg(state->m_maincpu, Z80_IM, reg[0x3c]&0x0ff);
603   cpu_set_reg(state->m_maincpu, Z80_I, reg[0x40]&0x0ff);
598   state->m_maincpu->set_state_int(Z80_HL2, (hi << 8) | lo);
599   state->m_maincpu->set_state_int(Z80_IFF1, reg[0x30]&0x0ff);
600   state->m_maincpu->set_state_int(Z80_IFF2, reg[0x34]&0x0ff);
601   state->m_maincpu->set_state_int(Z80_HALT, reg[0x38]&0x0ff);
602   state->m_maincpu->set_state_int(Z80_IM, reg[0x3c]&0x0ff);
603   state->m_maincpu->set_state_int(Z80_I, reg[0x40]&0x0ff);
604604
605   cpu_set_reg(state->m_maincpu, Z80_R, (reg[0x44]&0x7f) | (reg[0x48]&0x80));
605   state->m_maincpu->set_state_int(Z80_R, (reg[0x44]&0x7f) | (reg[0x48]&0x80));
606606
607607   device_set_input_line(state->m_maincpu, 0, 0);
608608   device_set_input_line(state->m_maincpu, INPUT_LINE_NMI, 0);
trunk/src/mess/machine/galaxy.c
r17797r17798
7272   switch (size)
7373   {
7474      case GALAXY_SNAPSHOT_V1_SIZE:
75         cpu_set_reg(cpu, Z80_AF,   data[0x00] | data[0x01] << 8);
76         cpu_set_reg(cpu, Z80_BC,   data[0x04] | data[0x05] << 8);
77         cpu_set_reg(cpu, Z80_DE,   data[0x08] | data[0x09] << 8);
78         cpu_set_reg(cpu, Z80_HL,   data[0x0c] | data[0x0d] << 8);
79         cpu_set_reg(cpu, Z80_IX,   data[0x10] | data[0x11] << 8);
80         cpu_set_reg(cpu, Z80_IY,   data[0x14] | data[0x15] << 8);
81         cpu_set_reg(cpu, Z80_PC,   data[0x18] | data[0x19] << 8);
82         cpu_set_reg(cpu, Z80_SP,   data[0x1c] | data[0x1d] << 8);
83         cpu_set_reg(cpu, Z80_AF2,  data[0x20] | data[0x21] << 8);
84         cpu_set_reg(cpu, Z80_BC2,  data[0x24] | data[0x25] << 8);
85         cpu_set_reg(cpu, Z80_DE2,  data[0x28] | data[0x29] << 8);
86         cpu_set_reg(cpu, Z80_HL2,  data[0x2c] | data[0x2d] << 8);
87         cpu_set_reg(cpu, Z80_IFF1, data[0x30]);
88         cpu_set_reg(cpu, Z80_IFF2, data[0x34]);
89         cpu_set_reg(cpu, Z80_HALT, data[0x38]);
90         cpu_set_reg(cpu, Z80_IM,   data[0x3c]);
91         cpu_set_reg(cpu, Z80_I,    data[0x40]);
92         cpu_set_reg(cpu, Z80_R,    (data[0x44] & 0x7f) | (data[0x48] & 0x80));
75         cpu->state().set_state_int(Z80_AF,   data[0x00] | data[0x01] << 8);
76         cpu->state().set_state_int(Z80_BC,   data[0x04] | data[0x05] << 8);
77         cpu->state().set_state_int(Z80_DE,   data[0x08] | data[0x09] << 8);
78         cpu->state().set_state_int(Z80_HL,   data[0x0c] | data[0x0d] << 8);
79         cpu->state().set_state_int(Z80_IX,   data[0x10] | data[0x11] << 8);
80         cpu->state().set_state_int(Z80_IY,   data[0x14] | data[0x15] << 8);
81         cpu->state().set_state_int(Z80_PC,   data[0x18] | data[0x19] << 8);
82         cpu->state().set_state_int(Z80_SP,   data[0x1c] | data[0x1d] << 8);
83         cpu->state().set_state_int(Z80_AF2,  data[0x20] | data[0x21] << 8);
84         cpu->state().set_state_int(Z80_BC2,  data[0x24] | data[0x25] << 8);
85         cpu->state().set_state_int(Z80_DE2,  data[0x28] | data[0x29] << 8);
86         cpu->state().set_state_int(Z80_HL2,  data[0x2c] | data[0x2d] << 8);
87         cpu->state().set_state_int(Z80_IFF1, data[0x30]);
88         cpu->state().set_state_int(Z80_IFF2, data[0x34]);
89         cpu->state().set_state_int(Z80_HALT, data[0x38]);
90         cpu->state().set_state_int(Z80_IM,   data[0x3c]);
91         cpu->state().set_state_int(Z80_I,    data[0x40]);
92         cpu->state().set_state_int(Z80_R,    (data[0x44] & 0x7f) | (data[0x48] & 0x80));
9393
9494         memcpy (machine.device<ram_device>(RAM_TAG)->pointer(), data + 0x084c, (machine.device<ram_device>(RAM_TAG)->size() < 0x1800) ? machine.device<ram_device>(RAM_TAG)->size() : 0x1800);
9595
9696         break;
9797      case GALAXY_SNAPSHOT_V2_SIZE:
98         cpu_set_reg(cpu, Z80_AF,   data[0x00] | data[0x01] << 8);
99         cpu_set_reg(cpu, Z80_BC,   data[0x02] | data[0x03] << 8);
100         cpu_set_reg(cpu, Z80_DE,   data[0x04] | data[0x05] << 8);
101         cpu_set_reg(cpu, Z80_HL,   data[0x06] | data[0x07] << 8);
102         cpu_set_reg(cpu, Z80_IX,   data[0x08] | data[0x09] << 8);
103         cpu_set_reg(cpu, Z80_IY,   data[0x0a] | data[0x0b] << 8);
104         cpu_set_reg(cpu, Z80_PC,   data[0x0c] | data[0x0d] << 8);
105         cpu_set_reg(cpu, Z80_SP,   data[0x0e] | data[0x0f] << 8);
106         cpu_set_reg(cpu, Z80_AF2,  data[0x10] | data[0x11] << 8);
107         cpu_set_reg(cpu, Z80_BC2,  data[0x12] | data[0x13] << 8);
108         cpu_set_reg(cpu, Z80_DE2,  data[0x14] | data[0x15] << 8);
109         cpu_set_reg(cpu, Z80_HL2,  data[0x16] | data[0x17] << 8);
98         cpu->state().set_state_int(Z80_AF,   data[0x00] | data[0x01] << 8);
99         cpu->state().set_state_int(Z80_BC,   data[0x02] | data[0x03] << 8);
100         cpu->state().set_state_int(Z80_DE,   data[0x04] | data[0x05] << 8);
101         cpu->state().set_state_int(Z80_HL,   data[0x06] | data[0x07] << 8);
102         cpu->state().set_state_int(Z80_IX,   data[0x08] | data[0x09] << 8);
103         cpu->state().set_state_int(Z80_IY,   data[0x0a] | data[0x0b] << 8);
104         cpu->state().set_state_int(Z80_PC,   data[0x0c] | data[0x0d] << 8);
105         cpu->state().set_state_int(Z80_SP,   data[0x0e] | data[0x0f] << 8);
106         cpu->state().set_state_int(Z80_AF2,  data[0x10] | data[0x11] << 8);
107         cpu->state().set_state_int(Z80_BC2,  data[0x12] | data[0x13] << 8);
108         cpu->state().set_state_int(Z80_DE2,  data[0x14] | data[0x15] << 8);
109         cpu->state().set_state_int(Z80_HL2,  data[0x16] | data[0x17] << 8);
110110
111         cpu_set_reg(cpu, Z80_IFF1, data[0x18] & 0x01);
112         cpu_set_reg(cpu, Z80_IFF2, (UINT64)0);
111         cpu->state().set_state_int(Z80_IFF1, data[0x18] & 0x01);
112         cpu->state().set_state_int(Z80_IFF2, (UINT64)0);
113113
114         cpu_set_reg(cpu, Z80_HALT, (UINT64)0);
114         cpu->state().set_state_int(Z80_HALT, (UINT64)0);
115115
116         cpu_set_reg(cpu, Z80_IM,   (data[0x18] >> 1) & 0x03);
116         cpu->state().set_state_int(Z80_IM,   (data[0x18] >> 1) & 0x03);
117117
118         cpu_set_reg(cpu, Z80_I,    data[0x19]);
119         cpu_set_reg(cpu, Z80_R,    data[0x1a]);
118         cpu->state().set_state_int(Z80_I,    data[0x19]);
119         cpu->state().set_state_int(Z80_R,    data[0x1a]);
120120
121121         memcpy (machine.device<ram_device>(RAM_TAG)->pointer(), data + 0x0834, (machine.device<ram_device>(RAM_TAG)->size() < 0x1800) ? machine.device<ram_device>(RAM_TAG)->size() : 0x1800);
122122
trunk/src/mess/machine/mac.c
r17797r17798
32163216
32173217   s = &buf[strlen(buf)];
32183218   mem = mac_ram_ptr;
3219   a0 = cpu_get_reg(M68K_A0);
3219   a0 = M68K_A0);
32203220   a7 = cpu_get_reg(M68K_A7);
32213221   d0 = cpu_get_reg(M68K_D0);
32223222   d1 = cpu_get_reg(M68K_D1);
r17797r17798
32273227      ioVRefNum = *((INT16*) (mem + a0 + 22));
32283228      ioCRefNum = *((INT16*) (mem + a0 + 24));
32293229      csCode = *((UINT16*) (mem + a0 + 26));
3230      sprintf(s, " ioVRefNum=%i ioCRefNum=%i csCode=%i", ioVRefNum, ioCRefNum, csCode);
3230      sprintf(s->state().state_int(" ioVRefNum=%i ioCRefNum=%i csCode=%i", ioVRefNum, ioCRefNum, csCode);
32313231
32323232      for (i = 0; i < ARRAY_LENGTH(cscodes); i++)
32333233      {
trunk/src/mess/machine/mz700.c
r17797r17798
651651/* port EB */
652652WRITE8_MEMBER(mz_state::mz800_ramaddr_w)
653653{
654   m_mz800_ramaddr = (cpu_get_reg(machine().device("maincpu"), Z80_BC) & 0xff00) | (data & 0xff);
654   m_mz800_ramaddr = (machine().device("maincpu")->state().state_int(Z80_BC) & 0xff00) | (data & 0xff);
655655   LOG(1,"mz800_ramaddr_w",("%04X\n", m_mz800_ramaddr),machine());
656656}
657657
trunk/src/mess/machine/lisa.c
r17797r17798
879879
880880   }
881881
882   if (cpu_get_reg(machine.device("maincpu"), M68K_SR) & 0x2000)
882   if (machine.device("maincpu")->state().state_int(M68K_SR) & 0x2000)
883883   {
884884      /* supervisor mode -> force register file 0 */
885885      the_seg = 0;
r17797r17798
14121412      }
14131413   }
14141414
1415   if (cpu_get_reg(machine().device("maincpu"), M68K_SR) & 0x2000)
1415   if (machine().device("maincpu")->state().state_int(M68K_SR) & 0x2000)
14161416      /* supervisor mode -> force register file 0 */
14171417      the_seg = 0;
14181418
r17797r17798
16191619      }
16201620   }
16211621
1622   if (cpu_get_reg(machine().device("maincpu"), M68K_SR) & 0x2000)
1622   if (machine().device("maincpu")->state().state_int(M68K_SR) & 0x2000)
16231623      /* supervisor mode -> force register file 0 */
16241624      the_seg = 0;
16251625
trunk/src/mess/machine/lviv.c
r17797r17798
282282   /* Set registers */
283283   lo = data[0x14112] & 0x0ff;
284284   hi = data[0x14111] & 0x0ff;
285   cpu_set_reg(machine.device("maincpu"), I8085_BC, (hi << 8) | lo);
285   machine.device("maincpu")->state().set_state_int(I8085_BC, (hi << 8) | lo);
286286   lo = data[0x14114] & 0x0ff;
287287   hi = data[0x14113] & 0x0ff;
288   cpu_set_reg(machine.device("maincpu"), I8085_DE, (hi << 8) | lo);
288   machine.device("maincpu")->state().set_state_int(I8085_DE, (hi << 8) | lo);
289289   lo = data[0x14116] & 0x0ff;
290290   hi = data[0x14115] & 0x0ff;
291   cpu_set_reg(machine.device("maincpu"), I8085_HL, (hi << 8) | lo);
291   machine.device("maincpu")->state().set_state_int(I8085_HL, (hi << 8) | lo);
292292   lo = data[0x14118] & 0x0ff;
293293   hi = data[0x14117] & 0x0ff;
294   cpu_set_reg(machine.device("maincpu"), I8085_AF, (hi << 8) | lo);
294   machine.device("maincpu")->state().set_state_int(I8085_AF, (hi << 8) | lo);
295295   lo = data[0x14119] & 0x0ff;
296296   hi = data[0x1411a] & 0x0ff;
297   cpu_set_reg(machine.device("maincpu"), I8085_SP, (hi << 8) | lo);
297   machine.device("maincpu")->state().set_state_int(I8085_SP, (hi << 8) | lo);
298298   lo = data[0x1411b] & 0x0ff;
299299   hi = data[0x1411c] & 0x0ff;
300   cpu_set_reg(machine.device("maincpu"), I8085_PC, (hi << 8) | lo);
300   machine.device("maincpu")->state().set_state_int(I8085_PC, (hi << 8) | lo);
301301
302302   /* Memory dump */
303303   memcpy (machine.device<ram_device>(RAM_TAG)->pointer(), data+0x0011, 0xc000);
r17797r17798
313313
314314static void dump_registers(running_machine &machine)
315315{
316   logerror("PC   = %04x\n", (unsigned) cpu_get_reg(machine.device("maincpu"), I8085_PC));
317   logerror("SP   = %04x\n", (unsigned) cpu_get_reg(machine.device("maincpu"), I8085_SP));
318   logerror("AF   = %04x\n", (unsigned) cpu_get_reg(machine.device("maincpu"), I8085_AF));
319   logerror("BC   = %04x\n", (unsigned) cpu_get_reg(machine.device("maincpu"), I8085_BC));
320   logerror("DE   = %04x\n", (unsigned) cpu_get_reg(machine.device("maincpu"), I8085_DE));
321   logerror("HL   = %04x\n", (unsigned) cpu_get_reg(machine.device("maincpu"), I8085_HL));
316   logerror("PC   = %04x\n", (unsigned) machine.device("maincpu")->state().state_int(I8085_PC));
317   logerror("SP   = %04x\n", (unsigned) machine.device("maincpu")->state().state_int(I8085_SP));
318   logerror("AF   = %04x\n", (unsigned) machine.device("maincpu")->state().state_int(I8085_AF));
319   logerror("BC   = %04x\n", (unsigned) machine.device("maincpu")->state().state_int(I8085_BC));
320   logerror("DE   = %04x\n", (unsigned) machine.device("maincpu")->state().state_int(I8085_DE));
321   logerror("HL   = %04x\n", (unsigned) machine.device("maincpu")->state().state_int(I8085_HL));
322322}
323323
324324static int lviv_verify_snapshot (UINT8 * data, UINT32 size)
trunk/src/mess/machine/isa_aha1542.c
r17797r17798
140140
141141READ8_MEMBER( aha1542_device::aha1542_r )
142142{
143   printf("aha1542_r(): pc=0x%08x offset=%d\n", (unsigned) cpu_get_reg(machine().firstcpu, STATE_GENPC), offset);
143   printf("aha1542_r(): pc=0x%08x offset=%d\n", (unsigned) machine().firstcpu->pc(), offset);
144144        return 0xff;
145145}
146146
147147WRITE8_MEMBER( aha1542_device::aha1542_w )
148148{
149   printf("aha1542_w(): pc=0x%08x offset=%d data=0x%02x\n", (unsigned) cpu_get_reg(machine().firstcpu, STATE_GENPC), offset, data);
149   printf("aha1542_w(): pc=0x%08x offset=%d data=0x%02x\n", (unsigned) machine().firstcpu->pc(), offset, data);
150150}
151151
152152//-------------------------------------------------
trunk/src/mess/machine/mbc55x.c
r17797r17798
455455{
456456   device_t *cpu = device->machine().device(MAINCPU_TAG);
457457
458   UINT16  ax = cpu_get_reg(cpu,I8086_AX);
459   UINT16  bx = cpu_get_reg(cpu,I8086_BX);
460   UINT16  cx = cpu_get_reg(cpu,I8086_CX);
461   UINT16  dx = cpu_get_reg(cpu,I8086_DX);
462   UINT16  cs = cpu_get_reg(cpu,I8086_CS);
463   UINT16  ds = cpu_get_reg(cpu,I8086_DS);
464   UINT16  es = cpu_get_reg(cpu,I8086_ES);
465   UINT16  ss = cpu_get_reg(cpu,I8086_SS);
458   UINT16  ax = cpu->state().state_int(I8086_AX);
459   UINT16  bx = cpu->state().state_int(I8086_BX);
460   UINT16  cx = cpu->state().state_int(I8086_CX);
461   UINT16  dx = cpu->state().state_int(I8086_DX);
462   UINT16  cs = cpu->state().state_int(I8086_CS);
463   UINT16  ds = cpu->state().state_int(I8086_DS);
464   UINT16  es = cpu->state().state_int(I8086_ES);
465   UINT16  ss = cpu->state().state_int(I8086_SS);
466466
467   UINT16  si = cpu_get_reg(cpu,I8086_SI);
468   UINT16  di = cpu_get_reg(cpu,I8086_DI);
469   UINT16  bp = cpu_get_reg(cpu,I8086_BP);
467   UINT16  si = cpu->state().state_int(I8086_SI);
468   UINT16  di = cpu->state().state_int(I8086_DI);
469   UINT16  bp = cpu->state().state_int(I8086_BP);
470470
471471   logerror("=======================================================================\n");
472472   logerror("DOS Int 0x21 call at %05X\n",pc);
trunk/src/mess/machine/rmnimbus.c
r17797r17798
13831383
13841384    device_t *cpu = device->machine().device(MAINCPU_TAG);
13851385
1386    UINT16  ax = cpu_get_reg(cpu,I8086_AX);
1387    UINT16  bx = cpu_get_reg(cpu,I8086_BX);
1388    UINT16  cx = cpu_get_reg(cpu,I8086_CX);
1389    UINT16  ds = cpu_get_reg(cpu,I8086_DS);
1390    UINT16  si = cpu_get_reg(cpu,I8086_SI);
1386    UINT16  ax = cpu->state().state_int(I8086_AX);
1387    UINT16  bx = cpu->state().state_int(I8086_BX);
1388    UINT16  cx = cpu->state().state_int(I8086_CX);
1389    UINT16  ds = cpu->state().state_int(I8086_DS);
1390    UINT16  si = cpu->state().state_int(I8086_SI);
13911391
13921392   // *** TEMP Don't show f_enquire_display_line calls !
13931393   if((cx==6) && (ax==43))
r17797r17798
18761876{
18771877    device_t *cpu = device->machine().device(MAINCPU_TAG);
18781878
1879    UINT16  ax = cpu_get_reg(cpu,I8086_AX);
1880    UINT16  bx = cpu_get_reg(cpu,I8086_BX);
1881    UINT16  cx = cpu_get_reg(cpu,I8086_CX);
1882   UINT16  dx = cpu_get_reg(cpu,I8086_DX);
1883    UINT16  cs = cpu_get_reg(cpu,I8086_CS);
1884   UINT16  ds = cpu_get_reg(cpu,I8086_DS);
1885   UINT16  es = cpu_get_reg(cpu,I8086_ES);
1886   UINT16  ss = cpu_get_reg(cpu,I8086_SS);
1879    UINT16  ax = cpu->state().state_int(I8086_AX);
1880    UINT16  bx = cpu->state().state_int(I8086_BX);
1881    UINT16  cx = cpu->state().state_int(I8086_CX);
1882   UINT16  dx = cpu->state().state_int(I8086_DX);
1883    UINT16  cs = cpu->state().state_int(I8086_CS);
1884   UINT16  ds = cpu->state().state_int(I8086_DS);
1885   UINT16  es = cpu->state().state_int(I8086_ES);
1886   UINT16  ss = cpu->state().state_int(I8086_SS);
18871887
1888    UINT16  si = cpu_get_reg(cpu,I8086_SI);
1889    UINT16  di = cpu_get_reg(cpu,I8086_DI);
1890   UINT16  bp = cpu_get_reg(cpu,I8086_BP);
1888    UINT16  si = cpu->state().state_int(I8086_SI);
1889    UINT16  di = cpu->state().state_int(I8086_DI);
1890   UINT16  bp = cpu->state().state_int(I8086_BP);
18911891
18921892    logerror("=======================================================================\n");
18931893    logerror("DOS Int 0x21 call at %05X\n",pc);
trunk/src/mess/machine/apple2.c
r17797r17798
10021002{
10031003   apple2_state *state = machine.driver_data<apple2_state>();
10041004   LOG(("apple2_setvar(): val=0x%06x mask=0x%06x pc=0x%04x\n", val, mask,
1005               (unsigned int) cpu_get_reg(machine.device("maincpu"), STATE_GENPC)));
1005               (unsigned int) machine.device("maincpu")->safe_pc()));
10061006
10071007   assert((val & mask) == val);
10081008
trunk/src/mess/machine/kc.c
r17797r17798
6969   if (execution_address != 0 && header->number_addresses >= 3 )
7070   {
7171      // if specified, jumps to the quickload start address
72      cpu_set_reg(state->m_maincpu, STATE_GENPC, execution_address);
72      state->m_maincpu->set_pc(execution_address);
7373   }
7474
7575   auto_free(image.device().machine(), data);
r17797r17798
790790    at address 0x0000-0x01000 which has a single jump in it,
791791    can't see yet where it disables it later!!!! so for now
792792    here will be a override */
793   cpu_set_reg(m_maincpu, STATE_GENPC, 0x0f000);
793   m_maincpu->set_pc(0x0f000);
794794}
795795
796796void kc85_4_state::machine_reset()
trunk/src/mess/video/zx.c
r17797r17798
9999   bitmap_ind16 &bitmap = state->m_bitmap;
100100   r.set(r1.min_x, r1.max_x, state->m_ula_scanline_count, state->m_ula_scanline_count);
101101   bitmap.fill(1, r);
102//  logerror("ULA %3d[%d] NMI, R:$%02X, $%04x\n", machine.primary_screen->vpos(), ula_scancode_count, (unsigned) cpu_get_reg(machine.device("maincpu"), Z80_R), (unsigned) cpu_get_reg(machine.device("maincpu"), Z80_PC));
102//  logerror("ULA %3d[%d] NMI, R:$%02X, $%04x\n", machine.primary_screen->vpos(), ula_scancode_count, (unsigned) machine.device("maincpu")->state().state_int(Z80_R), (unsigned) machine.device("maincpu")->state().state_int(Z80_PC));
103103   cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
104104   if (++state->m_ula_scanline_count == height)
105105      state->m_ula_scanline_count = 0;
r17797r17798
116116     */
117117   if (state->m_ula_irq_active)
118118   {
119//      logerror("ULA %3d[%d] IRQ, R:$%02X, $%04x\n", machine.primary_screen->vpos(), ula_scancode_count, (unsigned) cpu_get_reg(machine.device("maincpu"), Z80_R), (unsigned) cpu_get_reg(machine.device("maincpu"), Z80_PC));
119//      logerror("ULA %3d[%d] IRQ, R:$%02X, $%04x\n", machine.primary_screen->vpos(), ula_scancode_count, (unsigned) machine.device("maincpu")->state().state_int(Z80_R), (unsigned) machine.device("maincpu")->state().state_int(Z80_PC));
120120
121121      state->m_ula_irq_active = 0;
122122      cputag_set_input_line(machine, "maincpu", 0, HOLD_LINE);
r17797r17798
135135   {
136136      bitmap_ind16 &bitmap = state->m_bitmap;
137137      UINT16 y, *scanline;
138      UINT16 ireg = cpu_get_reg(machine.device("maincpu"), Z80_I) << 8;
138      UINT16 ireg = machine.device("maincpu")->state().state_int(Z80_I) << 8;
139139      UINT8 data, *chrgen, creg;
140140
141141      if (param)
142         creg = cpu_get_reg(machine.device("maincpu"), Z80_B);
142         creg = machine.device("maincpu")->state().state_int(Z80_B);
143143      else
144         creg = cpu_get_reg(machine.device("maincpu"), Z80_C);
144         creg = machine.device("maincpu")->state().state_int(Z80_C);
145145
146146      chrgen = state->memregion(region)->base();
147147
trunk/src/mess/video/pdp1.c
r17797r17798
309309static void pdp1_draw_panel(running_machine &machine, bitmap_ind16 &bitmap)
310310{
311311   /* column 1: registers, test word, test address */
312   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset+16, y_panel_pc_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_PC), 16);
313   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset+16, y_panel_ma_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_MA), 16);
314   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset, y_panel_mb_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_MB), 18);
315   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset, y_panel_ac_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_AC), 18);
316   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset, y_panel_io_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_IO), 18);
317   pdp1_draw_switch(machine, bitmap, x_panel_col1_offset, y_panel_ta_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_EXTEND_SW));
318   pdp1_draw_multipleswitch(machine, bitmap, x_panel_col1_offset+16, y_panel_ta_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_TA), 16);
319   pdp1_draw_multipleswitch(machine, bitmap, x_panel_col1_offset, y_panel_tw_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_TW), 18);
312   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset+16, y_panel_pc_offset+8, machine.device("maincpu")->state().state_int(PDP1_PC), 16);
313   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset+16, y_panel_ma_offset+8, machine.device("maincpu")->state().state_int(PDP1_MA), 16);
314   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset, y_panel_mb_offset+8, machine.device("maincpu")->state().state_int(PDP1_MB), 18);
315   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset, y_panel_ac_offset+8, machine.device("maincpu")->state().state_int(PDP1_AC), 18);
316   pdp1_draw_multipleled(machine, bitmap, x_panel_col1_offset, y_panel_io_offset+8, machine.device("maincpu")->state().state_int(PDP1_IO), 18);
317   pdp1_draw_switch(machine, bitmap, x_panel_col1_offset, y_panel_ta_offset+8, machine.device("maincpu")->state().state_int(PDP1_EXTEND_SW));
318   pdp1_draw_multipleswitch(machine, bitmap, x_panel_col1_offset+16, y_panel_ta_offset+8, machine.device("maincpu")->state().state_int(PDP1_TA), 16);
319   pdp1_draw_multipleswitch(machine, bitmap, x_panel_col1_offset, y_panel_tw_offset+8, machine.device("maincpu")->state().state_int(PDP1_TW), 18);
320320
321321   /* column 2: 1-bit indicators */
322   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_run_offset, cpu_get_reg(machine.device("maincpu"), PDP1_RUN));
323   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_cyc_offset, cpu_get_reg(machine.device("maincpu"), PDP1_CYC));
324   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_defer_offset, cpu_get_reg(machine.device("maincpu"), PDP1_DEFER));
322   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_run_offset, machine.device("maincpu")->state().state_int(PDP1_RUN));
323   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_cyc_offset, machine.device("maincpu")->state().state_int(PDP1_CYC));
324   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_defer_offset, machine.device("maincpu")->state().state_int(PDP1_DEFER));
325325   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_hs_cyc_offset, 0);   /* not emulated */
326   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_brk_ctr_1_offset, cpu_get_reg(machine.device("maincpu"), PDP1_BRK_CTR) & 1);
327   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_brk_ctr_2_offset, cpu_get_reg(machine.device("maincpu"), PDP1_BRK_CTR) & 2);
328   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ov_offset, cpu_get_reg(machine.device("maincpu"), PDP1_OV));
329   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_rim_offset, cpu_get_reg(machine.device("maincpu"), PDP1_RIM));
330   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_sbm_offset, cpu_get_reg(machine.device("maincpu"), PDP1_SBM));
331   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_exd_offset, cpu_get_reg(machine.device("maincpu"), PDP1_EXD));
332   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ioh_offset, cpu_get_reg(machine.device("maincpu"), PDP1_IOH));
333   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ioc_offset, cpu_get_reg(machine.device("maincpu"), PDP1_IOC));
334   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ios_offset, cpu_get_reg(machine.device("maincpu"), PDP1_IOS));
326   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_brk_ctr_1_offset, machine.device("maincpu")->state().state_int(PDP1_BRK_CTR) & 1);
327   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_brk_ctr_2_offset, machine.device("maincpu")->state().state_int(PDP1_BRK_CTR) & 2);
328   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ov_offset, machine.device("maincpu")->state().state_int(PDP1_OV));
329   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_rim_offset, machine.device("maincpu")->state().state_int(PDP1_RIM));
330   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_sbm_offset, machine.device("maincpu")->state().state_int(PDP1_SBM));
331   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_exd_offset, machine.device("maincpu")->state().state_int(PDP1_EXD));
332   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ioh_offset, machine.device("maincpu")->state().state_int(PDP1_IOH));
333   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ioc_offset, machine.device("maincpu")->state().state_int(PDP1_IOC));
334   pdp1_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ios_offset, machine.device("maincpu")->state().state_int(PDP1_IOS));
335335
336336   /* column 3: power, single step, single inst, sense, flags, instr... */
337337   pdp1_draw_led(machine, bitmap, x_panel_col3_offset, y_panel_power_offset, 1);   /* always on */
338338   pdp1_draw_switch(machine, bitmap, x_panel_col3_offset+8, y_panel_power_offset, 1);   /* always on */
339   pdp1_draw_led(machine, bitmap, x_panel_col3_offset, y_panel_sngl_step_offset, cpu_get_reg(machine.device("maincpu"), PDP1_SNGL_STEP));
340   pdp1_draw_switch(machine, bitmap, x_panel_col3_offset+8, y_panel_sngl_step_offset, cpu_get_reg(machine.device("maincpu"), PDP1_SNGL_STEP));
341   pdp1_draw_led(machine, bitmap, x_panel_col3_offset, y_panel_sngl_inst_offset, cpu_get_reg(machine.device("maincpu"), PDP1_SNGL_INST));
342   pdp1_draw_switch(machine, bitmap, x_panel_col3_offset+8, y_panel_sngl_inst_offset, cpu_get_reg(machine.device("maincpu"), PDP1_SNGL_INST));
343   pdp1_draw_multipleled(machine, bitmap, x_panel_col3_offset, y_panel_ss_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_SS), 6);
344   pdp1_draw_multipleswitch(machine, bitmap, x_panel_col3_offset, y_panel_ss_offset+16, cpu_get_reg(machine.device("maincpu"), PDP1_SS), 6);
345   pdp1_draw_multipleled(machine, bitmap, x_panel_col3_offset, y_panel_pf_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_PF), 6);
346   pdp1_draw_multipleled(machine, bitmap, x_panel_col3_offset, y_panel_ir_offset+8, cpu_get_reg(machine.device("maincpu"), PDP1_IR), 5);
339   pdp1_draw_led(machine, bitmap, x_panel_col3_offset, y_panel_sngl_step_offset, machine.device("maincpu")->state().state_int(PDP1_SNGL_STEP));
340   pdp1_draw_switch(machine, bitmap, x_panel_col3_offset+8, y_panel_sngl_step_offset, machine.device("maincpu")->state().state_int(PDP1_SNGL_STEP));
341   pdp1_draw_led(machine, bitmap, x_panel_col3_offset, y_panel_sngl_inst_offset, machine.device("maincpu")->state().state_int(PDP1_SNGL_INST));
342   pdp1_draw_switch(machine, bitmap, x_panel_col3_offset+8, y_panel_sngl_inst_offset, machine.device("maincpu")->state().state_int(PDP1_SNGL_INST));
343   pdp1_draw_multipleled(machine, bitmap, x_panel_col3_offset, y_panel_ss_offset+8, machine.device("maincpu")->state().state_int(PDP1_SS), 6);
344   pdp1_draw_multipleswitch(machine, bitmap, x_panel_col3_offset, y_panel_ss_offset+16, machine.device("maincpu")->state().state_int(PDP1_SS), 6);
345   pdp1_draw_multipleled(machine, bitmap, x_panel_col3_offset, y_panel_pf_offset+8, machine.device("maincpu")->state().state_int(PDP1_PF), 6);
346   pdp1_draw_multipleled(machine, bitmap, x_panel_col3_offset, y_panel_ir_offset+8, machine.device("maincpu")->state().state_int(PDP1_IR), 5);
347347}
348348
349349
trunk/src/mess/video/tx0.c
r17797r17798
300300   int i;
301301
302302   /* column 1: registers, test accumulator, test buffer, toggle switch storage */
303   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset+2*8, y_panel_pc_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_PC), 16);
304   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset+2*8, y_panel_mar_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_MAR), 16);
305   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset, y_panel_mbr_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_MBR), 18);
306   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset, y_panel_ac_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_AC), 18);
307   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset, y_panel_lr_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_LR), 18);
308   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset+4*8, y_panel_xr_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_XR), 14);
309   tx0_draw_multipleswitch(machine, bitmap, x_panel_col1b_offset, y_panel_tbr_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_TBR), 18);
310   tx0_draw_multipleswitch(machine, bitmap, x_panel_col1b_offset, y_panel_tac_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_TAC), 18);
311   cm_sel = cpu_get_reg(machine.device("maincpu"), TX0_CM_SEL);
312   lr_sel = cpu_get_reg(machine.device("maincpu"), TX0_LR_SEL);
303   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset+2*8, y_panel_pc_offset+8, machine.device("maincpu")->state().state_int(TX0_PC), 16);
304   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset+2*8, y_panel_mar_offset+8, machine.device("maincpu")->state().state_int(TX0_MAR), 16);
305   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset, y_panel_mbr_offset+8, machine.device("maincpu")->state().state_int(TX0_MBR), 18);
306   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset, y_panel_ac_offset+8, machine.device("maincpu")->state().state_int(TX0_AC), 18);
307   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset, y_panel_lr_offset+8, machine.device("maincpu")->state().state_int(TX0_LR), 18);
308   tx0_draw_multipleled(machine, bitmap, x_panel_col1b_offset+4*8, y_panel_xr_offset+8, machine.device("maincpu")->state().state_int(TX0_XR), 14);
309   tx0_draw_multipleswitch(machine, bitmap, x_panel_col1b_offset, y_panel_tbr_offset+8, machine.device("maincpu")->state().state_int(TX0_TBR), 18);
310   tx0_draw_multipleswitch(machine, bitmap, x_panel_col1b_offset, y_panel_tac_offset+8, machine.device("maincpu")->state().state_int(TX0_TAC), 18);
311   cm_sel = machine.device("maincpu")->state().state_int(TX0_CM_SEL);
312   lr_sel = machine.device("maincpu")->state().state_int(TX0_LR_SEL);
313313   for (i=0; i<16; i++)
314314   {
315315      tx0_draw_switch(machine, bitmap, x_panel_col1a_offset+16, y_panel_tss_offset+8+i*8, (cm_sel >> i) & 1);
316      tx0_draw_multipleswitch(machine, bitmap, x_panel_col1a_offset+24, y_panel_tss_offset+8+i*8, cpu_get_reg(machine.device("maincpu"), TX0_TSS00+i), 18);
316      tx0_draw_multipleswitch(machine, bitmap, x_panel_col1a_offset+24, y_panel_tss_offset+8+i*8, machine.device("maincpu")->state().state_int(TX0_TSS00+i), 18);
317317      tx0_draw_switch(machine, bitmap, x_panel_col1a_offset+168, y_panel_tss_offset+8+i*8, (lr_sel >> i) & 1);
318318   }
319319
320320   /* column 2: stop c0, stop c1, cm sel, 1-bit indicators, instr, flags */
321   tx0_draw_switch(machine, bitmap, x_panel_col2_offset, y_panel_stop_c0_offset, cpu_get_reg(machine.device("maincpu"), TX0_STOP_CYC0));
322   tx0_draw_switch(machine, bitmap, x_panel_col2_offset, y_panel_stop_c1_offset, cpu_get_reg(machine.device("maincpu"), TX0_STOP_CYC1));
323   tx0_draw_switch(machine, bitmap, x_panel_col2_offset, y_panel_gbl_cm_sel_offset, cpu_get_reg(machine.device("maincpu"), TX0_GBL_CM_SEL));
324   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_run_offset, cpu_get_reg(machine.device("maincpu"), TX0_RUN));
325   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_cycle1_offset, cpu_get_reg(machine.device("maincpu"), TX0_CYCLE) & 1);
326   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_cycle2_offset, cpu_get_reg(machine.device("maincpu"), TX0_CYCLE) & 2);
327   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_rim_offset, cpu_get_reg(machine.device("maincpu"), TX0_RIM));
328   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ioh_offset, cpu_get_reg(machine.device("maincpu"), TX0_IOH));
329   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ios_offset, cpu_get_reg(machine.device("maincpu"), TX0_IOS));
330   tx0_draw_multipleled(machine, bitmap, x_panel_col2_offset, y_panel_ir_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_IR), 5);
331   tx0_draw_multipleled(machine, bitmap, x_panel_col2_offset, y_panel_pf_offset+8, cpu_get_reg(machine.device("maincpu"), TX0_PF), 6);
321   tx0_draw_switch(machine, bitmap, x_panel_col2_offset, y_panel_stop_c0_offset, machine.device("maincpu")->state().state_int(TX0_STOP_CYC0));
322   tx0_draw_switch(machine, bitmap, x_panel_col2_offset, y_panel_stop_c1_offset, machine.device("maincpu")->state().state_int(TX0_STOP_CYC1));
323   tx0_draw_switch(machine, bitmap, x_panel_col2_offset, y_panel_gbl_cm_sel_offset, machine.device("maincpu")->state().state_int(TX0_GBL_CM_SEL));
324   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_run_offset, machine.device("maincpu")->state().state_int(TX0_RUN));
325   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_cycle1_offset, machine.device("maincpu")->state().state_int(TX0_CYCLE) & 1);
326   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_cycle2_offset, machine.device("maincpu")->state().state_int(TX0_CYCLE) & 2);
327   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_rim_offset, machine.device("maincpu")->state().state_int(TX0_RIM));
328   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ioh_offset, machine.device("maincpu")->state().state_int(TX0_IOH));
329   tx0_draw_led(machine, bitmap, x_panel_col2_offset, y_panel_ios_offset, machine.device("maincpu")->state().state_int(TX0_IOS));
330   tx0_draw_multipleled(machine, bitmap, x_panel_col2_offset, y_panel_ir_offset+8, machine.device("maincpu")->state().state_int(TX0_IR), 5);
331   tx0_draw_multipleled(machine, bitmap, x_panel_col2_offset, y_panel_pf_offset+8, machine.device("maincpu")->state().state_int(TX0_PF), 6);
332332}
333333
334334
trunk/src/mess/video/vc4000.c
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116116
117117#ifndef ANALOG_HACK
118118   case 0xcc:
119      if (!activecpu_get_reg(S2650_FO)) data=ioport("JOY1_X")->read();
119      if (!activeS2650_FO)) data=ioport("JOY1_X")->read();
120120      else data=ioport("JOY1_Y")->read();
121121      break;
122122   case 0xcd:
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128128   case 0xcc:      /* left joystick */
129129      if (ioport("CONFIG")->read()&1)
130130      {      /* paddle */
131         if (!cpu_get_reg(machine().device("maincpu"), S2650_FO))
131         if (!machine().device("maincpu")->state().state_int(S2650_FO))
132132         {
133133            data = ioport("JOYS")->read() & 0x03;
134134            switch (data)
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167167      }
168168      else
169169      {      /* buttons */
170         if (!cpu_get_reg(machine().device("maincpu"), S2650_FO))
170         if (!machine().device("maincpu")->state().state_int(S2650_FO))
171171         {
172172            data = ioport("JOYS")->read() & 0x03;
173173            switch (data)
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205205   case 0xcd:      /* right joystick */
206206      if (ioport("CONFIG")->read()&1)
207207      {
208         if (!cpu_get_reg(machine().device("maincpu"), S2650_FO))
208         if (!machine().device("maincpu")->state().state_int(S2650_FO))
209209         {
210210            data = ioport("JOYS")->read() & 0x30;
211211            switch (data)
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244244      }
245245      else
246246      {
247         if (!cpu_get_reg(machine().device("maincpu"), S2650_FO))
247         if (!machine().device("maincpu")->state().state_int(S2650_FO))
248248         {
249249            data = ioport("JOYS")->read() & 0x30;
250250            switch (data)
trunk/src/mess/video/galaxy.c
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2525      if ((state->m_gal_cnt >= 48 * 2) && (state->m_gal_cnt < 48 * 210))  // display on screen just state->m_first 208 lines
2626      {
2727         UINT8 mode = (state->m_latch_value >> 1) & 1; // bit 2 latch represents mode
28         UINT16 addr = (cpu_get_reg(machine.device("maincpu"), Z80_I) << 8) | cpu_get_reg(machine.device("maincpu"), Z80_R) | ((state->m_latch_value & 0x80) ^ 0x80);
28         UINT16 addr = (machine.device("maincpu")->state().state_int(Z80_I) << 8) | machine.device("maincpu")->state().state_int(Z80_R) | ((state->m_latch_value & 0x80) ^ 0x80);
2929         if (mode == 0)
3030         {
3131            // Text mode
32            if (state->m_first == 0 && (cpu_get_reg(machine.device("maincpu"), Z80_R) & 0x1f) == 0)
32            if (state->m_first == 0 && (machine.device("maincpu")->state().state_int(Z80_R) & 0x1f) == 0)
3333            {
3434               // Due to a fact that on real processor latch value is set at
3535               // the end of last cycle we need to skip dusplay of double
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5858         }
5959         else
6060         { // Graphics mode
61            if (state->m_first < 4 && (cpu_get_reg(machine.device("maincpu"), Z80_R) & 0x1f) == 0)
61            if (state->m_first < 4 && (machine.device("maincpu")->state().state_int(Z80_R) & 0x1f) == 0)
6262            {
6363               // Due to a fact that on real processor latch value is set at
6464               // the end of last cycle we need to skip dusplay of 4 times
trunk/src/mess/formats/ace_ace.c
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8585
8686   if ((ace_index & 0x3FFF)==0)
8787   {
88      cpu_set_reg(cpu, Z80_AF, RAM[0x2100] | (RAM[0x2101] << 8));
89      cpu_set_reg(cpu, Z80_BC, RAM[0x2104] | (RAM[0x2105] << 8));
90      cpu_set_reg(cpu, Z80_DE, RAM[0x2108] | (RAM[0x2109] << 8));
91      cpu_set_reg(cpu, Z80_HL, RAM[0x210c] | (RAM[0x210d] << 8));
92      cpu_set_reg(cpu, Z80_IX, RAM[0x2110] | (RAM[0x2111] << 8));
93      cpu_set_reg(cpu, Z80_IY, RAM[0x2114] | (RAM[0x2115] << 8));
94      cpu_set_reg(cpu, STATE_GENPC, RAM[0x211c] | (RAM[0x211d] << 8));
95      cpu_set_reg(cpu, Z80_AF2, RAM[0x2120] | (RAM[0x2121] << 8));
96      cpu_set_reg(cpu, Z80_BC2, RAM[0x2124] | (RAM[0x2125] << 8));
97      cpu_set_reg(cpu, Z80_DE2, RAM[0x2128] | (RAM[0x2129] << 8));
98      cpu_set_reg(cpu, Z80_HL2, RAM[0x212c] | (RAM[0x212d] << 8));
99      cpu_set_reg(cpu, Z80_IM, RAM[0x2130]);
100      cpu_set_reg(cpu, Z80_IFF1, RAM[0x2134]);
101      cpu_set_reg(cpu, Z80_IFF2, RAM[0x2138]);
102      cpu_set_reg(cpu, Z80_I, RAM[0x213c]);
103      cpu_set_reg(cpu, Z80_R, RAM[0x2140]);
88      cpu->set_state_int(Z80_AF, RAM[0x2100] | (RAM[0x2101] << 8));
89      cpu->set_state_int(Z80_BC, RAM[0x2104] | (RAM[0x2105] << 8));
90      cpu->set_state_int(Z80_DE, RAM[0x2108] | (RAM[0x2109] << 8));
91      cpu->set_state_int(Z80_HL, RAM[0x210c] | (RAM[0x210d] << 8));
92      cpu->set_state_int(Z80_IX, RAM[0x2110] | (RAM[0x2111] << 8));
93      cpu->set_state_int(Z80_IY, RAM[0x2114] | (RAM[0x2115] << 8));
94      cpu->set_pc(RAM[0x211c] | (RAM[0x211d] << 8));
95      cpu->set_state_int(Z80_AF2, RAM[0x2120] | (RAM[0x2121] << 8));
96      cpu->set_state_int(Z80_BC2, RAM[0x2124] | (RAM[0x2125] << 8));
97      cpu->set_state_int(Z80_DE2, RAM[0x2128] | (RAM[0x2129] << 8));
98      cpu->set_state_int(Z80_HL2, RAM[0x212c] | (RAM[0x212d] << 8));
99      cpu->set_state_int(Z80_IM, RAM[0x2130]);
100      cpu->set_state_int(Z80_IFF1, RAM[0x2134]);
101      cpu->set_state_int(Z80_IFF2, RAM[0x2138]);
102      cpu->set_state_int(Z80_I, RAM[0x213c]);
103      cpu->set_state_int(Z80_R, RAM[0x2140]);
104104
105105      if ((RAM[0x2119] < 0x80) || !ace_index)
106         cpu_set_reg(cpu, STATE_GENSP, RAM[0x2118] | (RAM[0x2119] << 8));
106         cpu->set_state_int(STATE_GENSP, RAM[0x2118] | (RAM[0x2119] << 8));
107107   }
108108
109109   /* Copy data to the address space */
trunk/src/mess/formats/atom_atm.c
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7070
7171   image_fread_memory(image, start_address, size);
7272
73   cpu_set_reg(image.device().machine().firstcpu, STATE_GENPC, run_address);
73   image.device().machine().firstcpu->set_pc(run_address);
7474
7575   return IMAGE_INIT_PASS;
7676}
trunk/src/mess/formats/m65_snqk.c
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207207    logerror("microtan_snapshot_copy: PC:%02X%02X P:%02X A:%02X X:%02X Y:%02X SP:1%02X",
208208        snapshot_buff[base+1], snapshot_buff[base+0], snapshot_buff[base+2], snapshot_buff[base+3],
209209        snapshot_buff[base+4], snapshot_buff[base+5], snapshot_buff[base+6]);
210    cpu_set_reg(machine.device("maincpu"), M6502_PC, snapshot_buff[base+0] + 256 * snapshot_buff[base+1]);
211    cpu_set_reg(machine.device("maincpu"), M6502_P, snapshot_buff[base+2]);
212    cpu_set_reg(machine.device("maincpu"), M6502_A, snapshot_buff[base+3]);
213    cpu_set_reg(machine.device("maincpu"), M6502_X, snapshot_buff[base+4]);
214    cpu_set_reg(machine.device("maincpu"), M6502_Y, snapshot_buff[base+5]);
215    cpu_set_reg(machine.device("maincpu"), M6502_S, snapshot_buff[base+6]);
210    machine.device("maincpu")->state().set_state_int(M6502_PC, snapshot_buff[base+0] + 256 * snapshot_buff[base+1]);
211    machine.device("maincpu")->state().set_state_int(M6502_P, snapshot_buff[base+2]);
212    machine.device("maincpu")->state().set_state_int(M6502_A, snapshot_buff[base+3]);
213    machine.device("maincpu")->state().set_state_int(M6502_X, snapshot_buff[base+4]);
214    machine.device("maincpu")->state().set_state_int(M6502_Y, snapshot_buff[base+5]);
215    machine.device("maincpu")->state().set_state_int(M6502_S, snapshot_buff[base+6]);
216216}
217217
218218static void microtan_snapshot_copy(running_machine &machine, UINT8 *snapshot_buff, int snapshot_size)
trunk/src/mess/formats/z80bin.c
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9696      autorun = image.device().machine().root_device().ioport("CONFIG")->read_safe(0xFF) & 1;
9797
9898      if (autorun)
99         cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, exec_addr);
99         image.device().machine().device("maincpu")->state().set_pc(exec_addr);
100100   }
101101
102102   return IMAGE_INIT_PASS;
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129129      if (autorun)
130130      {
131131         space->write_word(0xa2, execute_address);      /* fix warm-start vector to get around some copy-protections */
132         cpu_set_reg(cpu, STATE_GENPC, execute_address);
132         cpu->state().set_pc(execute_address);
133133      }
134134      else
135135      {
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194194         if ((execute_address != 0xc858) && autorun)
195195            space->write_word(0xf028, execute_address);
196196
197         cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, 0xf01f);
197         image.device().machine().device("maincpu")->state().set_pc(0xf01f);
198198      }
199199      else
200200      {
201201         if (autorun)
202            cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, execute_address);
202            image.device().machine().device("maincpu")->state().set_pc(execute_address);
203203      }
204204
205205   }
trunk/src/mess/formats/spec_snqk.c
r17797r17798
3434
3535#define LOAD_REG(_cpu, _reg, _data) \
3636        do { \
37          cpu_set_reg(_cpu, _reg, (_data)); \
37          _cpu->state().set_state_int(_reg, (_data)); \
3838        } while (0)
3939
4040#define EXEC_NA "N/A"
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609609          space->write_byte(BASE_RAM + i, snapdata[SNA48_HDR + i]);
610610
611611        /* Get PC from stack */
612        addr = cpu_get_reg(cpu, Z80_SP);
612        addr = cpu->state().state_int(Z80_SP);
613613
614614        if (addr < BASE_RAM || addr > 4*SPECTRUM_BANK - 2)
615615          logerror("Corrupted SP out of range:%04X", addr);
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626626
627627        addr += 2;
628628        logerror("Fixing SP:%04X\n", addr);
629        cpu_set_reg(cpu, Z80_SP, addr);
629        cpu->state().set_state_int(Z80_SP, addr);
630630
631631        /* Set border color */
632632        data = snapdata[SNA48_OFFSET + 26] & 0x07;
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951951
952952    addr += 6;
953953    logerror("Fixing SP:%04X\n", addr);
954    cpu_set_reg(cpu, Z80_SP, addr);
954    cpu->state().set_state_int(Z80_SP, addr);
955955
956956    /* Set border color */
957957    data = (space->read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
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11531153
11541154    addr += 6;
11551155    logerror("Fixing SP:%04X\n", addr);
1156    cpu_set_reg(cpu, Z80_SP, addr);
1156    cpu->state().set_state_int(Z80_SP, addr);
11571157
11581158    /* Set border color */
11591159    data = (space->read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
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18861886    spectrum_snx_decompress_block(machine, snapdata, BASE_RAM, 3*SPECTRUM_BANK);
18871887
18881888    /* get pc from stack */
1889    addr = cpu_get_reg(cpu, Z80_SP);
1889    addr = cpu->state().state_int(Z80_SP);
18901890
18911891    if (addr < BASE_RAM || addr > 4*SPECTRUM_BANK - 2)
18921892      logerror("Corrupted SP out of range:%04X", addr);
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19021902
19031903    addr += 2;
19041904    logerror("Fixed the stack at SP:%04X\n", addr);
1905    cpu_set_reg(cpu, Z80_SP, addr);
1905    cpu->state().set_state_int(Z80_SP, addr);
19061906
19071907    /* Set border color */
19081908    data = snapdata[SNX_OFFSET + 32] & 0x07;
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22352235    /* AF */
22362236    hi = snapdata[0] & 0x0ff;
22372237    lo = snapdata[1] & 0x0ff;
2238    cpu_set_reg(machine.device("maincpu"), Z80_AF, (hi << 8) | lo);
2238    machine.device("maincpu")->state().set_state_int(Z80_AF, (hi << 8) | lo);
22392239    /* BC */
22402240    lo = snapdata[2] & 0x0ff;
22412241    hi = snapdata[3] & 0x0ff;
2242    cpu_set_reg(machine.device("maincpu"), Z80_BC, (hi << 8) | lo);
2242    machine.device("maincpu")->state().set_state_int(Z80_BC, (hi << 8) | lo);
22432243    /* HL */
22442244    lo = snapdata[4] & 0x0ff;
22452245    hi = snapdata[5] & 0x0ff;
2246    cpu_set_reg(machine.device("maincpu"), Z80_HL, (hi << 8) | lo);
2246    machine.device("maincpu")->state().set_state_int(Z80_HL, (hi << 8) | lo);
22472247
22482248    /* SP */
22492249    lo = snapdata[8] & 0x0ff;
22502250    hi = snapdata[9] & 0x0ff;
2251    cpu_set_reg(machine.device("maincpu"), Z80_SP, (hi << 8) | lo);
2251    machine.device("maincpu")->state().set_state_int(Z80_SP, (hi << 8) | lo);
22522252
22532253    /* I */
2254    cpu_set_reg(machine.device("maincpu"), Z80_I, (snapdata[10] & 0x0ff));
2254    machine.device("maincpu")->state().set_state_int(Z80_I, (snapdata[10] & 0x0ff));
22552255
22562256    /* R */
22572257    data = (snapdata[11] & 0x07f) | ((snapdata[12] & 0x01) << 7);
2258    cpu_set_reg(machine.device("maincpu"), Z80_R, data);
2258    machine.device("maincpu")->state().set_state_int(Z80_R, data);
22592259
22602260    /* Set border color */
22612261    state->m_port_fe_data = (state->m_port_fe_data & 0xf8) | ((snapdata[12] & 0x0e) >> 1);
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22632263
22642264    lo = snapdata[13] & 0x0ff;
22652265    hi = snapdata[14] & 0x0ff;
2266    cpu_set_reg(machine.device("maincpu"), Z80_DE, (hi << 8) | lo);
2266    machine.device("maincpu")->state().set_state_int(Z80_DE, (hi << 8) | lo);
22672267
22682268    lo = snapdata[15] & 0x0ff;
22692269    hi = snapdata[16] & 0x0ff;
2270    cpu_set_reg(machine.device("maincpu"), Z80_BC2, (hi << 8) | lo);
2270    machine.device("maincpu")->state().set_state_int(Z80_BC2, (hi << 8) | lo);
22712271
22722272    lo = snapdata[17] & 0x0ff;
22732273    hi = snapdata[18] & 0x0ff;
2274    cpu_set_reg(machine.device("maincpu"), Z80_DE2, (hi << 8) | lo);
2274    machine.device("maincpu")->state().set_state_int(Z80_DE2, (hi << 8) | lo);
22752275
22762276    lo = snapdata[19] & 0x0ff;
22772277    hi = snapdata[20] & 0x0ff;
2278    cpu_set_reg(machine.device("maincpu"), Z80_HL2, (hi << 8) | lo);
2278    machine.device("maincpu")->state().set_state_int(Z80_HL2, (hi << 8) | lo);
22792279
22802280    hi = snapdata[21] & 0x0ff;
22812281    lo = snapdata[22] & 0x0ff;
2282    cpu_set_reg(machine.device("maincpu"), Z80_AF2, (hi << 8) | lo);
2282    machine.device("maincpu")->state().set_state_int(Z80_AF2, (hi << 8) | lo);
22832283
22842284    lo = snapdata[23] & 0x0ff;
22852285    hi = snapdata[24] & 0x0ff;
2286    cpu_set_reg(machine.device("maincpu"), Z80_IY, (hi << 8) | lo);
2286    machine.device("maincpu")->state().set_state_int(Z80_IY, (hi << 8) | lo);
22872287
22882288    lo = snapdata[25] & 0x0ff;
22892289    hi = snapdata[26] & 0x0ff;
2290    cpu_set_reg(machine.device("maincpu"), Z80_IX, (hi << 8) | lo);
2290    machine.device("maincpu")->state().set_state_int(Z80_IX, (hi << 8) | lo);
22912291
22922292    /* Interrupt Flip/Flop */
22932293    if (snapdata[27] == 0)
22942294    {
2295        cpu_set_reg(machine.device("maincpu"), Z80_IFF1, (UINT64)0);
2296        /* cpu_set_reg(machine.device("maincpu"), Z80_IRQ_STATE, 0); */
2295        machine.device("maincpu")->state().set_state_int(Z80_IFF1, (UINT64)0);
2296        /* machine.device("maincpu")->state().set_state_int(Z80_IRQ_STATE, 0); */
22972297    }
22982298    else
22992299    {
2300        cpu_set_reg(machine.device("maincpu"), Z80_IFF1, 1);
2301        /* cpu_set_reg(machine.device("maincpu"), Z80_IRQ_STATE, 1); */
2300        machine.device("maincpu")->state().set_state_int(Z80_IFF1, 1);
2301        /* machine.device("maincpu")->state().set_state_int(Z80_IRQ_STATE, 1); */
23022302    }
23032303
23042304    cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ0, CLEAR_LINE);
r17797r17798
23142314    {
23152315        data = 0;
23162316    }
2317    cpu_set_reg(machine.device("maincpu"), Z80_IFF2, data);
2317    machine.device("maincpu")->state().set_state_int(Z80_IFF2, data);
23182318
23192319    /* Interrupt Mode */
2320    cpu_set_reg(machine.device("maincpu"), Z80_IM, (snapdata[29] & 0x03));
2320    machine.device("maincpu")->state().set_state_int(Z80_IM, (snapdata[29] & 0x03));
23212321
23222322    if (z80_type == SPECTRUM_Z80_SNAPSHOT_48K_OLD)
23232323    {
23242324        lo = snapdata[6] & 0x0ff;
23252325        hi = snapdata[7] & 0x0ff;
2326        cpu_set_reg(machine.device("maincpu"), Z80_PC, (hi << 8) | lo);
2326        machine.device("maincpu")->state().set_state_int(Z80_PC, (hi << 8) | lo);
23272327
23282328        spectrum_page_basicrom(machine);
23292329
r17797r17798
23482348
23492349        lo = snapdata[32] & 0x0ff;
23502350        hi = snapdata[33] & 0x0ff;
2351        cpu_set_reg(machine.device("maincpu"), Z80_PC, (hi << 8) | lo);
2351        machine.device("maincpu")->state().set_state_int(Z80_PC, (hi << 8) | lo);
23522352
23532353        if ((z80_type == SPECTRUM_Z80_SNAPSHOT_128K) || ((z80_type == SPECTRUM_Z80_SNAPSHOT_TS2068) && !strcmp(machine.system().name,"ts2068")))
23542354        {
trunk/src/mess/formats/trs_cmd.c
r17797r17798
6767         image.fread( &addr, 2);
6868         UINT16 address = (addr[1] << 8) | addr[0];
6969         if (LOG) logerror("/CMD transfer address %04x\n", address);
70         cpu_set_reg(image.device().machine().firstcpu, Z80_PC, address);
70         image.device().machine().firstcpu->set_state_int(Z80_PC, address);
7171         }
7272         break;
7373
trunk/src/mess/drivers/pdp1.c
r17797r17798
935935               state->m_tape_reader.rcl = 0;
936936               if (state->m_tape_reader.rcp)
937937               {
938                  cpu_set_reg(machine.device("maincpu"), PDP1_IO, state->m_tape_reader.rb);   /* transfer reader buffer to IO */
938                  machine.device("maincpu")->state().set_state_int(PDP1_IO, state->m_tape_reader.rb);   /* transfer reader buffer to IO */
939939                  pdp1_pulse_iot_done(machine.device("maincpu"));
940940               }
941941               else
r17797r17798
14441444   {
14451445      state->m_io_status |= io_st_pen;
14461446
1447      cpu_set_reg(device->machine().device("maincpu"), PDP1_PF3, 1);
1447      device->machine().device("maincpu")->state().set_state_int(PDP1_PF3, 1);
14481448   }
14491449
14501450   if (nac)
r17797r17798
16061606   } while (state->m_parallel_drum.wc);
16071607   device_adjust_icount(device->machine().device("maincpu"),-device->machine().device<cpu_device>("maincpu")->attotime_to_cycles(delay));
16081608   /* if no error, skip */
1609   cpu_set_reg(device->machine().device("maincpu"), PDP1_PC, cpu_get_reg(device->machine().device("maincpu"), PDP1_PC)+1);
1609   device->machine().device("maincpu")->state().set_state_int(PDP1_PC, device->machine().device("maincpu")->state().state_int(PDP1_PC)+1);
16101610}
16111611
16121612static void iot_dra(device_t *device, int op2, int nac, int mb, int *io, int ac)
r17797r17798
17371737         #if USE_SBS
17381738            cputag_set_input_line_and_vector(machine, "maincpu", 0, ASSERT_LINE, 0);   /* interrupt it, baby */
17391739         #endif
1740         cpu_set_reg(machine.device("maincpu"), PDP1_PF1, 1);
1740         machine.device("maincpu")->state().set_state_int(PDP1_PF1, 1);
17411741         pdp1_typewriter_drawchar(machine, state->m_typewriter.tb);   /* we want to echo input */
17421742         break;
17431743      }
r17797r17798
18161816   int ta_transitions;
18171817
18181818
1819   cpu_set_reg(device, PDP1_SS, device->machine().root_device().ioport("SENSE")->read());
1819   device->state().set_state_int(PDP1_SS, device->machine().root_device().ioport("SENSE")->read());
18201820
18211821   /* read new state of control keys */
18221822   control_keys = state->ioport("CSW")->read();
r17797r17798
18281828
18291829      if (control_transitions & pdp1_extend)
18301830      {
1831         cpu_set_reg(device, PDP1_EXTEND_SW, ! cpu_get_reg(device, PDP1_EXTEND_SW));
1831         device->state().set_state_int(PDP1_EXTEND_SW, ! device->state().state_int(PDP1_EXTEND_SW));
18321832      }
18331833      if (control_transitions & pdp1_start_nobrk)
18341834      {
18351835         pdp1_pulse_start_clear(device);   /* pulse Start Clear line */
1836         cpu_set_reg(device, PDP1_EXD, cpu_get_reg(device, PDP1_EXTEND_SW));
1837         cpu_set_reg(device, PDP1_SBM, (UINT64)0);
1838         cpu_set_reg(device, PDP1_OV, (UINT64)0);
1839         cpu_set_reg(device, PDP1_PC, cpu_get_reg(device, PDP1_TA));
1840         cpu_set_reg(device, PDP1_RUN, 1);
1836         device->state().set_state_int(PDP1_EXD, device->state().state_int(PDP1_EXTEND_SW));
1837         device->state().set_state_int(PDP1_SBM, (UINT64)0);
1838         device->state().set_state_int(PDP1_OV, (UINT64)0);
1839         device->state().set_state_int(PDP1_PC, device->state().state_int(PDP1_TA));
1840         device->state().set_state_int(PDP1_RUN, 1);
18411841      }
18421842      if (control_transitions & pdp1_start_brk)
18431843      {
18441844         pdp1_pulse_start_clear(device);   /* pulse Start Clear line */
1845         cpu_set_reg(device, PDP1_EXD, cpu_get_reg(device, PDP1_EXTEND_SW));
1846         cpu_set_reg(device, PDP1_SBM, 1);
1847         cpu_set_reg(device, PDP1_OV, (UINT64)0);
1848         cpu_set_reg(device, PDP1_PC, cpu_get_reg(device, PDP1_TA));
1849         cpu_set_reg(device, PDP1_RUN, 1);
1845         device->state().set_state_int(PDP1_EXD, device->state().state_int(PDP1_EXTEND_SW));
1846         device->state().set_state_int(PDP1_SBM, 1);
1847         device->state().set_state_int(PDP1_OV, (UINT64)0);
1848         device->state().set_state_int(PDP1_PC, device->state().state_int(PDP1_TA));
1849         device->state().set_state_int(PDP1_RUN, 1);
18501850      }
18511851      if (control_transitions & pdp1_stop)
18521852      {
1853         cpu_set_reg(device, PDP1_RUN, (UINT64)0);
1854         cpu_set_reg(device, PDP1_RIM, (UINT64)0);   /* bug : we stop after reading an even-numbered word
1853         device->state().set_state_int(PDP1_RUN, (UINT64)0);
1854         device->state().set_state_int(PDP1_RIM, (UINT64)0);   /* bug : we stop after reading an even-numbered word
18551855                                            (i.e. data), whereas a real pdp-1 stops after reading
18561856                                            an odd-numbered word (i.e. dio instruciton) */
18571857      }
18581858      if (control_transitions & pdp1_continue)
18591859      {
1860         cpu_set_reg(device, PDP1_RUN, 1);
1860         device->state().set_state_int(PDP1_RUN, 1);
18611861      }
18621862      if (control_transitions & pdp1_examine)
18631863      {
18641864         pdp1_pulse_start_clear(device);   /* pulse Start Clear line */
1865         cpu_set_reg(device, PDP1_PC, cpu_get_reg(device, PDP1_TA));
1866         cpu_set_reg(device, PDP1_MA, cpu_get_reg(device, PDP1_PC));
1867         cpu_set_reg(device, PDP1_IR, LAC);   /* this instruction is actually executed */
1865         device->state().set_state_int(PDP1_PC, device->state().state_int(PDP1_TA));
1866         device->state().set_state_int(PDP1_MA, device->state().state_int(PDP1_PC));
1867         device->state().set_state_int(PDP1_IR, LAC);   /* this instruction is actually executed */
18681868
1869         cpu_set_reg(device, PDP1_MB, (signed)device->memory().space(AS_PROGRAM)->read_dword(PDP1_MA<<2));
1870         cpu_set_reg(device, PDP1_AC, cpu_get_reg(device, PDP1_MB));
1869         device->state().set_state_int(PDP1_MB, (signed)device->memory().space(AS_PROGRAM)->read_dword(PDP1_MA<<2));
1870         device->state().set_state_int(PDP1_AC, device->state().state_int(PDP1_MB));
18711871      }
18721872      if (control_transitions & pdp1_deposit)
18731873      {
18741874         pdp1_pulse_start_clear(device);   /* pulse Start Clear line */
1875         cpu_set_reg(device, PDP1_PC, cpu_get_reg(device, PDP1_TA));
1876         cpu_set_reg(device, PDP1_MA, cpu_get_reg(device, PDP1_PC));
1877         cpu_set_reg(device, PDP1_AC, cpu_get_reg(device, PDP1_TW));
1878         cpu_set_reg(device, PDP1_IR, DAC);   /* this instruction is actually executed */
1875         device->state().set_state_int(PDP1_PC, device->state().state_int(PDP1_TA));
1876         device->state().set_state_int(PDP1_MA, device->state().state_int(PDP1_PC));
1877         device->state().set_state_int(PDP1_AC, device->state().state_int(PDP1_TW));
1878         device->state().set_state_int(PDP1_IR, DAC);   /* this instruction is actually executed */
18791879
1880         cpu_set_reg(device, PDP1_MB, cpu_get_reg(device, PDP1_AC));
1881         device->memory().space(AS_PROGRAM)->write_dword(cpu_get_reg(device, PDP1_MA)<<2, cpu_get_reg(device, PDP1_MB));
1880         device->state().set_state_int(PDP1_MB, device->state().state_int(PDP1_AC));
1881         device->memory().space(AS_PROGRAM)->write_dword(device->state().state_int(PDP1_MA)<<2, device->state().state_int(PDP1_MB));
18821882      }
18831883      if (control_transitions & pdp1_read_in)
18841884      {   /* set cpu to read instructions from perforated tape */
18851885         pdp1_pulse_start_clear(device);   /* pulse Start Clear line */
1886         cpu_set_reg(device, PDP1_PC, (  cpu_get_reg(device, PDP1_TA) & 0170000)
1887                              |  (cpu_get_reg(device, PDP1_PC) & 0007777));   /* transfer ETA to EPC */
1888         /*cpu_set_reg(machine.device("maincpu"), PDP1_MA, cpu_get_reg(machine.device("maincpu"), PDP1_PC));*/
1889         cpu_set_reg(device, PDP1_EXD, cpu_get_reg(device, PDP1_EXTEND_SW));
1890         cpu_set_reg(device, PDP1_OV, (UINT64)0);      /* right??? */
1891         cpu_set_reg(device, PDP1_RUN, (UINT64)0);
1892         cpu_set_reg(device, PDP1_RIM, 1);
1886         device->state().set_state_int(PDP1_PC, (  device->state().state_int(PDP1_TA) & 0170000)
1887                              |  (device->state().state_int(PDP1_PC) & 0007777));   /* transfer ETA to EPC */
1888         /*machine.device("maincpu")->state().set_state_int(PDP1_MA, machine.device("maincpu")->state().state_int(PDP1_PC));*/
1889         device->state().set_state_int(PDP1_EXD, device->state().state_int(PDP1_EXTEND_SW));
1890         device->state().set_state_int(PDP1_OV, (UINT64)0);      /* right??? */
1891         device->state().set_state_int(PDP1_RUN, (UINT64)0);
1892         device->state().set_state_int(PDP1_RIM, 1);
18931893      }
18941894      if (control_transitions & pdp1_reader)
18951895      {
r17797r17798
18991899      }
19001900      if (control_transitions & pdp1_single_step)
19011901      {
1902         cpu_set_reg(device, PDP1_SNGL_STEP, ! cpu_get_reg(device, PDP1_SNGL_STEP));
1902         device->state().set_state_int(PDP1_SNGL_STEP, ! device->state().state_int(PDP1_SNGL_STEP));
19031903      }
19041904      if (control_transitions & pdp1_single_inst)
19051905      {
1906         cpu_set_reg(device, PDP1_SNGL_INST, ! cpu_get_reg(device, PDP1_SNGL_INST));
1906         device->state().set_state_int(PDP1_SNGL_INST, ! device->state().state_int(PDP1_SNGL_INST));
19071907      }
19081908
19091909      /* remember new state of control keys */
r17797r17798
19171917      tw_transitions = tw_keys & (~ state->m_old_tw_keys);
19181918
19191919      if (tw_transitions)
1920         cpu_set_reg(device, PDP1_TW, cpu_get_reg(device, PDP1_TW) ^ tw_transitions);
1920         device->state().set_state_int(PDP1_TW, device->state().state_int(PDP1_TW) ^ tw_transitions);
19211921
19221922      /* remember new state of test word keys */
19231923      state->m_old_tw_keys = tw_keys;
r17797r17798
19301930      ta_transitions = ta_keys & (~ state->m_old_ta_keys);
19311931
19321932      if (ta_transitions)
1933         cpu_set_reg(device, PDP1_TA, cpu_get_reg(device, PDP1_TA) ^ ta_transitions);
1933         device->state().set_state_int(PDP1_TA, device->state().state_int(PDP1_TA) ^ ta_transitions);
19341934
19351935      /* remember new state of test word keys */
19361936      state->m_old_ta_keys = ta_keys;
trunk/src/mess/drivers/pipbug.c
r17797r17798
156156   image.message(" Quickload: size=%04X : exec=%04X",quick_length,exec_addr);
157157
158158   // Start the quickload
159   cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, exec_addr);
159   image.device().machine().device("maincpu")->state().set_pc(exec_addr);
160160   return IMAGE_INIT_PASS;
161161}
162162
trunk/src/mess/drivers/vii.c
r17797r17798
666666         break;
667667
668668      case 0x2f: // Data Segment
669         val = cpu_get_reg(machine().device("maincpu"), UNSP_SR) >> 10;
669         val = machine().device("maincpu")->state().state_int(UNSP_SR) >> 10;
670670         verboselog(machine(), 3, "vii_io_r: Data Segment = %04x (%04x)\n", val, mem_mask);
671671         break;
672672
r17797r17798
757757         break;
758758
759759      case 0x2f: // Data Segment
760         temp = cpu_get_reg(machine().device("maincpu"), UNSP_SR);
761         cpu_set_reg(machine().device("maincpu"), UNSP_SR, (temp & 0x03ff) | ((data & 0x3f) << 10));
760         temp = machine().device("maincpu")->state().state_int(UNSP_SR);
761         machine().device("maincpu")->state().set_state_int(UNSP_SR, (temp & 0x03ff) | ((data & 0x3f) << 10));
762762         verboselog(machine(), 3, "vii_io_w: Data Segment = %04x (%04x)\n", data, mem_mask);
763763         break;
764764
trunk/src/mess/drivers/d6800.c
r17797r17798
350350   image.message(" Quickload: size=%04X : start=%04X : end=%04X : exec=%04X",quick_length,quick_addr,quick_addr+quick_length,exec_addr);
351351
352352   // Start the quickload
353   cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, exec_addr);
353   image.device().machine().device("maincpu")->state().set_pc(exec_addr);
354354   return IMAGE_INIT_PASS;
355355}
356356
trunk/src/mess/drivers/smc777.c
r17797r17798
499499   {
500500      case 0x00:
501501         m_raminh_pending_change = ((data & 0x10) >> 4) ^ 1;
502         m_raminh_prefetch = (UINT8)(cpu_get_reg(&space.device(), Z80_R)) & 0x7f;
502         m_raminh_prefetch = (UINT8)(space.device().state().state_int(Z80_R)) & 0x7f;
503503         break;
504504      case 0x02: printf("Interlace %s\n",data & 0x10 ? "on" : "off"); break;
505505      case 0x05: beep_set_state(machine().device(BEEPER_TAG),data & 0x10); break;
r17797r17798
579579
580580   if(m_raminh_prefetch != 0xff) //do the bankswitch AFTER that the prefetch instruction is executed (FIXME: this is an hackish implementation)
581581   {
582      z80_r = (UINT8)cpu_get_reg(&space.device(), Z80_R);
582      z80_r = (UINT8)space.device().state().state_int(Z80_R);
583583
584584      if(z80_r == ((m_raminh_prefetch+2) & 0x7f))
585585      {
trunk/src/mess/drivers/scorpion.c
r17797r17798
242242DIRECT_UPDATE_MEMBER(scorpion_state::scorpion_direct)
243243{
244244   device_t *beta = machine().device(BETA_DISK_TAG);
245   UINT16 pc = cpu_get_reg(machine().device("maincpu"), STATE_GENPCBASE);
245   UINT16 pc = machine().device("maincpu")->safe_pcbase();
246246
247247   m_ram_disabled_by_beta = 0;
248248   if (betadisk_is_active(beta))
trunk/src/mess/drivers/spectrum.c
r17797r17798
325325{
326326    /* Hack for correct handling 0xffff interrupt vector */
327327    if (address == 0x0001)
328        if (cpu_get_reg(machine().device("maincpu"), STATE_GENPCBASE)==0xffff)
328        if (machine().device("maincpu")->safe_pcbase()==0xffff)
329329        {
330            cpu_set_reg(machine().device("maincpu"), Z80_PC, 0xfff4);
330            machine().device("maincpu")->state().set_state_int(Z80_PC, 0xfff4);
331331            return 0xfff4;
332332        }
333333    return address;
trunk/src/mess/drivers/mpf1.c
r17797r17798
340340
341341   // halt-LED; the red one, is turned on when the processor is halted
342342   // TODO: processor seems to halt, but restarts(?) at 0x0000 after a while -> fix
343   INT64 led_halt = cpu_get_reg(state->m_maincpu, Z80_HALT);
343   INT64 led_halt = state->m_maincpu->state_int(Z80_HALT);
344344   set_led_status(timer.machine(), 1, led_halt);
345345}
346346
trunk/src/mess/drivers/tx0.c
r17797r17798
652652         if (data & 0100)
653653         {
654654            /* read current AC */
655            ac = cpu_get_reg(machine.device("maincpu"), TX0_AC);
655            ac = machine.device("maincpu")->state().state_int(TX0_AC);
656656            /* cycle right */
657657            ac = (ac >> 1) | ((ac & 1) << 17);
658658            /* shuffle and insert data into AC */
659659            ac = (ac /*& 0333333*/) | ((data & 001) << 17) | ((data & 002) << 13) | ((data & 004) << 9) | ((data & 010) << 5) | ((data & 020) << 1) | ((data & 040) >> 3);
660660            /* write modified AC */
661            cpu_set_reg(machine.device("maincpu"), TX0_AC, ac);
661            machine.device("maincpu")->state().set_state_int(TX0_AC, ac);
662662
663663            state->m_tape_reader.rc = (state->m_tape_reader.rc+1) & 3;
664664
665665            if (state->m_tape_reader.rc == 0)
666666            {   /* IO complete */
667667               state->m_tape_reader.rcl = 0;
668               cpu_set_reg(machine.device("maincpu"), TX0_IO_COMPLETE, (UINT64)0);
668               machine.device("maincpu")->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
669669            }
670670         }
671671      }
r17797r17798
701701
702702static TIMER_CALLBACK(puncher_callback)
703703{
704   cpu_set_reg(machine.device("maincpu"), TX0_IO_COMPLETE, (UINT64)0);
704   machine.device("maincpu")->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
705705}
706706
707707/*
r17797r17798
731731   int ac;
732732
733733   /* read current AC */
734   ac = cpu_get_reg(device, TX0_AC);
734   ac = device->state().state_int(TX0_AC);
735735   /* shuffle and punch 6-bit word */
736736   tape_write(state, ((ac & 0100000) >> 15) | ((ac & 0010000) >> 11) | ((ac & 0001000) >> 7) | ((ac & 0000100) >> 3) | ((ac & 0000010) << 1) | ((ac & 0000001) << 5));
737737
r17797r17798
747747   int ac;
748748
749749   /* read current AC */
750   ac = cpu_get_reg(device, TX0_AC);
750   ac = device->state().state_int(TX0_AC);
751751   /* shuffle and punch 6-bit word */
752752   tape_write(state, ((ac & 0100000) >> 15) | ((ac & 0010000) >> 11) | ((ac & 0001000) >> 7) | ((ac & 0000100) >> 3) | ((ac & 0000010) << 1) | ((ac & 0000001) << 5) | 0100);
753753
r17797r17798
796796*/
797797static TIMER_CALLBACK(prt_callback)
798798{
799   cpu_set_reg(machine.device("maincpu"), TX0_IO_COMPLETE, (UINT64)0);
799   machine.device("maincpu")->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
800800}
801801
802802/*
r17797r17798
809809   int ch;
810810
811811   /* read current AC */
812   ac = cpu_get_reg(device, TX0_AC);
812   ac = device->state().state_int(TX0_AC);
813813   /* shuffle and print 6-bit word */
814814   ch = ((ac & 0100000) >> 15) | ((ac & 0010000) >> 11) | ((ac & 0001000) >> 7) | ((ac & 0000100) >> 3) | ((ac & 0000010) << 1) | ((ac & 0000001) << 5);
815815   typewriter_out(device->machine(), ch);
r17797r17798
823823*/
824824static TIMER_CALLBACK(dis_callback)
825825{
826   cpu_set_reg(machine.device("maincpu"), TX0_IO_COMPLETE, (UINT64)0);
826   machine.device("maincpu")->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
827827}
828828
829829/*
r17797r17798
836836   int x;
837837   int y;
838838
839   ac = cpu_get_reg(device, TX0_AC);
839   ac = device->state().state_int(TX0_AC);
840840   x = ac >> 9;
841841   y = ac & 0777;
842842   tx0_plot(device->machine(), x, y);
r17797r17798
941941      if ((state->m_magtape.state == MTS_SELECTED) || ((state->m_magtape.state == MTS_SELECTING) && (state->m_magtape.command == 2)))
942942      {   /* unit has become unavailable */
943943         state->m_magtape.state = MTS_UNSELECTING;
944         cpu_set_reg(machine().device("maincpu"), TX0_PF, cpu_get_reg(machine().device("maincpu"), TX0_PF) | PF_RWC);
944         machine().device("maincpu")->state().set_state_int(TX0_PF, machine().device("maincpu")->state().state_int(TX0_PF) | PF_RWC);
945945         schedule_unselect(state);
946946      }
947947   }
r17797r17798
963963      {
964964         int mar;
965965
966         mar = cpu_get_reg(device, TX0_MAR);
966         mar = device->state().state_int(TX0_MAR);
967967
968968         if ((mar & 03) != 1)
969969         {   /* unimplemented device: remain in unselected state and set rwc
970970                flag? */
971            cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_RWC);
971            device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_RWC);
972972         }
973973         else
974974         {
r17797r17798
983983         }
984984
985985         state->m_magtape.sel_pending = FALSE;
986         cpu_set_reg(device, TX0_IO_COMPLETE, (UINT64)0);
986         device->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
987987      }
988988      break;
989989
r17797r17798
10261026         if (state->m_magtape.img->ftell() == 0)
10271027         {   /* tape at ldp */
10281028            state->m_magtape.state = MTS_UNSELECTING;
1029            cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_RWC);
1029            device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_RWC);
10301030            schedule_unselect(state);
10311031         }
10321032         else if (state->m_magtape.img->fseek( -1, SEEK_CUR))
r17797r17798
10951095                     logerror("invalid longitudinal parity\n");
10961096                  /* set EOR and unselect... */
10971097                  state->m_magtape.state = MTS_UNSELECTING;
1098                  cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_EOR);
1098                  device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_EOR);
10991099                  schedule_unselect(state);
11001100                  state->m_magtape.irg_pos = MTIRGP_ENDMINUS1;
11011101               }
r17797r17798
11511151               /*state->m_magtape.img->unload();*/
11521152               /* Or do we stop at EOT mark??? */
11531153               state->m_magtape.state = MTS_UNSELECTING;
1154               cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_EOT);
1154               device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_EOT);
11551155               schedule_unselect(state);
11561156            }
11571157         }
r17797r17798
11681168                  if (state->m_magtape.cpy_pending)
11691169                  {   /* read command */
11701170                     state->m_magtape.u.read.space_flag = FALSE;
1171                     cpu_set_reg(device, TX0_IO_COMPLETE, (UINT64)0);
1172                     cpu_set_reg(device, TX0_LR, ((cpu_get_reg(device, TX0_LR) >> 1) & 0333333)
1171                     device->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
1172                     device->state().set_state_int(TX0_LR, ((device->state().state_int(TX0_LR) >> 1) & 0333333)
11731173                                          | ((buf & 040) << 12) | ((buf & 020) << 10) | ((buf & 010) << 8) | ((buf & 004) << 6) | ((buf & 002) << 4) | ((buf & 001) << 2));
11741174                     /* check parity */
11751175                     if (! (((buf ^ (buf >> 1) ^ (buf >> 2) ^ (buf >> 3) ^ (buf >> 4) ^ (buf >> 5) ^ (buf >> 6) ^ (buf >> 7)) & 1) ^ state->m_magtape.binary_flag))
1176                        cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_PC);
1176                        device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_PC);
11771177                  }
11781178                  else
11791179                  {   /* space command */
r17797r17798
11921192               }
11931193               if (!state->m_magtape.u.read.space_flag)
11941194               {
1195                  cpu_set_reg(device, TX0_LR, ((cpu_get_reg(device, TX0_LR) >> 1) & 0333333)
1195                  device->state().set_state_int(TX0_LR, ((device->state().state_int(TX0_LR) >> 1) & 0333333)
11961196                                       | ((buf & 040) << 12) | ((buf & 020) << 10) | ((buf & 010) << 8) | ((buf & 004) << 6) | ((buf & 002) << 4) | ((buf & 001) << 2));
11971197                  /* check parity */
11981198                  if (! (((buf ^ (buf >> 1) ^ (buf >> 2) ^ (buf >> 3) ^ (buf >> 4) ^ (buf >> 5) ^ (buf >> 6) ^ (buf >> 7)) & 1) ^ state->m_magtape.binary_flag))
1199                     cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_PC);
1199                     device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_PC);
12001200               }
12011201               state->m_magtape.u.read.state = MTRDS_STATE2;
12021202               break;
r17797r17798
12101210               }
12111211               if (!state->m_magtape.u.read.space_flag)
12121212               {
1213                  cpu_set_reg(device, TX0_LR, ((cpu_get_reg(device, TX0_LR) >> 1) & 0333333)
1213                  device->state().set_state_int(TX0_LR, ((device->state().state_int(TX0_LR) >> 1) & 0333333)
12141214                                       | ((buf & 040) << 12) | ((buf & 020) << 10) | ((buf & 010) << 8) | ((buf & 004) << 6) | ((buf & 002) << 4) | ((buf & 001) << 2));
12151215                  /* check parity */
12161216                  if (! (((buf ^ (buf >> 1) ^ (buf >> 2) ^ (buf >> 3) ^ (buf >> 4) ^ (buf >> 5) ^ (buf >> 6) ^ (buf >> 7)) & 1) ^ state->m_magtape.binary_flag))
1217                     cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_PC);
1217                     device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_PC);
12181218                  /* synchronize with cpy instruction */
12191219                  if (state->m_magtape.cpy_pending)
1220                     cpu_set_reg(device, TX0_IO_COMPLETE, (UINT64)0);
1220                     device->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
12211221                  else
1222                     cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_RWC);
1222                     device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_RWC);
12231223               }
12241224               state->m_magtape.u.read.state = MTRDS_STATE3;
12251225               break;
r17797r17798
12311231                  state->m_magtape.u.read.state = MTRDS_STATE1;
12321232                  if (!state->m_magtape.u.read.space_flag)
12331233                  {
1234                     cpu_set_reg(device, TX0_LR, ((cpu_get_reg(device, TX0_LR) >> 1) & 0333333)
1234                     device->state().set_state_int(TX0_LR, ((device->state().state_int(TX0_LR) >> 1) & 0333333)
12351235                                          | ((buf & 040) << 12) | ((buf & 020) << 10) | ((buf & 010) << 8) | ((buf & 004) << 6) | ((buf & 002) << 4) | ((buf & 001) << 2));
12361236                     /* check parity */
12371237                     if (! (((buf ^ (buf >> 1) ^ (buf >> 2) ^ (buf >> 3) ^ (buf >> 4) ^ (buf >> 5) ^ (buf >> 6) ^ (buf >> 7)) & 1) ^ state->m_magtape.binary_flag))
1238                        cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_PC);
1238                        device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_PC);
12391239                  }
12401240               }
12411241               else
r17797r17798
12751275                  logerror("invalid longitudinal parity\n");
12761276                  /* no idea if the original tx-0 magtape controller
12771277                        checks parity, but can't harm if we do */
1278                  cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_PC);
1278                  device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_PC);
12791279               }
12801280               /* set EOR and unselect... */
12811281               state->m_magtape.state = MTS_UNSELECTING;
1282               cpu_set_reg(device, TX0_PF, cpu_get_reg(device, TX0_PF) | PF_EOR);
1282               device->state().set_state_int(TX0_PF, device->state().state_int(TX0_PF) | PF_EOR);
12831283               schedule_unselect(state);
12841284               state->m_magtape.irg_pos = MTIRGP_START;
12851285               break;
r17797r17798
13171317            if (state->m_magtape.u.write.counter)
13181318            {
13191319               state->m_magtape.u.write.counter--;
1320               lr = cpu_get_reg(device, TX0_LR);
1320               lr = device->state().state_int(TX0_LR);
13211321               buf = ((lr >> 10) & 040) | ((lr >> 8) & 020) | ((lr >> 6) & 010) | ((lr >> 4) & 004) | ((lr >> 2) & 002) | (lr & 001);
13221322               buf |= ((buf << 1) ^ (buf << 2) ^ (buf << 3) ^ (buf << 4) ^ (buf << 5) ^ (buf << 6) ^ ((!state->m_magtape.binary_flag) << 6)) & 0100;
1323               cpu_set_reg(device, TX0_LR, lr >> 1);
1323               device->state().set_state_int(TX0_LR, lr >> 1);
13241324            }
13251325            else
13261326            {
13271327               if (state->m_magtape.cpy_pending)
13281328               {
1329                  cpu_set_reg(device, TX0_IO_COMPLETE, (UINT64)0);
1330                  lr = cpu_get_reg(device, TX0_LR);
1329                  device->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
1330                  lr = device->state().state_int(TX0_LR);
13311331                  buf = ((lr >> 10) & 040) | ((lr >> 8) & 020) | ((lr >> 6) & 010) | ((lr >> 4) & 004) | ((lr >> 2) & 002) | (lr & 001);
13321332                  buf |= ((buf << 1) ^ (buf << 2) ^ (buf << 3) ^ (buf << 4) ^ (buf << 5) ^ (buf << 6) ^ ((!state->m_magtape.binary_flag) << 6)) & 0100;
1333                  cpu_set_reg(device, TX0_LR, lr >> 1);
1333                  device->state().set_state_int(TX0_LR, lr >> 1);
13341334                  state->m_magtape.u.write.counter = 2;
13351335                  break;
13361336               }
r17797r17798
14091409   case MTS_UNSELECTED:
14101410   case MTS_UNSELECTING:
14111411      /* ignore instruction and set rwc flag? */
1412      cpu_set_reg(device, TX0_IO_COMPLETE, (UINT64)0);
1412      device->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
14131413      break;
14141414
14151415   case MTS_SELECTING:
r17797r17798
14191419      case 0:   /* backspace */
14201420      case 2:   /* rewind */
14211421         /* ignore instruction and set rwc flag? */
1422         cpu_set_reg(device, TX0_IO_COMPLETE, (UINT64)0);
1422         device->state().set_state_int(TX0_IO_COMPLETE, (UINT64)0);
14231423         break;
14241424      case 1:   /* read */
14251425      case 3:   /* write */
r17797r17798
14871487            previous LR */
14881488         lr = (1 << 17) | ((charcode & 040) << 10) | ((charcode & 020) << 8) | ((charcode & 010) << 6) | ((charcode & 004) << 4) | ((charcode & 002) << 2) | ((charcode & 001) << 1);
14891489         /* write modified LR */
1490         cpu_set_reg(machine.device("maincpu"), TX0_LR, lr);
1490         machine.device("maincpu")->state().set_state_int(TX0_LR, lr);
14911491         tx0_typewriter_drawchar(machine, charcode);   /* we want to echo input */
14921492         break;
14931493      }
r17797r17798
15201520
15211521      if (control_transitions & tx0_stop_cyc0)
15221522      {
1523         cpu_set_reg(device->machine().device("maincpu"), TX0_STOP_CYC0, !cpu_get_reg(device->machine().device("maincpu"), TX0_STOP_CYC0));
1523         device->machine().device("maincpu")->state().set_state_int(TX0_STOP_CYC0, !device->machine().device("maincpu")->state().state_int(TX0_STOP_CYC0));
15241524      }
15251525      if (control_transitions & tx0_stop_cyc1)
15261526      {
1527         cpu_set_reg(device->machine().device("maincpu"), TX0_STOP_CYC1, !cpu_get_reg(device->machine().device("maincpu"), TX0_STOP_CYC1));
1527         device->machine().device("maincpu")->state().set_state_int(TX0_STOP_CYC1, !device->machine().device("maincpu")->state().state_int(TX0_STOP_CYC1));
15281528      }
15291529      if (control_transitions & tx0_gbl_cm_sel)
15301530      {
1531         cpu_set_reg(device->machine().device("maincpu"), TX0_GBL_CM_SEL, !cpu_get_reg(device->machine().device("maincpu"), TX0_GBL_CM_SEL));
1531         device->machine().device("maincpu")->state().set_state_int(TX0_GBL_CM_SEL, !device->machine().device("maincpu")->state().state_int(TX0_GBL_CM_SEL));
15321532      }
15331533      if (control_transitions & tx0_stop)
15341534      {
1535         cpu_set_reg(device->machine().device("maincpu"), TX0_RUN, (UINT64)0);
1536         cpu_set_reg(device->machine().device("maincpu"), TX0_RIM, (UINT64)0);
1535         device->machine().device("maincpu")->state().set_state_int(TX0_RUN, (UINT64)0);
1536         device->machine().device("maincpu")->state().set_state_int(TX0_RIM, (UINT64)0);
15371537      }
15381538      if (control_transitions & tx0_restart)
15391539      {
1540         cpu_set_reg(device->machine().device("maincpu"), TX0_RUN, 1);
1541         cpu_set_reg(device->machine().device("maincpu"), TX0_RIM, (UINT64)0);
1540         device->machine().device("maincpu")->state().set_state_int(TX0_RUN, 1);
1541         device->machine().device("maincpu")->state().set_state_int(TX0_RIM, (UINT64)0);
15421542      }
15431543      if (control_transitions & tx0_read_in)
15441544      {   /* set cpu to read instructions from perforated tape */
1545         cpu_set_reg(device->machine().device("maincpu"), TX0_RESET, (UINT64)0);
1546         cpu_set_reg(device->machine().device("maincpu"), TX0_RUN, (UINT64)0);
1547         cpu_set_reg(device->machine().device("maincpu"), TX0_RIM, 1);
1545         device->machine().device("maincpu")->state().set_state_int(TX0_RESET, (UINT64)0);
1546         device->machine().device("maincpu")->state().set_state_int(TX0_RUN, (UINT64)0);
1547         device->machine().device("maincpu")->state().set_state_int(TX0_RIM, 1);
15481548      }
15491549      if (control_transitions & tx0_toggle_dn)
15501550      {
r17797r17798
15621562      {
15631563         if (state->m_tsr_index >= 2)
15641564         {
1565            UINT32 cm_sel = (UINT32) cpu_get_reg(device->machine().device("maincpu"), TX0_CM_SEL);
1566            cpu_set_reg(device->machine().device("maincpu"), TX0_CM_SEL, cm_sel ^ (1 << (state->m_tsr_index - 2)));
1565            UINT32 cm_sel = (UINT32) device->machine().device("maincpu")->state().state_int(TX0_CM_SEL);
1566            device->machine().device("maincpu")->state().set_state_int(TX0_CM_SEL, cm_sel ^ (1 << (state->m_tsr_index - 2)));
15671567         }
15681568      }
15691569      if (control_transitions & tx0_lr_sel)
15701570      {
15711571         if (state->m_tsr_index >= 2)
15721572         {
1573            UINT32 lr_sel = (UINT32) cpu_get_reg(device->machine().device("maincpu"), TX0_LR_SEL);
1574            cpu_set_reg(device->machine().device("maincpu"), TX0_LR_SEL, (lr_sel ^ (1 << (state->m_tsr_index - 2))));
1573            UINT32 lr_sel = (UINT32) device->machine().device("maincpu")->state().state_int(TX0_LR_SEL);
1574            device->machine().device("maincpu")->state().set_state_int(TX0_LR_SEL, (lr_sel ^ (1 << (state->m_tsr_index - 2))));
15751575         }
15761576      }
15771577
r17797r17798
15871587
15881588      /* update toggle switch register */
15891589      if (tsr_transitions)
1590         cpu_set_reg(device->machine().device("maincpu"), TX0_TBR+state->m_tsr_index, cpu_get_reg(device->machine().device("maincpu"), TX0_TBR+state->m_tsr_index) ^ tsr_transitions);
1590         device->machine().device("maincpu")->state().set_state_int(TX0_TBR+state->m_tsr_index, device->machine().device("maincpu")->state().state_int(TX0_TBR+state->m_tsr_index) ^ tsr_transitions);
15911591
15921592      /* remember new state of toggle switch register keys */
15931593      state->m_old_tsr_keys = tsr_keys;
trunk/src/mess/drivers/ssem.c
r17797r17798
202202      case PANEL_HALT:
203203         if(misc_state & 0x04)
204204         {
205            cpu_set_reg(ssem_cpu, SSEM_HALT, 1 - cpu_get_reg(ssem_cpu, SSEM_HALT));
205            ssem_cpu->state().set_state_int(SSEM_HALT, 1 - ssem_cpu->state().state_int(SSEM_HALT));
206206         }
207207         break;
208208   }
r17797r17798
446446   ssem_state *state = screen.machine().driver_data<ssem_state>();
447447   UINT32 line = 0;
448448   device_t *ssem_cpu = screen.machine().device("maincpu");
449   UINT32 accum = cpu_get_reg(ssem_cpu, SSEM_A);
449   UINT32 accum = ssem_cpu->state().state_int(SSEM_A);
450450   UINT32 bit = 0;
451451   UINT32 word = 0;
452452
r17797r17798
485485               (state->m_store[(state->m_store_line << 2) | 1] << 16) |
486486               (state->m_store[(state->m_store_line << 2) | 2] <<  8) |
487487               (state->m_store[(state->m_store_line << 2) | 3] <<  0));
488   glyph_print(screen.machine(), bitmap, 0, 272, "LINE:%02d  VALUE:%08x  HALT:%d", state->m_store_line, word, cpu_get_reg(ssem_cpu, SSEM_HALT));
488   glyph_print(screen.machine(), bitmap, 0, 272, "LINE:%02d  VALUE:%08x  HALT:%d", state->m_store_line, word, ssem_cpu->state().state_int(SSEM_HALT));
489489   return 0;
490490}
491491
trunk/src/mess/drivers/bigbord2.c
r17797r17798
185185      {
186186         // simulate interrupt by saving current pc on
187187         // the stack and jumping to interrupt handler.
188         UINT16 spreg = cpu_get_reg(m_maincpu, Z80_SP);
189         UINT16 pcreg = cpu_get_reg(m_maincpu, Z80_PC);
188         UINT16 spreg = m_maincpu->state_int(Z80_SP);
189         UINT16 pcreg = m_maincpu->state_int(Z80_PC);
190190         spreg--;
191191         space.write_byte(spreg, pcreg >> 8);
192192         spreg--;
193193         space.write_byte(spreg, pcreg);
194         cpu_set_reg(m_maincpu, Z80_SP, spreg);
195         cpu_set_reg(m_maincpu, Z80_PC, 0xF120);
194         m_maincpu->set_state_int(Z80_SP, spreg);
195         m_maincpu->set_state_int(Z80_PC, 0xF120);
196196      }
197197   }
198198}
r17797r17798
424424      framecnt = 0;
425425      // simulate interrupt by saving current pc on
426426      // the stack and jumping to interrupt handler.
427      UINT16 spreg = cpu_get_reg(m_maincpu, Z80_SP);
428      UINT16 pcreg = cpu_get_reg(m_maincpu, Z80_PC);
427      UINT16 spreg = m_maincpu->state_int(Z80_SP);
428      UINT16 pcreg = m_maincpu->state_int(Z80_PC);
429429      spreg--;
430430      space->write_byte(spreg, pcreg >> 8);
431431      spreg--;
432432      space->write_byte(spreg, pcreg);
433      cpu_set_reg(m_maincpu, Z80_SP, spreg);
434      cpu_set_reg(m_maincpu, Z80_PC, 0xF18E);
433      m_maincpu->set_state_int(Z80_SP, spreg);
434      m_maincpu->set_state_int(Z80_PC, 0xF18E);
435435   }
436436}
437437
trunk/src/mess/drivers/mz2500.c
r17797r17798
12101210   UINT8 *rom = memregion("rom")->base();
12111211   UINT8 res;
12121212
1213   m_lrom_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
1213   m_lrom_index = (machine().device("maincpu")->state().state_int(Z80_B));
12141214
12151215   m_rom_index = (m_rom_index & 0xffff00) | (m_lrom_index & 0xff);
12161216
r17797r17798
12211221
12221222WRITE8_MEMBER(mz2500_state::mz2500_rom_w)
12231223{
1224   m_hrom_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
1224   m_hrom_index = (machine().device("maincpu")->state().state_int(Z80_B));
12251225
12261226   m_rom_index = (data << 8) | (m_rom_index & 0x0000ff) | ((m_hrom_index & 0xff)<<16);
12271227   //printf("%02x\n",data);
r17797r17798
12331233   UINT8 pal_index;
12341234   UINT8 pal_entry;
12351235
1236   pal_index = cpu_get_reg(machine().device("maincpu"), Z80_B);
1236   pal_index = machine().device("maincpu")->state().state_int(Z80_B);
12371237   pal_entry = (pal_index & 0x1e) >> 1;
12381238
12391239   if(pal_index & 1)
r17797r17798
14401440
14411441READ8_MEMBER(mz2500_state::rp5c15_8_r)
14421442{
1443   UINT8 rtc_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
1443   UINT8 rtc_index = (machine().device("maincpu")->state().state_int(Z80_B));
14441444
14451445   return m_rtc->read(space, rtc_index);
14461446}
14471447
14481448WRITE8_MEMBER(mz2500_state::rp5c15_8_w)
14491449{
1450   UINT8 rtc_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
1450   UINT8 rtc_index = (machine().device("maincpu")->state().state_int(Z80_B));
14511451
14521452   m_rtc->write(space, rtc_index, data);
14531453}
r17797r17798
14581458   UINT8 *emm_ram = memregion("emm")->base();
14591459   UINT8 emm_lo_index;
14601460
1461   emm_lo_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
1461   emm_lo_index = (machine().device("maincpu")->state().state_int(Z80_B));
14621462
14631463   m_emm_offset = (m_emm_offset & 0xffff00) | (emm_lo_index & 0xff);
14641464
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14721472{
14731473   UINT8 emm_hi_index;
14741474
1475   emm_hi_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
1475   emm_hi_index = (machine().device("maincpu")->state().state_int(Z80_B));
14761476
14771477   m_emm_offset = ((emm_hi_index & 0xff) << 16) | ((data & 0xff) << 8) | (m_emm_offset & 0xff);
14781478}
r17797r17798
14821482   UINT8 *emm_ram = memregion("emm")->base();
14831483   UINT8 emm_lo_index;
14841484
1485   emm_lo_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
1485   emm_lo_index = (machine().device("maincpu")->state().state_int(Z80_B));
14861486
14871487   m_emm_offset = (m_emm_offset & 0xffff00) | (emm_lo_index & 0xff);
14881488
trunk/src/mess/drivers/gmaster.c
r17797r17798
1818    if (m_gmachine.ports[2] & 1)
1919   {
2020      data = memregion("maincpu")->base()[0x4000 + offset];
21      logerror("%.4x external memory %.4x read %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), 0x4000 + offset, data);
21      logerror("%.4x external memory %.4x read %.2x\n", (int)space.device().state().state_int(CPUINFO_INT_PC), 0x4000 + offset, data);
2222    }
2323   else
2424   {
r17797r17798
2626      {
2727      case 1:
2828         data=m_video.pixels[m_video.y][m_video.x];
29         logerror("%.4x lcd x:%.2x y:%.2x %.4x read %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), m_video.x, m_video.y, 0x4000 + offset, data);
29         logerror("%.4x lcd x:%.2x y:%.2x %.4x read %.2x\n", (int)space.device().state().state_int(CPUINFO_INT_PC), m_video.x, m_video.y, 0x4000 + offset, data);
3030         if (!(m_video.mode) && m_video.delayed)
3131            m_video.x++;
3232         m_video.delayed = TRUE;
3333         break;
3434      default:
35         logerror("%.4x memory %.4x read %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), 0x4000 + offset, data);
35         logerror("%.4x memory %.4x read %.2x\n", (int)space.device().state().state_int(CPUINFO_INT_PC), 0x4000 + offset, data);
3636      }
3737    }
3838    return data;
r17797r17798
4545    if (m_gmachine.ports[2] & 1)
4646   {
4747      memregion("maincpu")->base()[0x4000 + offset] = data;
48      logerror("%.4x external memory %.4x written %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), 0x4000 + offset, data);
48      logerror("%.4x external memory %.4x written %.2x\n", (int)space.device().state().state_int(CPUINFO_INT_PC), 0x4000 + offset, data);
4949   }
5050   else
5151   {
r17797r17798
5353      {
5454      case 0:
5555         m_video.delayed=FALSE;
56         logerror("%.4x lcd %.4x written %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), 0x4000 + offset, data);
56         logerror("%.4x lcd %.4x written %.2x\n", (int)space.device().state().state_int(CPUINFO_INT_PC), 0x4000 + offset, data);
5757         // e2 af a4 a0 a9 falling block init for both halves
5858         if ((data & 0xfc) == 0xb8)
5959         {
r17797r17798
7777         if (m_video.x < ARRAY_LENGTH(m_video.pixels[0])) // continental galaxy flutlicht
7878            m_video.pixels[m_video.y][m_video.x] = data;
7979         logerror("%.4x lcd x:%.2x y:%.2x %.4x written %.2x\n",
80            (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), m_video.x, m_video.y, 0x4000 + offset, data);
80            (int)space.device().state().state_int(CPUINFO_INT_PC), m_video.x, m_video.y, 0x4000 + offset, data);
8181         m_video.x++;
8282/* 02 b8 1a
8383   02 bb 1a
r17797r17798
9595*/
9696         break;
9797      default:
98         logerror("%.4x memory %.4x written %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), 0x4000 + offset, data);
98         logerror("%.4x memory %.4x written %.2x\n", (int)space.device().state().state_int(CPUINFO_INT_PC), 0x4000 + offset, data);
9999      }
100100   }
101101}
r17797r17798
110110      data = ioport("JOY")->read();
111111      break;
112112   default:
113      logerror("%.4x port %d read %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), offset, data);
113      logerror("%.4x port %d read %.2x\n", (int)space.device().state().state_int(CPUINFO_INT_PC), offset, data);
114114    }
115115    return data;
116116}
r17797r17798
118118WRITE8_MEMBER(gmaster_state::gmaster_port_w)
119119{
120120    m_gmachine.ports[offset] = data;
121    logerror("%.4x port %d written %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), offset, data);
121    logerror("%.4x port %d written %.2x\n", (int)space.device().state().state_int(CPUINFO_INT_PC), offset, data);
122122    switch (offset)
123123   {
124124      case UPD7810_PORTC:
trunk/src/mess/drivers/pda600.c
r17797r17798
104104{
105105   // the PDA600 soon after start waits for something from the Z180 CSIO, I do not know exactly for what
106106   // the CSIO is used and for now I forced the CNTR End-Flag bit to 1 for allow the emulation to continue.
107   cpu_set_reg(m_maincpu, Z180_CNTR, cpu_get_reg(m_maincpu, Z180_CNTR) | 0x80);
107   m_maincpu->set_state_int(Z180_CNTR, m_maincpu->state_int(Z180_CNTR) | 0x80);
108108}
109109
110110void pda600_state::video_start()
trunk/src/mess/drivers/vtech1.c
r17797r17798
256256      space->write_byte(0x788e, start % 256); /* usr subroutine address */
257257      space->write_byte(0x788f, start / 256);
258258      image.message(" %s (M)\nsize=%04X : start=%04X : end=%04X",pgmname,size,start,end);
259      cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, start);            /* start program */
259      image.device().machine().device("maincpu")->state().set_pc(start);            /* start program */
260260      break;
261261
262262   default:
trunk/src/mess/drivers/psx.c
r17797r17798
164164         n_size--;
165165      }
166166
167      cpu_set_reg( cpu, PSXCPU_PC, psxexe_header->pc0 );
168      cpu_set_reg( cpu, PSXCPU_R28, psxexe_header->gp0 );
167      cpu->state().set_state_int( PSXCPU_PC, psxexe_header->pc0 );
168      cpu->state().set_state_int( PSXCPU_R28, psxexe_header->gp0 );
169169      n_stack = psxexe_header->s_addr + psxexe_header->s_size;
170170      if( n_stack != 0 )
171171      {
172         cpu_set_reg( cpu, PSXCPU_R29, n_stack );
173         cpu_set_reg( cpu, PSXCPU_R30, n_stack );
172         cpu->state().set_state_int( PSXCPU_R29, n_stack );
173         cpu->state().set_state_int( PSXCPU_R30, n_stack );
174174      }
175175
176176      return 1;
r17797r17798
183183   if( n_reg < 0x80 && ( n_reg % 4 ) == 0 )
184184   {
185185      logerror( "psx_exe_load: r%-2d   %08x\n", n_reg / 4, n_value );
186      cpu_set_reg( cpu, PSXCPU_R0 + ( n_reg / 4 ), n_value );
186      cpu->state().set_state_int( PSXCPU_R0 + ( n_reg / 4 ), n_value );
187187   }
188188   else if( n_reg == 0x80 )
189189   {
190190      logerror( "psx_exe_load: lo    %08x\n", n_value );
191      cpu_set_reg( cpu, PSXCPU_LO, n_value );
191      cpu->state().set_state_int( PSXCPU_LO, n_value );
192192   }
193193   else if( n_reg == 0x84 )
194194   {
195195      logerror( "psx_exe_load: hi    %08x\n", n_value );
196      cpu_set_reg( cpu, PSXCPU_HI, n_value );
196      cpu->state().set_state_int( PSXCPU_HI, n_value );
197197   }
198198   else if( n_reg == 0x88 )
199199   {
200200      logerror( "psx_exe_load: sr    %08x\n", n_value );
201      cpu_set_reg( cpu, PSXCPU_CP0R12, n_value );
201      cpu->state().set_state_int( PSXCPU_CP0R12, n_value );
202202   }
203203   else if( n_reg == 0x8c )
204204   {
205205      logerror( "psx_exe_load: cause %08x\n", n_value );
206      cpu_set_reg( cpu, PSXCPU_CP0R13, n_value );
206      cpu->state().set_state_int( PSXCPU_CP0R13, n_value );
207207   }
208208   else if( n_reg == 0x90 )
209209   {
210210      logerror( "psx_exe_load: pc    %08x\n", n_value );
211      cpu_set_reg( cpu, PSXCPU_PC, n_value );
211      cpu->state().set_state_int( PSXCPU_PC, n_value );
212212   }
213213   else if( n_reg == 0x94 )
214214   {
215215      logerror( "psx_exe_load: prid  %08x\n", n_value );
216      cpu_set_reg( cpu, PSXCPU_CP0R15, n_value );
216      cpu->state().set_state_int( PSXCPU_CP0R15, n_value );
217217   }
218218   else
219219   {
r17797r17798
438438      {
439439/*          DEBUGGER_BREAK; */
440440
441         address = cpu_get_reg( cpu, PSXCPU_PC );
441         address = cpu->state().state_int( PSXCPU_PC );
442442      }
443443      else
444444      {
trunk/src/mess/drivers/ipc.c
r17797r17798
9797
9898MACHINE_RESET_MEMBER(ipc_state)
9999{
100   cpu_set_reg(machine().device("maincpu"), I8085_PC, 0xE800);
100   machine().device("maincpu")->state().set_state_int(I8085_PC, 0xE800);
101101}
102102
103103WRITE8_MEMBER( ipc_state::kbd_put )
trunk/src/mess/drivers/z1013.c
r17797r17798
257257MACHINE_RESET( z1013 )
258258{
259259   z1013_state *state = machine.driver_data<z1013_state>();
260   cpu_set_reg(machine.device("maincpu"), Z80_PC, 0xF000);
260   machine.device("maincpu")->state().set_state_int(Z80_PC, 0xF000);
261261   state->m_keyboard_part = 0;
262262   state->m_keyboard_line = 0;
263263}
r17797r17798
352352       data+0x20, endaddr - startaddr + 1);
353353
354354   if (runaddr)
355      cpu_set_reg(image.device().machine().device("maincpu"), Z80_PC, runaddr);
355      image.device().machine().device("maincpu")->state().set_state_int(Z80_PC, runaddr);
356356   else
357357   {
358358      image.seterror(IMAGE_ERROR_INVALIDIMAGE, "Loaded but cannot run");
trunk/src/mess/drivers/atm.c
r17797r17798
3535DIRECT_UPDATE_MEMBER(atm_state::atm_direct)
3636{
3737   device_t *beta = machine().device(BETA_DISK_TAG);
38   UINT16 pc = cpu_get_reg(machine().device("maincpu"), STATE_GENPCBASE);
38   UINT16 pc = machine().device("maincpu")->state().state_int(STATE_GENPCBASE);
3939
4040   if (beta->started() && betadisk_is_active(beta))
4141   {
trunk/src/mess/drivers/pockstat.c
r17797r17798
919919static MACHINE_RESET( pockstat )
920920{
921921   pockstat_state *state = machine.driver_data<pockstat_state>();
922   cpu_set_reg(machine.device("maincpu"), STATE_GENPC, 0x4000000);
922   machine.device("maincpu")->state().set_pc(0x4000000);
923923
924924   state->m_ps_flash_write_enable_count = 0;
925925   state->m_ps_flash_write_count = 0;
trunk/src/mess/drivers/x07.c
r17797r17798
975975      if (!m_lcd_on)
976976      {
977977         m_lcd_on = 1;
978         cpu_set_reg(m_maincpu, Z80_PC, 0xc3c3);
978         m_maincpu->set_state_int(Z80_PC, 0xc3c3);
979979      }
980980      else
981981      {
r17797r17798
14891489
14901490   m_regs_r[2] = ioport("CARDBATTERY")->read();
14911491
1492   cpu_set_reg(m_maincpu, Z80_PC, 0xc3c3);
1492   m_maincpu->set_state_int(Z80_PC, 0xc3c3);
14931493}
14941494
14951495static const cassette_interface x07_cassette_interface =
trunk/src/mess/drivers/z9001.c
r17797r17798
153153MACHINE_RESET_MEMBER( z9001_state )
154154{
155155   beep_set_frequency(m_beeper, 800);
156   cpu_set_reg(m_maincpu, Z80_PC, 0xf000);
156   m_maincpu->set_state_int(Z80_PC, 0xf000);
157157}
158158
159159VIDEO_START_MEMBER( z9001_state )
trunk/src/mess/drivers/pdp11.c
r17797r17798
280280         addr = 0165000;
281281      }
282282      addr += machine.root_device().ioport("S1_2")->read() * 2;
283      cpu_set_reg(machine.device("maincpu"), T11_PC, addr);
283      machine.device("maincpu")->state().set_state_int(T11_PC, addr);
284284   }
285285
286286   //0173000
r17797r17798
296296
297297static MACHINE_RESET(pdp11qb)
298298{
299   cpu_set_reg(machine.device("maincpu"), T11_PC, 0xea00);
299   machine.device("maincpu")->state().set_state_int(T11_PC, 0xea00);
300300}
301301
302302static const struct t11_setup pdp11_data =
trunk/src/mess/drivers/p8k.c
r17797r17798
133133// see memory explanation above
134134WRITE8_MEMBER( p8k_state::p8k_port0_w )
135135{
136   UINT8 breg = cpu_get_reg(m_maincpu, Z80_B) >> 4;
136   UINT8 breg = m_maincpu->state_int(Z80_B) >> 4;
137137   if ((data==1) || (data==2) || (data==4))
138138   {
139139      char banknum[8];
r17797r17798
177177   // This is a dreadful hack..
178178   // simulate interrupt by saving current pc on
179179   // the stack and jumping to interrupt handler.
180   UINT16 spreg = cpu_get_reg(m_maincpu, Z80_SP);
181   UINT16 pcreg = cpu_get_reg(m_maincpu, Z80_PC);
180   UINT16 spreg = m_maincpu->state_int(Z80_SP);
181   UINT16 pcreg = m_maincpu->state_int(Z80_PC);
182182   spreg--;
183183   space.write_byte(spreg, pcreg >> 8);
184184   spreg--;
185185   space.write_byte(spreg, pcreg);
186   cpu_set_reg(m_maincpu, Z80_SP, spreg);
187   cpu_set_reg(m_maincpu, Z80_PC, 0x078A);
186   m_maincpu->set_state_int(Z80_SP, spreg);
187   m_maincpu->set_state_int(Z80_PC, 0x078A);
188188}
189189
190190static GENERIC_TERMINAL_INTERFACE( terminal_intf )
trunk/src/mess/drivers/pentagon.c
r17797r17798
2222DIRECT_UPDATE_MEMBER(pentagon_state::pentagon_direct)
2323{
2424   device_t *beta = machine().device(BETA_DISK_TAG);
25   UINT16 pc = cpu_get_reg(machine().device("maincpu"), STATE_GENPCBASE);
25   UINT16 pc = machine().device("maincpu")->safe_pcbase();
2626
2727   if (beta->started() && betadisk_is_active(beta))
2828   {
trunk/src/mess/drivers/cxhumax.c
r17797r17798
159159      memset(buf,0,200);
160160
161161      int i = 0;
162      while ((temp=program->read_byte(cpu_get_reg(m_maincpu, ARM7_R0)+i))) {
162      while ((temp=program->read_byte(m_maincpu->state_int(ARM7_R0)+i))) {
163163         buf[i++]=temp;
164164         //m_terminal->write(space, 0, temp);
165165      }
trunk/src/mess/drivers/lynx.c
r17797r17798
177177   space->write_byte(0x1fc, start & 0xff);
178178   space->write_byte(0x1fd, start >> 8);
179179
180   cpu_set_reg(cpu, STATE_GENPC, start);
180   cpu->state().set_pc(start);
181181
182182   return IMAGE_INIT_PASS;
183183}
trunk/src/mess/drivers/apexc.c
r17797r17798
421421
422422   if (control_transitions & panel_run)
423423   {   /* toggle run/stop state */
424      cpu_set_reg(device, APEXC_STATE, ! cpu_get_reg(device, APEXC_STATE));
424      device->state().set_state_int(APEXC_STATE, ! device->state().state_int(APEXC_STATE));
425425   }
426426
427427   while (control_transitions & (panel_CR | panel_A | panel_R | panel_ML | panel_HB))
r17797r17798
463463         /* read/write register #reg_id */
464464         if (control_keys & panel_write)
465465            /* write reg */
466            cpu_set_reg(device, reg_id, state->m_panel_data_reg);
466            device->state().set_state_int(reg_id, state->m_panel_data_reg);
467467         else
468468            /* read reg */
469            state->m_panel_data_reg = cpu_get_reg(device, reg_id);
469            state->m_panel_data_reg = device->state().state_int(reg_id);
470470      }
471471   }
472472
r17797r17798
475475
476476      if (control_keys & panel_write) {
477477         /* write memory */
478         space->write_dword(cpu_get_reg(device, APEXC_ML_FULL)<<2, state->m_panel_data_reg);
478         space->write_dword(device->state().state_int(APEXC_ML_FULL)<<2, state->m_panel_data_reg);
479479      }
480480      else {
481481         /* read memory */
482         state->m_panel_data_reg = space->read_dword(cpu_get_reg(device, APEXC_ML_FULL)<<2);
482         state->m_panel_data_reg = space->read_dword(device->state().state_int(APEXC_ML_FULL)<<2);
483483      }
484484   }
485485
r17797r17798
605605
606606   apexc_draw_led(bitmap, 0, 0, 1);
607607
608   apexc_draw_led(bitmap, 0, 8, cpu_get_reg(screen.machine().device("maincpu"), APEXC_STATE));
608   apexc_draw_led(bitmap, 0, 8, screen.machine().device("maincpu")->state().state_int(APEXC_STATE));
609609
610610   for (i=0; i<32; i++)
611611   {
trunk/src/mess/drivers/instruct.c
r17797r17798
282282   image.message(" Quickload: size=%04X : exec=%04X",quick_length,exec_addr);
283283
284284   // Start the quickload
285   cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, exec_addr);
285   image.device().machine().device("maincpu")->state().set_pc(exec_addr);
286286   return IMAGE_INIT_PASS;
287287}
288288
trunk/src/mess/drivers/mmodular.c
r17797r17798
947947
948948READ32_MEMBER(polgar_state::read_unknown3_32)
949949{
950   logerror("Read from unknown3 offset: %x %08x\n",offset,(unsigned int) cpu_get_reg(machine().device("maincpu"), M68K_PC));
950   logerror("Read from unknown3 offset: %x %08x\n",offset,(unsigned int) machine().device("maincpu")->state().state_int(M68K_PC));
951951   return 0xffffffff;
952952   //return unknown2_data|unknown2_data<<24;
953953
trunk/src/mess/drivers/vector4.c
r17797r17798
7474{
7575   vector4_state *state = machine.driver_data<vector4_state>();
7676   state->m_term_data = 0;
77   cpu_set_reg(machine.device("maincpu"), Z80_PC, 0xe000);
77   machine.device("maincpu")->state().set_state_int(Z80_PC, 0xe000);
7878}
7979
8080WRITE8_MEMBER( vector4_state::kbd_put )
trunk/src/mess/drivers/bw2.c
r17797r17798
224224{
225225   if (state)
226226   {
227      if (cpu_get_reg(m_maincpu, Z80_HALT))
227      if (m_maincpu->state_int(Z80_HALT))
228228      {
229229         device_set_input_line(m_maincpu, INPUT_LINE_NMI, HOLD_LINE);
230230      }
trunk/src/mess/drivers/altair.c
r17797r17798
107107{
108108   altair_state *state = machine.driver_data<altair_state>();
109109   // Set startup addess done by turn-key
110   cpu_set_reg(machine.device("maincpu"), I8085_PC, 0xFD00);
110   machine.device("maincpu")->state().set_state_int(I8085_PC, 0xFD00);
111111
112112   state->m_term_data = 0;
113113}
trunk/src/mess/drivers/unior.c
r17797r17798
238238
239239static MACHINE_RESET(unior)
240240{
241   cpu_set_reg(machine.device("maincpu"), I8085_PC, 0xF800);
241   machine.device("maincpu")->state().set_state_int(I8085_PC, 0xF800);
242242}
243243
244244static VIDEO_START( unior )
trunk/src/mess/drivers/cd2650.c
r17797r17798
247247   image.message(" Quickload: size=%04X : exec=%04X",quick_length,exec_addr);
248248
249249   // Start the quickload
250   cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, exec_addr);
250   image.device().machine().device("maincpu")->state().set_pc(exec_addr);
251251   return IMAGE_INIT_PASS;
252252}
253253
trunk/src/mess/drivers/pegasus.c
r17797r17798
160160/* Must return the A register except when it is doing a rom search */
161161READ8_MEMBER( pegasus_state::pegasus_protection_r )
162162{
163   UINT8 data = cpu_get_reg(m_maincpu, M6809_A);
163   UINT8 data = m_maincpu->state_int(M6809_A);
164164   if (data == 0x20) data = 0xff;
165165   return data;
166166}
trunk/src/mess/drivers/jupiter.c
r17797r17798
242242{
243243   UINT8* ROM = memregion(Z80_TAG)->base();
244244   memcpy(m_p_ram, ROM, 0x1000);
245   cpu_set_reg(m_maincpu, STATE_GENPC, 0xe000);
245   m_maincpu->set_pc(0xe000);
246246}
247247
248248
trunk/src/mess/drivers/horizon.c
r17797r17798
6262
6363static MACHINE_RESET(horizon)
6464{
65   cpu_set_reg(machine.device("maincpu"), Z80_PC, 0xe800);
65   machine.device("maincpu")->state().set_state_int(Z80_PC, 0xe800);
6666}
6767
6868static MACHINE_RESET(horizon_sd)
6969{
70   cpu_set_reg(machine.device("maincpu"), Z80_PC, 0xe900);
70   machine.device("maincpu")->state().set_state_int(Z80_PC, 0xe900);
7171}
7272
7373WRITE8_MEMBER( horizon_state::kbd_put )
trunk/src/mess/drivers/ccs2810.c
r17797r17798
112112
113113MACHINE_RESET_MEMBER(ccs2810_state)
114114{
115   cpu_set_reg(m_maincpu, Z80_PC, 0xf000);
115   m_maincpu->set_state_int(Z80_PC, 0xf000);
116116   m_26_count = 0x41;
117117}
118118
trunk/src/mess/drivers/ti89.c
r17797r17798
464464
465465void ti68k_state::machine_reset()
466466{
467   m_maincpu->set_state(M68K_PC, m_initial_pc);
467   m_maincpu->set_state_int(M68K_PC, m_initial_pc);
468468
469469   m_kb_mask = 0xff;
470470   m_on_key = 0;
trunk/src/mess/drivers/xerox820.c
r17797r17798
594594
595595WRITE_LINE_MEMBER( xerox820_state::intrq_w )
596596{
597   int halt = cpu_get_reg(m_maincpu, Z80_HALT);
597   int halt = m_maincpu->state_int(Z80_HALT);
598598
599599   m_fdc_irq = state;
600600
r17797r17798
606606
607607WRITE_LINE_MEMBER( xerox820_state::drq_w )
608608{
609   int halt = cpu_get_reg(m_maincpu, Z80_HALT);
609   int halt = m_maincpu->state_int(Z80_HALT);
610610
611611   m_fdc_drq = state;
612612
trunk/src/mess/drivers/alphatro.c
r17797r17798
352352   // do what the IPL does
353353   //  UINT8* RAM = machine().device<ram_device>("ram")->pointer();
354354   UINT8* ROM = memregion("maincpu")->base();
355   cpu_set_reg(m_maincpu, STATE_GENPC, 0xe000);
355   m_maincpu->set_pc(0xe000);
356356   memcpy(m_p_ram, ROM, 0xf000); // copy BASIC to RAM, which the undumped IPL is supposed to do.
357357   memcpy(m_p_videoram, ROM+0x1000, 0x1000);
358358   //  membank("bank1")->set_base(RAM);
trunk/src/mess/drivers/vc4000.c
r17797r17798
580580      image.message(" Quickload: size=%04X : start=%04X : end=%04X : exec=%04X",quick_length-5,quick_addr,quick_addr+quick_length-5,exec_addr);
581581
582582      // Start the quickload
583      cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, exec_addr);
583      image.device().machine().device("maincpu")->state().set_pc(exec_addr);
584584      return IMAGE_INIT_PASS;
585585   }
586586   else
r17797r17798
625625      image.message(" Quickload: size=%04X : exec=%04X",quick_length,exec_addr);
626626
627627      // Start the quickload
628      cpu_set_reg(image.device().machine().device("maincpu"), STATE_GENPC, exec_addr);
628      image.device().machine().device("maincpu")->state().set_pc(exec_addr);
629629      return IMAGE_INIT_PASS;
630630   }
631631   else
trunk/src/mess/drivers/gba.c
r17797r17798
19591959{
19601960   UINT32 data, cpsr, pc;
19611961   cpu_device *cpu = downcast<cpu_device *>(machine().device( "maincpu"));
1962   pc = cpu_get_reg( cpu, ARM7_PC);
1963   cpsr = cpu_get_reg( cpu, ARM7_CPSR);
1962   pc = cpu->state_int( ARM7_PC);
1963   cpsr = cpu->state_int( ARM7_CPSR);
19641964   if (T_IS_SET( cpsr))
19651965   {
19661966      data = space.read_dword( pc + 8);

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