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r41644 Saturday 7th November, 2015 at 17:50:13 UTC by fulivi
imds2: USARTs added, rs232 ports still missing

[src/mame/drivers]	ddenlovr.c equites.c imds2.c microkit.c
[src/mame/includes]	equites.h imds2.h
[src/mame/video]	equites.c

trunk/src/mame/drivers/ddenlovr.c

r250155	r250156
697	697	if (baddr / 8 >= src_len)
698	698	{
699	699	#ifdef MAME_DEBUG
700		//      popmessage("GFX ROM OVER %06x", baddr / 8);
	700	popmessage("GFX ROM OVER %06x", baddr / 8);
701	701	#endif
702	702	return 1;
703	703	}

trunk/src/mame/drivers/equites.c

r250155	r250156
524	524
525	525
526	526	/******************************************************************************/
	527	// Local Functions
	528
	529	/******************************************************************************/
527	530	// Interrupt Handlers
528	531
	532	// Equites Hardware
529	533	TIMER_DEVICE_CALLBACK_MEMBER(equites_state::equites_scanline)
530	534	{
531	535	int scanline = param;
r250155	r250156
592	596
593	597
594	598	/******************************************************************************/
595		// CPU Handlers
	599	// Main CPU Handlers
596	600
597		CUSTOM_INPUT_MEMBER(equites_state::gekisou_unknown_bit_r)
	601	CUSTOM_INPUT_MEMBER(equites_state::gekisou_unknown_status)
598	602	{
599		return m_gekisou_unknown_bit;
	603	return m_unknown_bit;
600	604	}
601	605
602		WRITE16_MEMBER(equites_state::gekisou_unknown_bit_w)
	606	WRITE16_MEMBER(equites_state::gekisou_unknown_0_w)
603	607	{
604		// data bit is A16 (offset)
605		m_gekisou_unknown_bit = (offset == 0) ? 0 : 1;;
	608	m_unknown_bit = 0;
606	609	}
607	610
	611	WRITE16_MEMBER(equites_state::gekisou_unknown_1_w)
	612	{
	613	m_unknown_bit = 1;
	614	}
608	615
	616
	617
	618	/******************************************************************************/
	619	// Main CPU Memory Map
	620
609	621	READ16_MEMBER(equites_state::equites_spriteram_kludge_r)
610	622	{
611	623	if (m_spriteram[0] == 0x5555)
r250155	r250156
647	659	}
648	660
649	661
650
651		/******************************************************************************/
652		// CPU Memory Maps
653
654	662	static ADDRESS_MAP_START( equites_map, AS_PROGRAM, 16, equites_state )
655	663	ADDRESS_MAP_UNMAP_HIGH
656	664	AM_RANGE(0x000000, 0x00ffff) AM_ROM // ROM area is written several times (dev system?)
657		AM_RANGE(0x040000, 0x040fff) AM_RAM
	665	AM_RANGE(0x040000, 0x040fff) AM_RAM AM_SHARE("nvram")   // nvram is for gekisou only
658	666	AM_RANGE(0x080000, 0x080fff) AM_READWRITE8(equites_fg_videoram_r, equites_fg_videoram_w, 0x00ff)
659	667	AM_RANGE(0x0c0000, 0x0c01ff) AM_RAM_WRITE(equites_bg_videoram_w) AM_SHARE("bg_videoram")
660	668	AM_RANGE(0x0c0200, 0x0c0fff) AM_RAM
r250155	r250156
667	675	AM_RANGE(0x18c000, 0x18c001) AM_MIRROR(0x020000) AM_MASK(0x020000) AM_WRITE(mcu_switch_w)
668	676	AM_RANGE(0x1c0000, 0x1c0001) AM_READ_PORT("IN0") AM_WRITE(equites_scrollreg_w)
669	677	AM_RANGE(0x380000, 0x380001) AM_WRITE8(equites_bgcolor_w, 0xff00)
	678	// 580000 unknown (protection?) (gekisou only, installed by DRIVER_INIT)
	679	// 5a0000 unknown (protection?) (gekisou only, installed by DRIVER_INIT)
670	680	AM_RANGE(0x780000, 0x780001) AM_WRITE(watchdog_reset16_w)
671	681	ADDRESS_MAP_END
672	682
673		static ADDRESS_MAP_START( gekisou_map, AS_PROGRAM, 16, equites_state )
674		AM_RANGE(0x040000, 0x040fff) AM_RAM AM_SHARE("nvram") // mainram is battery-backed
675		AM_RANGE(0x580000, 0x580001) AM_MIRROR(0x020000) AM_MASK(0x020000) AM_WRITE(gekisou_unknown_bit_w)
676		AM_IMPORT_FROM( equites_map )
677		ADDRESS_MAP_END
678
679
680	683	static ADDRESS_MAP_START( splndrbt_map, AS_PROGRAM, 16, equites_state )
681	684	ADDRESS_MAP_UNMAP_HIGH
682	685	AM_RANGE(0x000000, 0x00ffff) AM_ROM
683		AM_RANGE(0x040000, 0x040fff) AM_RAM
	686	AM_RANGE(0x040000, 0x040fff) AM_RAM AM_SHARE("workram")
684	687	AM_RANGE(0x080000, 0x080001) AM_READ_PORT("IN0")
685	688	AM_RANGE(0x0c0000, 0x0c0001) AM_READ_PORT("IN1")
686	689	AM_RANGE(0x0c0000, 0x0c0001) AM_MIRROR(0x020000) AM_MASK(0x020000) AM_WRITE8(equites_bgcolor_w, 0xff00) // note: addressmask does not apply here
r250155	r250156
699	702	AM_RANGE(0x600100, 0x6001ff) AM_RAM AM_SHARE("spriteram_2") // sprite RAM 2 (8-bit)
700	703	ADDRESS_MAP_END
701	704
702
703	705	static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, equites_state )
704	706	AM_RANGE(0x0000, 0xbfff) AM_ROM
705	707	AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_byte_r)
r250155	r250156
778	780
779	781	/* this is actually a variable resistor */
780	782	PORT_START(FRQ_ADJUSTER_TAG)
781		PORT_ADJUSTER(25, "MSM5232 Clock") // approximate factory setting
	783	PORT_ADJUSTER(25, "MSM5232 Clock")
782	784	INPUT_PORTS_END
783	785
784	786	/******************************************************************************/
r250155	r250156
797	799	PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
798	800	PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
799	801	PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
800		PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, equites_state, gekisou_unknown_bit_r, NULL)
	802	PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, equites_state,gekisou_unknown_status, NULL)
801	803
802	804	/* this is actually a variable resistor */
803	805	PORT_START(FRQ_ADJUSTER_TAG)
804		PORT_ADJUSTER(24, "MSM5232 Clock") // approximate factory setting
	806	PORT_ADJUSTER(24, "MSM5232 Clock")
805	807	INPUT_PORTS_END
806	808
807	809	/******************************************************************************/
r250155	r250156
834	836
835	837	/* this is actually a variable resistor */
836	838	PORT_START(FRQ_ADJUSTER_TAG)
837		PORT_ADJUSTER(33, "MSM5232 Clock") // approximate factory setting
	839	PORT_ADJUSTER(33, "MSM5232 Clock")
838	840	INPUT_PORTS_END
839	841
840	842	/******************************************************************************/
r250155	r250156
867	869
868	870	/* this is actually a variable resistor */
869	871	PORT_START(FRQ_ADJUSTER_TAG)
870		PORT_ADJUSTER(33, "MSM5232 Clock") // approximate factory setting
	872	PORT_ADJUSTER(33, "MSM5232 Clock")
871	873	INPUT_PORTS_END
872	874
873	875	/******************************************************************************/
r250155	r250156
900	902
901	903	/* this is actually a variable resistor */
902	904	PORT_START(FRQ_ADJUSTER_TAG)
903		PORT_ADJUSTER(28, "MSM5232 Clock") // approximate factory setting
	905	PORT_ADJUSTER(28, "MSM5232 Clock")
904	906	INPUT_PORTS_END
905	907
906	908	/******************************************************************************/
r250155	r250156
949	951
950	952	/* this is actually a variable resistor */
951	953	PORT_START(FRQ_ADJUSTER_TAG)
952		PORT_ADJUSTER(27, "MSM5232 Clock") // approximate factory setting
	954	PORT_ADJUSTER(27, "MSM5232 Clock")
953	955	INPUT_PORTS_END
954	956
955	957
r250155	r250156
1086	1088
1087	1089	/******************************************************************************/
1088	1090
1089		void equites_state::machine_start()
	1091	MACHINE_START_MEMBER(equites_state,equites)
1090	1092	{
1091		// zerofill
1092		m_fg_char_bank = 0;
1093		m_bgcolor = 0;
1094		m_splndrbt_bg_scrollx = 0;
1095		m_splndrbt_bg_scrolly = 0;
1096		m_sound_prom_address = 0;
1097		m_dac_latch = 0;
1098		m_eq8155_port_b = 0;
1099		m_eq8155_port_a = 0;
1100		m_eq8155_port_c = 0;
1101		m_ay_port_a = 0;
1102		m_ay_port_b = 0;
1103		m_eq_cymbal_ctrl = 0;
1104		m_cymvol = 0.0;
1105		m_hihatvol = 0.0;
1106		m_timer_count = 0;
1107		m_gekisou_unknown_bit = 0;
1108
1109		// register for savestates
1110	1093	save_item(NAME(m_fg_char_bank));
1111	1094	save_item(NAME(m_bgcolor));
1112	1095	save_item(NAME(m_splndrbt_bg_scrollx));
r250155	r250156
1122	1105	save_item(NAME(m_cymvol));
1123	1106	save_item(NAME(m_hihatvol));
1124	1107	save_item(NAME(m_timer_count));
1125		save_item(NAME(m_gekisou_unknown_bit));
	1108	save_item(NAME(m_unknown_bit));
1126	1109
1127	1110	m_nmi_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(equites_state::equites_nmi_callback), this));
1128	1111
r250155	r250156
1130	1113	m_adjuster_timer->adjust(attotime::from_hz(60), 0, attotime::from_hz(60));
1131	1114	}
1132	1115
1133		void equites_state::machine_reset()
	1116	MACHINE_RESET_MEMBER(equites_state,equites)
1134	1117	{
1135	1118	flip_screen_set(0);
	1119
	1120	m_fg_char_bank = 0;
	1121	m_bgcolor = 0;
	1122	m_splndrbt_bg_scrollx = 0;
	1123	m_splndrbt_bg_scrolly = 0;
	1124	m_sound_prom_address = 0;
	1125	m_dac_latch = 0;
	1126	m_eq8155_port_b = 0;
	1127	m_eq8155_port_a = 0;
	1128	m_eq8155_port_c = 0;
	1129	m_ay_port_a = 0;
	1130	m_ay_port_b = 0;
	1131	m_eq_cymbal_ctrl = 0;
	1132	m_cymvol = 0.0;
	1133	m_hihatvol = 0.0;
	1134	m_timer_count = 0;
	1135	m_unknown_bit = 0;
1136	1136	}
1137	1137
1138	1138
r250155	r250156
1162	1162	MCFG_PALETTE_INIT_OWNER(equites_state,equites)
1163	1163
1164	1164	MCFG_VIDEO_START_OVERRIDE(equites_state,equites)
	1165
	1166	MCFG_MACHINE_START_OVERRIDE(equites_state,equites)
	1167	MCFG_MACHINE_RESET_OVERRIDE(equites_state,equites)
1165	1168	MACHINE_CONFIG_END
1166	1169
1167	1170	static MACHINE_CONFIG_DERIVED( gekisou, equites )
1168	1171
1169		/* basic machine hardware */
1170		MCFG_CPU_MODIFY("maincpu")
1171		MCFG_CPU_PROGRAM_MAP(gekisou_map)
1172
1173	1172	// mcu not dumped, so add simulated mcu
1174	1173	MCFG_CPU_ADD("mcu", ALPHA8301L, 4000000/8)
1175	1174	MCFG_CPU_PROGRAM_MAP(mcu_map)
r250155	r250156
1205	1204	MCFG_PALETTE_INIT_OWNER(equites_state,splndrbt)
1206	1205
1207	1206	MCFG_VIDEO_START_OVERRIDE(equites_state,splndrbt)
	1207
	1208	MCFG_MACHINE_START_OVERRIDE(equites_state,equites)
	1209	MCFG_MACHINE_RESET_OVERRIDE(equites_state,equites)
1208	1210	MACHINE_CONFIG_END
1209	1211
1210	1212	static MACHINE_CONFIG_DERIVED( hvoltage, splndrbt )
r250155	r250156
1768	1770	/******************************************************************************/
1769	1771	// Initializations
1770	1772
1771		void equites_state::unpack_block(const char *region, int offset, int size)
	1773	void equites_state::unpack_block( const char *region, int offset, int size )
1772	1774	{
1773	1775	UINT8 *rom = memregion(region)->base();
	1776	int i;
1774	1777
1775		for (int i = 0; i < size; i++)
	1778	for (i = 0; i < size; ++i)
1776	1779	{
1777	1780	rom[(offset + i + size)] = (rom[(offset + i)] >> 4);
1778	1781	rom[(offset + i)] &= 0x0f;
1779	1782	}
1780	1783	}
1781	1784
1782		void equites_state::unpack_region(const char *region)
	1785	void equites_state::unpack_region( const char *region )
1783	1786	{
1784	1787	unpack_block(region, 0x0000, 0x2000);
1785	1788	unpack_block(region, 0x4000, 0x2000);
r250155	r250156
1792	1795	unpack_region("gfx3");
1793	1796	}
1794	1797
	1798	DRIVER_INIT_MEMBER(equites_state,bullfgtr)
	1799	{
	1800	unpack_region("gfx2");
	1801	unpack_region("gfx3");
	1802	}
	1803
	1804	DRIVER_INIT_MEMBER(equites_state,kouyakyu)
	1805	{
	1806	unpack_region("gfx2");
	1807	unpack_region("gfx3");
	1808	}
	1809
	1810	DRIVER_INIT_MEMBER(equites_state,gekisou)
	1811	{
	1812	unpack_region("gfx2");
	1813	unpack_region("gfx3");
	1814
	1815	// install special handlers for unknown device (protection?)
	1816	m_maincpu->space(AS_PROGRAM).install_write_handler(0x580000, 0x580001, write16_delegate(FUNC(equites_state::gekisou_unknown_0_w),this));
	1817	m_maincpu->space(AS_PROGRAM).install_write_handler(0x5a0000, 0x5a0001, write16_delegate(FUNC(equites_state::gekisou_unknown_1_w),this));
	1818	}
	1819
1795	1820	DRIVER_INIT_MEMBER(equites_state,splndrbt)
1796	1821	{
1797	1822	unpack_region("gfx3");
r250155	r250156
1804	1829	// Game Entries
1805	1830
1806	1831	// Equites Hardware
1807		GAME( 1984, equites,   0,        equites,  equites,  equites_state, equites,  ROT90, "Alpha Denshi Co.", "Equites", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
1808		GAME( 1984, equitess,  equites,  equites,  equites,  equites_state, equites,  ROT90, "Alpha Denshi Co. (Sega license)", "Equites (Sega)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
1809		GAME( 1984, bullfgtr,  0,        equites,  bullfgtr, equites_state, equites,  ROT90, "Alpha Denshi Co.", "Bull Fighter", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
1810		GAME( 1984, bullfgtrs, bullfgtr, equites,  bullfgtr, equites_state, equites,  ROT90, "Alpha Denshi Co. (Sega license)", "Bull Fighter (Sega)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
1811		GAME( 1985, kouyakyu,  0,        equites,  kouyakyu, equites_state, equites,  ROT0,  "Alpha Denshi Co.", "The Koukou Yakyuu", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
1812		GAME( 1985, gekisou,   0,        gekisou,  gekisou,  equites_state, equites,  ROT90, "Eastern Corp.", "Gekisou (Japan)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
	1832	GAME( 1984, equites,  0,        equites,  equites,  equites_state, equites,  ROT90, "Alpha Denshi Co.", "Equites", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
	1833	GAME( 1984, equitess, equites,  equites,  equites,  equites_state, equites,  ROT90, "Alpha Denshi Co. (Sega license)", "Equites (Sega)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
	1834	GAME( 1984, bullfgtr, 0,        equites,  bullfgtr, equites_state, bullfgtr, ROT90, "Alpha Denshi Co.", "Bull Fighter", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
	1835	GAME( 1984, bullfgtrs,bullfgtr, equites,  bullfgtr, equites_state, bullfgtr, ROT90, "Alpha Denshi Co. (Sega license)", "Bull Fighter (Sega)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
	1836	GAME( 1985, kouyakyu, 0,        equites,  kouyakyu, equites_state, kouyakyu, ROT0,  "Alpha Denshi Co.", "The Koukou Yakyuu", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
	1837	GAME( 1985, gekisou,  0,        gekisou,  gekisou,  equites_state, gekisou,  ROT90, "Eastern Corp.", "Gekisou (Japan)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
1813	1838
1814	1839	// Splendor Blast Hardware
1815		GAME( 1985, splndrbt,  0,        splndrbt, splndrbt, equites_state, splndrbt, ROT0,  "Alpha Denshi Co.", "Splendor Blast", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
1816		GAME( 1985, hvoltage,  0,        hvoltage, hvoltage, equites_state, splndrbt, ROT0,  "Alpha Denshi Co.", "High Voltage", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
	1840	GAME( 1985, splndrbt, 0,        splndrbt, splndrbt, equites_state, splndrbt, ROT0,  "Alpha Denshi Co.", "Splendor Blast", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
	1841	GAME( 1985, hvoltage, 0,        hvoltage, hvoltage, equites_state, splndrbt, ROT0,  "Alpha Denshi Co.", "High Voltage", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )

trunk/src/mame/drivers/imds2.c

r250155	r250156
96	96	// CPU oscillator of IPC board: 8 MHz
97	97	#define IPC_XTAL_Y2     XTAL_8MHz
98	98
	99	// Y1 oscillator of IPC board: 19.6608 MHz
	100	#define IPC_XTAL_Y1     XTAL_19_6608MHz
	101
99	102	// Main oscillator of IOC board: 22.032 MHz
100	103	#define IOC_XTAL_Y2     22032000
101	104
r250155	r250156
116	119	ADDRESS_MAP_UNMAP_LOW
117	120	AM_RANGE(0xc0 , 0xc0) AM_READWRITE(imds2_ipc_dbbout_r , imds2_ipc_dbbin_data_w)
118	121	AM_RANGE(0xc1 , 0xc1) AM_READWRITE(imds2_ipc_status_r , imds2_ipc_dbbin_cmd_w)
	122	AM_RANGE(0xf0 , 0xf3) AM_DEVREADWRITE("ipctimer" , pit8253_device , read , write)
	123	AM_RANGE(0xf4 , 0xf4) AM_DEVREADWRITE("ipcusart0" , i8251_device , data_r , data_w)
	124	AM_RANGE(0xf5 , 0xf5) AM_DEVREADWRITE("ipcusart0" , i8251_device , status_r , control_w)
	125	AM_RANGE(0xf6 , 0xf6) AM_DEVREADWRITE("ipcusart1" , i8251_device , data_r , data_w)
	126	AM_RANGE(0xf7 , 0xf7) AM_DEVREADWRITE("ipcusart1" , i8251_device , status_r , control_w)
119	127	AM_RANGE(0xf8 , 0xf9) AM_DEVREADWRITE("iocpio" , i8041_device , upi41_master_r , upi41_master_w)
120	128	AM_RANGE(0xfa , 0xfb) AM_READWRITE(imds2_ipclocpic_r , imds2_ipclocpic_w)
121	129	AM_RANGE(0xfc , 0xfd) AM_READWRITE(imds2_ipcsyspic_r , imds2_ipcsyspic_w)
r250155	r250156
165	173	m_ipccpu(*this , "ipccpu"),
166	174	m_ipcsyspic(*this , "ipcsyspic"),
167	175	m_ipclocpic(*this , "ipclocpic"),
	176	m_ipctimer(*this , "ipctimer"),
	177	m_ipcusart0(*this , "ipcusart0"),
	178	m_ipcusart1(*this , "ipcusart1"),
168	179	m_ioccpu(*this , "ioccpu"),
169	180	m_iocdma(*this , "iocdma"),
170	181	m_ioccrtc(*this , "ioccrtc"),
r250155	r250156
245	256	m_ipclocpic->write(space , offset == 0 , data);
246	257	}
247	258
	259	WRITE_LINE_MEMBER(imds2_state::imds2_baud_clk_0_w)
	260	{
	261	m_ipcusart0->write_txc(state);
	262	m_ipcusart0->write_rxc(state);
	263	}
	264
	265	WRITE_LINE_MEMBER(imds2_state::imds2_baud_clk_1_w)
	266	{
	267	m_ipcusart1->write_txc(state);
	268	m_ipcusart1->write_rxc(state);
	269	}
	270
248	271	WRITE8_MEMBER(imds2_state::imds2_miscout_w)
249	272	{
250	273	m_miscout = data;
r250155	r250156
752	775	MCFG_PIC8259_ADD("ipcsyspic" , WRITELINE(imds2_state , imds2_ipc_intr) , VCC , NULL)
753	776	MCFG_PIC8259_ADD("ipclocpic" , DEVWRITELINE("ipcsyspic" , pic8259_device , ir7_w) , VCC  , NULL)
754	777
755		MCFG_CPU_ADD("ioccpu" , I8080A , IOC_XTAL_Y2 / 9)     // 2.448 MHz
	778	MCFG_DEVICE_ADD("ipctimer" , PIT8253 , 0)
	779	MCFG_PIT8253_CLK0(IPC_XTAL_Y1 / 16)
	780	MCFG_PIT8253_CLK1(IPC_XTAL_Y1 / 16)
	781	MCFG_PIT8253_CLK2(IPC_XTAL_Y1 / 16)
	782	MCFG_PIT8253_OUT0_HANDLER(WRITELINE(imds2_state , imds2_baud_clk_0_w))
	783	MCFG_PIT8253_OUT1_HANDLER(WRITELINE(imds2_state , imds2_baud_clk_1_w))
	784	MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("ipclocpic" , pic8259_device , ir4_w))
	785
	786	MCFG_DEVICE_ADD("ipcusart0" , I8251 , 0)
	787	MCFG_I8251_RTS_HANDLER(DEVWRITELINE("ipcusart0" , i8251_device , write_cts))
	788	MCFG_I8251_RXRDY_HANDLER(DEVWRITELINE("ipclocpic" , pic8259_device , ir0_w))
	789	MCFG_I8251_TXRDY_HANDLER(DEVWRITELINE("ipclocpic" , pic8259_device , ir1_w))
	790
	791	MCFG_DEVICE_ADD("ipcusart1" , I8251 , 0)
	792	MCFG_I8251_RXRDY_HANDLER(DEVWRITELINE("ipclocpic" , pic8259_device , ir2_w))
	793	MCFG_I8251_TXRDY_HANDLER(DEVWRITELINE("ipclocpic" , pic8259_device , ir3_w))
	794
	795	MCFG_CPU_ADD("ioccpu" , I8080A , IOC_XTAL_Y2 / 18)     // 2.448 MHz but running at 50% (due to wait states & DMA usage of bus)
756	796	MCFG_CPU_PROGRAM_MAP(ioc_mem_map)
757	797	MCFG_CPU_IO_MAP(ioc_io_map)
758	798	MCFG_QUANTUM_TIME(attotime::from_hz(100))
r250155	r250156
812	852	MCFG_DEVICE_ADD("iocfdc" , I8271 , IOC_XTAL_Y1 / 2)
813	853	MCFG_I8271_DRQ_CALLBACK(DEVWRITELINE("iocdma" , i8257_device , dreq1_w))
814	854	MCFG_FLOPPY_DRIVE_ADD("iocfdc:0", imds2_floppies, "8sssd", floppy_image_device::default_floppy_formats)
815		MCFG_SLOT_FIXED(true)
	855	MCFG_SLOT_FIXED(true)
816	856
817	857	MCFG_CPU_ADD("iocpio" , I8041 , IOC_XTAL_Y3)
818	858	MCFG_CPU_IO_MAP(pio_io_map)

trunk/src/mame/drivers/microkit.c

r250155	r250156
6	6
7	7	http://www.vintagecomputer.net/browse_thread.cfm?id=511
8	8
9		Press CR or LF to get the * prompt.
10		Commands:
11		$Pxxxx - Jump to address xxxx
12		?Mxxxx yyyy - Dump memory starting at xxxx for yyyy bytes
13		!Mxxxx yy zz... - Write data (yy etc) to memory xxxx. Data gets entered when you
14		press the space after the data.
	9	*/
15	10
16		There's no sound or storage facilities, therefore no software.
17
18		ToDo:
19		- No technical manual or schematic available, so the entire driver is bodgy guesswork.
20		- Address 0 needs to be read/writeable, otherwise the numbers you enter will get
21		internally corrupted.
22		- Address 8000 is IDL which hangs the system, so program counter is preset to 8001.
23		- The keyboard is hooked up serially, which is ok, but the output to the terminal
24		is rubbish, so parallel is used so you can at least see something.
25		- When you enter commands, you can't see what you're doing.
26		- When you enter numbers, they display as rubbish or act as control codes. They
27		internally work though.
28		- The computer looks like a rack-mount metal box with a rudimentary front panel.
29		Buttons are: Reset; Load; Run program; Run Utility
30		There is a RUN LED.
31		None of these items are emulated.
32		It also has a power switch and lamp, and a fuse.
33
34		*****************************************************************************************/
35
36	11	#include "emu.h"
37	12	#include "cpu/cosmac/cosmac.h"
38		#include "bus/rs232/rs232.h"
39		#include "machine/terminal.h"
40	13
41
42	14	class microkit_state : public driver_device
43	15	{
44	16	public:
45	17	microkit_state(const machine_config &mconfig, device_type type, const char *tag)
46	18	: driver_device(mconfig, type, tag)
47		, m_maincpu(*this, "maincpu")
48		, m_rs232(*this, "rs232")
49		, m_terminal(*this, "terminal")
50	19	{ }
51
52		DECLARE_READ_LINE_MEMBER(clear_r);
53		DECLARE_WRITE8_MEMBER(ram_w);
54		DECLARE_READ8_MEMBER(ram_r);
55
56		private:
57		virtual void machine_reset();
58		UINT8 m_resetcnt;
59		UINT8 m_ram_data;
60		required_device<cosmac_device> m_maincpu;
61		required_device<rs232_port_device> m_rs232;
62		required_device<generic_terminal_device> m_terminal;
63	20	};
64	21
65	22	static ADDRESS_MAP_START( microkit_mem, AS_PROGRAM, 8, microkit_state )
66		AM_RANGE(0x0000, 0x0000) AM_READWRITE(ram_r,ram_w)
67		AM_RANGE(0x8000, 0x81ff) AM_ROM AM_REGION("maincpu", 0)
68		AM_RANGE(0x8200, 0x83ff) AM_RAM
	23	AM_RANGE(0x0000, 0x01ff) AM_ROM AM_REGION("maincpu", 0)
69	24	ADDRESS_MAP_END
70	25
71	26	static ADDRESS_MAP_START( microkit_io, AS_IO, 8, microkit_state )
72		AM_RANGE(0x07, 0x07) AM_WRITENOP // writes a lots of zeros here
73	27	ADDRESS_MAP_END
74	28
75	29	static INPUT_PORTS_START( microkit )
76	30	INPUT_PORTS_END
77	31
78		READ_LINE_MEMBER( microkit_state::clear_r )
79		{
80		if (m_resetcnt < 0x10)
81		m_maincpu->set_state_int(COSMAC_R0, 0x8001); // skip IDL
82		if (m_resetcnt < 0x20)
83		m_resetcnt++;
84		// set reset pin to normal
85		return 1;
86		}
87
88		READ8_MEMBER( microkit_state::ram_r )
89		{
90		return m_ram_data;
91		}
92
93		WRITE8_MEMBER( microkit_state::ram_w )
94		{
95		m_ram_data = data;
96		if (data > 0 && data < 0x80)
97		m_terminal->write(space, 0, data);
98		}
99
100		void microkit_state::machine_reset()
101		{
102		m_resetcnt = 0;
103		m_ram_data = 0;
104		}
105
106		static DEVICE_INPUT_DEFAULTS_START( serial_keyb )
107		DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_300 )
108		DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_300 )
109		DEVICE_INPUT_DEFAULTS( "RS232_STARTBITS", 0xff, RS232_STARTBITS_1 )
110		DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_8 )
111		DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_NONE )
112		DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_2 )
113		DEVICE_INPUT_DEFAULTS_END
114
115
116	32	static MACHINE_CONFIG_START( microkit, microkit_state )
117	33	// basic machine hardware
118		MCFG_CPU_ADD("maincpu", CDP1802, 1750000)
	34	MCFG_CPU_ADD("maincpu", CDP1801, 2000000)
119	35	MCFG_CPU_PROGRAM_MAP(microkit_mem)
120	36	MCFG_CPU_IO_MAP(microkit_io)
121	37	MCFG_COSMAC_WAIT_CALLBACK(VCC)
122		MCFG_COSMAC_CLEAR_CALLBACK(READLINE(microkit_state, clear_r))
123
124		/* video hardware */
125		MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "keyboard")
126		MCFG_RS232_RXD_HANDLER(DEVWRITELINE("maincpu", cosmac_device, ef4_w))
127		MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("keyboard", serial_keyb)
128		MCFG_DEVICE_ADD("terminal", GENERIC_TERMINAL, 0)
129	38	MACHINE_CONFIG_END
130	39
131	40	ROM_START( microkit )

trunk/src/mame/includes/equites.h

r250155	r250156
20	20	m_bg_videoram(*this, "bg_videoram"),
21	21	m_spriteram(*this, "spriteram"),
22	22	m_spriteram_2(*this, "spriteram_2"),
	23	m_workram(*this, "workram"),
23	24	m_mcuram(*this, "mcuram"),
24	25	m_maincpu(*this, "maincpu"),
25	26	m_audiocpu(*this, "audiocpu"),
r250155	r250156
39	40	UINT8 *m_fg_videoram;    // 8bits
40	41	required_shared_ptr<UINT16> m_spriteram;
41	42	optional_shared_ptr<UINT16> m_spriteram_2;
	43	optional_shared_ptr<UINT16> m_workram;
42	44	optional_shared_ptr<UINT8> m_mcuram;
43	45
44	46	/* video-related */
r250155	r250156
63	65	float     m_cymvol;
64	66	float     m_hihatvol;
65	67	int       m_timer_count;
66		int       m_gekisou_unknown_bit;
	68	int       m_unknown_bit;    // Gekisou special handling
67	69
68	70	/* devices */
69	71	required_device<cpu_device> m_maincpu;
r250155	r250156
83	85	DECLARE_WRITE8_MEMBER(equites_dac_latch_w);
84	86	DECLARE_WRITE8_MEMBER(equites_8155_portb_w);
85	87	DECLARE_WRITE8_MEMBER(equites_8155_w);
86		DECLARE_WRITE16_MEMBER(gekisou_unknown_bit_w);
	88	DECLARE_WRITE16_MEMBER(gekisou_unknown_0_w);
	89	DECLARE_WRITE16_MEMBER(gekisou_unknown_1_w);
87	90	DECLARE_READ16_MEMBER(equites_spriteram_kludge_r);
88	91	DECLARE_READ8_MEMBER(mcu_ram_r);
89	92	DECLARE_WRITE8_MEMBER(mcu_ram_w);
r250155	r250156
99	102	DECLARE_WRITE8_MEMBER(equites_flipb_w);
100	103	DECLARE_WRITE16_MEMBER(splndrbt_bg_scrollx_w);
101	104	DECLARE_WRITE16_MEMBER(splndrbt_bg_scrolly_w);
102		DECLARE_CUSTOM_INPUT_MEMBER(gekisou_unknown_bit_r);
	105	DECLARE_CUSTOM_INPUT_MEMBER(gekisou_unknown_status);
103	106	DECLARE_WRITE8_MEMBER(equites_8910porta_w);
104	107	DECLARE_WRITE8_MEMBER(equites_8910portb_w);
	108	DECLARE_DRIVER_INIT(bullfgtr);
	109	DECLARE_DRIVER_INIT(kouyakyu);
	110	DECLARE_DRIVER_INIT(gekisou);
105	111	DECLARE_DRIVER_INIT(splndrbt);
106	112	DECLARE_DRIVER_INIT(equites);
107	113	TILE_GET_INFO_MEMBER(equites_fg_info);
108	114	TILE_GET_INFO_MEMBER(splndrbt_fg_info);
109	115	TILE_GET_INFO_MEMBER(equites_bg_info);
110	116	TILE_GET_INFO_MEMBER(splndrbt_bg_info);
	117	DECLARE_MACHINE_START(equites);
	118	DECLARE_MACHINE_RESET(equites);
111	119	DECLARE_VIDEO_START(equites);
112	120	DECLARE_PALETTE_INIT(equites);
113	121	DECLARE_VIDEO_START(splndrbt);
r250155	r250156
119	127	TIMER_DEVICE_CALLBACK_MEMBER(equites_scanline);
120	128	TIMER_DEVICE_CALLBACK_MEMBER(splndrbt_scanline);
121	129	DECLARE_WRITE_LINE_MEMBER(equites_msm5232_gate);
122		void equites_draw_sprites_block(bitmap_ind16 &bitmap, const rectangle &cliprect, int start, int end);
	130	void equites_draw_sprites_block( bitmap_ind16 &bitmap, const rectangle &cliprect, int start, int end );
123	131	void equites_draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
124		void splndrbt_draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
125		void splndrbt_copy_bg(bitmap_ind16 &dst_bitmap, const rectangle &cliprect);
126		void equites_update_dac();
127		void unpack_block(const char *region, int offset, int size);
128		void unpack_region(const char *region);
129
130		virtual void machine_start();
131		virtual void machine_reset();
	132	void splndrbt_draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect );
	133	void splndrbt_copy_bg( bitmap_ind16 &dst_bitmap, const rectangle &cliprect );
	134	void equites_update_dac(  );
	135	void unpack_block( const char *region, int offset, int size );
	136	void unpack_region( const char *region );
132	137	};

trunk/src/mame/includes/imds2.h

r250155	r250156
16	16	#include "machine/i8271.h"
17	17	#include "imagedev/flopdrv.h"
18	18	#include "bus/centronics/ctronics.h"
	19	#include "machine/i8251.h"
19	20
20	21	class imds2_state : public driver_device
21	22	{
r250155	r250156
30	31	DECLARE_READ8_MEMBER(imds2_ipclocpic_r);
31	32	DECLARE_WRITE8_MEMBER(imds2_ipcsyspic_w);
32	33	DECLARE_WRITE8_MEMBER(imds2_ipclocpic_w);
	34	DECLARE_WRITE_LINE_MEMBER(imds2_baud_clk_0_w);
	35	DECLARE_WRITE_LINE_MEMBER(imds2_baud_clk_1_w);
33	36
34	37	DECLARE_WRITE8_MEMBER(imds2_miscout_w);
35	38	DECLARE_READ8_MEMBER(imds2_miscin_r);
r250155	r250156
73	76	required_device<i8085a_cpu_device> m_ipccpu;
74	77	required_device<pic8259_device> m_ipcsyspic;
75	78	required_device<pic8259_device> m_ipclocpic;
	79	required_device<pit8253_device> m_ipctimer;
	80	required_device<i8251_device> m_ipcusart0;
	81	required_device<i8251_device> m_ipcusart1;
76	82	required_device<i8080a_cpu_device> m_ioccpu;
77	83	required_device<i8257_device> m_iocdma;
78	84	required_device<i8275_device> m_ioccrtc;

trunk/src/mame/video/equites.c

r250155	r250156
230	230	*
231	231	*************************************/
232	232
233		void equites_state::equites_draw_sprites_block(bitmap_ind16 &bitmap, const rectangle &cliprect, int start, int end)
	233	void equites_state::equites_draw_sprites_block( bitmap_ind16 &bitmap, const rectangle &cliprect, int start, int end )
234	234	{
235	235	for (int offs = end - 2; offs >= start; offs -= 2)
236	236	{
r250155	r250156
301	301	03020303 03030303 03030303 03030303
302	302	*/
303	303
304		void equites_state::splndrbt_draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect)
	304	void equites_state::splndrbt_draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect )
305	305	{
306	306	const UINT8 * const xrom = memregion("user2")->base();
307	307	const UINT8 * const yrom = xrom + 0x100;
r250155	r250156
360	360	if (bx >= cliprect.min_x && bx <= cliprect.max_x)
361	361	{
362	362	int xx = scalex ? (x * 29 + scalex) / (scalex << 1) + 1 : 16;   // FIXME This is wrong. Should use the PROM.
363		int const offset = (fx ? (31 - xx) : xx) + ((fy ^ yhalf) ? (16 + line) : (15 - line)) * gfx->rowbytes();
	363	int const offset = (fx ? (31 - xx) : xx) + ((fy ^ yhalf) ? (16 + line) : (15 - line) ) * gfx->rowbytes();
364	364
365	365	int pen = srcgfx[offset];
366	366
r250155	r250156
375	375	}
376	376
377	377
378		void equites_state::splndrbt_copy_bg(bitmap_ind16 &dst_bitmap, const rectangle &cliprect)
	378	void equites_state::splndrbt_copy_bg( bitmap_ind16 &dst_bitmap, const rectangle &cliprect )
379	379	{
380	380	bitmap_ind16 &src_bitmap = m_bg_tilemap->pixmap();
381	381	bitmap_ind8 &flags_bitmap = m_bg_tilemap->flagsmap();

https://github.com/mamedev/mame/commit/5a215e8a8a03865e6e24cef30d1b21b475ea7458

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