MAME SVN History

199869 Revisions

r39878 Tuesday 14th July, 2015 at 19:50:06 UTC by Thomas Klausner
Implement missing osd_truncate(). Fixes linking on Unix when SDL is disabled. Signed-off-by: Thomas Klausner <wiz@NetBSD.org>

[/trunk]	.travis.yml makefile
[3rdparty/mongoose]	mongoose.c
[docs]	newvideo.txt
[hash]	msx1_cart.xml pet_rom.xml
[nl_examples]	congo_bongo.c
[scripts/src]	bus.lua machine.lua netlist.lua
[scripts/target/mame]	mess.lua
[src/emu/bus/msx_cart]	cartridge.c konami.c ~~moonsound.c~~ ~~moonsound.h~~
[src/emu/bus/ti99_peb]	hfdc.c
[src/emu/cpu/mips]	mips3drc.c
[src/emu/cpu/sm510]	sm510.c sm510op.c
[src/emu/cpu/ucom4]	ucom4.c ucom4.h ucom4op.c
[src/emu/machine]	~~68230pit.c~~ ~~68230pit.h~~ hdc9234.c netlist.c smpc.c stvcd.c ti99_hd.c ti99_hd.h tms6100.c tms6100.h
[src/emu/netlist]	nl_dice_compat.h nl_factory.c nl_factory.h nl_parser.c nl_setup.c nl_setup.h
[src/emu/netlist/analog]	nld_bjt.c nld_bjt.h nld_opamps.c nld_opamps.h nld_switches.h nld_twoterm.c nld_twoterm.h
[src/emu/netlist/devices]	net_lib.c net_lib.h nld_4020.h nld_7400.h nld_7402.h nld_7404.h nld_7408.h nld_7410.h nld_74107.h nld_7411.h nld_74123.h nld_74153.h nld_74175.h nld_74192.h nld_74193.h nld_7420.h nld_7425.h nld_7427.h nld_74279.h nld_7430.h nld_7432.h nld_7437.h nld_7448.h nld_7450.h nld_7474.h nld_7483.h nld_7486.h nld_7490.h nld_7493.h nld_74ls629.h nld_82S16.h nld_9310.h nld_9312.h nld_9316.h nld_legacy.h nld_log.h nld_mm5837.h nld_ne555.h nld_r2r_dac.h nld_system.h
[src/emu/netlist/macro]	nlm_cd4xxx.h ~~nlm_opamp.c~~ ~~nlm_opamp.h~~ nlm_ttl74xx.h
[src/emu/netlist/plib]	plists.h pstate.c
[src/emu/netlist/solver]	nld_solver.h
[src/emu/sound]	c140.c c140.h scsp.c tms36xx.c ymf278b.c ymf278b.h
[src/emu/video]	mb_vcu.c v9938.c v9938.h voodoo.c
[src/mame]	arcade.lst mess.lst
[src/mame/audio]	nl_kidniki.c poolshrk.c scramble.c
[src/mame/drivers]	1942.c bmcpokr.c chihiro.c cps1.c csplayh5.c ddenlovr.c dec0.c destroyr.c dynax.c fcrash.c fuukifg3.c kurukuru.c mazerbla.c mcr3.c megatech.c meritm.c namcona1.c naomi.c naughtyb.c nl_breakout.c nl_pong.c paranoia.c poolshrk.c sangho.c sbowling.c scramble.c segas24.c seta2.c snk.c spbactn.c ssingles.c system1.c system16.c taito_x.c taitoair.c thedealr.c timeplt.c tmnt.c tnzs.c tonton.c ttchamp.c wecleman.c xyonix.c
[src/mame/includes]	1942.h dynax.h namcona1.h naughtyb.h poolshrk.h scramble.h spbactn.h system1.h system16.h
[src/mame/machine]	scramble.c
[src/mame/video]	cps1.c namcona1.c naughtyb.c poolshrk.c
[src/mess/drivers]	advision.c ~~force68k.c~~ hh_hmcs40.c hh_tms1k.c hh_ucom4.c monty.c msx.c ~~sdk80.c~~ smc777.c tb303.c vk100.c
[src/mess/includes]	~~hh_ucom4.h~~
[src/mess/layout]	tb303.lay
[src/mess/machine]	msx.c
[src/osd/modules/render]	drawogl.c
[src/osd/osdmini]	minifile.c
[src/osd/sdl]	sdlfile.c
[src/tools]	nltool.c

trunk/.travis.yml
r248389	r248390
16	16	- sudo add-apt-repository ppa:shahar-evron/qt-backports -y
17	17	- sudo apt-get update -qq
18	18	- sudo apt-get install -y libsdl2-dev libsdl2-ttf-dev libasound2-dev libqt4-dev libqt4-dev-bin
19		notifications:
20		email:
21		- secure: "sK8JJcn1A0yLnbDJ/7vmJgESuXmP6D4QlvQvsYLp1xAx5eTVSJ5Z+GSXLBJ9CnoeJ5AlPVPX4rXdRV93UyxYlTh1O97x8VZZQtYBNPRjk/VCflsOOg7C+jcJKX/knMu/QG2MVEDE5G2b8mHSAgWljG/7Z2N0rYZlWppwklYafOkyW4uE0E7PU5XpmKim4ra6Y1eDSbap+XJiDwgUm9moDZrgAv7eom9NIWGNMRIozSRyR2IkYimlWE92FOy5PzLJtFGK02iumbYN+39mTux59v/h/m6HD6cD7Wf10Lco9+Fnmi9Bs+VvIReJIP9pDABRvJ3MkUV4I9BjUT9xk48lzxqjGtdfUwOMDOTABd4Pb/5cmNtyNUQIosy5oiplR6USBnqD7/gmJw+mfn3A+jdQHGne+akypwzUjSM6XrezjTiZLlDDG+QpA0kwAnxSXw8H2SpVyynMSn4nu0iZmOiOZMtFY0jKlt/W7OFC5wTuJFrky+bBGlVIv3KGOTJNJNgasXV4u0NXOjHyeBFpFYCIf0FZLfYyf7ITu94JxUzXGcVi5D0lBwvKY9HfJ4yJxciyfH6V7yU1+o23E/Meqe/tjt6dTW8DM5xIokrnusfzE5b0zw5GFyg54nbpazXpcPnrMdxhp+t2C7xKrxcZXhBECRYegj+Z86D9BJP/yum1YrQ="

trunk/3rdparty/mongoose/mongoose.c
r248389	r248390
5479	5479	(void) ev;
5480	5480
5481	5481	//DBG(("%p [%s]", conn, msg));
5482		if (sscanf(msg, "%p %n", ~~(void **)~~ &func, &n) && func != NULL && conn != NULL) {
	5482	if (sscanf(msg, "%p %n", &func, &n) && func != NULL && conn != NULL) {
5483	5483	conn->mg_conn.callback_param = (void *) (msg + n);
5484	5484	func(&conn->mg_conn, MG_POLL);
5485	5485	}

trunk/docs/newvideo.txt
r248389	r248390
105	105	So, I recommend starting with these initial options and then tweaking
106	106	from there. One additional option you might want to try in
107	107	combination with the above is the -prescale option. -prescale takes
108		an integer parameter from 1 to 3, and specifies a magnification
	108	an integer parameter from 1 to 8, and specifies a magnification
109	109	amount by which the screen pixels are expanded before they are drawn
110	110	to the screen. Why is this useful? And how much of a performance
111	111	impact does it have? Well, that depends on the mode you are running
r248389	r248390
117	117	small performance hit, but not too significant. The benefit is that
118	118	each prescale factor reduces the blurriness of the pixels.
119	119	-prescale 1 is the default, which does no scaling. -prescale 2 will
120		double each pixel, ~~and~~ -prescale 3 will triple each pixel. For my
	120	double each pixel, -prescale 3 will triple each pixel, etc. For my
121	121	money, -prescale 2 is sufficient, but people with super high
122	122	resolution displays claim that larger -prescale factors work even
123	123	better.

trunk/hash/msx1_cart.xml
r248389	r248390
1379	1379	<info name="serial" value="R48X5513" />
1380	1380	<info name="alt_title" value="アルカザール" />
1381	1381	<part name="cart" interface="msx_cart">
1382		<dataarea name="rom" size="65536">
	1382	<dataarea name="rom" size="16384">
1383	1383	<rom name="alcazar - the forgotten fortress (japan).rom" size="16384" crc="3ee454b0" sha1="807676038cbba043b8099eba9c5840a4811a7e59" offset="0" />
1384		<rom size="16384" offset="0x4000" loadflag="reload" />
1385		<rom size="16384" offset="0x8000" loadflag="reload" />
1386		<rom size="16384" offset="0xc000" loadflag="reload" />
1387	1384	</dataarea>
1388	1385	</part>
1389	1386	</software>
r248389	r248390
2214	2211	<info name="serial" value="R48X5502" />
2215	2212	<info name="alt_title" value="ビームライダー" />
2216	2213	<part name="cart" interface="msx_cart">
2217		<dataarea name="rom" size="65536">
	2214	<dataarea name="rom" size="32768">
	2215	<rom name="beam rider (japan).rom" size="32768" crc="1553e408" sha1="1231984ae24bf35f9f38596b864420d8ccd3f30b" offset="0" />
	2216	</dataarea>
	2217	</part>
	2218	</software>
	2219
	2220	<software name="beamridra" cloneof="beamridr">
	2221	<description>Beam Rider (Jpn, Alt)</description>
	2222	<year>1984</year>
	2223	<publisher>Pony Canyon</publisher>
	2224	<info name="serial" value="R48X5502" />
	2225	<info name="alt_title" value="ビームライダー" />
	2226	<part name="cart" interface="msx_cart">
	2227	<dataarea name="rom" size="16384">
2218	2228	<rom name="beam rider (japan) (alt 1).rom" size="16384" crc="d6a6bee6" sha1="f51f936887498d21f6ee9fe8a7701633be67e79d" offset="0" />
2219		<rom size="16384" offset="0x4000" loadflag="reload" />
2220		<rom size="16384" offset="0x8000" loadflag="reload" />
2221		<rom size="16384" offset="0xc000" loadflag="reload" />
2222	2229	</dataarea>
2223	2230	</part>
2224	2231	</software>
r248389	r248390
4148	4155	<publisher>Pony Canyon</publisher>
4149	4156	<info name="serial" value="R48X5506" />
4150	4157	<part name="cart" interface="msx_cart">
4151		<dataarea name="rom" size="65536">
4152		<rom name="decathlon (japan).rom" size="16384" crc="f99b1c22" sha1="5d43cb6ca89f31d5f543e4dcd3fa9987b9769602" offset="0" />
4153		<rom size="16384" offset="0x4000" loadflag="reload" />
4154		<rom size="16384" offset="0x8000" loadflag="reload" />
4155		<rom size="16384" offset="0xc000" loadflag="reload" />
	4158	<dataarea name="rom" size="32768">
	4159	<rom name="decathlon (japan).rom" size="32768" crc="cd016b93" sha1="a1656f612360a126e09ef2baaa8002d92054125d" offset="0" />
4156	4160	</dataarea>
4157	4161	</part>
4158	4162	</software>
4159	4163
	4164	<software name="decathlna" cloneof="decathln">
	4165	<description>Decathlon (Jpn, Alt)</description>
	4166	<year>1984</year>
	4167	<publisher>Pony Canyon</publisher>
	4168	<info name="serial" value="R48X5506" />
	4169	<part name="cart" interface="msx_cart">
	4170	<dataarea name="rom" size="16384">
	4171	<rom name="decathlon (japan) (alt 1).rom" size="16384" crc="f99b1c22" sha1="5d43cb6ca89f31d5f543e4dcd3fa9987b9769602" offset="0" />
	4172	</dataarea>
	4173	</part>
	4174	</software>
	4175
4160	4176	<software name="deepdng" supported="partial">
4161	4177	<description>Deep Dungeon (Jpn)</description>
4162	4178	<year>1988</year>
r248389	r248390
5967	5983	<info name="serial" value="R48X5505" />
5968	5984	<info name="alt_title" value="ヒーロー" />
5969	5985	<part name="cart" interface="msx_cart">
5970		<dataarea name="rom" size="65536">
5971		<rom name="h.e.r.o. (japan).rom" size="16384" crc="97ab0d70" sha1="6fbb385147a939a7e6b47f5945d8e3b671a8c065" offset="0" />
5972		<rom size="16384" offset="0x4000" loadflag="reload" />
5973		<rom size="16384" offset="0x8000" loadflag="reload" />
5974		<rom size="16384" offset="0xc000" loadflag="reload" />
	5986	<dataarea name="rom" size="32768">
	5987	<rom name="h.e.r.o. (japan).rom" size="32768" crc="8fdad3af" sha1="ebb70722f75279911cce79e6bd78b8f514561b0f" offset="0" />
5975	5988	</dataarea>
5976	5989	</part>
5977	5990	</software>
r248389	r248390
7003	7016	<info name="serial" value="R48X5503" />
7004	7017	<info name="alt_title" value="キーストンケーパーズ" />
7005	7018	<part name="cart" interface="msx_cart">
7006		<dataarea name="rom" size="65536">
7007		<rom name="keystone kapers (japan).rom" size="16384" crc="b1cf2097" sha1="3d5160331beb1c5cc54ba6ecef6b3ce2ff4660b6" offset="0" />
7008		<rom size="16384" offset="0x4000" loadflag="reload" />
7009		<rom size="16384" offset="0x8000" loadflag="reload" />
7010		<rom size="16384" offset="0xc000" loadflag="reload" />
	7019	<dataarea name="rom" size="32768">
	7020	<rom name="keystone kapers (japan).rom" size="32768" crc="7ff117f9" sha1="fb4724b8159beae132f89f394f71ce3934a61ae2" offset="0" />
7011	7021	</dataarea>
7012	7022	</part>
7013	7023	</software>
7014	7024
	7025	<software name="keykapera" cloneof="keykaper">
	7026	<description>Keystone Kapers (Jpn, Alt)</description>
	7027	<year>1984</year>
	7028	<publisher>Pony Canyon</publisher>
	7029	<info name="serial" value="R48X5503" />
	7030	<info name="alt_title" value="キーストンケーパーズ" />
	7031	<part name="cart" interface="msx_cart">
	7032	<dataarea name="rom" size="16384">
	7033	<rom name="keystone kapers (japan) (alt 1).rom" size="16384" crc="b1cf2097" sha1="3d5160331beb1c5cc54ba6ecef6b3ce2ff4660b6" offset="0" />
	7034	</dataarea>
	7035	</part>
	7036	</software>
	7037
7015	7038	<software name="kickit">
7016	7039	<description>Kick It (Jpn)</description>
7017	7040	<year>1986</year>
r248389	r248390
9636	9659	<publisher>Pony Canyon</publisher>
9637	9660	<info name="alt_title" value="パストファインダー" />
9638	9661	<part name="cart" interface="msx_cart">
9639		<dataarea name="rom" size="65536">
	9662	<dataarea name="rom" size="16384">
9640	9663	<rom name="pastfinder (japan).rom" size="16384" crc="d6d8d1d7" sha1="8117ec66c0645a54422841a632cfd6602f35c4f9" offset="0" />
9641		<rom size="16384" offset="0x4000" loadflag="reload" />
9642		<rom size="16384" offset="0x8000" loadflag="reload" />
9643		<rom size="16384" offset="0xc000" loadflag="reload" />
9644	9664	</dataarea>
9645	9665	</part>
9646	9666	</software>
r248389	r248390
9961	9981	<info name="serial" value="R48X5508" />
9962	9982	<info name="alt_title" value="ピットフォールII" />
9963	9983	<part name="cart" interface="msx_cart">
9964		<dataarea name="rom" size="65536">
	9984	<dataarea name="rom" size="16384">
9965	9985	<rom name="pitfall ii - lost caverns (japan).rom" size="16384" crc="d307a7b8" sha1="78079266711e60420480e4d95a39f0d7d974ad32" offset="0" />
9966		<rom size="16384" offset="0x4000" loadflag="reload" />
9967		<rom size="16384" offset="0x8000" loadflag="reload" />
9968		<rom size="16384" offset="0xc000" loadflag="reload" />
9969	9986	</dataarea>
9970	9987	</part>
9971	9988	</software>
r248389	r248390
9977	9994	<info name="serial" value="R48X5508" />
9978	9995	<info name="alt_title" value="ピットフォールII" />
9979	9996	<part name="cart" interface="msx_cart">
9980		<dataarea name="rom" size="65536">
	9997	<dataarea name="rom" size="16384">
9981	9998	<rom name="pitfall ii - lost caverns (japan) (alt 1).rom" size="16384" crc="71c59868" sha1="ae8c7355c829248305384243f78a870453367e77" offset="0" />
9982		<rom size="16384" offset="0x4000" loadflag="reload" />
9983		<rom size="16384" offset="0x8000" loadflag="reload" />
9984		<rom size="16384" offset="0xc000" loadflag="reload" />
9985	9999	</dataarea>
9986	10000	</part>
9987	10001	</software>
r248389	r248390
9993	10007	<info name="serial" value="R48X5501" />
9994	10008	<info name="alt_title" value="ピットフォール" />
9995	10009	<part name="cart" interface="msx_cart">
9996		<dataarea name="rom" size="65536">
	10010	<dataarea name="rom" size="16384">
9997	10011	<rom name="pitfall! (japan).rom" size="16384" crc="5a009c55" sha1="b88e9c548873dcfd190e0e38f7b279344eea41ec" offset="0" />
9998		<rom size="16384" offset="0x4000" loadflag="reload" />
9999		<rom size="16384" offset="0x8000" loadflag="reload" />
10000		<rom size="16384" offset="0xc000" loadflag="reload" />
10001	10012	</dataarea>
10002	10013	</part>
10003	10014	</software>
r248389	r248390
10009	10020	<info name="serial" value="R48X5501" />
10010	10021	<info name="alt_title" value="ピットフォール" />
10011	10022	<part name="cart" interface="msx_cart">
10012		<dataarea name="rom" size="65536">
	10023	<dataarea name="rom" size="16384">
10013	10024	<rom name="pitfall! (japan) (alt 1).rom" size="16384" crc="930aeb2c" sha1="5fb4b6c3735e4d9415565a856bb69f9fb4857161" offset="0" />
10014		<rom size="16384" offset="0x4000" loadflag="reload" />
10015		<rom size="16384" offset="0x8000" loadflag="reload" />
10016		<rom size="16384" offset="0xc000" loadflag="reload" />
10017	10025	</dataarea>
10018	10026	</part>
10019	10027	</software>
r248389	r248390
10025	10033	<info name="serial" value="R48X5501" />
10026	10034	<info name="alt_title" value="ピットフォール" />
10027	10035	<part name="cart" interface="msx_cart">
10028		<dataarea name="rom" size="65536">
	10036	<dataarea name="rom" size="16384">
10029	10037	<rom name="pitfall! (japan) (alt 2).rom" size="16384" crc="2cb24473" sha1="2fa9c0f016efc2d1752a272c632393f5063ea06c" offset="0" />
10030		<rom size="16384" offset="0x4000" loadflag="reload" />
10031		<rom size="16384" offset="0x8000" loadflag="reload" />
10032		<rom size="16384" offset="0xc000" loadflag="reload" />
10033	10038	</dataarea>
10034	10039	</part>
10035	10040	</software>
r248389	r248390
10503	10508	<info name="serial" value="R48X5504" />
10504	10509	<info name="alt_title" value="リバーレイド" />
10505	10510	<part name="cart" interface="msx_cart">
10506		<dataarea name="rom" size="65536">
10507		<rom name="river raid (japan).rom" size="16384" crc="2fc1d75b" sha1="33be9017faf173eae04d0c91ca8d42d1c20596c0" offset="0" />
10508		<rom size="16384" offset="0x4000" loadflag="reload" />
10509		<rom size="16384" offset="0x8000" loadflag="reload" />
10510		<rom size="16384" offset="0xc000" loadflag="reload" />
	10511	<dataarea name="rom" size="32768">
	10512	<rom name="river raid (japan).rom" size="32768" crc="0f22a553" sha1="a1e14912d45944b9a6baef1d4d3a04c1ae8df923" offset="0" />
10511	10513	</dataarea>
10512	10514	</part>
10513	10515	</software>
10514	10516
	10517	<software name="riveraida" cloneof="riveraid">
	10518	<description>River Raid (Jpn, Alt)</description>
	10519	<year>1985</year>
	10520	<publisher>Pony Canyon</publisher>
	10521	<info name="serial" value="R48X5504" />
	10522	<info name="alt_title" value="リバーレイド" />
	10523	<part name="cart" interface="msx_cart">
	10524	<dataarea name="rom" size="16384">
	10525	<rom name="river raid (japan) (alt 1).rom" size="16384" crc="2fc1d75b" sha1="33be9017faf173eae04d0c91ca8d42d1c20596c0" offset="0" />
	10526	</dataarea>
	10527	</part>
	10528	</software>
	10529
10515	10530	<software name="roadfght">
10516	10531	<description>Road Fighter (Jpn)</description>
10517	10532	<year>1985</year>
r248389	r248390
10593	10608	<info name="serial" value="R48X5511" />
10594	10609	<info name="alt_title" value="ロックンボルト" />
10595	10610	<part name="cart" interface="msx_cart">
10596		<dataarea name="rom" size="65536">
	10611	<dataarea name="rom" size="16384">
10597	10612	<rom name="rock'n bolt (japan).rom" size="16384" crc="430e5789" sha1="1edabc3226648b54ae98d524b31f37ca47c8c88b" offset="0" />
10598		<rom size="16384" offset="0x4000" loadflag="reload" />
10599		<rom size="16384" offset="0x8000" loadflag="reload" />
10600		<rom size="16384" offset="0xc000" loadflag="reload" />
10601	10613	</dataarea>
10602	10614	</part>
10603	10615	</software>
r248389	r248390
13159	13171	<publisher>Pony Canyon</publisher>
13160	13172	<info name="alt_title" value="ゼンジー" />
13161	13173	<part name="cart" interface="msx_cart">
13162		<dataarea name="rom" size="65536">
13163		<rom name="zenji (japan).rom" size="16384" crc="77b3b0b9" sha1="c9440172802818cc5b9ae559fbd3f346a263605c" offset="0" />
13164		<rom size="16384" offset="0x4000" loadflag="reload" />
13165		<rom size="16384" offset="0x8000" loadflag="reload" />
13166		<rom size="16384" offset="0xc000" loadflag="reload" />
	13174	<dataarea name="rom" size="32768">
	13175	<rom name="zenji (japan).rom" size="32768" crc="1a4aebb2" sha1="2f4404d141acc40e48af0b12c70cd44b066ece10" offset="0" />
13167	13176	</dataarea>
13168	13177	</part>
13169	13178	</software>
13170	13179
	13180	<software name="zenjia" cloneof="zenji">
	13181	<description>Zenji (Jpn, Alt)</description>
	13182	<year>1984</year>
	13183	<publisher>Pony Canyon</publisher>
	13184	<info name="alt_title" value="ゼンジー" />
	13185	<part name="cart" interface="msx_cart">
	13186	<dataarea name="rom" size="16384">
	13187	<rom name="zenji (japan) (alt 1).rom" size="16384" crc="77b3b0b9" sha1="c9440172802818cc5b9ae559fbd3f346a263605c" offset="0" />
	13188	</dataarea>
	13189	</part>
	13190	</software>
	13191
13171	13192	<software name="zexasltd">
13172	13193	<description>Zexas Limited (Jpn)</description>
13173	13194	<year>1985</year>
r248389	r248390
13268	13289	<year>1984</year>
13269	13290	<publisher>Activision?</publisher>
13270	13291	<part name="cart" interface="msx_cart">
13271		<dataarea name="rom" size="65536">
	13292	<dataarea name="rom" size="16384">
13272	13293	<rom name="designer's pencil, the (europe) (program).rom" size="16384" crc="ce588c20" sha1="4b4a58a310a1138b95192d7fe0881bbdc45601d4" offset="0" />
13273		<rom size="16384" offset="0x4000" loadflag="reload" />
13274		<rom size="16384" offset="0x8000" loadflag="reload" />
13275		<rom size="16384" offset="0xc000" loadflag="reload" />
13276	13294	</dataarea>
13277	13295	</part>
13278	13296	</software>

trunk/hash/pet_rom.xml
r248389	r248390
290	290	<publisher>Palo Alto ICs Inc.</publisher>
291	291
292	292	<part name="rom" interface="pet_b000_rom">
293		<!--
294		TODO: The screen fills with garbage when run like this:
295		$ mame64 pet2001n32 toolkit2
296		and started with:
297		SYS 45056
298		We need to check this and should add notes with the emulator
299		options required to run the various versions of Toolkit.
300		-->
301	293	<dataarea name="rom" size="0x800">
302	294	<rom name="toolkit2-b000.bin" size="0x800" crc="bf8d29f3" sha1="324508c0cec374c80387b4286ed1b0fee9159486" offset="0" />
303	295	</dataarea>

trunk/makefile
r248389	r248390
240	240	endif
241	241
242	242	ifeq ($(findstring arm,$(UNAME)),arm)
243		ARCHITECTURE :=
244	243	ifndef NOASM
245	244	NOASM := 1
246	245	endif
r248389	r248390
904	903	linux_x64: generate $(PROJECTDIR)/gmake-linux/Makefile
905	904	$(SILENT) $(MAKE) $(MAKEPARAMS) -C $(PROJECTDIR)/gmake-linux config=$(CONFIG)64
906	905
	906	.PHONY: linux
	907	linux: linux_x86
	908
907	909	.PHONY: linux_x86
908	910	linux_x86: generate $(PROJECTDIR)/gmake-linux/Makefile
909	911	$(SILENT) $(MAKE) $(MAKEPARAMS) -C $(PROJECTDIR)/gmake-linux config=$(CONFIG)32
910	912
911		.PHONY: linux
912		linux: generate $(PROJECTDIR)/gmake-linux/Makefile
913		$(SILENT) $(MAKE) $(MAKEPARAMS) -C $(PROJECTDIR)/gmake-linux config=$(CONFIG)
914
915	913	#-------------------------------------------------
916	914	# gmake-linux-clang
917	915	#-------------------------------------------------

trunk/nl_examples/congo_bongo.c
r248389	r248390
9	9
10	10	#ifndef __PLIB_PREPROCESSOR__
11	11
	12	#define MB3614_DIP(_name) \
	13	NET_REGISTER_DEV_X(MB3614_DIP, _name)
	14
12	15	#define LM358_DIP(_name) \
13	16	NET_REGISTER_DEV_X(LM358_DIP, _name)
14	17
r248389	r248390
75	78
76	79	INCLUDE(CongoBongo_schematics)
77	80
78		/* The opamp actually has an FPF of about 500k. This doesn't work here and causes oscillations.
79		* FPF here therefore about half the Solver clock.
80		*/
81		PARAM(XU16.B.MODEL, "MB3614_SLOW")
82		PARAM(XU17.C.MODEL, "MB3614_SLOW")
83
84	81	OPTIMIZE_FRONTIER(C51.1, RES_K(20), 50)
85	82	OPTIMIZE_FRONTIER(R77.2, RES_K(20), 50)
86	83
r248389	r248390
229	226	CD4538_DIP(XU19)
230	227	MM5837_DIP(XU20)
231	228	TTL_7416_DIP(XU6)
232
233	229	NET_C(D1.A, C21.2, R23.1)
234	230	NET_C(D1.K, C20.1, R22.1)
235	231	NET_C(XU13.1, C37.2, C36.1, R48.1)
r248389	r248390
414	410
415	411	NETLIST_END()
416	412
	413	NETLIST_START(MB3614_DIP)
	414	#if 0
	415	SUBMODEL(opamp_mod, op1)
	416	SUBMODEL(opamp_mod, op2)
	417	SUBMODEL(opamp_mod, op3)
	418	SUBMODEL(opamp_mod, op4)
	419	#else
	420	/* The opamp actually has an FPF of about 500k. This doesn't work here and causes oscillations.
	421	* FPF here therefore about half the Solver clock.
	422	*/
	423	OPAMP(op1, ".model MB3614 OPAMP(TYPE=3 VLH=2.0 VLL=0.2 FPF=5 UGF=110k SLEW=0.6M RI=1000k RO=50 DAB=0.002)")
	424	OPAMP(op2, ".model MB3614 OPAMP(TYPE=3 VLH=2.0 VLL=0.2 FPF=5 UGF=11k SLEW=0.6M RI=1000k RO=50 DAB=0.002)")
	425	OPAMP(op3, ".model MB3614 OPAMP(TYPE=3 VLH=2.0 VLL=0.2 FPF=5 UGF=11k SLEW=0.6M RI=1000k RO=50 DAB=0.002)")
	426	OPAMP(op4, ".model MB3614 OPAMP(TYPE=3 VLH=2.0 VLL=0.2 FPF=5 UGF=110k SLEW=0.6M RI=1000k RO=50 DAB=0.002)")
	427	#endif
	428	ALIAS( 1, op1.OUT)
	429	ALIAS( 2, op1.MINUS)
	430	ALIAS( 3, op1.PLUS)
417	431
	432	ALIAS( 4, op1.VCC)
	433
	434	ALIAS( 5, op2.PLUS)
	435	ALIAS( 6, op2.MINUS)
	436	ALIAS( 7, op2.OUT)
	437
	438	ALIAS( 8, op3.OUT)
	439	ALIAS( 9, op3.MINUS)
	440	ALIAS(10, op3.PLUS)
	441
	442	ALIAS(11, op1.GND)
	443
	444	ALIAS(12, op4.PLUS)
	445	ALIAS(13, op4.MINUS)
	446	ALIAS(14, op4.OUT)
	447
	448	NET_C(op1.GND, op2.GND, op3.GND, op4.GND)
	449	NET_C(op1.VCC, op2.VCC, op3.VCC, op4.VCC)
	450
	451	NETLIST_END()
	452
	453
	454
418	455	NETLIST_START(G501534_DIP)
419	456	AFUNC(f, 2, "A0 A1 0.2 * *")
420	457
r248389	r248390
445	482
446	483	NETLIST_START(congob_lib)
447	484
	485	//LOCAL_LIB_ENTRY(LM324_DIP)
	486	//LOCAL_LIB_ENTRY(LM358_DIP)
	487	LOCAL_LIB_ENTRY(MB3614_DIP)
448	488	LOCAL_LIB_ENTRY(G501534_DIP)
449	489
450	490	NETLIST_END()

trunk/scripts/src/bus.lua
r248389	r248390
890	890	MAME_DIR .. "src/emu/bus/msx_cart/korean.h",
891	891	MAME_DIR .. "src/emu/bus/msx_cart/majutsushi.c",
892	892	MAME_DIR .. "src/emu/bus/msx_cart/majutsushi.h",
893		MAME_DIR .. "src/emu/bus/msx_cart/moonsound.h",
894		MAME_DIR .. "src/emu/bus/msx_cart/moonsound.c",
895	893	MAME_DIR .. "src/emu/bus/msx_cart/msx_audio.c",
896	894	MAME_DIR .. "src/emu/bus/msx_cart/msx_audio.h",
897	895	MAME_DIR .. "src/emu/bus/msx_cart/msx_audio_kb.c",

trunk/scripts/src/machine.lua
r248389	r248390
188	188
189	189	---------------------------------------------------
190	190	--
191		--@src/emu/machine/68~~230~~pit.h,MACHINES["~~PIT~~68~~230~~"] = true
	191	--@src/emu/machine/68561mpcc.h,MACHINES["68561MPCC"] = true
192	192	---------------------------------------------------
193	193
194		if (MACHINES["PIT68230"]~=null) then
195		files {
196		MAME_DIR .. "src/emu/machine/68230pit.c",
197		MAME_DIR .. "src/emu/machine/68230pit.h",
198		}
199		end
200
201		---------------------------------------------------
202		--
203		--@src/emu/machine/68561mpcc.h,MACHINES += 68561MPCC
204		---------------------------------------------------
205
206	194	if (MACHINES["68561MPCC"]~=null) then
207	195	files {
208	196	MAME_DIR .. "src/emu/machine/68561mpcc.c",

trunk/scripts/src/netlist.lua
r248389	r248390
156	156	MAME_DIR .. "src/emu/netlist/macro/nlm_ttl74xx.h",
157	157	MAME_DIR .. "src/emu/netlist/macro/nlm_cd4xxx.c",
158	158	MAME_DIR .. "src/emu/netlist/macro/nlm_cd4xxx.h",
159		MAME_DIR .. "src/emu/netlist/macro/nlm_opamp.c",
160		MAME_DIR .. "src/emu/netlist/macro/nlm_opamp.h",
161	159	}

trunk/scripts/target/mame/mess.lua
r248389	r248390
156	156	SOUNDS["Y8950"] = true
157	157	SOUNDS["YMF262"] = true
158	158	--SOUNDS["YMF271"] = true
159		SOUNDS["YMF278B"] = true
	159	--SOUNDS["YMF278B"] = true
160	160	--SOUNDS["YMZ280B"] = true
161	161	SOUNDS["SN76477"] = true
162	162	SOUNDS["SN76496"] = true
r248389	r248390
485	485	MACHINES["PCF8593"] = true
486	486	MACHINES["PCKEYBRD"] = true
487	487	MACHINES["PIC8259"] = true
488		MACHINES["PIT68230"] = true
489	488	MACHINES["PIT8253"] = true
490	489	MACHINES["PLA"] = true
491	490	--MACHINES["PROFILE"] = true
r248389	r248390
723	722	"exidy",
724	723	"fairch",
725	724	"fidelity",
726		"force",
727	725	"fujitsu",
728	726	"funtech",
729	727	"galaxy",
r248389	r248390
1511	1509	MAME_DIR .. "src/mess/drivers/fidelz80.c",
1512	1510	}
1513	1511
1514		createMESSProjects(_target, _subtarget, "force")
1515		files {
1516		MAME_DIR .. "src/mess/drivers/force68k.c",
1517		}
1518
1519	1512	createMESSProjects(_target, _subtarget, "fujitsu")
1520	1513	files {
1521	1514	MAME_DIR .. "src/mess/drivers/fmtowns.c",
r248389	r248390
1637	1630	MAME_DIR .. "src/mess/drivers/isbc.c",
1638	1631	MAME_DIR .. "src/mess/machine/isbc_215g.c",
1639	1632	MAME_DIR .. "src/mess/drivers/rex6000.c",
1640		MAME_DIR .. "src/mess/drivers/sdk80.c",
1641	1633	MAME_DIR .. "src/mess/drivers/sdk85.c",
1642	1634	MAME_DIR .. "src/mess/drivers/sdk86.c",
1643	1635	MAME_DIR .. "src/mess/drivers/imds2.c",

trunk/src/emu/bus/msx_cart/cartridge.c
r248389	r248390
16	16	#include "konami.h"
17	17	#include "korean.h"
18	18	#include "majutsushi.h"
19		#include "moonsound.h"
20	19	#include "msx_audio.h"
21	20	#include "msxdos2.h"
22	21	#include "nomapper.h"
r248389	r248390
62	61	SLOT_INTERFACE_INTERNAL("disk_fsfd1a", MSX_CART_FSFD1A)
63	62	SLOT_INTERFACE_INTERNAL("disk_fscf351", MSX_CART_FSCF351)
64	63	SLOT_INTERFACE("bm_012", MSX_CART_BM_012)
65		SLOT_INTERFACE("moonsound", MSX_CART_MOONSOUND)
66	64	SLOT_INTERFACE_END
67	65
68	66

trunk/src/emu/bus/msx_cart/konami.c
r248389	r248390
19	19	{
20	20	for (int i = 0; i < 4; i++)
21	21	{
22		m_selected_bank[i] = i;
	22	m_selected_bank[i] = 0;
23	23	}
24	24	for (int i = 0; i < 8; i++)
25	25	{
r248389	r248390
128	128	{
129	129	for (int i = 0; i < 4; i++)
130	130	{
131		m_selected_bank[i] = i;
	131	m_selected_bank[i] = 0;
132	132	}
133	133	for (int i = 0; i < 8; i++)
134	134	{

trunk/src/emu/bus/msx_cart/moonsound.c
r248389	r248390
1		// license:BSD-3-Clause
2		// copyright-holders:Wilbert Pol
3		/**********************************************************************************
4
5		TODO:
6		- Properly hook up correct SRAM sizes for different moonsound compatible
7		cartridges. (Original moonsound has 128KB SRAM)
8
9		**********************************************************************************/
10
11		#include "emu.h"
12		#include "moonsound.h"
13
14
15		#define VERBOSE 0
16		#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
17
18
19		const device_type MSX_CART_MOONSOUND = &device_creator<msx_cart_moonsound>;
20
21
22		msx_cart_moonsound::msx_cart_moonsound(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
23		: device_t(mconfig, MSX_CART_MOONSOUND, "MSX Cartridge - MoonSound", tag, owner, clock, "msx_cart_moonsound", __FILE__)
24		, msx_cart_interface(mconfig, *this)
25		, m_ymf278b(*this, "ymf278b")
26		{
27		}
28
29
30		static ADDRESS_MAP_START( ymf278b_map, AS_0, 8, msx_cart_moonsound )
31		AM_RANGE(0x000000, 0x1fffff) AM_ROM
32		AM_RANGE(0x200000, 0x3fffff) AM_RAM // 2MB sram for testing
33		ADDRESS_MAP_END
34
35
36		static MACHINE_CONFIG_FRAGMENT( moonsound )
37		// The moonsound cartridge has a separate stereo output.
38		MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
39		MCFG_SOUND_ADD("ymf278b", YMF278B, YMF278B_STD_CLOCK)
40		MCFG_DEVICE_ADDRESS_MAP(AS_0, ymf278b_map)
41		MCFG_YMF278B_IRQ_HANDLER(WRITELINE(msx_cart_moonsound,irq_w))
42		MCFG_SOUND_ROUTE(0, "lspeaker", 0.50)
43		MCFG_SOUND_ROUTE(1, "rspeaker", 0.50)
44		MCFG_SOUND_ROUTE(2, "lspeaker", 0.40)
45		MCFG_SOUND_ROUTE(3, "rspeaker", 0.40)
46		MCFG_SOUND_ROUTE(4, "lspeaker", 0.40)
47		MCFG_SOUND_ROUTE(5, "rspeaker", 0.40)
48		MACHINE_CONFIG_END
49
50
51		machine_config_constructor msx_cart_moonsound::device_mconfig_additions() const
52		{
53		return MACHINE_CONFIG_NAME( moonsound );
54		}
55
56
57		ROM_START( msx_cart_moonsound )
58		ROM_REGION(0x400000, "ymf278b", 0)
59		ROM_LOAD("yrw801.rom", 0x0, 0x200000, CRC(2a9d8d43) SHA1(32760893ce06dbe3930627755ba065cc3d8ec6ca))
60		ROM_END
61
62
63		const rom_entry *msx_cart_moonsound::device_rom_region() const
64		{
65		return ROM_NAME( msx_cart_moonsound );
66		}
67
68
69		void msx_cart_moonsound::device_start()
70		{
71		m_out_irq_cb.resolve_safe();
72
73		// Install IO read/write handlers
74		address_space &space = machine().device<cpu_device>("maincpu")->space(AS_IO);
75		space.install_readwrite_handler(0x7e, 0x7f, read8_delegate(FUNC(msx_cart_moonsound::read_ymf278b_pcm), this), write8_delegate(FUNC(msx_cart_moonsound::write_ymf278b_pcm), this));
76		space.install_readwrite_handler(0xc4, 0xc7, read8_delegate(FUNC(msx_cart_moonsound::read_ymf278b_fm), this), write8_delegate(FUNC(msx_cart_moonsound::write_ymf278b_fm), this));
77		space.install_read_handler(0xc0, 0xc0, read8_delegate(FUNC(msx_cart_moonsound::read_c0), this));
78		}
79
80
81		void msx_cart_moonsound::device_reset()
82		{
83		}
84
85
86		WRITE_LINE_MEMBER(msx_cart_moonsound::irq_w)
87		{
88		LOG(("moonsound: irq state %d\n", state));
89		m_out_irq_cb(state);
90		}
91
92
93		WRITE8_MEMBER(msx_cart_moonsound::write_ymf278b_fm)
94		{
95		LOG(("moonsound: write 0x%02x, data 0x%02x\n", 0xc4 + offset, data));
96		m_ymf278b->write(space, offset, data);
97		}
98
99
100		READ8_MEMBER(msx_cart_moonsound::read_ymf278b_fm)
101		{
102		LOG(("moonsound: read 0x%02x\n", 0xc4 + offset));
103		return m_ymf278b->read(space, offset);
104		}
105
106
107		WRITE8_MEMBER(msx_cart_moonsound::write_ymf278b_pcm)
108		{
109		LOG(("moonsound: write 0x%02x, data 0x%02x\n", 0x7e + offset, data));
110		m_ymf278b->write(space, 4 + offset, data);
111		}
112
113
114		READ8_MEMBER(msx_cart_moonsound::read_ymf278b_pcm)
115		{
116		LOG(("moonsound: read 0x%02x\n", 0x7e + offset));
117		return m_ymf278b->read(space, 4 + offset);
118		}
119
120
121		// For detecting presence of moonsound cartridge
122		READ8_MEMBER(msx_cart_moonsound::read_c0)
123		{
124		LOG(("moonsound: read 0xc0\n"));
125		return 0x00;
126		}
127

trunk/src/emu/bus/msx_cart/moonsound.h
r248389	r248390
1		// license:BSD-3-Clause
2		// copyright-holders:Wilbert Pol
3		#ifndef __MSX_CART_MOONSOUND_H
4		#define __MSX_CART_MOONSOUND_H
5
6		#include "bus/msx_cart/cartridge.h"
7		#include "sound/ymf278b.h"
8
9
10		extern const device_type MSX_CART_MOONSOUND;
11
12
13		class msx_cart_moonsound : public device_t
14		, public msx_cart_interface
15		{
16		public:
17		msx_cart_moonsound(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
18
19		// device-level overrides
20		virtual void device_start();
21		virtual void device_reset();
22		virtual machine_config_constructor device_mconfig_additions() const;
23		virtual const rom_entry *device_rom_region() const;
24
25		DECLARE_WRITE8_MEMBER(write_ymf278b_fm);
26		DECLARE_READ8_MEMBER(read_ymf278b_fm);
27		DECLARE_WRITE8_MEMBER(write_ymf278b_pcm);
28		DECLARE_READ8_MEMBER(read_ymf278b_pcm);
29		DECLARE_READ8_MEMBER(read_c0);
30		DECLARE_WRITE_LINE_MEMBER(irq_w);
31
32		private:
33		required_device<ymf278b_device> m_ymf278b;
34		};
35
36
37		#endif

trunk/src/emu/bus/ti99_peb/hfdc.c
r248389	r248390
1012	1012
1013	1013	static SLOT_INTERFACE_START( hfdc_harddisks )
1014	1014	SLOT_INTERFACE( "generic", MFMHD_GENERIC ) // Generic high-level emulation
1015		SLOT_INTERFACE( "st213", MFMHD_ST213 ) // Seagate ST-213 (10 MB)
1016		SLOT_INTERFACE( "st225", MFMHD_ST225 ) // Seagate ST-225 (20 MB)
1017		SLOT_INTERFACE( "st251", MFMHD_ST251 ) // Seagate ST-251 (40 MB)
	1015	SLOT_INTERFACE( "st225", MFMHD_ST225 ) // Seagate ST-225 and others
1018	1016	SLOT_INTERFACE_END
1019	1017
1020	1018	MACHINE_CONFIG_FRAGMENT( ti99_hfdc )
r248389	r248390
1032	1030	MCFG_FLOPPY_DRIVE_ADD("f4", hfdc_floppies, NULL, myarc_hfdc_device::floppy_formats)
1033	1031
1034	1032	// NB: Hard disks don't go without image (other than floppy drives)
1035		MCFG_MFM_HARDDISK_CONN_ADD("h1", hfdc_harddisks, NULL, MFM_BYTE, 3000, 20, MFMHD_TI99_FORMAT)
1036		MCFG_MFM_HARDDISK_CONN_ADD("h2", hfdc_harddisks, NULL, MFM_BYTE, 2000, 20, MFMHD_TI99_FORMAT)
1037		MCFG_MFM_HARDDISK_CONN_ADD("h3", hfdc_harddisks, NULL, MFM_BYTE, 2000, 20, MFMHD_TI99_FORMAT)
	1033	MCFG_MFM_HARDDISK_CONN_ADD("h1", hfdc_harddisks, NULL, MFM_BYTE, 3000, 20)
	1034	MCFG_MFM_HARDDISK_CONN_ADD("h2", hfdc_harddisks, NULL, MFM_BYTE, 2000, 20)
	1035	MCFG_MFM_HARDDISK_CONN_ADD("h3", hfdc_harddisks, NULL, MFM_BYTE, 2000, 20)
1038	1036
1039	1037	MCFG_DEVICE_ADD(CLOCK_TAG, MM58274C, 0)
1040	1038	MCFG_MM58274C_MODE24(1) // 24 hour

trunk/src/emu/cpu/mips/mips3drc.c
r248389	r248390
2791	2791	else /* NEG.D - MIPS I */
2792	2792	{
2793	2793	UML_FDNEG(block, FPR64(FDREG), FPR64(FSREG)); // fdneg <fdreg>,<fsreg>
2794		UML_DCMP(block, FPR64(FSREG), 0); // cmp <fsreg>,0.0
	2794	UML_CMP(block, FPR64(FSREG), 0); // cmp <fsreg>,0.0
2795	2795	UML_DMOVc(block, COND_E, FPR64(FDREG), U64(0x8000000000000000));// dmov <fdreg>,-0.0,e
2796	2796	}
2797	2797	return TRUE;

trunk/src/emu/cpu/sm510/sm510.c
r248389	r248390
8	8	- SM512: 4Kx8 ROM, 128x4 RAM(48x4 for LCD), melody controller
9	9
10	10	Other chips that may be in the same family, investigate more when one of
11		them needs to get emulated: SM500, SM530~~/31~~, SM~~4A, SM~~3~~903~~, ..
	11	them needs to get emulated: SM500, SM530, SM531, ..
12	12
13	13	References:
14	14	- 1990 Sharp Microcomputers Data Book
r248389	r248390
17	17	TODO:
18	18	- proper support for LFSR program counter in debugger
19	19	- callback for lcd screen as MAME bitmap (when needed)
20		- LCD bs pin blink mode via Y register (0.5s off, 0.5s on)
21		- LB/SBM is correct?
	20	- LCD bs pin blink mode via Y register
	21	- LB opcode
22	22	- SM511 unknown opcodes
23	23
24	24	*/

trunk/src/emu/cpu/sm510/sm510op.c
r248389	r248390
57	57	void sm510_base_device::op_lb()
58	58	{
59	59	// LB x: load BM/BL with 4-bit immediate value (partial)
60
61		// SM510 WIP..
62		// bm and bl(low) are probably ok!
63		m_bm = (m_bm & 4) \| (m_op & 3);
64		m_bl = (m_op >> 2 & 3);
65
66		// bl(high) is still unclear, official doc is confusing
67		UINT8 hi = 0;
68		switch (m_bl)
69		{
70		case 0: hi = 3; break;
71		case 1: hi = 0; break;
72		case 2: hi = 0; break;
73		case 3: hi = 3; break;
74		}
75		m_bl \|= (hi << 2 & 0xc);
	60	op_illegal();
76	61	}
77	62
78	63	void sm510_base_device::op_lbl()

trunk/src/emu/cpu/ucom4/ucom4.c
r248389	r248390
12	12	TODO:
13	13	- what happens with uCOM-43 opcodes on an uCOM-44/45 MCU?
14	14	- what's the data after the ROM data for? (eg. 2000-2047, official ROM size is 2000)
15		- is DPh internally 3-bit or 4-bit? (currently assume 4-bit, it could have effect
16		on specific uCOM-43 exchange opcodes)
17		- RAM access from 0x50-0x7f on data_96x4
18		- invalid port accesses via DPl
19		- documentation is conflicting if IRQ is level or edge triggered
20	15
21	16	*/
22	17
r248389	r248390
121	116	m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(ucom4_cpu_device::simple_timer_cb), this));
122	117
123	118	// resolve callbacks
124		m_read_a.resolve_safe(0);
125		m_read_b.resolve_safe(0);
126		m_read_c.resolve_safe(0);
127		m_read_d.resolve_safe(0);
	119	m_read_a.resolve_safe(0xf);
	120	m_read_b.resolve_safe(0xf);
	121	m_read_c.resolve_safe(0xf);
	122	m_read_d.resolve_safe(0xf);
128	123
129	124	m_write_c.resolve_safe();
130	125	m_write_d.resolve_safe();

trunk/src/emu/cpu/ucom4/ucom4.h
r248389	r248390
216	216	void ram_w(UINT8 data);
217	217	void pop_stack();
218	218	void push_stack();
219		virtual UINT8 input_r(int index);
220		virtual void output_w(int index, UINT8 data);
	219	UINT8 input_r(int index);
	220	void output_w(int index, UINT8 data);
221	221
222	222	bool check_op_43();
223	223	TIMER_CALLBACK_MEMBER( simple_timer_cb );
r248389	r248390
322	322	{
323	323	public:
324	324	upd650_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
325
326		protected:
327		virtual UINT8 input_r(int index);
328	325	};
329	326
330	327

trunk/src/emu/cpu/ucom4/ucom4op.c
r248389	r248390
43	43	{
44	44	case NEC_UCOM4_PORTA: inp = m_read_a(index, 0xff); break;
45	45	case NEC_UCOM4_PORTB: inp = m_read_b(index, 0xff); break;
46		case NEC_UCOM4_PORTC: inp = m_read_c(index, 0xff) \| m_port_out[index]; break;
47		case NEC_UCOM4_PORTD: inp = m_read_d(index, 0xff) \| m_port_out[index]; break;
	46	case NEC_UCOM4_PORTC: inp = m_read_c(index, 0xff); break;
	47	case NEC_UCOM4_PORTD: inp = m_read_d(index, 0xff); break;
48	48
49	49	default:
50	50	logerror("%s read from unknown port %c at $%03X\n", tag(), 'A' + index, m_prev_pc);
r248389	r248390
54	54	return inp & 0xf;
55	55	}
56	56
57		UINT8 upd650_cpu_device::input_r(int index)
58		{
59		// bidirectional ports are 'push-pull', meaning it will output 0 when it's read
60		if ((index & 0xf) == NEC_UCOM4_PORTC \|\| (index & 0xf) == NEC_UCOM4_PORTD)
61		output_w(index, 0);
62
63		return ucom4_cpu_device::input_r(index);
64		}
65
66	57	void ucom4_cpu_device::output_w(int index, UINT8 data)
67	58	{
68	59	index &= 0xf;

trunk/src/emu/machine/68230pit.c
r248389	r248390
1		// license:BSD-3-Clause
2		// copyright-holders:Joakim Larsson Edström
3		/**********************************************************************
4
5		Motorola MC68230 PI/T Parallell Interface and Timer
6
7		Revisions
8		2015-07-15 JLE initial
9
10		Todo
11		- Add clock and timers
12		- Add all missing registers
13		- Add configuration
14		**********************************************************************/
15
16		/*
17		Force CPU-1 init sequence
18		0801EA 0E0000 W 0000 PGCR data_w: 0000 -> 0000 & 00ff
19		0801EA 0E0002 W 0000 PSRR data_w: 0000 -> 0001 & 00ff
20		0801EA 0E0004 W FFFF PADDR data_w: 00ff -> 0002 & 00ff
21		0801EA 0E0006 W 0000 PBDDR data_w: 0000 -> 0003 & 00ff
22		0801F0 0E000C W 6060 PACR data_w: 0060 -> 0006 & 00ff
23		0801F6 0E000E W A0A0 PBCR data_w: 00a0 -> 0007 & 00ff
24		0801FC 0E0000 W 3030 PGCR data_w: 0030 -> 0000 & 00ff
25		080202 0E000E W A8A8 PBCR data_w: 00a8 -> 0007 & 00ff
26		080210 0E000E W A0A0 PBCR data_w: 00a0 -> 0007 & 00ff
27
28		Force CPU-1 after one keypress in terminal
29		081DC0 0E000C W 6868 PACR
30		081DC8 0E000C W 6060 PACR
31		*/
32
33
34		#include "emu.h"
35		#include "68230pit.h"
36
37		/***************************************************************************
38		IMPLEMENTATION
39		***************************************************************************/
40
41		// device type definition
42		const device_type PIT68230 = &device_creator<pit68230_device>;
43
44		//-------------------------------------------------
45		// pit68230_device - constructor
46		//-------------------------------------------------
47
48		pit68230_device::pit68230_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
49		: device_t(mconfig, PIT68230, "Motorola 68230 PI/T", tag, owner, clock, "pit68230", __FILE__)
50		{
51		}
52
53		void pit68230_device::device_start()
54		{
55		printf("PIT68230 device started\n");
56		}
57
58		void pit68230_device::device_reset()
59		{
60		printf("PIT68230 device reseted\n");
61		m_pgcr = 0;
62		m_psrr = 0;
63		m_paddr = 0;
64		m_pbddr = 0;
65		m_pcddr = 0;
66		m_pacr = 0;
67		m_pbcr = 0;
68		m_padr = 0;
69		m_pbdr = 0;
70		m_psr = 0;
71		}
72
73		WRITE8_MEMBER( pit68230_device::data_w )
74		{
75		printf("data_w: %04x -> ", data);
76		switch (offset)
77		{
78		case PIT_68230_PGCR:
79		printf("PGCR");
80		m_pgcr = data;
81		break;
82		case PIT_68230_PSRR:
83		printf("PSRR");
84		m_psrr = data;
85		break;
86		case PIT_68230_PADDR:
87		printf("PADDR");
88		m_paddr = data;
89		break;
90		case PIT_68230_PBDDR:
91		printf("PBDDR");
92		m_pbddr = data;
93		break;
94		case PIT_68230_PACR:
95		printf("PACR");
96		m_pacr = data;
97		break;
98		case PIT_68230_PBCR:
99		printf("PBCR");
100		m_pbcr = data;
101		break;
102		case PIT_68230_PADR:
103		printf("PADR");
104		m_padr = data;
105		break;
106		case PIT_68230_PSR:
107		printf("PSR");
108		m_padr = data;
109		break;
110		default:
111		printf("unhandled register %02x", offset);
112		}
113		printf("\n");
114		}
115
116		READ8_MEMBER( pit68230_device::data_r )
117		{
118		UINT8 data = 0;
119
120		printf("data_r: ");
121		switch (offset)
122		{
123		case PIT_68230_PGCR:
124		printf("PGCR");
125		data = m_pgcr;
126		break;
127		case PIT_68230_PSRR:
128		printf("PSRR");
129		data = m_psrr;
130		break;
131		case PIT_68230_PADDR:
132		printf("PADDR");
133		data = m_paddr;
134		break;
135		case PIT_68230_PBDDR:
136		printf("PBDDR");
137		data = m_pbddr;
138		break;
139		case PIT_68230_PACR:
140		printf("PACR");
141		data = m_pacr;
142		break;
143		case PIT_68230_PBCR:
144		printf("PBCR");
145		data = m_pbcr;
146		break;
147		case PIT_68230_PADR:
148		printf("PADR");
149		data = m_padr;
150		break;
151		case PIT_68230_PBDR:
152		/* 4.6.2. PORT B DATA REGISTER (PBDR). The port B data register is a holding register for moving data
153		to and from port B pins. The port B data direction register determines whether each pin is an input (zero)
154		or an output (one). This register is readable and writable at all times. Depending on the chosen mode/submode,
155		reading or writing may affect the double-buffered handshake mechanism. The port B data register is not affected
156		by the assertion of the RESET pin. PB0-PB7 sits on pins 17-24 on a 48 pin DIP package */
157		printf("PBDR");
158		data = m_pbdr;
159		// data = (m_pbdr & 0xfc) \| 1; // CPU-1 centronics interface expects to see 2 lowest bits equal 1 for printer
160		break;
161		case PIT_68230_PSR:
162		printf("PSR");
163		data = m_psr;
164		// data = m_psr \| 1; // CPU-1 centronics interface expects status to be non zero
165		break;
166		default:
167		printf("unhandled register %02x", offset);
168		data = 0;
169		}
170		printf("\n");
171
172		return data;
173		}
174
175

trunk/src/emu/machine/68230pit.h
r248389	r248390
1		// license:BSD-3-Clause
2		// copyright-holders:Joakim Larsson Edström
3		/**********************************************************************
4
5		Motorola MC68230 PI/T Parallell Interface and Timer
6
7		**********************************************************************/
8		#pragma once
9
10		#ifndef __68230PIT_H__
11		#define __68230PIT_H__
12
13		#include "emu.h"
14
15		/*-----------------------------------------------------------------------
16		Registers RS1-RS5 R/W Description
17		-------------------------------------------------------------------------*/
18		#define PIT_68230_PGCR 0x00 /* RW Port General Control register */
19		#define PIT_68230_PSRR 0x01 /* RW Port Service Request register */
20		#define PIT_68230_PADDR 0x02 /* RW Port A Data Direction register */
21		#define PIT_68230_PBDDR 0x03 /* RW Port B Data Direction register */
22		#define PIT_68230_PCDDR 0x04 /* RW Port C Data Direction register */
23		#define PIT_68230_PIVR 0x05 /* RW Port Interrupt vector register */
24		#define PIT_68230_PACR 0x06 /* RW Port A Control register */
25		#define PIT_68230_PBCR 0x07 /* RW Port B Control register */
26		#define PIT_68230_PADR 0x08 /* RW Port A Data register */
27		#define PIT_68230_PBDR 0x09 /* RW Port B Data register */
28		#define PIT_68230_PAAR 0x0a /* RO Port A Alternate register */
29		#define PIT_68230_PBAR 0x0b /* RO Port B Alternate register */
30		#define PIT_68230_PCDR 0x0c /* RW Port C Data register */
31		#define PIT_68230_PSR 0x0d /* RW Port Status register */
32		#define PIT_68230_TCR 0x10 /* RW Timer Control Register */
33		#define PIT_68230_TIVR 0x11 /* RW Timer Interrupt Vector Register */
34		#define PIT_68230_CPRH 0x13 /* RW Counter Preload Register High */
35		#define PIT_68230_CPRM 0x14 /* RW Counter Preload Register Middle */
36		#define PIT_68230_CPRL 0x15 /* RW Counter Preload Register Low */
37		#define PIT_68230_CNTRH 0x17 /* RO Counter Register High */
38		#define PIT_68230_CNTRM 0x18 /* RO Counter Register Middle */
39		#define PIT_68230_CNTRL 0x19 /* RO Counter Register Low */
40		#define PIT_68230_TSR 0x1A /* RW Timer Status Register */
41
42		//**************************************************************************
43		// TYPE DEFINITIONS
44		//**************************************************************************
45		class pit68230_device : public device_t
46		{
47		public:
48		// construction/destruction
49		pit68230_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
50		DECLARE_WRITE8_MEMBER( data_w );
51		DECLARE_READ8_MEMBER( data_r );
52
53		protected:
54		// device-level overrides
55		virtual void device_start();
56		virtual void device_reset();
57
58		private:
59		UINT8 m_pgcr; // Port General Control register
60		UINT8 m_psrr; // Port Service Request register
61		UINT8 m_paddr; // Port A Data Direction register
62		UINT8 m_pbddr; // Port B Data Direction register
63		UINT8 m_pcddr; // Port C Data Direction register
64		UINT8 m_pacr; // Port A Control register
65		UINT8 m_pbcr; // Port B Control register
66		UINT8 m_padr; // Port A Data register
67		UINT8 m_pbdr; // Port B Data register
68		UINT8 m_psr; // Port Status Register
69		};
70
71
72		// device type definition
73		extern const device_type PIT68230;
74
75		#endif // __68230PIT__

trunk/src/emu/machine/hdc9234.c
r248389	r248390
1740	1740	switch (m_substate)
1741	1741	{
1742	1742	case WAITINDEX0:
1743		if (TRACE_FORMAT && TRACE_DETAIL) logerror("%s: Format track; ~~look~~ing for ~~track~~ ~~start~~\n", tag());
	1743	if (TRACE_FORMAT && TRACE_DETAIL) logerror("%s: Format track - waiting for index hole\n", tag());
1744	1744	if (!index_hole())
1745	1745	{
1746	1746	m_substate = WAITINDEX1;
r248389	r248390
1749	1749	else
1750	1750	{
1751	1751	// We're above the index hole right now, so wait for the line going down
1752		if (TRACE_FORMAT && TRACE_DETAIL) logerror("%s: Index hole just passing by ... \n", tag());
1753		wait_line(INDEX_LINE, CLEAR_LINE, WAITINDEX1, false);
	1752	if (TRACE_FORMAT && TRACE_DETAIL) logerror("%s: Index hole just passing by ... waiting for next\n", tag());
	1753	wait_line(INDEX_LINE, ASSERT_LINE, WAITINDEX1, false);
1754	1754	cont = WAIT;
1755	1755	}
1756	1756	break;
1757	1757	case WAITINDEX1:
1758	1758	// Waiting for the next rising edge
1759		if (TRACE_FORMAT && TRACE_DETAIL) logerror("%s: Waiting for next index hole\n", tag());
1760	1759	wait_line(INDEX_LINE, ASSERT_LINE, TRACKSTART, false);
1761	1760	cont = WAIT;
1762	1761	break;
r248389	r248390
2504	2503	write_on_track(encode((m_live_state.crc >> 8) & 0xff), 1, WRITE_DATA_CRC);
2505	2504	}
2506	2505	else
2507		// Write a filler byte so that the last CRC bit is saved correctly (why actually?)
2508		// write_on_track(encode(0xff), 1, WRITE_DONE);
2509		m_live_state.state = WRITE_DONE;
	2506	// Write a filler byte so that the last CRC bit is saved correctly
	2507	write_on_track(encode(0xff), 1, WRITE_DONE);
2510	2508
2511	2509	break;
2512	2510

trunk/src/emu/machine/netlist.c
r248389	r248390
100	100	pstring dname = "OUT_" + m_in;
101	101	m_delegate.bind_relative_to(owner()->machine().root_device());
102	102	NETLIB_NAME(analog_callback) dev = downcast<NETLIB_NAME(analog_callback) >(
103		setup.register_dev("~~NETDEV~~_~~CALLBACK~~", dname));
	103	setup.register_dev("nld_analog_callback", dname));
104	104
105	105	dev->register_callback(m_delegate);
106	106	setup.register_link(dname + ".IN", m_in);
r248389	r248390
173	173	{
174	174	NETLIB_NAME(sound_in) *snd_in = setup.netlist().get_first_device<NETLIB_NAME(sound_in)>();
175	175	if (snd_in == NULL)
176		snd_in = dynamic_cast<NETLIB_NAME(sound_in) *>(setup.register_dev("~~NETDEV~~_~~SOUND~~_IN", "STREAM_INPUT"));
	176	snd_in = dynamic_cast<NETLIB_NAME(sound_in) *>(setup.register_dev("nld_sound_in", "STREAM_INPUT"));
177	177
178	178	pstring sparam = pstring::sprintf("STREAM_INPUT.CHAN%d", m_channel);
179	179	setup.register_param(sparam, m_param_name);
r248389	r248390
213	213	pstring sname = pstring::sprintf("STREAM_OUT_%d", m_channel);
214	214
215	215	//snd_out = dynamic_cast<NETLIB_NAME(sound_out) *>(setup.register_dev("nld_sound_out", sname));
216		setup.register_dev("~~NETDEV~~_~~SOUND~~_~~OUT~~", sname);
	216	setup.register_dev("nld_sound_out", sname);
217	217
218	218	setup.register_param(sname + ".CHAN" , m_channel);
219	219	setup.register_param(sname + ".MULT", m_mult);

trunk/src/emu/machine/smpc.c
r248389	r248390
686	686	case 0x0a:
687	687	case 0x0b:
688	688	popmessage ("SMPC: NETLINK %s, contact MAMEdev",(data & 1) ? "off" : "on");
689		break; case 0x0d:
	689	break;
	690	case 0x0d:
690	691	if(LOG_SMPC) printf ("SMPC: System Reset\n");
691	692	smpc_system_reset();
692	693	break;
r248389	r248390
925	926	case 2:
926	927	res = th<<6;
927	928	// 1 C B Right Left Down Up
928		// WHP actually has a very specific code at 0x6015f30, doesn't like bits 0-1 active here ...
929	929	res\|= (((machine().root_device().ioport(padnames[pad_n])->read()>>4)) & 0x30); // C & B
930		res\|= (((machine().root_device().ioport(padnames[pad_n])->read()>>12)) & 0xc);
	930	res\|= (((machine().root_device().ioport(padnames[pad_n])->read()>>12)) & 0xf);
931	931	break;
932	932	case 1:
933	933	res = th<<6;
r248389	r248390
939	939	// 0 Start A 0 0 Down Up
940	940	res\|= (((machine().root_device().ioport(padnames[pad_n])->read()>>6)) & 0x30); // Start & A
941	941	res\|= (((machine().root_device().ioport(padnames[pad_n])->read()>>12)) & 0x3);
942		// ... and actually wants bits 2 - 3 active here.
943		res\|= 0xc;
944	942	break;
945	943	}
946
	944
947	945	return res;
948	946	}
949	947
r248389	r248390
1027	1025	{
1028	1026	if(data & 0x40)
1029	1027	{
1030		if(LOG_PAD_CMD) printf("SMPC: BREAK request ~~%02x~~\n"~~,data~~);
	1028	if(LOG_PAD_CMD) printf("SMPC: BREAK request\n");
1031	1029	m_smpc.SR &= 0x0f;
1032	1030	m_smpc.intback_stage = 0;
1033	1031	}
1034	1032	else if(data & 0x80)
1035	1033	{
1036		if(LOG_PAD_CMD) printf("SMPC: CONTINUE request ~~%02x~~\n"~~,data~~);
	1034	if(LOG_PAD_CMD) printf("SMPC: CONTINUE request\n");
1037	1035	machine().scheduler().timer_set(attotime::from_usec(700), timer_expired_delegate(FUNC(saturn_state::intback_peripheral),this),0); /* TODO: is timing correct? */
1038	1036	m_smpc.OREG[31] = 0x10;
1039	1037	m_smpc.SF = 0x01; //TODO: set hand-shake flag?

trunk/src/emu/machine/stvcd.c
r248389	r248390
862	862	//printf("Partition %08x %04x\n",bufnum,cr4);
863	863	}
864	864
865		printf("%04x\n",cr4);
866		if(cr4 == 0)
867		hirqreg \|= (CMOK);
868		else
869		hirqreg \|= (CMOK\|DRDY);
	865	hirqreg \|= (CMOK\|DRDY);
870	866	status_type = 1;
871	867	}
872	868	break;
r248389	r248390
1912	1908	cr1 = data;
1913	1909	cd_stat &= ~CD_STAT_PERI;
1914	1910	cmd_pending \|= 1;
1915		sh1_timer->adjust(attotime::never);
1916	1911	break;
1917	1912	case 0x001c:
1918	1913	case 0x001e:

trunk/src/emu/machine/ti99_hd.c
r248389	r248390
34	34	#define TRACE_TIMING 0
35	35	#define TRACE_IMAGE 0
36	36	#define TRACE_STATE 1
37		#define TRACE_CONFIG 1
38	37
39	38	enum
40	39	{
r248389	r248390
52	51	};
53	52
54	53	#define TRACKSLOTS 5
	54	#define TRACKIMAGE_SIZE 10416 // Provide the buffer for a complete track, including preambles and gaps
55	55
56	56	#define OFFLIMIT -1
57	57
r248389	r248390
69	69	{
70	70	m_spinupms = 10000;
71	71	m_cachelines = TRACKSLOTS;
72		m_max_cylinders = 0;
73		m_phys_cylinders = 0; // We will get this value for generic drives from the image
	72	m_max_cylinder = 0;
74	73	m_max_heads = 0;
75		m_cell_size = 100;
76		m_rpm = 3600; // MFM drives have a revolution rate of 3600 rpm (i.e. 60/sec)
77		m_trackimage_size = (int)((60000000000L / (m_rpm * m_cell_size)) / 16 + 1);
78		m_cache = NULL;
79		// We will calculate default values from the time specs later.
80		m_seeknext_time = 0;
81		m_maxseek_time = 0;
82		m_actual_cylinders = 0;
83		m_park_pos = 0;
84		m_interleave = 0;
85	74	}
86	75
87	76	mfm_harddisk_device::~mfm_harddisk_device()
r248389	r248390
95	84	m_seek_timer = timer_alloc(SEEK_TM);
96	85	m_cache_timer = timer_alloc(CACHE_TM);
97	86
98		m_rev_time = attotime::from_hz(m_rpm/60);
99		m_index_timer->adjust(attotime::from_hz(m_rpm/60), 0, attotime::from_hz(m_rpm/60));
	87	m_rev_time = attotime::from_hz(60);
100	88
101		m_current_cylinder = m_park_pos; // Park position
	89	// MFM drives have a revolution rate of 3600 rpm (i.e. 60/sec)
	90	m_index_timer->adjust(attotime::from_hz(60), 0, attotime::from_hz(60));
	91
	92	m_current_cylinder = 615; // Park position
102	93	m_spinup_timer->adjust(attotime::from_msec(m_spinupms));
103	94
104	95	m_cache = global_alloc(mfmhd_trackimage_cache);
105	96
106		// In 5 second periods, check whether the cache has dirty lines
	97	// In 5 second period, check whether the cache has dirty lines
107	98	m_cache_timer->adjust(attotime::from_msec(5000), 0, attotime::from_msec(5000));
108	99	}
109	100
r248389	r248390
120	111
121	112	void mfm_harddisk_device::device_stop()
122	113	{
123		~~if (m_cache!=NULL)~~ global_free(m_cache);
	114	global_free(m_cache);
124	115	}
125	116
126		/*
127		Load the image from the CHD. We also calculate the head timing here
128		because we need the number of cylinders, and for generic drives we get
129		them from the CHD.
130		*/
131	117	bool mfm_harddisk_device::call_load()
132	118	{
133	119	bool loaded = harddisk_image_device::call_load();
134	120	if (loaded==IMAGE_INIT_PASS)
135	121	{
136		std::string metadata;
137		chd_file* chdfile = get_chd_file();
138
139		if (chdfile==NULL)
140		{
141		logerror("%s: chdfile is null\n", tag());
142		return IMAGE_INIT_FAIL;
143		}
144
145		// Read the hard disk metadata
146		chd_error state = chdfile->read_metadata(HARD_DISK_METADATA_TAG, 0, metadata);
147		if (state != CHDERR_NONE)
148		{
149		logerror("%s: Failed to read CHD metadata\n", tag());
150		return IMAGE_INIT_FAIL;
151		}
152
153		if (TRACE_CONFIG) logerror("%s: CHD metadata: %s\n", tag(), metadata.c_str());
154
155		// Parse the metadata
156		int imagecyls;
157		int imageheads;
158		int imagesecpt;
159		int imagesecsz;
160
161		if (sscanf(metadata.c_str(), HARD_DISK_METADATA_FORMAT, &imagecyls, &imageheads, &imagesecpt, &imagesecsz) != 4)
162		{
163		logerror("%s: Invalid CHD metadata\n", tag());
164		return IMAGE_INIT_FAIL;
165		}
166
167		if (TRACE_CONFIG) logerror("%s: CHD image has geometry cyl=%d, head=%d, sect=%d, size=%d\n", tag(), imagecyls, imageheads, imagesecpt, imagesecsz);
168
169		if (m_max_cylinders != 0 && (imagecyls != m_max_cylinders \|\| imageheads != m_max_heads))
170		{
171		throw emu_fatalerror("Image geometry does not fit this kind of hard drive: drive=(%d,%d), image=(%d,%d)", m_max_cylinders, m_max_heads, imagecyls, imageheads);
172		}
173
174		m_cache->init(chdfile, tag(), m_trackimage_size, imagecyls, imageheads, imagesecpt, m_cachelines, m_encoding, m_format);
175
176		// Head timing
177		// We assume that the real times are 80% of the max times
178		// The single-step time includes the settle time, so does the max time
179		// From that we calculate the actual cylinder-by-cylinder time and the settle time
180
181		m_actual_cylinders = m_cache->get_cylinders();
182		if (m_phys_cylinders == 0) m_phys_cylinders = m_actual_cylinders+1;
183
184		m_park_pos = m_phys_cylinders-1;
185
186		float realnext = (m_seeknext_time==0)? 10 : (m_seeknext_time * 0.8);
187		float realmax = (m_maxseek_time==0)? (m_actual_cylinders * 0.2) : (m_maxseek_time * 0.8);
188		float settle_us = ((m_actual_cylinders-1.0) * realnext - realmax) / (m_actual_cylinders-2.0) * 1000;
189		float step_us = realnext * 1000 - settle_us;
190		if (TRACE_CONFIG) logerror("%s: Calculated settle time: %0.2f ms, step: %d us\n", tag(), settle_us/1000, (int)step_us);
191
192		m_settle_time = attotime::from_usec((int)settle_us);
193		m_step_time = attotime::from_usec((int)step_us);
194
195		m_current_cylinder = m_park_pos;
196		m_interleave = m_format->get_interleave();
	122	m_cache->init(get_chd_file(), tag(), m_max_cylinder, m_max_heads, m_cachelines, m_encoding);
197	123	}
198	124	else
199	125	{
r248389	r248390
204	130
205	131	void mfm_harddisk_device::call_unload()
206	132	{
207		if (m_cache!=NULL)
208		{
209		m_cache->cleanup();
210
211		if (m_interleave != m_format->get_interleave())
212		{
213		logerror("%s: Interleave changed from %d to %d; committing to CHD\n", tag(), m_interleave, m_format->get_interleave());
214		}
215		}
216
217		// TODO: If interleave changed, commit that to CHD
	133	m_cache->cleanup();
218	134	harddisk_image_device::call_unload();
219	135	}
220	136
r248389	r248390
260	176	switch (id)
261	177	{
262	178	case INDEX_TM:
263		// Simple index hole handling. We assume that there is only a short pulse.
	179	/* Simple index hole handling. We assume that there is only a short pulse. */
264	180	m_revolution_start_time = machine().time();
265	181	if (!m_index_pulse_cb.isnull())
266	182	{
r248389	r248390
291	207	{
292	208	// Start the settle timer
293	209	m_step_phase = STEP_SETTLE;
294		m_seek_timer->adjust(~~m_se~~tt~~le_~~time);
	210	m_seek_timer->adjust(attotime::from_usec(16800));
295	211	if (TRACE_STEPS && TRACE_DETAIL) logerror("%s: Arrived at target cylinder %d, settling ...\n", tag(), m_current_cylinder);
296	212	}
297	213	break;
r248389	r248390
325	241	{
326	242	if (TRACE_STEPS) logerror("%s: Recalibrate to track 0\n", tag());
327	243	direction_in_w(CLEAR_LINE);
328		while (-m_track_delta < ~~m_phys_cylinders~~)
	244	while (-m_track_delta < 620)
329	245	{
330	246	step_w(ASSERT_LINE);
331	247	step_w(CLEAR_LINE);
r248389	r248390
338	254	if (steps < 0) steps = -steps;
339	255	if (TRACE_STEPS) logerror("%s: Moving head by %d step(s) %s\n", tag(), steps, (m_track_delta<0)? "outward" : "inward");
340	256
341		~~// We s~~i~~mulate the head moveme~~nt ~~by paus~~ing for n*st~~ep_~~time ~~with~~ ~~n being~~ the ~~cylinder delta~~
	257	int disttime = steps*200;
342	258	m_step_phase = STEP_MOVING;
343		m_seek_timer->adjust(m_step_time * steps);
344
345		if (TRACE_TIMING) logerror("%s: Head movement takes %s time\n", tag(), tts(m_step_time * steps).c_str());
	259	m_seek_timer->adjust(attotime::from_usec(disttime));
346	260	// We pretend that we already arrived
347	261	// TODO: Check auto truncation?
348	262	m_current_cylinder += m_track_delta;
349	263	if (m_current_cylinder < 0) m_current_cylinder = 0;
350		if (m_current_cylinder >= ~~m_actual_cylinders~~) m_current_cylinder = ~~m_actual_cylinders-1~~;
	264	if (m_current_cylinder > 670) m_current_cylinder = 670;
351	265	m_track_delta = 0;
352	266	}
353	267
r248389	r248390
389	303	- When the timer expires (mode=settle)
390	304	- When the counter is not zero, go to (1)
391	305	- When the counter is zero, signal seek_complete; done
	306
	307	Step timing:
	308	per track = 20 ms max, full seek: 150 ms max (615 tracks); both including settling time
	309	We assume t(1) = 17; t(615)=140
	310	t(i) = s+d*i
	311	s=(615*t(1)-t(615))/614
	312	d=t(1)-s
	313	s=16800 us, d=200 us
392	314	*/
393	315
394	316	void mfm_harddisk_device::step_w(line_state line)
r248389	r248390
406	328	// Counter will be adjusted according to the direction (+-1)
407	329	m_track_delta += (m_seek_inward)? +1 : -1;
408	330	if (TRACE_STEPS && TRACE_DETAIL) logerror("%s: Got seek pulse; track delta %d\n", tag(), m_track_delta);
409		if (m_track_delta < -~~m_phys_cylinders~~ \|\| m_track_delta > ~~m_phys_cylinders~~)
	331	if (m_track_delta < -670 \|\| m_track_delta > 670)
410	332	{
411	333	if (TRACE_STEPS) logerror("%s: Excessive step pulses - doing auto-truncation\n", tag());
412	334	m_autotruncation = true;
413	335	}
414		m_seek_timer->adjust(attotime::from_usec(250)); ~~// Start step collect timer~~
	336	m_seek_timer->adjust(attotime::from_usec(250));
415	337	}
416	338	m_step_line = line;
417	339	}
r248389	r248390
423	345	*/
424	346	bool mfm_harddisk_device::find_position(attotime &from_when, const attotime &limit, int &bytepos, int &bit)
425	347	{
426		// Frequency
427		UINT32 freq = 1000000000/m_cell_size;
428
429	348	// As we stop some few cells early each track, we adjust our position
430	349	// to the track start
431	350	if (from_when < m_revolution_start_time) from_when = m_revolution_start_time;
432	351
433	352	// Calculate the position in the track, given the from_when time and the revolution_start_time.
434		int cell = (from_when - m_revolution_start_time).as_ticks(freq);
	353	// Each cell takes 100 ns (@10 MHz)
	354	int cell = (from_when - m_revolution_start_time).as_ticks(10000000);
435	355
436		from_when += attotime::from_nsec((m_encoding==MFM_BITS)? ~~m_cell_size~~ : (16*m_cell_size));
	356	from_when += attotime::from_nsec((m_encoding==MFM_BITS)? 100 : 1600);
437	357	if (from_when > limit) return true;
438	358
439	359	bytepos = cell / 16;
440	360
441	361	// Reached the end
442		if (bytepos >= ~~m_trackimage_size~~)
	362	if (bytepos >= 10416)
443	363	{
444	364	if (TRACE_TIMING) logerror("%s: Reached end: rev_start = %s, live = %s\n", tag(), tts(m_revolution_start_time).c_str(), tts(from_when).c_str());
445	365	m_revolution_start_time += m_rev_time;
446		cell = (from_when - m_revolution_start_time).as_ticks(~~freq~~);
	366	cell = (from_when - m_revolution_start_time).as_ticks(10000000);
447	367	bytepos = cell / 16;
448	368	}
449	369
r248389	r248390
544	464
545	465	const device_type MFMHD_GENERIC = &device_creator<mfm_hd_generic_device>;
546	466
547		/*
548		Various models.
549		*/
550		mfm_hd_st213_device::mfm_hd_st213_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
551		: mfm_harddisk_device(mconfig, MFMHD_ST213, "Seagate ST-213 MFM hard disk", tag, owner, clock, "mfm_hd_st213", __FILE__)
552		{
553		m_phys_cylinders = 670;
554		m_max_cylinders = 615; // 0..614
555		m_park_pos = 620;
556		m_max_heads = 2;
557		m_seeknext_time = 20; // time for one step including settle time
558		m_maxseek_time = 150;
559		}
560
561		const device_type MFMHD_ST213 = &device_creator<mfm_hd_st213_device>;
562
563	467	mfm_hd_st225_device::mfm_hd_st225_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
564	468	: mfm_harddisk_device(mconfig, MFMHD_ST225, "Seagate ST-225 MFM hard disk", tag, owner, clock, "mfm_hd_st225", __FILE__)
565	469	{
566		m_phys_cylinders = 670;
567		m_max_cylinders = 615;
568		m_park_pos = 620;
	470	m_max_cylinder = 615;
569	471	m_max_heads = 4;
570		m_seeknext_time = 20;
571		m_maxseek_time = 150;
572	472	}
573	473
574	474	const device_type MFMHD_ST225 = &device_creator<mfm_hd_st225_device>;
575	475
576		mfm_hd_st251_device::mfm_hd_st251_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
577		: mfm_harddisk_device(mconfig, MFMHD_ST251, "Seagate ST-251 MFM hard disk", tag, owner, clock, "mfm_hd_st251", __FILE__)
578		{
579		m_phys_cylinders = 821;
580		m_max_cylinders = 820;
581		m_park_pos = 820;
582		m_max_heads = 6;
583		m_seeknext_time = 8;
584		m_maxseek_time = 70;
585		}
586
587		const device_type MFMHD_ST251 = &device_creator<mfm_hd_st251_device>;
588
589	476	// ===========================================================
590	477	// Track cache
591	478	// The cache holds track images to be read by the controller.
r248389	r248390
596	483	m_tracks(NULL)
597	484	{
598	485	m_current_crc = 0;
599		m_tracksize = 0;
600	486	}
601	487
602	488	mfmhd_trackimage_cache::~mfmhd_trackimage_cache()
r248389	r248390
621	507	{
622	508	if (current->dirty)
623	509	{
624		// write_track(m_chd, current->encdata, m_tracksize, current->cylinder, current->head);
625		m_format->save(tag(), m_chd, current->encdata, m_encoding, m_tracksize, current->cylinder, current->head, m_cylinders, m_heads, m_sectors_per_track);
626		current->dirty = false;
	510	if (TRACE_CACHE) logerror("%s: MFM HD cache: write back line c=%d h=%d\n", tag(), current->cylinder, current->head);
	511	write_back(current);
627	512	break;
628	513	}
629	514	mfmhd_trackimage* currenttmp = current->next;
r248389	r248390
640	525	while (current != NULL)
641	526	{
642	527	if (TRACE_CACHE) logerror("%s: MFM HD cache: evict line cylinder=%d head=%d\n", tag(), current->cylinder, current->head);
643		if (current->dirty)
644		{
645		// write_track(m_chd, current->encdata, m_tracksize, current->cylinder, current->head);
646		m_format->save(tag(), m_chd, current->encdata, m_encoding, m_tracksize, current->cylinder, current->head, m_cylinders, m_heads, m_sectors_per_track);
647		current->dirty = false;
648		}
	528	if (current->dirty) write_back(current);
649	529	mfmhd_trackimage* currenttmp = current->next;
650	530	current = currenttmp;
651	531	}
r248389	r248390
665	545	/*
666	546	Initialize the cache by loading the first <trackslots> tracks.
667	547	*/
668		void mfmhd_trackimage_cache::init(chd_file* chdfile, const char* dtag, int ~~tracksize, int i~~magecyl, int imageheads, int ~~imagesecp~~t~~, int t~~rackslots, mfmhd_enc_t encoding~~, mfmhd_image_format_t* format~~)
	548	void mfmhd_trackimage_cache::init(chd_file* chdfile, const char* dtag, int maxcyl, int maxhead, int trackslots, mfmhd_enc_t encoding)
669	549	{
670	550	m_encoding = encoding;
671	551	m_tagdev = dtag;
r248389	r248390
675	555	mfmhd_trackimage* previous = NULL;
676	556	mfmhd_trackimage* current = NULL;
677	557	std::string metadata;
	558	m_calc_interleave = 0;
678	559
679		m_tracksize = tracksize;
680	560	m_chd = chdfile;
681		m_format = format;
682		m_cylinders = imagecyl;
683		m_heads = imageheads;
684		m_sectors_per_track = imagesecpt;
685	561
	562	if (chdfile==NULL)
	563	{
	564	logerror("%s: chdfile is null\n", tag());
	565	return;
	566	}
	567
	568	// Read the hard disk metadata
	569	state = chdfile->read_metadata(HARD_DISK_METADATA_TAG, 0, metadata);
	570	if (state != CHDERR_NONE)
	571	{
	572	throw emu_fatalerror("Failed to read CHD metadata");
	573	}
	574
	575	// Parse the metadata
	576	if (sscanf(metadata.c_str(), HARD_DISK_METADATA_FORMAT, &m_cylinders, &m_heads, &m_sectors_per_track, &m_sectorsize) != 4)
	577	{
	578	throw emu_fatalerror("Invalid metadata");
	579	}
	580
	581	if (maxcyl != 0 && m_cylinders > maxcyl)
	582	{
	583	throw emu_fatalerror("Image geometry does not fit this kind of hard drive: drive=(%d,%d), image=(%d,%d)", maxcyl, maxhead, m_cylinders, m_heads);
	584	}
	585
686	586	// Load some tracks into the cache
687	587	int track = 0;
688	588	int head = 0;
r248389	r248390
692	592	if (TRACE_CACHE && TRACE_DETAIL) logerror("%s: MFM HD allocate cache slot\n", tag());
693	593	previous = current;
694	594	current = global_alloc(mfmhd_trackimage);
695		current->encdata = global_alloc_array(UINT16, ~~tracksize~~);
	595	current->encdata = global_alloc_array(UINT16, TRACKIMAGE_SIZE);
696	596
697	597	// Load the first tracks into the slots
698		// state = load_track(m_c~~hd, c~~urrent~~->encdata~~, ~~m_tra~~c~~ksize, c~~ylinder, head);
	598	state = load_track(current, cylinder, head, 32, 256, 4);
699	599
700		state = m_format->load(tag(), m_chd, current->encdata, m_encoding, m_tracksize, cylinder, head, m_cylinders, m_heads, m_sectors_per_track);
701
702		current->dirty = false;
703		current->cylinder = cylinder;
704		current->head = head;
705
706	600	if (state != CHDERR_NONE) throw emu_fatalerror("Cannot load (c=%d,h=%d) from hard disk", cylinder, head);
707	601
708	602	// We will read all heads per cylinder first, then go to the next cylinder.
r248389	r248390
725	619	}
726	620
727	621	/*
	622	Returns the linear sector number, given the CHS data.
	623
	624	C,H,S
	625	\| 0,0,0 \| 0,0,1 \| 0,0,2 \| ...
	626	\| 0,1,0 \| 0,1,1 \| 0,1,2 \| ...
	627	...
	628	\| 1,0,0 \| ...
	629	...
	630	*/
	631	int mfmhd_trackimage_cache::chs_to_lba(int cylinder, int head, int sector)
	632	{
	633	if ((cylinder < m_cylinders) && (head < m_heads) && (sector < m_sectors_per_track))
	634	{
	635	return (cylinder * m_heads + head) * m_sectors_per_track + sector;
	636	}
	637	else return -1;
	638	}
	639
	640	/*
	641	Calculate the ident byte from the cylinder. The specification does not
	642	define idents beyond cylinder 1023, but formatting programs seem to
	643	continue with 0xfd for cylinders between 1024 and 2047.
	644	*/
	645	UINT8 mfmhd_trackimage_cache::cylinder_to_ident(int cylinder)
	646	{
	647	if (cylinder < 256) return 0xfe;
	648	if (cylinder < 512) return 0xff;
	649	if (cylinder < 768) return 0xfc;
	650	return 0xfd;
	651	}
	652
	653
	654	/*
728	655	Delivers the track image.
729	656	First look up the track image in the cache. If not present, load it from
730	657	the CHD, convert it, and evict the least recently used line.
r248389	r248390
773	700	current = previous->next;
774	701	if (TRACE_CACHE) logerror("%s: MFM HD cache: evict line (c=%d,h=%d)\n", tag(), current->cylinder, current->head);
775	702
776		if (current->dirty)
777		{
778		// write_track(m_chd, current->encdata, m_tracksize, current->cylinder, current->head);
779		m_format->save(tag(), m_chd, current->encdata, m_encoding, m_tracksize, current->cylinder, current->head, m_cylinders, m_heads, m_sectors_per_track);
780		current->dirty = false;
781		}
782
783		// state = load_track(m_chd, current->encdata, m_tracksize, cylinder, head);
784		state = m_format->load(tag(), m_chd, current->encdata, m_encoding, m_tracksize, cylinder, head, m_cylinders, m_heads, m_sectors_per_track);
785
786		current->dirty = false;
787		current->cylinder = cylinder;
788		current->head = head;
	703	if (current->dirty) write_back(current);
	704	state = load_track(current, cylinder, head, 32, 256, 4);
789	705	}
790	706	// If we are here we have a CHD error.
791	707	return NULL;
792	708	}
793	709
794		// ================================================================
795
796		mfm_harddisk_connector::mfm_harddisk_connector(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock):
797		device_t(mconfig, MFM_HD_CONNECTOR, "MFM hard disk connector", tag, owner, clock, "mfm_hd_connector", __FILE__),
798		device_slot_interface(mconfig, *this)
	710	/*
	711	Create MFM encoding.
	712	*/
	713	void mfmhd_trackimage_cache::mfm_encode(mfmhd_trackimage* slot, int& position, UINT8 byte, int count)
799	714	{
	715	mfm_encode_mask(slot, position, byte, count, 0x00);
800	716	}
801	717
802		mfm_hard~~disk~~_c~~onn~~ec~~tor~~::~mfm_hard~~disk~~_con~~nec~~tor()
	718	void mfmhd_trackimage_cache::mfm_encode_a1(mfmhd_trackimage* slot, int& position)
803	719	{
804		}
805
806		mfm_harddisk_device* mfm_harddisk_connector::get_device()
807		{
808		return dynamic_cast<mfm_harddisk_device *>(get_card_device());
809		}
810
811		void mfm_harddisk_connector::configure(mfmhd_enc_t encoding, int spinupms, int cache, const mfmhd_format_type format)
812		{
813		m_encoding = encoding;
814		m_spinupms = spinupms;
815		m_cachesize = cache;
816		m_format = format();
817		}
818
819		void mfm_harddisk_connector::device_config_complete()
820		{
821		mfm_harddisk_device *dev = get_device();
822		if (dev != NULL)
823		{
824		dev->set_encoding(m_encoding);
825		dev->set_spinup_time(m_spinupms);
826		dev->set_cache_size(m_cachesize);
827		dev->set_format(m_format);
828		}
829		}
830
831		const device_type MFM_HD_CONNECTOR = &device_creator<mfm_harddisk_connector>;
832
833		// ================================================================
834
835		mfmhd_image_format_t::mfmhd_image_format_t()
836		{
837		};
838
839		mfmhd_image_format_t::~mfmhd_image_format_t()
840		{
841		};
842
843		void mfmhd_image_format_t::mfm_encode(UINT16* trackimage, int& position, UINT8 byte, int count)
844		{
845		mfm_encode_mask(trackimage, position, byte, count, 0x00);
846		}
847
848		void mfmhd_image_format_t::mfm_encode_a1(UINT16* trackimage, int& position)
849		{
850	720	m_current_crc = 0xffff;
851		mfm_encode_mask(t~~rackimage~~, position, 0xa1, 1, 0x04);
	721	mfm_encode_mask(slot, position, 0xa1, 1, 0x04);
852	722	// 0x443b; CRC for A1
853	723	}
854	724
855		void mfmhd_image_~~form~~a~~t_t~~::mfm_encode_mask(UINT16* trackimage, int& position, UINT8 byte, int count, int mask)
	725	void mfmhd_trackimage_cache::mfm_encode_mask(mfmhd_trackimage* slot, int& position, UINT8 byte, int count, int mask)
856	726	{
857	727	UINT16 encclock = 0;
858	728	UINT16 encdata = 0;
r248389	r248390
898	768	else
899	769	encclock <<= 8;
900	770
901		trac~~kim~~age[position++] = (encclock \| encdata);
	771	slot->encdata[position++] = (encclock \| encdata);
902	772
903	773	// When we write the byte multiple times, check whether the next encoding
904	774	// differs from the previous because of the last bit
r248389	r248390
911	781
912	782	for (int j=1; j < count; j++)
913	783	{
914		trac~~kim~~age[position++] = (encclock \| encdata);
	784	slot->encdata[position++] = (encclock \| encdata);
915	785	m_current_crc = ccitt_crc16_one(m_current_crc, byte);
916	786	}
917	787	}
918	788
919		UINT8 mfmhd_image_format_t::mfm_decode(UINT16 raw)
920		{
921		unsigned int value = 0;
922
923		for (int i=0; i < 8; i++)
924		{
925		value <<= 1;
926
927		value \|= (raw & 0x4000);
928		raw <<= 2;
929		}
930		return (value >> 14) & 0xff;
931		}
932
933	789	/*
934		For debugging. Outputs the byte array in a xxd-like way.
	790	Load a track from the CHD.
	791	TODO: Isolate the encoding into a separate format definition
935	792	*/
936		~~voi~~d mfmhd_image_~~form~~a~~t_t~~::showtrack(~~UINT16~~* enctrack, int length)
	793	chd_error mfmhd_trackimage_cache::load_track(mfmhd_trackimage* slot, int cylinder, int head, int sectorcount, int size, int interleave)
937	794	{
938		for (int i=0; i < length; i+=16)
939		{
940		logerror("%07x: ", i);
941		for (int j=0; j < 16; j++)
942		{
943		logerror("%04x ", enctrack[i+j]);
944		}
945		logerror(" ");
946		logerror("\n");
947		}
948		}
949
950		// ======================================================================
951		// TI-99-specific format
952		// ======================================================================
953
954		const mfmhd_format_type MFMHD_TI99_FORMAT = &mfmhd_image_format_creator<ti99_mfmhd_format>;
955
956		enum
957		{
958		SEARCH_A1=0,
959		FOUND_A1,
960		DAM_FOUND,
961		CHECK_CRC
962		};
963
964
965		/*
966		Calculate the ident byte from the cylinder. The specification does not
967		define idents beyond cylinder 1023, but formatting programs seem to
968		continue with 0xfd for cylinders between 1024 and 2047.
969		*/
970		UINT8 ti99_mfmhd_format::cylinder_to_ident(int cylinder)
971		{
972		if (cylinder < 256) return 0xfe;
973		if (cylinder < 512) return 0xff;
974		if (cylinder < 768) return 0xfc;
975		return 0xfd;
976		}
977
978		/*
979		Returns the linear sector number, given the CHS data.
980
981		C,H,S
982		\| 0,0,0 \| 0,0,1 \| 0,0,2 \| ...
983		\| 0,1,0 \| 0,1,1 \| 0,1,2 \| ...
984		...
985		\| 1,0,0 \| ...
986		...
987		*/
988		int ti99_mfmhd_format::chs_to_lba(int cylinder, int head, int sector)
989		{
990		if ((cylinder < m_cylinders) && (head < m_heads) && (sector < m_sectors_per_track))
991		{
992		return (cylinder * m_heads + head) * m_sectors_per_track + sector;
993		}
994		else return -1;
995		}
996
997		chd_error ti99_mfmhd_format::load(const char* tagdev, chd_file* chdfile, UINT16* trackimage, mfmhd_enc_t encoding, int tracksize, int cylinder, int head, int cylcnt, int headcnt, int sect_per_track)
998		{
999	795	chd_error state = CHDERR_NONE;
1000	796
1001		int sectorcount = 32;
1002		int size = 256;
1003		int interleave = 4;
1004
1005		m_encoding = encoding;
1006		m_cylinders = cylcnt;
1007		m_heads = headcnt;
1008		m_sectors_per_track = sect_per_track;
1009		m_tagdev = tagdev;
1010
1011	797	UINT8 sector_content[1024];
1012	798
1013	799	if (TRACE_RWTRACK) logerror("%s: MFM HD cache: load track (c=%d,h=%d) from CHD\n", tag(), cylinder, head);
r248389	r248390
1022	808	// both be set to the same number and loaded in the appropriate registers.
1023	809
1024	810	// Gap 1
1025		mfm_encode(t~~rackimage~~, position, 0x4e, 16);
	811	mfm_encode(slot, position, 0x4e, 16);
1026	812
1027	813	int sec_il_start = 0;
1028	814	int sec_number = 0;
r248389	r248390
1040	826	if (TRACE_DETAIL) logerror("%02d ", sec_number);
1041	827
1042	828	// Sync gap
1043		mfm_encode(t~~rackimage~~, position, 0x00, 13);
	829	mfm_encode(slot, position, 0x00, 13);
1044	830
1045	831	// Write IDAM
1046		mfm_encode_a1(t~~rackimage~~, position);
	832	mfm_encode_a1(slot, position);
1047	833
1048	834	// Write header
1049	835	identfield = cylinder_to_ident(cylinder);
1050	836	cylfield = cylinder & 0xff;
1051	837	headfield = ((cylinder & 0x700)>>4) \| (head&0x0f);
1052	838
1053		mfm_encode(trackimage, position, identfield);
1054		mfm_encode(trackimage, position, cylfield);
1055		mfm_encode(trackimage, position, headfield);
1056		mfm_encode(trackimage, position, sec_number);
1057		mfm_encode(trackimage, position, sizefield);
	839	mfm_encode(slot, position, identfield);
	840	mfm_encode(slot, position, cylfield);
	841	mfm_encode(slot, position, headfield);
	842	mfm_encode(slot, position, sec_number);
	843	mfm_encode(slot, position, sizefield);
1058	844	// logerror("%s: Created header (%02x,%02x,%02x,%02x)\n", tag(), identfield, cylfield, headfield, sector);
1059	845
1060	846	// Write CRC for header.
1061	847	int crc = m_current_crc;
1062		mfm_encode(trackimage, position, (crc >> 8) & 0xff);
1063		mfm_encode(trackimage, position, crc & 0xff);
	848	mfm_encode(slot, position, (crc >> 8) & 0xff);
	849	mfm_encode(slot, position, crc & 0xff);
1064	850
1065	851	// Gap 2
1066		mfm_encode(t~~rackimage~~, position, 0x4e, 3);
	852	mfm_encode(slot, position, 0x4e, 3);
1067	853
1068	854	// Sync
1069		mfm_encode(t~~rackimage~~, position, 0x00, 13);
	855	mfm_encode(slot, position, 0x00, 13);
1070	856
1071	857	// Write DAM
1072		mfm_encode_a1(trackimage, position);
1073		mfm_encode(trackimage, position, 0xfb);
	858	mfm_encode_a1(slot, position);
	859	mfm_encode(slot, position, 0xfb);
1074	860
1075	861	// Get sector content from CHD
1076	862	int lbaposition = chs_to_lba(cylinder, head, sec_number);
1077	863	if (lbaposition>=0)
1078	864	{
1079		chd_error state = chd~~file~~->read_units(lbaposition, sector_content);
	865	chd_error state = m_chd->read_units(lbaposition, sector_content);
1080	866	if (state != CHDERR_NONE) break;
1081	867	}
1082	868	else
r248389	r248390
1085	871	}
1086	872
1087	873	for (int i=0; i < size; i++)
1088		mfm_encode(t~~rackimage~~, position, sector_content[i]);
	874	mfm_encode(slot, position, sector_content[i]);
1089	875
1090	876	// Write CRC for content.
1091	877	crc = m_current_crc;
1092		mfm_encode(trackimage, position, (crc >> 8) & 0xff);
1093		mfm_encode(trackimage, position, crc & 0xff);
	878	mfm_encode(slot, position, (crc >> 8) & 0xff);
	879	mfm_encode(slot, position, crc & 0xff);
1094	880
1095	881	// Gap 3
1096		mfm_encode(trackimage, position, 0x00, 3);
1097		mfm_encode(trackimage, position, 0x4e, 19);
	882	mfm_encode(slot, position, 0x00, 3);
	883	mfm_encode(slot, position, 0x4e, 19);
1098	884
1099	885	// Calculate next sector number
1100	886	sec_number += delta;
r248389	r248390
1106	892	if (state == CHDERR_NONE)
1107	893	{
1108	894	// Fill the rest with 0x4e
1109		mfm_encode(t~~rackimage~~, position, 0x4e, ~~tracksize~~-position);
	895	mfm_encode(slot, position, 0x4e, TRACKIMAGE_SIZE-position);
1110	896	if (TRACE_IMAGE)
1111	897	{
1112		showtrack(trac~~kim~~a~~ge,~~ tra~~cksize~~);
	898	showtrack(slot->encdata, TRACKIMAGE_SIZE);
1113	899	}
1114	900	}
	901
	902	slot->dirty = false;
	903	slot->cylinder = cylinder;
	904	slot->head = head;
	905
1115	906	return state;
1116	907	}
1117	908
1118		~~chd_~~e~~rror ti99_mfmhd_format::save(co~~n~~st char* tagdev, chd_file* chdfile, UINT16* trackimage, mfmhd_enc_t encoding, int tracksize, int c~~u~~rrent_cylinder, int current_head, int cylcnt, int headcnt, int sect_per_track)~~
	909	enum
1119	910	{
1120		if (TRACE_CACHE) logerror("%s: MFM HD cache: write back (c=%d,h=%d) to CHD\n", tag(), current_cylinder, current_head);
	911	SEARCH_A1=0,
	912	FOUND_A1,
	913	DAM_FOUND,
	914	CHECK_CRC
	915	};
1121	916
	917	UINT8 mfmhd_trackimage_cache::mfm_decode(UINT16 raw)
	918	{
	919	unsigned int value = 0;
	920
	921	for (int i=0; i < 8; i++)
	922	{
	923	value <<= 1;
	924
	925	value \|= (raw & 0x4000);
	926	raw <<= 2;
	927	}
	928	return (value >> 14) & 0xff;
	929	}
	930
	931	/*
	932	TODO: The CHD/track conversion should go in a separate format definition (see floppy)
	933	(can also handle different header formats there)
	934	*/
	935	void mfmhd_trackimage_cache::write_back(mfmhd_trackimage* slot)
	936	{
	937	if (TRACE_CACHE) logerror("%s: MFM HD cache: write back (c=%d,h=%d) to CHD\n", tag(), slot->cylinder, slot->head);
	938
1122	939	UINT8 buffer[1024]; // for header or sector content
1123	940
	941	UINT16 *track = slot->encdata;
	942
1124	943	int bytepos = 0;
1125	944	int state = SEARCH_A1;
1126	945	int count = 0;
r248389	r248390
1140	959	int interleave_prec = -1;
1141	960	bool check_interleave = true;
1142	961
1143		chd_error chdstate = CHDERR_NONE;
1144
1145		m_encoding = encoding;
1146		m_cylinders = cylcnt;
1147		m_heads = headcnt;
1148		m_sectors_per_track = sect_per_track;
1149		m_tagdev = tagdev;
1150
1151	962	if (TRACE_IMAGE)
1152	963	{
1153		for (int i=0; i < ~~tracksize~~; i++)
	964	for (int i=0; i < TRACKIMAGE_SIZE; i++)
1154	965	{
1155	966	if ((i % 16)==0) logerror("\n%04x: ", i);
1156		logerror("%02x ", (m_encoding==MFM_BITS \|\| m_encoding==MFM_BYTE)? mfm_decode(track~~image~~[i]) : (track~~image~~[i]&0xff));
	967	logerror("%02x ", (m_encoding==MFM_BITS \|\| m_encoding==MFM_BYTE)? mfm_decode(track[i]) : (track[i]&0xff));
1157	968	}
1158	969	logerror("\n");
1159	970	}
1160	971
1161	972	// We have to go through the bytes of the track and save a sector as soon as one shows up
1162		while (bytepos < ~~tracksize~~)
	973	while (bytepos < TRACKIMAGE_SIZE)
1163	974	{
1164	975	switch (state)
1165	976	{
1166	977	case SEARCH_A1:
1167		if (((m_encoding==MFM_BITS \|\| m_encoding==MFM_BYTE) && trackimage[bytepos]==0x4489)
1168		\|\| (m_encoding==SEPARATED && trackimage[bytepos]==0x0aa1)
1169		\|\| (m_encoding==SEPARATED_SIMPLE && trackimage[bytepos]==0xffa1))
	978	if (((m_encoding==MFM_BITS \|\| m_encoding==MFM_BYTE) && track[bytepos]==0x4489)
	979	\|\| (m_encoding==SEPARATED && track[bytepos]==0x0aa1)
	980	\|\| (m_encoding==SEPARATED_SIMPLE && track[bytepos]==0xffa1))
1170	981	{
1171	982	state = FOUND_A1;
1172	983	count = search_header? 7 : 259;
r248389	r248390
1180	991	// read next values into array
1181	992	if (m_encoding==MFM_BITS \|\| m_encoding==MFM_BYTE)
1182	993	{
1183		byte = mfm_decode(track~~image~~[bytepos]);
	994	byte = mfm_decode(track[bytepos]);
1184	995	}
1185		else byte = (track~~image~~[bytepos] & 0xff);
	996	else byte = (track[bytepos] & 0xff);
1186	997
1187	998	crc = ccitt_crc16_one(crc, byte);
1188	999	// logerror("%s: MFM HD: Byte = %02x, CRC=%04x\n", tag(), byte, crc);
r248389	r248390
1210	1021	logerror("%s: MFM HD: Field error; ident = %02x (expected %02x) for sector chs=(%d,%d,%d)\n", tag(), ident, identexp, cylinder, head, sector);
1211	1022	}
1212	1023
1213		if (cylinder != current_cylinder)
1214		{
1215		logerror("%s: MFM HD: Sector header of sector %d defines cylinder = %02x (should be %02x)\n", tag(), sector, cylinder, current_cylinder);
1216		}
1217
1218		if (head != current_head)
1219		{
1220		logerror("%s: MFM HD: Sector header of sector %d defines head = %02x (should be %02x)\n", tag(), sector, head, current_head);
1221		}
1222
1223	1024	// Count the sectors for the interleave
1224	1025	if (check_interleave)
1225	1026	{
r248389	r248390
1244	1045	int lbaposition = chs_to_lba(cylinder, head, sector);
1245	1046	if (lbaposition>=0)
1246	1047	{
1247		if (TRACE_DETAIL) logerror("%s: MFM HD: Writing sector chs=(%d,%d,%d) to CHD\n", tag(), current_cylinder, current_head, sector);
1248		chdstate = chdfile->write_units(chs_to_lba(current_cylinder, current_head, sector), buffer);
	1048	if (TRACE_DETAIL) logerror("%s: MFM HD: Writing sector chs=(%d,%d,%d) to CHD\n", tag(), cylinder, head, sector);
	1049	chd_error state = m_chd->write_units(chs_to_lba(cylinder, head, sector), buffer);
1249	1050
1250		if (~~chd~~state != CHDERR_NONE)
	1051	if (state != CHDERR_NONE)
1251	1052	{
1252	1053	logerror("%s: MFM HD: Write error while writing sector chs=(%d,%d,%d)\n", tag(), cylinder, head, sector);
1253	1054	}
r248389	r248390
1278	1079	break;
1279	1080	}
1280	1081	}
	1082	// Clear the dirty flag
	1083	slot->dirty = false;
1281	1084
1282	1085	if (check_interleave == false)
1283	1086	{
1284	1087	// Successfully determined the interleave
1285		m_interleave = calc_interleave;
	1088	m_calc_interleave = calc_interleave;
1286	1089	}
1287	1090
1288	1091	if (TRACE_CACHE)
1289	1092	{
1290		logerror("%s: MFM HD cache: write back complete (c=%d,h=%d), interleave = %d\n", tag(), ~~curren~~t_cylinder, ~~curren~~t_head, m_interleave);
	1093	logerror("%s: MFM HD cache: write back complete (c=%d,h=%d), interleave = %d\n", tag(), slot->cylinder, slot->head, m_calc_interleave);
1291	1094	}
	1095	}
1292	1096
1293		return chdstate;
	1097	/*
	1098	For debugging. Outputs the byte array in a xxd-like way.
	1099	*/
	1100	void mfmhd_trackimage_cache::showtrack(UINT16* enctrack, int length)
	1101	{
	1102	for (int i=0; i < length; i+=16)
	1103	{
	1104	logerror("%07x: ", i);
	1105	for (int j=0; j < 16; j++)
	1106	{
	1107	logerror("%04x ", enctrack[i+j]);
	1108	}
	1109	logerror(" ");
	1110	logerror("\n");
	1111	}
1294	1112	}
	1113
	1114	// ================================================================
	1115
	1116	mfm_harddisk_connector::mfm_harddisk_connector(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock):
	1117	device_t(mconfig, MFM_HD_CONNECTOR, "MFM hard disk connector", tag, owner, clock, "mfm_hd_connector", __FILE__),
	1118	device_slot_interface(mconfig, *this)
	1119	{
	1120	}
	1121
	1122	mfm_harddisk_connector::~mfm_harddisk_connector()
	1123	{
	1124	}
	1125
	1126	mfm_harddisk_device* mfm_harddisk_connector::get_device()
	1127	{
	1128	return dynamic_cast<mfm_harddisk_device *>(get_card_device());
	1129	}
	1130
	1131	void mfm_harddisk_connector::configure(mfmhd_enc_t encoding, int spinupms, int cache)
	1132	{
	1133	m_encoding = encoding;
	1134	m_spinupms = spinupms;
	1135	m_cachesize = cache;
	1136	}
	1137
	1138	void mfm_harddisk_connector::device_config_complete()
	1139	{
	1140	mfm_harddisk_device *dev = get_device();
	1141	if (dev != NULL)
	1142	{
	1143	dev->set_encoding(m_encoding);
	1144	dev->set_spinup_time(m_spinupms);
	1145	dev->set_cache_size(m_cachesize);
	1146	}
	1147	}
	1148
	1149	const device_type MFM_HD_CONNECTOR = &device_creator<mfm_harddisk_connector>;

trunk/src/emu/machine/ti99_hd.h
r248389	r248390
29	29	SEPARATED_SIMPLE // MSB: 00/FF (standard / mark) clock, LSB: one data byte
30	30	};
31	31
32		class mfmhd_image_format_t;
33
34		// Pointer to its alloc function
35		typedef mfmhd_image_format_t (mfmhd_format_type)();
36
37		template<class _FormatClass>
38		mfmhd_image_format_t *mfmhd_image_format_creator()
39		{
40		return new _FormatClass();
41		}
42
43	32	class mfmhd_trackimage
44	33	{
45	34	public:
r248389	r248390
55	44	public:
56	45	mfmhd_trackimage_cache();
57	46	~mfmhd_trackimage_cache();
58		void init(chd_file* chdfile, const char* tag, int ~~tracksize, int i~~magecyls, int imageheads, int ~~imagesecp~~t~~, int t~~rackslots, mfmhd_enc_t encoding~~, mfmhd_image_format_t* format~~);
	47	void init(chd_file* chdfile, const char* tag, int maxcyl, int maxhead, int trackslots, mfmhd_enc_t encoding);
59	48	UINT16* get_trackimage(int cylinder, int head);
60	49	void mark_current_as_dirty();
61	50	void cleanup();
62	51	void write_back_one();
63		int get_cylinders() { return m_cylinders; }
64	52
65	53	private:
66		chd_file* m_chd;
	54	void mfm_encode(mfmhd_trackimage* slot, int& position, UINT8 byte, int count=1);
	55	void mfm_encode_a1(mfmhd_trackimage* slot, int& position);
	56	void mfm_encode_mask(mfmhd_trackimage* slot, int& position, UINT8 byte, int count, int mask);
	57	UINT8 mfm_decode(UINT16 raw);
67	58
68		const char* m_tagdev;
69		mfmhd_trackimage* m_tracks;
70		mfmhd_enc_t m_encoding;
71		mfmhd_image_format_t* m_format;
	59	chd_error load_track(mfmhd_trackimage* slot, int cylinder, int head, int sectorcount, int size, int interleave);
	60	void write_back(mfmhd_trackimage* timg);
	61	int chs_to_lba(int cylinder, int head, int sector);
	62	UINT8 cylinder_to_ident(int cylinder);
72	63
	64	chd_file* m_chd;
	65
	66	const char* m_tagdev;
	67	mfmhd_trackimage* m_tracks;
	68	mfmhd_enc_t m_encoding;
73	69	bool m_lastbit;
74	70	int m_current_crc;
75	71	int m_cylinders;
76	72	int m_heads;
77	73	int m_sectors_per_track;
78	74	int m_sectorsize;
79		int m_tracksize;
80	75
	76	int m_calc_interleave;
81	77	void showtrack(UINT16* enctrack, int length);
82	78	const char* tag() { return m_tagdev; }
83	79	};
r248389	r248390
101	97	void set_encoding(mfmhd_enc_t encoding) { m_encoding = encoding; }
102	98	void set_spinup_time(int spinupms) { m_spinupms = spinupms; }
103	99	void set_cache_size(int tracks) { m_cachelines = tracks; }
104		void set_format(mfmhd_image_format_t* format) { m_format = format; }
105	100
106	101	mfmhd_enc_t get_encoding() { return m_encoding; }
107	102
r248389	r248390
145	140	ready_cb m_ready_cb;
146	141	seek_complete_cb m_seek_complete_cb;
147	142
148		int m_max_cylinders;
149		int m_phys_cylinders;
150		int m_actual_cylinders; // after reading the CHD
151		int m_max_heads;
152		int m_park_pos;
153		int m_maxseek_time;
154		int m_seeknext_time;
	143	int m_max_cylinder;
	144	int m_max_heads;
155	145
156	146	private:
157	147	mfmhd_enc_t m_encoding;
158		int m_cell_size; // nanoseconds
159		int m_trackimage_size; // number of 16-bit cell blocks (data bytes)
160	148	int m_spinupms;
161		int m_rpm;
162		int m_interleave;
163	149	int m_cachelines;
164	150	bool m_ready;
165	151	int m_current_cylinder;
r248389	r248390
168	154	int m_step_phase;
169	155	bool m_seek_complete;
170	156	bool m_seek_inward;
	157	//bool m_seeking;
171	158	bool m_autotruncation;
172	159	bool m_recalibrated;
173	160	line_state m_step_line; // keep the last state
r248389	r248390
176	163	attotime m_revolution_start_time;
177	164	attotime m_rev_time;
178	165
179		attotime m_settle_time;
180		attotime m_step_time;
181
182	166	mfmhd_trackimage_cache* m_cache;
183		mfmhd_image_format_t* m_format;
184	167
185	168	void prepare_track(int cylinder, int head);
186	169	void head_move();
187	170	void recalibrate();
188	171	};
189	172
190		/*
191		The Generic drive is a MFM drive that has just enough heads and cylinders
192		to handle the CHD image.
193
194		Specific Seagate models:
195
196		ST-213: 10 MB
197		ST-225: 20 MB
198		ST-251: 40 MB
199		*/
200	173	class mfm_hd_generic_device : public mfm_harddisk_device
201	174	{
202	175	public:
r248389	r248390
205	178
206	179	extern const device_type MFMHD_GENERIC;
207	180
208		class mfm_hd_st213_device : public mfm_harddisk_device
209		{
210		public:
211		mfm_hd_st213_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
212		};
213
214		extern const device_type MFMHD_ST213;
215
216	181	class mfm_hd_st225_device : public mfm_harddisk_device
217	182	{
218	183	public:
r248389	r248390
221	186
222	187	extern const device_type MFMHD_ST225;
223	188
224		class mfm_hd_st251_device : public mfm_harddisk_device
225		{
226		public:
227		mfm_hd_st251_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
228		};
229
230		extern const device_type MFMHD_ST251;
231
232
233	189	/* Connector for a MFM hard disk. See also floppy.c */
234	190	class mfm_harddisk_connector : public device_t,
235	191	public device_slot_interface
r248389	r248390
240	196
241	197	mfm_harddisk_device *get_device();
242	198
243		void configure(mfmhd_enc_t encoding, int spinupms, int cache~~, mfmhd_format_type format~~);
	199	void configure(mfmhd_enc_t encoding, int spinupms, int cache);
244	200
245	201	protected:
246	202	void device_start() { };
r248389	r248390
250	206	mfmhd_enc_t m_encoding;
251	207	int m_spinupms;
252	208	int m_cachesize;
253		mfmhd_image_format_t* m_format;
254	209	};
255	210
256	211	extern const device_type MFM_HD_CONNECTOR;
r248389	r248390
267	222	emulate this, so we allow for shorter times)
268	223	_cache = number of cached MFM tracks
269	224	*/
270		#define MCFG_MFM_HARDDISK_CONN_ADD(_tag, _slot_intf, _def_slot, _enc, _spinupms, _cache~~, _format~~) \
	225	#define MCFG_MFM_HARDDISK_CONN_ADD(_tag, _slot_intf, _def_slot, _enc, _spinupms, _cache) \
271	226	MCFG_DEVICE_ADD(_tag, MFM_HD_CONNECTOR, 0) \
272	227	MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
273		static_cast<mfm_harddisk_connector *>(device)->configure(_enc, _spinupms, _cache~~, _format~~);
	228	static_cast<mfm_harddisk_connector *>(device)->configure(_enc, _spinupms, _cache);
274	229
275
276		/*
277		Hard disk format
278		*/
279		class mfmhd_image_format_t
280		{
281		public:
282		mfmhd_image_format_t();
283		virtual ~mfmhd_image_format_t();
284
285		// Load the image.
286		virtual chd_error load(const char* tagdev, chd_file* chdfile, UINT16* trackimage, mfmhd_enc_t encoding, int tracksize, int cylinder, int head, int cylcnt, int headcnt, int sect_per_track) = 0;
287
288		// Save the image.
289		virtual chd_error save(const char* tagdev, chd_file* chdfile, UINT16* trackimage, mfmhd_enc_t encoding, int tracksize, int cylinder, int head, int cylcnt, int headcnt, int sect_per_track) = 0;
290
291		// Return the recent interleave of the image
292		int get_interleave() { return m_interleave; }
293
294		protected:
295		bool m_lastbit;
296		int m_current_crc;
297		mfmhd_enc_t m_encoding;
298		const char* m_tagdev;
299		int m_cylinders;
300		int m_heads;
301		int m_sectors_per_track;
302		int m_interleave;
303
304		void mfm_encode(UINT16* trackimage, int& position, UINT8 byte, int count=1);
305		void mfm_encode_a1(UINT16* trackimage, int& position);
306		void mfm_encode_mask(UINT16* trackimage, int& position, UINT8 byte, int count, int mask);
307		UINT8 mfm_decode(UINT16 raw);
308		const char* tag() { return m_tagdev; }
309		void showtrack(UINT16* enctrack, int length);
310		};
311
312		class ti99_mfmhd_format : public mfmhd_image_format_t
313		{
314		public:
315		ti99_mfmhd_format() {};
316		chd_error load(const char* tagdev, chd_file* chdfile, UINT16* trackimage, mfmhd_enc_t encoding, int tracksize, int cylinder, int head, int cylcnt, int headcnt, int sect_per_track);
317		chd_error save(const char* tagdev, chd_file* chdfile, UINT16* trackimage, mfmhd_enc_t encoding, int tracksize, int cylinder, int head, int cylcnt, int headcnt, int sect_per_track);
318		private:
319		UINT8 cylinder_to_ident(int cylinder);
320		int chs_to_lba(int cylinder, int head, int sector);
321		};
322
323		extern const mfmhd_format_type MFMHD_TI99_FORMAT;
324
325	230	#endif

trunk/src/emu/machine/tms6100.c
r248389	r248390
136	136	save_item(NAME(m_m0));
137	137	save_item(NAME(m_m1));
138	138	save_item(NAME(m_state));
139		//save_item(NAME(m_variant));
140		//tms6100_set_variant(tms, TMS6110_IS_TMS6100);
141	139
142	140	}
143	141
144	142	void m58819_device::device_start()
145	143	{
	144	//tms5110_set_variant(tms, TMS5110_IS_5100);
146	145	tms6100_device::device_start();
147		//tms6100_set_variant(tms, TMS6110_IS_M58819);
148	146	}
149	147
150	148	//-------------------------------------------------
r248389	r248390
199	197	else
200	198	{
201	199	/* read bit at address */
202		/* if (m_variant == TMS6110_IS_M58819)
203		{
204		m_data = (m_rom[m_address >> 3] >> (7-(m_address & 0x07))) & 1;
205		}
206		else // m_variant == (TMS6110_IS_TMS6100 \|\| TMS6110_IS_TMS6125)
207		{
208		*/
209	200	m_data = (m_rom[m_address >> 3] >> (m_address & 0x07)) & 1;
210		/* } */
211	201	m_address++;
212	202	}
213	203	m_state &= ~TMS6100_READ_PENDING;

trunk/src/emu/machine/tms6100.h
r248389	r248390
37	37	UINT8 m_tms_clock;
38	38	UINT8 m_data;
39	39	UINT8 m_state;
40		//UINT8 m_variant;
41	40
42	41	};
43	42

trunk/src/emu/netlist/analog/nld_bjt.c
r248389	r248390
55	55
56	56	NETLIB_START(Q)
57	57	{
58		register_param("~~MODEL~~", m_model, "");
	58	register_param("model", m_model, "");
59	59	}
60	60
61	61	NETLIB_RESET(Q)

trunk/src/emu/netlist/analog/nld_bjt.h
r248389	r248390
11	11	#include "../nl_base.h"
12	12	#include "nld_twoterm.h"
13	13
14		// -----------------------------------------------------------------------------
	14	// ----------------------------------------------------------------------------------------
15	15	// Macros
16		// -----------------------------------------------------------------------------
	16	// ----------------------------------------------------------------------------------------
17	17
18		#define QBJT_SW(_name, _model) \
19		NET_REGISTER_DEV(QBJT_SW, _name) \
20		NETDEV_PARAMI(_name, MODEL, _model)
	18	#define QBJT_SW(_name, _model) \
	19	NET_REGISTER_DEV(QBJT_switch, _name) \
	20	NETDEV_PARAMI(_name, model, _model)
21	21
22		#define QBJT_EB(_name, _model) \
23		NET_REGISTER_DEV(QBJT_EB, _name) \
24		NETDEV_PARAMI(_name, MODEL, _model)
	22	#define QBJT_EB(_name, _model) \
	23	NET_REGISTER_DEV(QBJT_EB, _name) \
	24	NETDEV_PARAMI(_name, model, _model)
25	25
26	26
27	27	NETLIB_NAMESPACE_DEVICES_START()
28	28
29		// -----------------------------------------------------------------------------
	29	// ----------------------------------------------------------------------------------------
30	30	// nld_Q - Base classes
31		// -----------------------------------------------------------------------------
	31	// ----------------------------------------------------------------------------------------
32	32
33	33	// Have a common start for transistors
34	34
r248389	r248390
73	73
74	74
75	75
76		// -----------------------------------------------------------------------------
	76	// ----------------------------------------------------------------------------------------
77	77	// nld_QBJT_switch
78		// -----------------------------------------------------------------------------
	78	// ----------------------------------------------------------------------------------------
79	79
80	80
81	81	/*
r248389	r248390
126	126	private:
127	127	};
128	128
129		// -----------------------------------------------------------------------------
	129	// ----------------------------------------------------------------------------------------
130	130	// nld_QBJT_EB
131		// -----------------------------------------------------------------------------
	131	// ----------------------------------------------------------------------------------------
132	132
133	133
134	134	class NETLIB_NAME(QBJT_EB) : public NETLIB_NAME(QBJT)

trunk/src/emu/netlist/analog/nld_opamps.c
r248389	r248390
64	64	register_output("VH", m_VH);
65	65	register_output("VREF", m_VREF);
66	66
67		register_param("~~MODEL~~", m_model, "");
	67	register_param("model", m_model, "");
68	68
69	69	m_type = m_model.model_value("TYPE");
70	70

trunk/src/emu/netlist/analog/nld_opamps.h
r248389	r248390
21	21
22	22	#define OPAMP(_name, _model) \
23	23	NET_REGISTER_DEV(OPAMP, _name) \
24		NETDEV_PARAMI(_name, ~~MODEL~~, _model)
	24	NETDEV_PARAMI(_name, model, _model)
25	25
26	26	#define LM3900(_name) \
27	27	SUBMODEL(opamp_lm3900, _name)

trunk/src/emu/netlist/analog/nld_switches.h
r248389	r248390
18	18	// ----------------------------------------------------------------------------------------
19	19
20	20	#define SWITCH(_name) \
21		NET_REGISTER_DEV(~~SWITCH~~, _name)
	21	NET_REGISTER_DEV(switch1, _name)
22	22
23	23	#define SWITCH2(_name) \
24		NET_REGISTER_DEV(~~SWITCH~~2, _name)
	24	NET_REGISTER_DEV(switch2, _name)
25	25
26	26	// ----------------------------------------------------------------------------------------
27	27	// Devices ...

trunk/src/emu/netlist/analog/nld_twoterm.c
r248389	r248390
264	264	{
265	265	register_terminal("A", m_P);
266	266	register_terminal("K", m_N);
267		register_param("~~MODEL~~", m_model, "");
	267	register_param("model", m_model, "");
268	268
269	269	m_D.save("m_D", *this);
270	270

trunk/src/emu/netlist/analog/nld_twoterm.h
r248389	r248390
24	24	* +-----T-----+
25	25	* (l)
26	26	*
27		* This is a resistance in series to a voltage source and paralleled by a
28		* current source. This is suitable to model voltage sources, current sources,
29		* resistors, capacitors, inductances and diodes.
	27	* This is a resistance in series to a voltage source and paralleled by a current source.
	28	* This is suitable to model voltage sources, current sources, resistors, capacitors,
	29	* inductances and diodes.
30	30	*
31	31	*/
32	32
r248389	r248390
35	35
36	36	#include "../nl_base.h"
37	37
38		// -----------------------------------------------------------------------------
	38	// ----------------------------------------------------------------------------------------
39	39	// Macros
40		// -----------------------------------------------------------------------------
	40	// ----------------------------------------------------------------------------------------
41	41
42	42	#define RES(_name, _R) \
43		NET_REGISTER_DEV(RES, _name) \
	43	NET_REGISTER_DEV(R, _name) \
44	44	NETDEV_PARAMI(_name, R, _R)
45	45
46	46	#define POT(_name, _R) \
r248389	r248390
54	54
55	55
56	56	#define CAP(_name, _C) \
57		NET_REGISTER_DEV(CAP, _name) \
	57	NET_REGISTER_DEV(C, _name) \
58	58	NETDEV_PARAMI(_name, C, _C)
59	59
60	60	/* Generic Diode */
61	61	#define DIODE(_name, _model) \
62		NET_REGISTER_DEV(DIODE, _name) \
63		NETDEV_PARAMI(_name, MODEL, _model)
	62	NET_REGISTER_DEV(D, _name) \
	63	NETDEV_PARAMI(_name, model, _model)
64	64
65	65	#define VS(_name, _V) \
66	66	NET_REGISTER_DEV(VS, _name) \
r248389	r248390
70	70	NET_REGISTER_DEV(CS, _name) \
71	71	NETDEV_PARAMI(_name, I, _I)
72	72
73		// -----------------------------------------------------------------------------
	73	// ----------------------------------------------------------------------------------------
74	74	// Generic macros
75		// -----------------------------------------------------------------------------
	75	// ----------------------------------------------------------------------------------------
76	76
77	77
78	78	#ifdef RES_R
r248389	r248390
90	90	#define IND_N(ind) ((double)(ind) * 1e-9)
91	91	#define IND_P(ind) ((double)(ind) * 1e-12)
92	92
93		// -----------------------------------------------------------------------------
	93	// ----------------------------------------------------------------------------------------
94	94	// Implementation
95		// -----------------------------------------------------------------------------
	95	// ----------------------------------------------------------------------------------------
96	96
97	97	NETLIB_NAMESPACE_DEVICES_START()
98	98
99		// -----------------------------------------------------------------------------
	99	// ----------------------------------------------------------------------------------------
100	100	// nld_twoterm
101		// -----------------------------------------------------------------------------
	101	// ----------------------------------------------------------------------------------------
102	102
103	103	class NETLIB_NAME(twoterm) : public device_t
104	104	{
r248389	r248390
140	140	private:
141	141	};
142	142
143		// -----------------------------------------------------------------------------
	143	// ----------------------------------------------------------------------------------------
144	144	// nld_R
145		// -----------------------------------------------------------------------------
	145	// ----------------------------------------------------------------------------------------
146	146
147	147	class NETLIB_NAME(R_base) : public NETLIB_NAME(twoterm)
148	148	{
r248389	r248390
164	164	param_double_t m_R;
165	165	);
166	166
167		// -----------------------------------------------------------------------------
	167	// ----------------------------------------------------------------------------------------
168	168	// nld_POT
169		// -----------------------------------------------------------------------------
	169	// ----------------------------------------------------------------------------------------
170	170
171	171	NETLIB_DEVICE_WITH_PARAMS(POT,
172	172	NETLIB_NAME(R_base) m_R1;
r248389	r248390
187	187	);
188	188
189	189
190		// -----------------------------------------------------------------------------
	190	// ----------------------------------------------------------------------------------------
191	191	// nld_C
192		// -----------------------------------------------------------------------------
	192	// ----------------------------------------------------------------------------------------
193	193
194	194	class NETLIB_NAME(C) : public NETLIB_NAME(twoterm)
195	195	{
r248389	r248390
212	212	};
213	213
214	214
215		// -----------------------------------------------------------------------------
	215	// ----------------------------------------------------------------------------------------
216	216	// A generic diode model to be used in other devices (Diode, BJT ...)
217		// -----------------------------------------------------------------------------
	217	// ----------------------------------------------------------------------------------------
218	218
219	219	class generic_diode
220	220	{
r248389	r248390
285	285	nl_double m_Vcrit;
286	286	};
287	287
288		// -----------------------------------------------------------------------------
	288	// ----------------------------------------------------------------------------------------
289	289	// nld_D
290		// -----------------------------------------------------------------------------
	290	// ----------------------------------------------------------------------------------------
291	291
292	292	class NETLIB_NAME(D) : public NETLIB_NAME(twoterm)
293	293	{
r248389	r248390
306	306	generic_diode m_D;
307	307	};
308	308
309		// -----------------------------------------------------------------------------
	309	// ----------------------------------------------------------------------------------------
310	310	// nld_VS - Voltage source
311	311	//
312	312	// netlist voltage source must have inner resistance
313		// -----------------------------------------------------------------------------
	313	// ----------------------------------------------------------------------------------------
314	314
315	315	class NETLIB_NAME(VS) : public NETLIB_NAME(twoterm)
316	316	{
r248389	r248390
326	326	param_double_t m_V;
327	327	};
328	328
329		// -----------------------------------------------------------------------------
	329	// ----------------------------------------------------------------------------------------
330	330	// nld_CS - Current source
331		// -----------------------------------------------------------------------------
	331	// ----------------------------------------------------------------------------------------
332	332
333	333	class NETLIB_NAME(CS) : public NETLIB_NAME(twoterm)
334	334	{

trunk/src/emu/netlist/devices/net_lib.c
r248389	r248390
59	59	ENTRY(POT, POT, "R")
60	60	ENTRY(POT2, POT2, "R")
61	61	ENTRY(C, CAP, "C")
62		ENTRY(D, DIODE, "~~MODEL~~")
	62	ENTRY(D, DIODE, "model")
63	63	ENTRY(VCVS, VCVS, "-")
64	64	ENTRY(VCCS, VCCS, "-")
65	65	ENTRY(CCCS, CCCS, "-")
66	66	ENTRY(LVCCS, LVCCS, "-")
67	67	ENTRY(VS, VS, "V")
68	68	ENTRY(CS, CS, "I")
69		ENTRY(OPAMP, OPAMP, "~~MODEL~~")
	69	ENTRY(OPAMP, OPAMP, "model")
70	70	ENTRY(dummy_input, DUMMY_INPUT, "-")
71	71	ENTRY(frontier, FRONTIER_DEV, "+I,G,Q") // not intended to be used directly
72	72	ENTRY(function, AFUNC, "N,FUNC") // only for macro devices - NO FEEDBACK loops
73		ENTRY(QBJT_EB, QBJT_EB, "MODEL")
74		ENTRY(QBJT_switch, QBJT_SW, "MODEL")
	73	ENTRY(QBJT_EB, QBJT_EB, "model")
	74	ENTRY(QBJT_switch, QBJT_SW, "model")
75	75	ENTRY(logic_input, TTL_INPUT, "IN")
76	76	ENTRY(logic_input, LOGIC_INPUT, "IN,FAMILY")
77	77	ENTRY(analog_input, ANALOG_INPUT, "IN")

trunk/src/emu/netlist/devices/net_lib.h
r248389	r248390
56	56
57	57	#include "nld_log.h"
58	58
59		#include "../macro/nlm_cd4xxx.h"
60		#include "../macro/nlm_ttl74xx.h"
61		#include "../macro/nlm_opamp.h"
62
63	59	#include "../analog/nld_bjt.h"
64	60	#include "../analog/nld_fourterm.h"
65	61	#include "../analog/nld_switches.h"
66	62	#include "../analog/nld_twoterm.h"
67	63	#include "../analog/nld_opamps.h"
	64	#include "../macro/nlm_cd4xxx.h"
	65	#include "../macro/nlm_ttl74xx.h"
68	66	#include "../solver/nld_solver.h"
69	67
70	68	#include "nld_legacy.h"

trunk/src/emu/netlist/devices/nld_4020.h
r248389	r248390
32	32
33	33	/* FIXME: only used in mario.c */
34	34	#define CD4020_WI(_name, _IP, _RESET, _VDD, _VSS) \
35		NET_REGISTER_DEV(CD4020~~_WI~~, _name) \
	35	NET_REGISTER_DEV(CD4020, _name) \
36	36	NET_CONNECT(_name, IP, _IP) \
37	37	NET_CONNECT(_name, RESET, _RESET) \
38	38	NET_CONNECT(_name, VDD, _VDD) \

trunk/src/emu/netlist/devices/nld_7400.h
r248389	r248390
36	36	#include "nld_truthtable.h"
37	37
38	38	#define TTL_7400_NAND(_name, _A, _B) \
39		NET_REGISTER_DEV(~~TTL_~~7400~~_NAND~~, _name) \
	39	NET_REGISTER_DEV(7400, _name) \
40	40	NET_CONNECT(_name, A, _A) \
41	41	NET_CONNECT(_name, B, _B)
42	42
43	43	#define TTL_7400_DIP(_name) \
44		NET_REGISTER_DEV(~~TTL_~~7400_~~DIP~~, _name)
	44	NET_REGISTER_DEV(7400_dip, _name)
45	45
46	46	NETLIB_NAMESPACE_DEVICES_START()
47	47

trunk/src/emu/netlist/devices/nld_7402.h
r248389	r248390
36	36	#include "nld_truthtable.h"
37	37
38	38	#define TTL_7402_NOR(_name, _I1, _I2) \
39		NET_REGISTER_DEV(~~TTL_~~7402~~_NOR~~, _name) \
	39	NET_REGISTER_DEV(7402, _name) \
40	40	NET_CONNECT(_name, A, _I1) \
41	41	NET_CONNECT(_name, B, _I2)
42	42
43	43	#define TTL_7402_DIP(_name) \
44		NET_REGISTER_DEV(~~TTL_~~7402_~~DIP~~, _name)
	44	NET_REGISTER_DEV(7402_dip, _name)
45	45
46	46
47	47	NETLIB_NAMESPACE_DEVICES_START()

trunk/src/emu/netlist/devices/nld_7404.h
r248389	r248390
34	34	#include "nld_truthtable.h"
35	35
36	36	#define TTL_7404_INVERT(_name, _A) \
37		NET_REGISTER_DEV(~~TTL_~~7404~~_INVERT~~, _name) \
	37	NET_REGISTER_DEV(7404, _name) \
38	38	NET_CONNECT(_name, A, _A)
39	39
40	40	#define TTL_7404_DIP(_name) \
41		NET_REGISTER_DEV(~~TTL_~~7404_~~DIP~~, _name)
	41	NET_REGISTER_DEV(7404_dip, _name)
42	42
43	43	NETLIB_NAMESPACE_DEVICES_START()
44	44

trunk/src/emu/netlist/devices/nld_7408.h
r248389	r248390
36	36	#include "nld_truthtable.h"
37	37
38	38	#define TTL_7408_AND(_name, _A, _B) \
39		NET_REGISTER_DEV(~~TTL_~~7408~~_AND~~, _name) \
	39	NET_REGISTER_DEV(7408, _name) \
40	40	NET_CONNECT(_name, A, _A) \
41	41	NET_CONNECT(_name, B, _B)
42	42
43	43	#define TTL_7408_DIP(_name) \
44		NET_REGISTER_DEV(~~TTL_~~7408_~~DIP~~, _name)
	44	NET_REGISTER_DEV(7408_dip, _name)
45	45
46	46	NETLIB_NAMESPACE_DEVICES_START()
47	47

trunk/src/emu/netlist/devices/nld_7410.h
r248389	r248390
36	36	#include "nld_truthtable.h"
37	37
38	38	#define TTL_7410_NAND(_name, _I1, _I2, _I3) \
39		NET_REGISTER_DEV(~~TTL_~~7410~~_NAND~~, _name) \
	39	NET_REGISTER_DEV(7410, _name) \
40	40	NET_CONNECT(_name, A, _I1) \
41	41	NET_CONNECT(_name, B, _I2) \
42	42	NET_CONNECT(_name, C, _I3)
43	43
44	44	#define TTL_7410_DIP(_name) \
45		NET_REGISTER_DEV(~~TTL_~~7410_~~DIP~~, _name)
	45	NET_REGISTER_DEV(7410_dip, _name)
46	46
47	47	NETLIB_NAMESPACE_DEVICES_START()
48	48

trunk/src/emu/netlist/devices/nld_74107.h
r248389	r248390
62	62	#include "../nl_base.h"
63	63
64	64	#define TTL_74107A(_name, _CLK, _J, _K, _CLRQ) \
65		NET_REGISTER_DEV(~~TTL_~~74107A, _name) \
	65	NET_REGISTER_DEV(74107A, _name) \
66	66	NET_CONNECT(_name, CLK, _CLK) \
67	67	NET_CONNECT(_name, J, _J) \
68	68	NET_CONNECT(_name, K, _K) \
r248389	r248390
72	72	TTL_74107A(_name, _CLK, _J, _K, _CLRQ)
73	73
74	74	#define TTL_74107_DIP(_name) \
75		NET_REGISTER_DEV(~~TTL_~~74107_~~DIP~~, _name)
	75	NET_REGISTER_DEV(74107_dip, _name)
76	76
77	77	NETLIB_NAMESPACE_DEVICES_START()
78	78

trunk/src/emu/netlist/devices/nld_7411.h
r248389	r248390
36	36	#include "nld_truthtable.h"
37	37
38	38	#define TTL_7411_AND(_name, _I1, _I2, _I3) \
39		NET_REGISTER_DEV(~~TTL_~~7411~~_AND~~, _name) \
	39	NET_REGISTER_DEV(7411, _name) \
40	40	NET_CONNECT(_name, A, _I1) \
41	41	NET_CONNECT(_name, B, _I2) \
42	42	NET_CONNECT(_name, C, _I3)
43	43
44	44	#define TTL_7411_DIP(_name) \
45		NET_REGISTER_DEV(~~TTL_~~7411_~~DIP~~, _name)
	45	NET_REGISTER_DEV(7411_dip, _name)
46	46
47	47	NETLIB_NAMESPACE_DEVICES_START()
48	48

trunk/src/emu/netlist/devices/nld_74123.h
r248389	r248390
54	54	#include "../analog/nld_twoterm.h"
55	55
56	56	#define TTL_74123(_name) \
57		NET_REGISTER_DEV(~~TTL_~~74123, _name)
	57	NET_REGISTER_DEV(74123, _name)
58	58
59	59	NETLIB_NAMESPACE_DEVICES_START()
60	60
r248389	r248390
85	85	);
86	86
87	87	#define TTL_74123_DIP(_name) \
88		NET_REGISTER_DEV(~~TTL_~~74123_~~DIP~~, _name)
	88	NET_REGISTER_DEV(74123_dip, _name)
89	89
90	90	NETLIB_DEVICE(74123_dip,
91	91
r248389	r248390
99	99	*/
100	100
101	101	#define TTL_9602_DIP(_name) \
102		NET_REGISTER_DEV(~~TTL_~~9602_~~DIP~~, _name)
	102	NET_REGISTER_DEV(9602_dip, _name)
103	103
104	104	NETLIB_DEVICE(9602_dip,
105	105
r248389	r248390
113	113	*/
114	114
115	115	#define CD4538_DIP(_name) \
116		NET_REGISTER_DEV(CD4538_~~DIP~~, _name)
	116	NET_REGISTER_DEV(4538_dip, _name)
117	117
118	118	NETLIB_DEVICE(4538_dip,
119	119	NETLIB_LOGIC_FAMILY(CD4XXX)

trunk/src/emu/netlist/devices/nld_74153.h
r248389	r248390
48	48	#include "../nl_base.h"
49	49
50	50	#define TTL_74153(_name, _C0, _C1, _C2, _C3, _A, _B, _G) \
51		NET_REGISTER_DEV(~~TTL_~~74153, _name) \
	51	NET_REGISTER_DEV(74153, _name) \
52	52	NET_CONNECT(_name, C0, _C0) \
53	53	NET_CONNECT(_name, C1, _C1) \
54	54	NET_CONNECT(_name, C2, _C2) \
r248389	r248390
58	58	NET_CONNECT(_name, G, _G)
59	59
60	60	#define TTL_74153_DIP(_name) \
61		NET_REGISTER_DEV(~~TTL_~~74153_~~DIP~~, _name)
	61	NET_REGISTER_DEV(74153_dip, _name)
62	62
63	63	NETLIB_NAMESPACE_DEVICES_START()
64	64

trunk/src/emu/netlist/devices/nld_74175.h
r248389	r248390
39	39	#include "nld_signal.h"
40	40
41	41	#define TTL_74175(_name) \
42		NET_REGISTER_DEV(~~TTL_~~74175, _name)
	42	NET_REGISTER_DEV(74175, _name)
43	43	#define TTL_74175_DIP(_name) \
44		NET_REGISTER_DEV(~~TTL_~~74175_~~DIP~~, _name)
	44	NET_REGISTER_DEV(74175_dip, _name)
45	45
46	46	NETLIB_NAMESPACE_DEVICES_START()
47	47

trunk/src/emu/netlist/devices/nld_74192.h
r248389	r248390
33	33	#include "nld_9316.h"
34	34
35	35	#define TTL_74192(_name) \
36		NET_REGISTER_DEV(~~TTL_~~74192, _name)
	36	NET_REGISTER_DEV(74192, _name)
37	37
38	38	#define TTL_74192_DIP(_name) \
39		NET_REGISTER_DEV(~~TTL_~~74192_~~DIP~~, _name)
	39	NET_REGISTER_DEV(74192_dip, _name)
40	40
41	41	NETLIB_NAMESPACE_DEVICES_START()
42	42

trunk/src/emu/netlist/devices/nld_74193.h
r248389	r248390
29	29	#include "../nl_base.h"
30	30
31	31	#define TTL_74193(_name) \
32		NET_REGISTER_DEV(~~TTL_~~74193, _name)
	32	NET_REGISTER_DEV(74193, _name)
33	33
34	34	#define TTL_74193_DIP(_name) \
35		NET_REGISTER_DEV(~~TTL_~~74193_~~DIP~~, _name)
	35	NET_REGISTER_DEV(74193_dip, _name)
36	36
37	37	NETLIB_NAMESPACE_DEVICES_START()
38	38

trunk/src/emu/netlist/devices/nld_7420.h
r248389	r248390
37	37	#include "nld_truthtable.h"
38	38
39	39	#define TTL_7420_NAND(_name, _I1, _I2, _I3, _I4) \
40		NET_REGISTER_DEV(~~TTL_~~7420~~_NAND~~, _name) \
	40	NET_REGISTER_DEV(7420, _name) \
41	41	NET_CONNECT(_name, A, _I1) \
42	42	NET_CONNECT(_name, B, _I2) \
43	43	NET_CONNECT(_name, C, _I3) \
r248389	r248390
45	45
46	46
47	47	#define TTL_7420_DIP(_name) \
48		NET_REGISTER_DEV(~~TTL_~~7420_~~DIP~~, _name)
	48	NET_REGISTER_DEV(7420_dip, _name)
49	49
50	50	NETLIB_NAMESPACE_DEVICES_START()
51	51

trunk/src/emu/netlist/devices/nld_7425.h
r248389	r248390
39	39	#include "nld_signal.h"
40	40
41	41	#define TTL_7425_NOR(_name, _I1, _I2, _I3, _I4) \
42		NET_REGISTER_DEV(~~TTL_~~7425~~_NOR~~, _name) \
	42	NET_REGISTER_DEV(7425, _name) \
43	43	NET_CONNECT(_name, A, _I1) \
44	44	NET_CONNECT(_name, B, _I2) \
45	45	NET_CONNECT(_name, C, _I3) \
46	46	NET_CONNECT(_name, D, _I4)
47	47
48	48	#define TTL_7425_DIP(_name) \
49		NET_REGISTER_DEV(~~TTL_~~7425_~~DIP~~, _name)
	49	NET_REGISTER_DEV(7425_dip, _name)
50	50
51	51	NETLIB_NAMESPACE_DEVICES_START()
52	52

trunk/src/emu/netlist/devices/nld_7427.h
r248389	r248390
36	36	#include "nld_truthtable.h"
37	37
38	38	#define TTL_7427_NOR(_name, _I1, _I2, _I3) \
39		NET_REGISTER_DEV(~~TTL_~~7427~~_NOR~~, _name) \
	39	NET_REGISTER_DEV(7427, _name) \
40	40	NET_CONNECT(_name, A, _I1) \
41	41	NET_CONNECT(_name, B, _I2) \
42	42	NET_CONNECT(_name, C, _I3)
43	43
44	44	#define TTL_7427_DIP(_name) \
45		NET_REGISTER_DEV(~~TTL_~~7427_~~DIP~~, _name)
	45	NET_REGISTER_DEV(7427_dip, _name)
46	46
47	47	NETLIB_NAMESPACE_DEVICES_START()
48	48

trunk/src/emu/netlist/devices/nld_74279.h
r248389	r248390
39	39	#include "nld_truthtable.h"
40	40
41	41	#define TTL_74279_DIP(_name) \
42		NET_REGISTER_DEV(~~TTL_~~74279_~~DIP~~, _name)
	42	NET_REGISTER_DEV(74279_dip, _name)
43	43
44	44	NETLIB_NAMESPACE_DEVICES_START()
45	45

trunk/src/emu/netlist/devices/nld_7430.h
r248389	r248390
41	41	#include "nld_truthtable.h"
42	42
43	43	#define TTL_7430_NAND(_name, _I1, _I2, _I3, _I4, _I5, _I6, _I7, _I8) \
44		NET_REGISTER_DEV(~~TTL_~~7430~~_NAND~~, _name) \
	44	NET_REGISTER_DEV(7430, _name) \
45	45	NET_CONNECT(_name, A, _I1) \
46	46	NET_CONNECT(_name, B, _I2) \
47	47	NET_CONNECT(_name, C, _I3) \
r248389	r248390
53	53
54	54
55	55	#define TTL_7430_DIP(_name) \
56		NET_REGISTER_DEV(~~TTL_~~7430_~~DIP~~, _name)
	56	NET_REGISTER_DEV(7430_dip, _name)
57	57
58	58	NETLIB_NAMESPACE_DEVICES_START()
59	59

trunk/src/emu/netlist/devices/nld_7432.h
r248389	r248390
35	35	#include "nld_signal.h"
36	36	#include "nld_truthtable.h"
37	37
38		#define TTL_7432_OR(_name, _I1, _I2) \
39		NET_REGISTER_DEV(TTL_7432_OR, _name) \
40		NET_CONNECT(_name, A, _I1) \
	38	#define TTL_7432_OR(_name, _I1, _I2) \
	39	NET_REGISTER_DEV(7432, _name) \
	40	NET_CONNECT(_name, A, _I1) \
41	41	NET_CONNECT(_name, B, _I2)
42	42
43		#define TTL_7432_DIP(_name) \
44		NET_REGISTER_DEV(TTL_7432_DIP, _name)
	43	#define TTL_7432_DIP(_name) \
	44	NET_REGISTER_DEV(7432_dip, _name)
45	45
46	46	NETLIB_NAMESPACE_DEVICES_START()
47	47

trunk/src/emu/netlist/devices/nld_7437.h
r248389	r248390
39	39	#include "nld_truthtable.h"
40	40
41	41	#define TTL_7437_NAND(_name, _A, _B) \
42		NET_REGISTER_DEV(~~TTL_~~7437~~_NAND~~, _name) \
	42	NET_REGISTER_DEV(7437, _name) \
43	43	NET_CONNECT(_name, A, _A) \
44	44	NET_CONNECT(_name, B, _B)
45	45
46	46	#define TTL_7437_DIP(_name) \
47		NET_REGISTER_DEV(~~TTL_~~7437_~~DIP~~, _name)
	47	NET_REGISTER_DEV(7437_dip, _name)
48	48
49	49	NETLIB_NAMESPACE_DEVICES_START()
50	50

trunk/src/emu/netlist/devices/nld_7448.h
r248389	r248390
27	27	#include "../nl_base.h"
28	28
29	29	#define TTL_7448(_name, _A0, _A1, _A2, _A3, _LTQ, _BIQ, _RBIQ) \
30		NET_REGISTER_DEV(~~TTL_~~7448, _name) \
	30	NET_REGISTER_DEV(7448, _name) \
31	31	NET_CONNECT(_name, A, _A0) \
32	32	NET_CONNECT(_name, B, _A1) \
33	33	NET_CONNECT(_name, C, _A2) \
r248389	r248390
37	37	NET_CONNECT(_name, RBIQ, _RBIQ)
38	38
39	39	#define TTL_7448_DIP(_name) \
40		NET_REGISTER_DEV(~~TTL_~~7448_~~DIP~~, _name)
	40	NET_REGISTER_DEV(7448_dip, _name)
41	41
42	42	/*
43	43	* FIXME: Using truthtable is a lot slower than the explicit device

trunk/src/emu/netlist/devices/nld_7450.h
r248389	r248390
27	27	#include "nld_signal.h"
28	28
29	29	#define TTL_7450_ANDORINVERT(_name, _I1, _I2, _I3, _I4) \
30		NET_REGISTER_DEV(~~TTL_~~7450~~_ANDORINVERT~~, _name) \
	30	NET_REGISTER_DEV(7450, _name) \
31	31	NET_CONNECT(_name, A, _I1) \
32	32	NET_CONNECT(_name, B, _I2) \
33	33	NET_CONNECT(_name, C, _I3) \
34	34	NET_CONNECT(_name, D, _I4)
35	35
36	36	#define TTL_7450_DIP(_name) \
37		NET_REGISTER_DEV(~~TTL_~~7450_~~DIP~~, _name)
	37	NET_REGISTER_DEV(7450_dip, _name)
38	38
39	39	NETLIB_NAMESPACE_DEVICES_START()
40	40

trunk/src/emu/netlist/devices/nld_7474.h
r248389	r248390
45	45	#include "nld_signal.h"
46	46
47	47	#define TTL_7474(_name, _CLK, _D, _CLRQ, _PREQ) \
48		NET_REGISTER_DEV(~~TTL_~~7474, _name) \
	48	NET_REGISTER_DEV(7474, _name) \
49	49	NET_CONNECT(_name, CLK, _CLK) \
50	50	NET_CONNECT(_name, D, _D) \
51	51	NET_CONNECT(_name, CLRQ, _CLRQ) \
52	52	NET_CONNECT(_name, PREQ, _PREQ)
53	53
54	54	#define TTL_7474_DIP(_name) \
55		NET_REGISTER_DEV(~~TTL_~~7474_~~DIP~~, _name)
	55	NET_REGISTER_DEV(7474_dip, _name)
56	56
57	57	NETLIB_NAMESPACE_DEVICES_START()
58	58

trunk/src/emu/netlist/devices/nld_7483.h
r248389	r248390
30	30	#include "../nl_base.h"
31	31
32	32	#define TTL_7483(_name, _A1, _A2, _A3, _A4, _B1, _B2, _B3, _B4, _CI) \
33		NET_REGISTER_DEV(~~TTL_~~7483, _name) \
	33	NET_REGISTER_DEV(7483, _name) \
34	34	NET_CONNECT(_name, A1, _A1) \
35	35	NET_CONNECT(_name, A2, _A2) \
36	36	NET_CONNECT(_name, A3, _A3) \
r248389	r248390
42	42	NET_CONNECT(_name, C0, _CI)
43	43
44	44	#define TTL_7483_DIP(_name) \
45		NET_REGISTER_DEV(~~TTL_~~7483_~~DIP~~, _name)
	45	NET_REGISTER_DEV(7483_dip, _name)
46	46
47	47	NETLIB_NAMESPACE_DEVICES_START()
48	48

trunk/src/emu/netlist/devices/nld_7486.h
r248389	r248390
36	36	#include "nld_truthtable.h"
37	37
38	38	#define TTL_7486_XOR(_name, _A, _B) \
39		NET_REGISTER_DEV(~~TTL_~~7486~~_XOR~~, _name) \
	39	NET_REGISTER_DEV(7486, _name) \
40	40	NET_CONNECT(_name, A, _A) \
41	41	NET_CONNECT(_name, B, _B)
42	42
43	43
44	44	#define TTL_7486_DIP(_name) \
45		NET_REGISTER_DEV(~~TTL_~~7486_~~DIP~~, _name)
	45	NET_REGISTER_DEV(7486_dip, _name)
46	46
47	47	NETLIB_NAMESPACE_DEVICES_START()
48	48

trunk/src/emu/netlist/devices/nld_7490.h
r248389	r248390
58	58	#include "../nl_base.h"
59	59
60	60	#define TTL_7490(_name, _A, _B, _R1, _R2, _R91, _R92) \
61		NET_REGISTER_DEV(~~TTL_~~7490, _name) \
	61	NET_REGISTER_DEV(7490, _name) \
62	62	NET_CONNECT(_name, A, _A) \
63	63	NET_CONNECT(_name, B, _B) \
64	64	NET_CONNECT(_name, R1, _R1) \
r248389	r248390
67	67	NET_CONNECT(_name, R92, _R92)
68	68
69	69	#define TTL_7490_DIP(_name) \
70		NET_REGISTER_DEV(~~TTL_~~7490_~~DIP~~, _name)
	70	NET_REGISTER_DEV(7490_dip, _name)
71	71
72	72	NETLIB_NAMESPACE_DEVICES_START()
73	73

trunk/src/emu/netlist/devices/nld_7493.h
r248389	r248390
60	60	#include "../nl_base.h"
61	61
62	62	#define TTL_7493(_name, _CLKA, _CLKB, _R1, _R2) \
63		NET_REGISTER_DEV(~~TTL_~~7493, _name) \
	63	NET_REGISTER_DEV(7493, _name) \
64	64	NET_CONNECT(_name, CLKA, _CLKA) \
65	65	NET_CONNECT(_name, CLKB, _CLKB) \
66	66	NET_CONNECT(_name, R1, _R1) \
67	67	NET_CONNECT(_name, R2, _R2)
68	68
69	69	#define TTL_7493_DIP(_name) \
70		NET_REGISTER_DEV(~~TTL_~~7493_~~DIP~~, _name)
	70	NET_REGISTER_DEV(7493_dip, _name)
71	71
72	72	NETLIB_NAMESPACE_DEVICES_START()
73	73

trunk/src/emu/netlist/devices/nld_74ls629.h
r248389	r248390
60	60	);
61	61
62	62	#define SN74LS629_DIP(_name, _cap1, _cap2) \
63		NET_REGISTER_DEV(SN74LS629_~~DIP~~, _name) \
	63	NET_REGISTER_DEV(SN74LS629_dip, _name) \
64	64	NETDEV_PARAMI(_name, 1.CAP, _cap1) \
65	65	NETDEV_PARAMI(_name, 2.CAP, _cap2)
66	66

trunk/src/emu/netlist/devices/nld_82S16.h
r248389	r248390
27	27	#include "../nl_base.h"
28	28
29	29	#define TTL_82S16(_name) \
30		NET_REGISTER_DEV(~~TTL_~~82S16, _name)
	30	NET_REGISTER_DEV(82S16, _name)
31	31	#define TTL_82S16_DIP(_name) \
32		NET_REGISTER_DEV(~~TTL_~~82S16_~~DIP~~, _name)
	32	NET_REGISTER_DEV(82S16_dip, _name)
33	33
34	34	NETLIB_NAMESPACE_DEVICES_START()
35	35

trunk/src/emu/netlist/devices/nld_9310.h
r248389	r248390
48	48	#include "../nl_base.h"
49	49
50	50	#define TTL_9310(_name, _CLK, _ENP, _ENT, _CLRQ, _LOADQ, _A, _B, _C, _D) \
51		NET_REGISTER_DEV(~~TTL_~~9310, _name) \
	51	NET_REGISTER_DEV(9310, _name) \
52	52	NET_CONNECT(_name, CLK, _CLK) \
53	53	NET_CONNECT(_name, ENP, _ENP) \
54	54	NET_CONNECT(_name, ENT, _ENT) \
r248389	r248390
60	60	NET_CONNECT(_name, D, _D)
61	61
62	62	#define TTL_9310_DIP(_name) \
63		NET_REGISTER_DEV(~~TTL_~~9310_~~DIP~~, _name)
	63	NET_REGISTER_DEV(9310_dip, _name)
64	64
65	65	NETLIB_NAMESPACE_DEVICES_START()
66	66

trunk/src/emu/netlist/devices/nld_9312.h
r248389	r248390
41	41	#include "nld_truthtable.h"
42	42
43	43	#define TTL_9312(_name) \
44		NET_REGISTER_DEV(~~TTL_~~9312, _name)
	44	NET_REGISTER_DEV(9312, _name)
45	45
46	46	#define TTL_9312_DIP(_name) \
47		NET_REGISTER_DEV(~~TTL_~~9312_~~DIP~~, _name)
	47	NET_REGISTER_DEV(9312_dip, _name)
48	48
49	49	NETLIB_NAMESPACE_DEVICES_START()
50	50

trunk/src/emu/netlist/devices/nld_9316.h
r248389	r248390
52	52	#include "../nl_base.h"
53	53
54	54	#define TTL_9316(_name, _CLK, _ENP, _ENT, _CLRQ, _LOADQ, _A, _B, _C, _D) \
55		NET_REGISTER_DEV(~~TTL_~~9316, _name) \
	55	NET_REGISTER_DEV(9316, _name) \
56	56	NET_CONNECT(_name, CLK, _CLK) \
57	57	NET_CONNECT(_name, ENP, _ENP) \
58	58	NET_CONNECT(_name, ENT, _ENT) \
r248389	r248390
64	64	NET_CONNECT(_name, D, _D)
65	65
66	66	#define TTL_9316_DIP(_name) \
67		NET_REGISTER_DEV(~~TTL_~~9316_~~DIP~~, _name)
	67	NET_REGISTER_DEV(9316_dip, _name)
68	68
69	69	NETLIB_NAMESPACE_DEVICES_START()
70	70

trunk/src/emu/netlist/devices/nld_legacy.h
r248389	r248390
22	22	// ----------------------------------------------------------------------------------------
23	23
24	24	#define NETDEV_RSFF(_name) \
25		NET_REGISTER_DEV(~~NETDEV_~~RSFF, _name)
	25	NET_REGISTER_DEV(nicRSFF, _name)
26	26
27	27	#define NETDEV_DELAY(_name) \
28		NET_REGISTER_DEV(~~NET~~D~~EV_DELAY~~, _name)
	28	NET_REGISTER_DEV(nicDelay, _name)
29	29
30	30	// ----------------------------------------------------------------------------------------
31	31	// Devices ...

trunk/src/emu/netlist/devices/nld_log.h
r248389	r248390
21	21	#include "../nl_base.h"
22	22
23	23	#define LOG(_name, _I) \
24		NET_REGISTER_DEV(~~ÖPG~~, _name) \
	24	NET_REGISTER_DEV(log, _name) \
25	25	NET_CONNECT(_name, I, _I)
26	26
27	27	NETLIB_NAMESPACE_DEVICES_START()
r248389	r248390
34	34	);
35	35
36	36	#define LOGD(_name, _I, _I2) \
37		NET_REGISTER_DEV(~~LOG~~D, _name) \
	37	NET_REGISTER_DEV(logD, _name) \
38	38	NET_CONNECT(_name, I, _I) \
39	39	NET_CONNECT(_name, I2, _I2)
40	40

trunk/src/emu/netlist/devices/nld_mm5837.h
r248389	r248390
23	23	#include "../analog/nld_twoterm.h"
24	24
25	25	#define MM5837_DIP(_name) \
26		NET_REGISTER_DEV(MM5837~~_DIP~~, _name)
	26	NET_REGISTER_DEV(MM5837, _name)
27	27
28	28	NETLIB_NAMESPACE_DEVICES_START()
29	29

trunk/src/emu/netlist/devices/nld_ne555.h
r248389	r248390
46	46	);
47	47
48	48	#define NE555_DIP(_name) \
49		NET_REGISTER_DEV(NE555_~~DIP~~, _name)
	49	NET_REGISTER_DEV(NE555_dip, _name)
50	50
51	51	NETLIB_DEVICE_DERIVED_PURE(NE555_dip, NE555);
52	52

trunk/src/emu/netlist/devices/nld_r2r_dac.h
r248389	r248390
50	50	#include "../analog/nld_twoterm.h"
51	51
52	52	#define R2R_DAC(_name, _VIN, _R, _N) \
53		NET_REGISTER_DEV(R2R_~~DAC~~, _name) \
	53	NET_REGISTER_DEV(r2r_dac, _name) \
54	54	NETDEV_PARAMI(_name, VIN, _VIN) \
55	55	NETDEV_PARAMI(_name, R, _R) \
56	56	NETDEV_PARAMI(_name, N, _N)

trunk/src/emu/netlist/devices/nld_system.h
r248389	r248390
19	19	// -----------------------------------------------------------------------------
20	20
21	21	#define TTL_INPUT(_name, _v) \
22		NET_REGISTER_DEV(~~TTL~~_~~INPUT~~, _name) \
	22	NET_REGISTER_DEV(logic_input, _name) \
23	23	PARAM(_name.IN, _v)
24	24
25	25	#define LOGIC_INPUT(_name, _v, _family) \
26		NET_REGISTER_DEV(~~LOGIC~~_~~INPUT~~, _name) \
	26	NET_REGISTER_DEV(logic_input, _name) \
27	27	PARAM(_name.IN, _v) \
28	28	PARAM(_name.FAMILY, _family)
29	29
30	30	#define ANALOG_INPUT(_name, _v) \
31		NET_REGISTER_DEV(~~ANALOG~~_~~INPUT~~, _name) \
	31	NET_REGISTER_DEV(analog_input, _name) \
32	32	PARAM(_name.IN, _v)
33	33
34	34	#define MAINCLOCK(_name, _freq) \
35		NET_REGISTER_DEV(~~MAINCLOCK~~, _name) \
	35	NET_REGISTER_DEV(mainclock, _name) \
36	36	PARAM(_name.FREQ, _freq)
37	37
38	38	#define CLOCK(_name, _freq) \
39		NET_REGISTER_DEV(~~CLOCK~~, _name) \
	39	NET_REGISTER_DEV(clock, _name) \
40	40	PARAM(_name.FREQ, _freq)
41	41
42	42	#define EXTCLOCK(_name, _freq, _pattern) \
43		NET_REGISTER_DEV(~~EXTCLOCK~~, _name) \
	43	NET_REGISTER_DEV(extclock, _name) \
44	44	PARAM(_name.FREQ, _freq) \
45	45	PARAM(_name.PATTERN, _pattern)
46	46
47	47	#define GNDA() \
48		NET_REGISTER_DEV(~~GNDA~~, GND)
	48	NET_REGISTER_DEV(gnd, GND)
49	49
50	50	#define DUMMY_INPUT(_name) \
51		NET_REGISTER_DEV(~~DUMMY~~_~~INPUT~~, _name)
	51	NET_REGISTER_DEV(dummy_input, _name)
52	52
53	53	//FIXME: Usage discouraged, use OPTIMIZE_FRONTIER instead
54	54	#define FRONTIER_DEV(_name, _IN, _G, _OUT) \
55		NET_REGISTER_DEV(~~FRONTIER_DEV~~, _name) \
	55	NET_REGISTER_DEV(frontier, _name) \
56	56	NET_C(_IN, _name.I) \
57	57	NET_C(_G, _name.G) \
58	58	NET_C(_OUT, _name.Q)
r248389	r248390
61	61	setup.register_frontier(# _attach, _r_in, _r_out);
62	62
63	63	#define RES_SWITCH(_name, _IN, _P1, _P2) \
64		NET_REGISTER_DEV(~~RES~~_~~SWITCH~~, _name) \
	64	NET_REGISTER_DEV(res_sw, _name) \
65	65	NET_C(_IN, _name.I) \
66	66	NET_C(_P1, _name.1) \
67	67	NET_C(_P2, _name.2)
68	68
69	69	/* Default device to hold netlist parameters */
70	70	#define PARAMETERS(_name) \
71		NET_REGISTER_DEV(~~PARAMETERS~~, _name)
	71	NET_REGISTER_DEV(netlistparams, _name)
72	72
73	73	#define AFUNC(_name, _N, _F) \
74		NET_REGISTER_DEV(~~AFUNC~~, _name) \
	74	NET_REGISTER_DEV(function, _name) \
75	75	PARAM(_name.N, _N) \
76	76	PARAM(_name.FUNC, _F)
77	77
r248389	r248390
294	294	SUB,
295	295	DIV,
296	296	PUSH_CONST,
297		PUSH_INPUT
	297	PUSH_INPUT,
298	298	};
299	299
300	300	struct rpn_inst

trunk/src/emu/netlist/macro/nlm_cd4xxx.h
r248389	r248390
3	3
4	4	#include "../nl_setup.h"
5	5
6		/*
7		* Devices:
8		*
9		* CD4001_NOR : single gate
10		* CD4001_DIP : dip package
11		* CD4020_DIP : dip package (device model in core)
12		* CD4016_DIP : dip package (device model in core)
13		* CD4066_DIP : dip package (device model in core)
14		*
15		*/
16
17	6	#ifndef __PLIB_PREPROCESSOR__
18	7
19	8	/* ----------------------------------------------------------------------------
r248389	r248390
21	10	* ---------------------------------------------------------------------------*/
22	11
23	12	#define CD4001_NOR(_name) \
24		NET_REGISTER_DEV(CD4001_NOR, _name)
	13	NET_REGISTER_DEV_X(CD4001_NOR, _name)
25	14
26	15	#define CD4001_DIP(_name) \
27		NET_REGISTER_DEV(CD4001_DIP, _name)
	16	NET_REGISTER_DEV_X(CD4001_DIP, _name)
28	17
29	18	/* ----------------------------------------------------------------------------
30	19	* DIP only macros
31	20	* ---------------------------------------------------------------------------*/
32	21
33	22	#define CD4020_DIP(_name) \
34		NET_REGISTER_DEV(CD4020_DIP, _name)
	23	NET_REGISTER_DEV_X(CD4020_DIP, _name)
35	24
36	25	#define CD4066_DIP(_name) \
37		NET_REGISTER_DEV(CD4066_DIP, _name)
	26	NET_REGISTER_DEV_X(CD4066_DIP, _name)
38	27
39	28	#define CD4016_DIP(_name) \
40		NET_REGISTER_DEV(CD4016_DIP, _name)
	29	NET_REGISTER_DEV_X(CD4016_DIP, _name)
41	30
42	31	/* ----------------------------------------------------------------------------
43	32	* External declarations

trunk/src/emu/netlist/macro/nlm_opamp.c
r248389	r248390
1
2		#include "nlm_opamp.h"
3
4		#include "analog/nld_opamps.h"
5		#include "devices/nld_system.h"
6
7		/*
8		* Generic layout with 4 opamps, VCC on pint 4 and GND on pin 11
9		*/
10
11		NETLIST_START(opamp_layout_4_4_11)
12		DIPPINS( /* +--------------+ */
13		A.OUT, /* \|1 ++ 14\| */ D.OUT,
14		A.MINUS, /* \|2 13\| */ D.MINUS,
15		A.PLUS, /* \|3 12\| */ D.PLUS,
16		A.VCC, /* \|4 11\| */ A.GND,
17		B.PLUS, /* \|5 10\| */ C.PLUS,
18		B.MINUS, /* \|6 9\| */ C.MINUS,
19		B.OUT, /* \|7 8\| */ C.OUT
20		/* +--------------+ */
21		)
22		NET_C(A.GND, B.GND, C.GND, D.GND)
23		NET_C(A.VCC, B.VCC, C.VCC, D.VCC)
24		NETLIST_END()
25
26		NETLIST_START(MB3614_DIP)
27		/* The opamp actually has an FPF of about 500k. This doesn't work here and causes oscillations.
28		* FPF here therefore about half the Solver clock.
29		*/
30		OPAMP(A, "MB3614")
31		OPAMP(B, "MB3614")
32		OPAMP(C, "MB3614")
33		OPAMP(D, "MB3614")
34
35		INCLUDE(opamp_layout_4_4_11)
36
37		NETLIST_END()
38
39		NETLIST_START(OPAMP_lib)
40		LOCAL_LIB_ENTRY(opamp_layout_4_4_11)
41
42		NET_MODEL(".model MB3614 OPAMP(TYPE=3 VLH=2.0 VLL=0.2 FPF=5 UGF=500k SLEW=0.6M RI=1000k RO=50 DAB=0.002)")
43		NET_MODEL(".model MB3614_SLOW OPAMP(TYPE=3 VLH=2.0 VLL=0.2 FPF=5 UGF=11k SLEW=0.6M RI=1000k RO=50 DAB=0.002)")
44		LOCAL_LIB_ENTRY(MB3614_DIP)
45
46
47		NETLIST_END()

trunk/src/emu/netlist/macro/nlm_opamp.h
r248389	r248390
1		#ifndef NLM_OPAMP_H_
2		#define NLM_OPAMP_H_
3
4		#include "../nl_setup.h"
5
6		#ifndef __PLIB_PREPROCESSOR__
7
8		/* ----------------------------------------------------------------------------
9		* Netlist Macros
10		* ---------------------------------------------------------------------------*/
11
12		#define MB3614_DIP(_name) \
13		NET_REGISTER_DEV(MB3614_DIP, _name)
14
15		/* ----------------------------------------------------------------------------
16		* External declarations
17		* ---------------------------------------------------------------------------*/
18
19		NETLIST_EXTERNAL(OPAMP_lib)
20
21		#endif
22
23		#endif

trunk/src/emu/netlist/macro/nlm_ttl74xx.h
r248389	r248390
10	10	* ---------------------------------------------------------------------------*/
11	11
12	12	#define TTL_7416_GATE(_name) \
13		NET_REGISTER_DEV(TTL_7416_GATE, _name)
	13	NET_REGISTER_DEV_X(TTL_7416_GATE, _name)
14	14
15	15	#define TTL_7416_DIP(_name) \
16		NET_REGISTER_DEV(TTL7416_DIP, _name)
	16	NET_REGISTER_DEV_X(TTL7416_DIP, _name)
17	17
18	18	/* ----------------------------------------------------------------------------
19	19	* External declarations

trunk/src/emu/netlist/nl_dice_compat.h
r248389	r248390
40	40	*/
41	41
42	42	#ifndef NL_CONVERT_CPP
43		#ifndef NETLIST_DEVELOPMENT
44		#define NETLIST_DEVELOPMENT 0
45		#endif
46		#if (NETLIST_DEVELOPMENT)
	43	#ifdef NETLIST_DEVELOPMENT
47	44	#define CHIP(_n, _t) setup.register_dev( palloc(netlist::devices::nld_ ## _t ## _dip), _n);
48	45	#else
49		#define CHIP(_n, _t) setup.register_dev(NETLIB_NAME_STR_S(TTL_ ## _t ## _DIP), _n);
50		//#define CHIP(_n, _t) TTL_ ## _t ## _DIP(_n)
	46	#define CHIP(_n, _t) setup.register_dev(NETLIB_NAME_STR(_t ## _dip), _n);
51	47	#endif
52	48
53	49	#define CONNECTION( ... ) CONNECTIONY( CONNECTIONX( __VA_ARGS__ ) )
r248389	r248390
118	114	#define CIRCUIT_LAYOUT_END NETLIST_END()
119	115
120	116	#define CHIP_555_Mono(_name, _pdesc) \
121		~~NE555_D~~IP(_name) \
	117	CHIP(# _name, NE555) \
122	118	NET_C(_name.6, _name.7) \
123	119	RES(_name ## _R, (_pdesc)->r) \
124	120	CAP(_name ## _C, (_pdesc)->c) \
r248389	r248390
130	126	NET_CSTR(# _name ".1", "GND")
131	127
132	128	#define CHIP_555_Astable(_name, _pdesc) \
133		~~NE555_D~~IP(_name) \
	129	CHIP(# _name, NE555) \
134	130	RES(_name ## _R1, (_pdesc)->r1) \
135	131	RES(_name ## _R2, (_pdesc)->r2) \
136	132	CAP(_name ## _C, (_pdesc)->c) \

trunk/src/emu/netlist/nl_factory.c
r248389	r248390
34	34	}
35	35
36	36
37		factory_list_t::factory_list_t( setup_t &setup)
38		: m_setup(setup)
	37	factory_list_t::factory_list_t()
39	38	{
40	39	}
41	40
42	41	factory_list_t::~factory_list_t()
43	42	{
44		for (std::size_t i=0; i < size(); i++)
	43	for (std::size_t i=0; i < m_list.size(); i++)
45	44	{
46		base_factory_t *p = ~~value~~_at(i);
	45	base_factory_t *p = m_list[i];
47	46	pfree(p);
48	47	}
49		clear();
	48	m_list.clear();
50	49	}
51	50
52		#if 0
53	51	device_t *factory_list_t::new_device_by_classname(const pstring &classname) const
54	52	{
55	53	for (std::size_t i=0; i < m_list.size(); i++)
r248389	r248390
64	62	}
65	63	return NULL; // appease code analysis
66	64	}
67		#endif
68	65
69		void factory_list_t::e~~rror~~(const pstring &s)
	66	device_t *factory_list_t::new_device_by_name(const pstring &name, setup_t &setup) const
70	67	{
71		m_setup.netlist().error("%s", s.cstr());
72		}
73
74		device_t *factory_list_t::new_device_by_name(const pstring &name)
75		{
76		base_factory_t *f = factory_by_name(name);
	68	base_factory_t *f = factory_by_name(name, setup);
77	69	return f->Create();
78	70	}
79	71
80		base_factory_t * factory_list_t::factory_by_name(const pstring &name)
	72	base_factory_t * factory_list_t::factory_by_name(const pstring &name, setup_t &setup) const
81	73	{
82		if (contains(name))
83		return (*this)[name];
84		else
	74	for (std::size_t i=0; i < m_list.size(); i++)
85	75	{
86		m_setup.netlist().error("Class %s not found!\n", name.cstr());
87		return NULL; // appease code analysis
	76	base_factory_t *p = m_list[i];
	77	if (p->name() == name)
	78	{
	79	return p;
	80	}
	81	p++;
88	82	}
	83	setup.netlist().error("Class %s not found!\n", name.cstr());
	84	return NULL; // appease code analysis
89	85	}
90	86
91	87	}

trunk/src/emu/netlist/nl_factory.h
r248389	r248390
62	62	}
63	63	};
64	64
65		class factory_list_t ~~: public phashmap_t<pstring, base_factory_t *>~~
	65	class factory_list_t
66	66	{
67	67	public:
68		factory_list_t(setup_t &m_setup);
	68	typedef plist_t<base_factory_t *> list_t;
	69
	70	factory_list_t();
69	71	~factory_list_t();
70	72
71	73	template<class _C>
72	74	ATTR_COLD void register_device(const pstring &name, const pstring &classname,
73	75	const pstring &def_param)
74	76	{
75		if (!add(name, palloc(factory_t< _C >(name, classname, def_param))))
76		error(pstring::sprintf("factory already contains %s", name.cstr()));
	77	m_list.add(palloc(factory_t< _C >(name, classname, def_param)));
77	78	}
78	79
79	80	ATTR_COLD void register_device(base_factory_t *factory)
80	81	{
81		if (!add(factory->name(), factory))
82		error(pstring::sprintf("factory already contains %s", factory->name().cstr()));
	82	m_list.add(factory);
83	83	}
84	84
85		//ATTR_COLD device_t *new_device_by_classname(const pstring &classname) const;
86		ATTR_COLD device_t *new_device_by_name(const pstring &name);
87		ATTR_COLD base_factory_t * factory_by_name(const pstring &name);
	85	ATTR_COLD device_t *new_device_by_classname(const pstring &classname) const;
	86	ATTR_COLD device_t *new_device_by_name(const pstring &name, setup_t &setup) const;
	87	ATTR_COLD base_factory_t * factory_by_name(const pstring &name, setup_t &setup) const;
88	88
	89	const list_t &list() { return m_list; }
	90
89	91	private:
90		voi~~d error(con~~st pst~~ring~~ &s);
	92	list_t m_list;
91	93
92		setup_t &m_setup;
93	94	};
94	95
95	96	}

trunk/src/emu/netlist/nl_parser.c
r248389	r248390
360	360	}
361	361	else
362	362	{
363		base_factory_t *f = m_setup.factory().factory_by_name(dev_type);
	363	base_factory_t *f = m_setup.factory().factory_by_name(dev_type, m_setup);
364	364	device_t *dev;
365	365	pstring_list_t termlist = f->term_param_list();
366	366	pstring_list_t def_params = f->def_params();

trunk/src/emu/netlist/nl_setup.c
r248389	r248390
21	21	static NETLIST_START(base)
22	22	TTL_INPUT(ttlhigh, 1)
23	23	TTL_INPUT(ttllow, 0)
24		NET_REGISTER_DEV(GND, GND)
25		NET_REGISTER_DEV(PARAMETER, NETLIST)
	24	NET_REGISTER_DEV(gnd, GND)
	25	NET_REGISTER_DEV(netlistparams, NETLIST)
26	26
27	27	LOCAL_SOURCE(diode_models)
28	28	LOCAL_SOURCE(bjt_models)
29	29	LOCAL_SOURCE(family_models)
30	30	LOCAL_SOURCE(TTL74XX_lib)
31	31	LOCAL_SOURCE(CD4XXX_lib)
32		LOCAL_SOURCE(OPAMP_lib)
33	32
	33
34	34	INCLUDE(diode_models);
35	35	INCLUDE(bjt_models);
36	36	INCLUDE(family_models);
37	37	INCLUDE(TTL74XX_lib);
38	38	INCLUDE(CD4XXX_lib);
39		INCLUDE(OPAMP_lib);
40	39
41	40	NETLIST_END()
42	41
r248389	r248390
52	51	, m_proxy_cnt(0)
53	52	{
54	53	netlist->set_setup(this);
55		m_factory = palloc(factory_list_t~~(*this)~~);
	54	m_factory = palloc(factory_list_t);
56	55	}
57	56
58	57	void setup_t::init()
r248389	r248390
129	128	}
130	129	else
131	130	{
132		device_t *dev = factory().new_device_by_name(classname);
133		//device_t *dev = factory().new_device_by_classname(classname);
	131	device_t *dev = factory().new_device_by_classname(classname);
134	132	if (dev == NULL)
135	133	netlist().error("Class %s not found!\n", classname.cstr());
136	134	return register_dev(dev, name);
137	135	}
138	136	}
139	137
	138	void setup_t::remove_dev(const pstring &name)
	139	{
	140	device_t *dev = netlist().m_devices.find_by_name(name);
	141	pstring temp = name + ".";
	142	if (dev == NULL)
	143	netlist().error("Device %s does not exist\n", name.cstr());
	144
	145	remove_start_with<tagmap_terminal_t>(m_terminals, temp);
	146	remove_start_with<tagmap_param_t>(m_params, temp);
	147
	148	const link_t *p = m_links.data();
	149	while (p != NULL)
	150	{
	151	const link_t *n = p+1;
	152	if (temp.equals(p->e1.substr(0,temp.len())) \|\| temp.equals(p->e2.substr(0,temp.len())))
	153	m_links.remove(*p);
	154	p = n;
	155	}
	156	netlist().m_devices.remove_by_name(name);
	157	}
	158
140	159	void setup_t::register_model(const pstring &model)
141	160	{
142	161	m_models.add(model);
r248389	r248390
144	163
145	164	void setup_t::register_alias_nofqn(const pstring &alias, const pstring &out)
146	165	{
147		if (!m_alias.add(alias, out))
	166	if (!(m_alias.add(link_t(alias, out), false)==true))
148	167	netlist().error("Error adding alias %s to alias list\n", alias.cstr());
149	168	}
150	169
r248389	r248390
235	254	else
236	255	term.init_object(dev, dev.name() + "." + name);
237	256
238		if (!m_terminals.add(term.name()~~, &~~term))
	257	if (!(m_terminals.add(&term, false)==true))
239	258	netlist().error("Error adding %s %s to terminal list\n", objtype_as_astr(term).cstr(), term.name().cstr());
240	259	NL_VERBOSE_OUT(("%s %s\n", objtype_as_astr(term).cstr(), name.cstr()));
241	260	}
r248389	r248390
246	265	{
247	266	param_t &param = dynamic_cast<param_t &>(obj);
248	267	//printf("name: %s\n", name.cstr());
249		if (m_params_temp.contains(name))
	268	const pstring val = m_params_temp.find_by_name(name).e2;
	269	if (val != "")
250	270	{
251		const pstring val = m_params_temp[name];
252	271	switch (param.param_type())
253	272	{
254	273	case param_t::DOUBLE:
r248389	r248390
282	301	netlist().error("Parameter is not supported %s : %s\n", name.cstr(), val.cstr());
283	302	}
284	303	}
285		if (!m_params.add(param~~.name()~~, &param))
	304	if (!(m_params.add(&param, false)==true))
286	305	netlist().error("Error adding parameter %s to parameter list\n", name.cstr());
287	306	}
288	307	break;
r248389	r248390
345	364	static int frontier_cnt = 0;
346	365	pstring frontier_name = pstring::sprintf("frontier_%d", frontier_cnt);
347	366	frontier_cnt++;
348		device_t *front = register_dev("~~FRONTIER~~_~~DEV~~", frontier_name);
	367	device_t *front = register_dev("nld_frontier", frontier_name);
349	368	register_param(frontier_name + ".RIN", r_IN);
350	369	register_param(frontier_name + ".ROUT", r_OUT);
351	370	register_link(frontier_name + ".G", "GND");
r248389	r248390
380	399	{
381	400	pstring fqn = build_fqn(param);
382	401
383		int idx = m_params_temp.index_of(fqn);
384		if (idx < 0)
385		{
386		if (!m_params_temp.add(fqn, value))
387		netlist().error("Unexpected error adding parameter %s to parameter list\n", param.cstr());
388		}
389		else
390		{
391		netlist().warning("Overwriting %s old <%s> new <%s>\n", fqn.cstr(), m_params_temp.value_at(idx).cstr(), value.cstr());
392		m_params_temp[fqn] = value;
393		}
	402	if (!(m_params_temp.add(link_t(fqn, value), false)==true))
	403	netlist().error("Error adding parameter %s to parameter list\n", param.cstr());
394	404	}
395	405
396	406	const pstring setup_t::resolve_alias(const pstring &name) const
r248389	r248390
401	411	/* FIXME: Detect endless loop */
402	412	do {
403	413	ret = temp;
404		int p = m_alias.index_of(ret);
405		temp = (p>=0 ? m_alias.value_at(p) : "");
	414	temp = m_alias.find_by_name(ret).e2;
406	415	} while (temp != "");
407	416
408	417	NL_VERBOSE_OUT(("%s==>%s\n", name.cstr(), ret.cstr()));
r248389	r248390
412	421	core_terminal_t *setup_t::find_terminal(const pstring &terminal_in, bool required)
413	422	{
414	423	const pstring &tname = resolve_alias(terminal_in);
415		int ret;
	424	core_terminal_t *ret;
416	425
417		ret = m_terminals.index_of(tname);
	426	ret = m_terminals.find_by_name(tname);
418	427	/* look for default */
419		if (ret < 0)
	428	if (ret == NULL)
420	429	{
421	430	/* look for ".Q" std output */
422		ret = m_terminals.index_of(tname + ".Q");
	431	pstring s = tname + ".Q";
	432	ret = m_terminals.find_by_name(s);
423	433	}
424
425		core_terminal_t *term = (ret < 0 ? NULL : m_terminals.value_at(ret));
426
427		if (term == NULL && required)
	434	if (ret == NULL && required)
428	435	netlist().error("terminal %s(%s) not found!\n", terminal_in.cstr(), tname.cstr());
429		if (term != NULL)
	436	if (ret != NULL)
430	437	NL_VERBOSE_OUT(("Found input %s\n", tname.cstr()));
431		return term;
	438	return ret;
432	439	}
433	440
434	441	core_terminal_t *setup_t::find_terminal(const pstring &terminal_in, object_t::type_t atype, bool required)
435	442	{
436	443	const pstring &tname = resolve_alias(terminal_in);
437		int ret;
	444	core_terminal_t *ret;
438	445
439		ret = m_terminals.index_of(tname);
	446	ret = m_terminals.find_by_name(tname);
440	447	/* look for default */
441		if (ret < 0 && atype == object_t::OUTPUT)
	448	if (ret == NULL && atype == object_t::OUTPUT)
442	449	{
443	450	/* look for ".Q" std output */
444		ret = m_terminals.index_of(tname + ".Q");
	451	pstring s = tname + ".Q";
	452	ret = m_terminals.find_by_name(s);
445	453	}
446		if (ret < 0 && required)
	454	if (ret == NULL && required)
447	455	netlist().error("terminal %s(%s) not found!\n", terminal_in.cstr(), tname.cstr());
448
449		core_terminal_t *term = (ret < 0 ? NULL : m_terminals.value_at(ret));
450
451		if (term != NULL && term->type() != atype)
	456	if (ret != NULL && ret->type() != atype)
452	457	{
453	458	if (required)
454	459	netlist().error("object %s(%s) found but wrong type\n", terminal_in.cstr(), tname.cstr());
455	460	else
456		term = NULL;
	461	ret = NULL;
457	462	}
458		if (term != NULL)
	463	if (ret != NULL)
459	464	NL_VERBOSE_OUT(("Found input %s\n", tname.cstr()));
460
461		return term;
	465	return ret;
462	466	}
463	467
464	468	param_t *setup_t::find_param(const pstring &param_in, bool required)
r248389	r248390
466	470	const pstring param_in_fqn = build_fqn(param_in);
467	471
468	472	const pstring &outname = resolve_alias(param_in_fqn);
469		int ret;
	473	param_t *ret;
470	474
471		ret = m_params.index_of(outname);
472		if (ret < 0 && required)
	475	ret = m_params.find_by_name(outname);
	476	if (ret == NULL && required)
473	477	netlist().error("parameter %s(%s) not found!\n", param_in_fqn.cstr(), outname.cstr());
474		if (ret != -1)
	478	if (ret != NULL)
475	479	NL_VERBOSE_OUT(("Found parameter %s\n", outname.cstr()));
476		return (ret ~~== -1 ? NULL : m_params.value_at(ret))~~;
	480	return ret;
477	481	}
478	482
479	483	// FIXME avoid dynamic cast here
r248389	r248390
812	816	netlist().log("looking for terminals not connected ...");
813	817	for (std::size_t i = 0; i < m_terminals.size(); i++)
814	818	{
815		core_terminal_t *term = m_terminals.value_at(i);
816		if (!term->has_net())
	819	if (!m_terminals[i]->has_net())
817	820	errstr += pstring::sprintf("Found terminal %s without a net\n",
818		term->name().cstr());
819		else if (term->net().num_cons() == 0)
	821	m_terminals[i]->name().cstr());
	822	else if (m_terminals[i]->net().num_cons() == 0)
820	823	netlist().warning("Found terminal %s without connections",
821		term->name().cstr());
	824	m_terminals[i]->name().cstr());
822	825	}
823	826	if (errstr != "")
824	827	netlist().error("%s", errstr.cstr());
r248389	r248390
867	870	{
868	871	NL_VERBOSE_OUT(("%d: <%s>\n",i, ll[i].cstr()));
869	872	NL_VERBOSE_OUT(("%d: <%s>\n",i, ll[i].cstr()));
870		device_t *nc = factory().new_device_by_name("~~LOG~~");
	873	device_t *nc = factory().new_device_by_classname("nld_log");
871	874	pstring name = "log_" + ll[i];
872	875	register_dev(nc, name);
873	876	register_link(name + ".I", ll[i]);

trunk/src/emu/netlist/nl_setup.h
r248389	r248390
25	25	#define DIPPINS(_pin1, ...) \
26	26	setup.register_dippins_arr( #_pin1 ", " # __VA_ARGS__);
27	27
	28	#define NET_REGISTER_DEV(_type, _name) \
	29	setup.register_dev(NETLIB_NAME_STR(_type), # _name);
	30
28	31	/* to be used to reference new library truthtable devices */
29		#define NET_REGISTER_DEV(_type, _name) \
	32	#define NET_REGISTER_DEV_X(_type, _name) \
30	33	setup.register_dev(# _type, # _name);
31	34
	35	#define NET_REMOVE_DEV(_name) \
	36	setup.remove_dev(# _name);
	37
32	38	#define NET_REGISTER_SIGNAL(_type, _name) \
33	39	NET_REGISTER_DEV(_type ## _ ## sig, _name)
34	40
r248389	r248390
127	133	const pstring &name() const { return e1; }
128	134	};
129	135
	136	typedef pnamedlist_t<link_t> tagmap_nstring_t;
	137	typedef pnamedlist_t<param_t *> tagmap_param_t;
	138	typedef pnamedlist_t<core_terminal_t *> tagmap_terminal_t;
	139	typedef plist_t<link_t> tagmap_link_t;
	140
130	141	setup_t(netlist_t *netlist);
131	142	~setup_t();
132	143
r248389	r248390
190	201
191	202	bool is_library_item(const pstring &name) const { return m_lib.contains(name); }
192	203
	204	/* not ideal, but needed for save_state */
	205	tagmap_terminal_t m_terminals;
	206
193	207	void print_stats() const;
194	208
195	209	/* static support functions */
r248389	r248390
201	215
202	216	private:
203	217
204		void connect_terminals(core_terminal_t &in, core_terminal_t &out);
205		void connect_input_output(core_terminal_t &in, core_terminal_t &out);
206		void connect_terminal_output(terminal_t &in, core_terminal_t &out);
207		void connect_terminal_input(terminal_t &term, core_terminal_t &inp);
208		bool connect_input_input(core_terminal_t &t1, core_terminal_t &t2);
209
210		// helpers
211		pstring objtype_as_astr(object_t &in) const;
212
213		const pstring resolve_alias(const pstring &name) const;
214		devices::nld_base_proxy *get_d_a_proxy(core_terminal_t &out);
215
216	218	netlist_t *m_netlist;
217	219
218		phashmap_t<pstring, pstring> m_alias;
219		phashmap_t<pstring, param_t *> m_params;
220		phashmap_t<pstring, pstring> m_params_temp;
221		phashmap_t<pstring, core_terminal_t *> m_terminals;
	220	tagmap_nstring_t m_alias;
	221	tagmap_param_t m_params;
	222	tagmap_link_t m_links;
	223	tagmap_nstring_t m_params_temp;
222	224
223		plist_t<link_t> m_links;
224
225	225	factory_list_t *m_factory;
226	226
227	227	plist_t<pstring> m_models;
r248389	r248390
232	232	source_t::list_t m_sources;
233	233	plist_t<pstring> m_lib;
234	234
235		#if 0
	235
	236	void connect_terminals(core_terminal_t &in, core_terminal_t &out);
	237	void connect_input_output(core_terminal_t &in, core_terminal_t &out);
	238	void connect_terminal_output(terminal_t &in, core_terminal_t &out);
	239	void connect_terminal_input(terminal_t &term, core_terminal_t &inp);
	240	bool connect_input_input(core_terminal_t &t1, core_terminal_t &t2);
	241
	242	// helpers
	243	pstring objtype_as_astr(object_t &in) const;
	244
	245	const pstring resolve_alias(const pstring &name) const;
	246	devices::nld_base_proxy *get_d_a_proxy(core_terminal_t &out);
	247
236	248	template <class T>
237	249	void remove_start_with(T &hm, pstring &sw)
238	250	{
r248389	r248390
246	258	}
247	259	}
248	260	}
249		#endif
250	261	};
251	262
252	263	// ----------------------------------------------------------------------------------------

trunk/src/emu/netlist/plib/plists.h
r248389	r248390
12	12
13	13	#include <cstring>
14	14	#include <algorithm>
15		#include <cmath>
16	15
17	16	#include "palloc.h"
18	17	#include "pstring.h"
r248389	r248390
67	66
68	67	ATTR_HOT std::size_t size() const { return m_capacity; }
69	68
70		void resize(const std::size_t new_size)
71		{
72		set_capacity(new_size);
73		}
74
75	69	protected:
76	70	ATTR_COLD void set_capacity(const std::size_t new_capacity)
77	71	{
r248389	r248390
370	364	return _ListClass(NULL);
371	365	}
372	366
373		int index_by_name(const pstring &name) const
374		{
375		for (std::size_t i=0; i < this->size(); i++)
376		if (get_name((*this)[i]) == name)
377		return (int) i;
378		return -1;
379		}
380
381	367	void remove_by_name(const pstring &name)
382	368	{
383	369	plist_t<_ListClass>::remove(find_by_name(name));
r248389	r248390
613	599	};
614	600
615	601	// ----------------------------------------------------------------------------------------
616		// hashmap list
617		// ----------------------------------------------------------------------------------------
618
619
620		template <class C>
621		struct phash_functor
622		{
623		phash_functor()
624		{}
625		phash_functor(const C &v)
626		{
627		m_hash = v;
628		}
629		friend unsigned operator%(const phash_functor &lhs, const unsigned &rhs) { return lhs.m_hash % rhs; }
630		bool operator==(const phash_functor &lhs) const { return (m_hash == lhs.m_hash); }
631		private:
632		unsigned m_hash;
633		};
634
635		template <>
636		struct phash_functor<pstring>
637		{
638		phash_functor()
639		{}
640		phash_functor(const pstring &v)
641		{
642		/* modified djb2 */
643		const char *string = v.cstr();
644		unsigned result = 5381;
645		for (UINT8 c = string; c != 0; c = string++)
646		result = ((result << 5) + result ) ^ (result >> (32 - 5)) ^ c;
647		//result = (result*33) ^ c;
648		m_hash = result;
649		}
650		friend unsigned operator%(const phash_functor<pstring> &lhs, const unsigned &rhs) { return lhs.m_hash % rhs; }
651		bool operator==(const phash_functor<pstring> &lhs) const { return (m_hash == lhs.m_hash); }
652		private:
653		unsigned m_hash;
654		};
655
656		#if 0
657		#if 0
658		unsigned hash(const pstring &v) const
659		{
660		/* Fowler–Noll–Vo hash - FNV-1 */
661		const char *string = v.cstr();
662		unsigned result = 2166136261;
663		for (UINT8 c = string++; c != 0; c = string++)
664		result = (result * 16777619) ^ c;
665		// result = (result ^ c) * 16777619; FNV 1a
666		return result;
667		}
668		#else
669		unsigned hash(const pstring &v) const
670		{
671		/* jenkins one at a time algo */
672		unsigned result = 0;
673		const char *string = v.cstr();
674		while (*string)
675		{
676		result += *string;
677		string++;
678		result += (result << 10);
679		result ^= (result >> 6);
680		}
681		result += (result << 3);
682		result ^= (result >> 11);
683		result += (result << 15);
684		return result;
685		}
686		#endif
687		#endif
688
689		template <class K, class V, class H = phash_functor<K> >
690		class phashmap_t
691		{
692		public:
693		phashmap_t() : m_hash(37)
694		{
695		for (unsigned i=0; i<m_hash.size(); i++)
696		m_hash[i] = -1;
697		}
698
699		~phashmap_t()
700		{
701		}
702
703		struct element_t
704		{
705		element_t() { }
706		element_t(const K &key, const H &hash, const V &value)
707		: m_key(key), m_hash(hash), m_value(value), m_next(-1)
708		{}
709		K m_key;
710		H m_hash;
711		V m_value;
712		int m_next;
713		};
714
715		void clear()
716		{
717		if (0)
718		{
719		unsigned cnt = 0;
720		for (unsigned i=0; i<m_hash.size(); i++)
721		if (m_hash[i] >= 0)
722		cnt++;
723		const unsigned s = m_values.size();
724		if (s>0)
725		printf("phashmap: %d elements %d hashsize, percent in overflow: %d\n", s, (unsigned) m_hash.size(), (s - cnt) * 100 / s);
726		else
727		printf("phashmap: No elements .. \n");
728		}
729		m_values.clear();
730		for (unsigned i=0; i<m_hash.size(); i++)
731		m_hash[i] = -1;
732		}
733
734		bool contains(const K &key) const
735		{
736		return (get_idx(key) >= 0);
737		}
738
739		int index_of(const K &key) const
740		{
741		return get_idx(key);
742		}
743
744		unsigned size() const { return m_values.size(); }
745
746		bool add(const K &key, const V &value)
747		{
748		/*
749		* we are using the Euler prime function here
750		*
751		* n * n + n + 41 \| 40 >= n >=0
752		*
753		* and accept that outside we will not have a prime
754		*
755		*/
756		if (m_values.size() * 3 / 2 > m_hash.size())
757		{
758		unsigned n = std::sqrt( 2 * m_hash.size());
759		n = n * n + n + 41;
760		m_hash.resize(n);
761		rebuild();
762		}
763		const H hash(key);
764		const unsigned pos = hash % m_hash.size();
765		if (m_hash[pos] == -1)
766		{
767		unsigned vpos = m_values.size();
768		m_values.add(element_t(key, hash, value));
769		m_hash[pos] = vpos;
770		}
771		else
772		{
773		int ep = m_hash[pos];
774
775		for (; ep != -1; ep = m_values[ep].m_next)
776		{
777		if (m_values[ep].m_hash == hash && m_values[ep].m_key == key )
778		return false; /* duplicate */
779		}
780		unsigned vpos = m_values.size();
781		m_values.add(element_t(key, hash, value));
782		m_values[vpos].m_next = m_hash[pos];
783		m_hash[pos] = vpos;
784		}
785		return true;
786		}
787
788		V& operator[](const K &key)
789		{
790		int p = get_idx(key);
791		if (p == -1)
792		{
793		p = m_values.size();
794		add(key, V());
795		}
796		return m_values[p].m_value;
797		}
798
799		V& value_at(const unsigned pos) { return m_values[pos].m_value; }
800		const V& value_at(const unsigned pos) const { return m_values[pos].m_value; }
801
802		V& key_at(const unsigned pos) const { return m_values[pos].m_key; }
803		private:
804
805		int get_idx(const K &key) const
806		{
807		H hash(key);
808		const unsigned pos = hash % m_hash.size();
809
810		for (int ep = m_hash[pos]; ep != -1; ep = m_values[ep].m_next)
811		if (m_values[ep].m_hash == hash && m_values[ep].m_key == key )
812		return ep;
813		return -1;
814		}
815
816		void rebuild()
817		{
818		for (unsigned i=0; i<m_hash.size(); i++)
819		m_hash[i] = -1;
820		for (unsigned i=0; i<m_values.size(); i++)
821		{
822		unsigned pos = m_values[i].m_hash % m_hash.size();
823		m_values[i].m_next = m_hash[pos];
824		m_hash[pos] = i;
825		}
826
827		}
828		plist_t<element_t> m_values;
829		parray_t<int> m_hash;
830		};
831
832		// ----------------------------------------------------------------------------------------
833	602	// sort a list ... slow, I am lazy
834	603	// elements must support ">" operator.
835	604	// ----------------------------------------------------------------------------------------

trunk/src/emu/netlist/plib/pstate.c
r248389	r248390
75	75	m_save.add(p);
76	76	state.register_state(*this, stname);
77	77	}
78

trunk/src/emu/netlist/solver/nld_solver.h
r248389	r248390
22	22	// ----------------------------------------------------------------------------------------
23	23
24	24	#define SOLVER(_name, _freq) \
25		NET_REGISTER_DEV(~~SOLVER~~, _name) \
	25	NET_REGISTER_DEV(solver, _name) \
26	26	PARAM(_name.FREQ, _freq)
27	27
28	28	// ----------------------------------------------------------------------------------------

trunk/src/emu/sound/c140.c
r248389	r248390
134	134	/* allocate a pair of buffers to mix into - 1 second's worth should be more than enough */
135	135	m_mixer_buffer_left = auto_alloc_array(machine(), INT16, 2 * m_sample_rate);
136	136	m_mixer_buffer_right = m_mixer_buffer_left + m_sample_rate;
137
138		save_item(NAME(m_REG));
139
140		for (int i = 0; i < C140_MAX_VOICE; i++)
141		{
142		save_item(NAME(m_voi[i].ptoffset), i);
143		save_item(NAME(m_voi[i].pos), i);
144		save_item(NAME(m_voi[i].key), i);
145		save_item(NAME(m_voi[i].lastdt), i);
146		save_item(NAME(m_voi[i].prevdt), i);
147		save_item(NAME(m_voi[i].dltdt), i);
148		save_item(NAME(m_voi[i].rvol), i);
149		save_item(NAME(m_voi[i].lvol), i);
150		save_item(NAME(m_voi[i].frequency), i);
151		save_item(NAME(m_voi[i].bank), i);
152		save_item(NAME(m_voi[i].mode), i);
153		save_item(NAME(m_voi[i].sample_start), i);
154		save_item(NAME(m_voi[i].sample_end), i);
155		save_item(NAME(m_voi[i].sample_loop), i);
156		}
157	137	}
158	138
159	139

trunk/src/emu/sound/c140.h
r248389	r248390
51	51	sample_end(0),
52	52	sample_loop(0) {}
53	53
54		INT32 ptoffset;
55		INT32 pos;
56		INT32 key;
	54	long ptoffset;
	55	long pos;
	56	long key;
57	57	//--work
58		INT32 lastdt;
59		INT32 prevdt;
60		INT32 dltdt;
	58	long lastdt;
	59	long prevdt;
	60	long dltdt;
61	61	//--reg
62		INT32 rvol;
63		INT32 lvol;
64		INT32 frequency;
65		INT32 bank;
66		INT32 mode;
	62	long rvol;
	63	long lvol;
	64	long frequency;
	65	long bank;
	66	long mode;
67	67
68		INT32 sample_start;
69		INT32 sample_end;
70		INT32 sample_loop;
	68	long sample_start;
	69	long sample_end;
	70	long sample_loop;
71	71	};
72	72
73	73

trunk/src/emu/sound/scsp.c
r248389	r248390
30	30	*/
31	31
32	32	#include "emu.h"
33		#include "sound/cdda.h"
34	33	#include "scsp.h"
35	34
36	35
r248389	r248390
1011	1010	v= ((unsigned short ) (m_DSP.EFREG+(addr-0xec0)/2));
1012	1011	else
1013	1012	{
1014		/**!
1015		@todo Kyuutenkai reads from 0xee0/0xee2, it's tied with EXTS register(s) also used for CD-Rom Player equalizer.
1016		This port is actually an external parallel port, directly connected from the CD Block device, hence code is a bit of an hack.
1017		Kyuutenkai code snippet for reference:
	1013	/*
	1014	TODO: Kyuutenkai reads from 0xee0/0xee2, it's an undocumented "DSP internal buffer" register ...
1018	1015	004A3A: 207C 0010 0EE0 movea.l #$100ee0, A0
1019	1016	004A40: 43EA 0090 lea ($90,A2), A1 ;A2=0x700
1020	1017	004A44: 6100 0254 bsr $4c9a
r248389	r248390
1047	1044	004CB0: 4CDF 0002 movem.l (A7)+, D1
1048	1045	004CB4: 4E75 rts
1049	1046	*/
1050		logerror("SCSP: Reading from ~~EXTS~~ register %08x\n",addr);
	1047	logerror("SCSP: Reading from unmapped register %08x\n",addr);
1051	1048	if(addr == 0xee0)
1052		v = ~~space.~~m~~achine().device<cdda~~_~~device~~>~~("cdda")-~~>~~get_channel_volume(0)~~;
	1049	v= m_DSP.TEMP[0] >> 16;
1053	1050	if(addr == 0xee2)
1054		v = ~~space.~~m~~achine().device<cdda~~_~~device>("cdda")->get_channel_volume(1)~~;
	1051	v= m_DSP.TEMP[0] & 0xffff;
1055	1052	}
1056	1053	}
1057	1054	return v;

trunk/src/emu/sound/tms36xx.c
r248389	r248390
375	375	m_decay[0], m_decay[1], m_decay[2],
376	376	m_decay[3], m_decay[4], m_decay[5]));
377	377	LOG(("TMS36xx speed %d\n", m_speed));
378
379		save_item(NAME(m_octave));
380		save_item(NAME(m_tune_counter));
381		save_item(NAME(m_note_counter));
382		save_item(NAME(m_voices));
383		save_item(NAME(m_shift));
384		save_item(NAME(m_vol));
385		save_item(NAME(m_vol_counter));
386		save_item(NAME(m_counter));
387		save_item(NAME(m_frequency));
388		save_item(NAME(m_output));
389		save_item(NAME(m_enable));
390		save_item(NAME(m_tune_num));
391		save_item(NAME(m_tune_ofs));
392		save_item(NAME(m_tune_max));
393	378	}
394	379
395	380

trunk/src/emu/sound/ymf278b.c
r248389	r248390
43	43	TODO:
44	44	- accurate timing of envelopes
45	45	- LFO (vibrato, tremolo)
46		- integrate YMF262 mixing (used by Fuuki games, not used by Psikyo and Metro games)
	46	- integrate YMF262 (used by Fuuki games, not used by Psikyo and Metro games)
	47	- able to hook up "Moonsound", supporting mixed ROM+RAM (for MSX driver in MESS)
	48	(this should be possible now by using a custom address map?)
47	49	*/
48	50
49	51	#include "emu.h"
50	52	#include "ymf278b.h"
51		#include "ymf262.h"
52	53
53	54	#define VERBOSE 0
54	55	#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
r248389	r248390
225	226	INT32 *mixp;
226	227	INT32 vl, vr;
227	228
228		if (&stream == m_stream_ymf262)
229		{
230		ymf262_update_one(m_ymf262, outputs, samples);
231		return;
232		}
233
234	229	memset(m_mix_buffer, 0, sizeof(m_mix_buffer[0])samples2);
235	230
236	231	for (i = 0; i < 24; i++)
r248389	r248390
688	683	timer_busy_start(0);
689	684	m_port_AB = data;
690	685	m_lastport = offset>>1 & 1;
691		ymf262_write(m_ymf262, offset, data);
692	686	break;
693	687
694	688	case 1:
r248389	r248390
696	690	timer_busy_start(0);
697	691	if (m_lastport) B_w(m_port_AB, data);
698	692	else A_w(m_port_AB, data);
699		m_last_fm_data = data;
700		ymf262_write(m_ymf262, offset, data);
701	693	break;
702	694
703	695	case 4:
r248389	r248390
745	737	case 1:
746	738	case 3:
747	739	// but they're not implemented here yet
748		// This may be incorrect, but it makes the mbwave moonsound detection in msx drivers pass.
749		ret = m_last_fm_data;
750	740	break;
751	741
752	742	// PCM regs
r248389	r248390
837	827	m_current_irq = 0;
838	828	if (!m_irq_handler.isnull())
839	829	m_irq_handler(0);
840
841		ymf262_reset_chip(m_ymf262);
842	830	}
843	831
844		void ymf278b_device::device_stop()
845		{
846		ymf262_shutdown(m_ymf262);
847		m_ymf262 = NULL;
848		}
849
850	832	void ymf278b_device::precompute_rate_tables()
851	833	{
852	834	int i;
r248389	r248390
897	879	save_item(NAME(m_port_AB));
898	880	save_item(NAME(m_port_C));
899	881	save_item(NAME(m_lastport));
900		save_item(NAME(m_last_fm_data));
901	882
902	883	for (i = 0; i < 24; ++i)
903	884	{
r248389	r248390
943	924	// device_start - device-specific startup
944	925	//-------------------------------------------------
945	926
946		static void ymf278b_ymf262_irq_handler(void *param,int irq)
947		{
948		}
949
950
951		static void ymf278b_ymf262_timer_handler(void *param, int c, const attotime &period)
952		{
953		}
954
955		static void ymf278b_ymf262_update_request(void *param, int interval)
956		{
957		ymf278b_device ymf278b = (ymf278b_device ) param;
958		ymf278b->ymf262_update_request();
959		}
960
961
962		void ymf278b_device::ymf262_update_request()
963		{
964		m_stream_ymf262->update();
965		}
966
967
968	927	void ymf278b_device::device_start()
969	928	{
970	929	int i;
r248389	r248390
1010	969
1011	970	// Register state for saving
1012	971	register_save_state();
1013
1014		// YMF262 related
1015
1016		/* stream system initialize */
1017		int ymf262_clock = clock() / (19/8.0);
1018		m_ymf262 = ymf262_init(this, ymf262_clock, ymf262_clock / 288);
1019		assert_always(m_ymf262 != NULL, "Error creating YMF262 chip");
1020
1021		m_stream_ymf262 = machine().sound().stream_alloc(*this, 0, 4, ymf262_clock / 288);
1022
1023		/* YMF262 setup */
1024		ymf262_set_timer_handler (m_ymf262, ymf278b_ymf262_timer_handler, this);
1025		ymf262_set_irq_handler (m_ymf262, ymf278b_ymf262_irq_handler, this);
1026		ymf262_set_update_handler(m_ymf262, ymf278b_ymf262_update_request, this);
1027	972	}
1028	973
1029	974
r248389	r248390
1034	979	device_sound_interface(mconfig, *this),
1035	980	device_memory_interface(mconfig, *this),
1036	981	m_space_config("samples", ENDIANNESS_BIG, 8, 22, 0, NULL),
1037		m_irq_handler(*this),
1038		m_last_fm_data(0)
	982	m_irq_handler(*this)
1039	983	{
1040	984	m_address_map[0] = *ADDRESS_MAP_NAME(ymf278b);
1041	985	}

trunk/src/emu/sound/ymf278b.h
r248389	r248390
25	25	DECLARE_READ8_MEMBER( read );
26	26	DECLARE_WRITE8_MEMBER( write );
27	27
28		void ymf262_update_request();
29
30	28	protected:
31	29	// device-level overrides
32	30	virtual void device_config_complete();
33	31	virtual void device_start();
34	32	virtual void device_reset();
35		virtual void device_stop();
36	33
37	34	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
38	35
r248389	r248390
134	131	direct_read_data * m_direct;
135	132	const address_space_config m_space_config;
136	133	devcb_write_line m_irq_handler;
137		UINT8 m_last_fm_data;
138
139		// ymf262
140		void *m_ymf262;
141		sound_stream * m_stream_ymf262;
142	134	};
143	135
144	136	extern const device_type YMF278B;

trunk/src/emu/video/mb_vcu.c
r248389	r248390
191	191	3, resistances_gb, m_weights_b, 3600, 0,
192	192	2, resistances_r, m_weights_r, 3600, 0);
193	193	}
194
195		save_item(NAME(m_status));
196		save_pointer(NAME(m_ram), 0x800);
197		save_pointer(NAME(m_palram), 0x100);
198		save_item(NAME(m_param_offset_latch));
199		save_item(NAME(m_xpos));
200		save_item(NAME(m_ypos));
201		save_item(NAME(m_color1));
202		save_item(NAME(m_color2));
203		save_item(NAME(m_mode));
204		save_item(NAME(m_pix_xsize));
205		save_item(NAME(m_pix_ysize));
206		save_item(NAME(m_vregs));
207		save_item(NAME(m_bk_color));
208		save_item(NAME(m_vbank));
209		save_item(NAME(m_weights_r));
210		save_item(NAME(m_weights_g));
211		save_item(NAME(m_weights_b));
212	194	}
213	195
214	196

trunk/src/emu/video/v9938.c
r248389	r248390
37	37	V9938_MODE_UNKNOWN
38	38	};
39	39
40		#define MODEL_V9938 (0)
41		#define MODEL_V9958 (1)
42
43	40	#define EXPMEM_OFFSET 0x20000
44	41
45		#define LONG_WIDTH (512 + 32)
46
47	42	static const char *const v9938_modes[] = {
48	43	"TEXT 1", "MULTICOLOR", "GRAPHIC 1", "GRAPHIC 2", "GRAPHIC 3",
49	44	"GRAPHIC 4", "GRAPHIC 5", "GRAPHIC 6", "GRAPHIC 7", "TEXT 2",
r248389	r248390
91	86	m_scanline(0),
92	87	m_blink(0),
93	88	m_blink_count(0),
	89	m_size(0),
	90	m_size_old(0),
	91	m_size_auto(0),
	92	m_size_now(0),
94	93	m_mx_delta(0),
95	94	m_my_delta(0),
96	95	m_button_state(0),
r248389	r248390
167	166	return m_int_state;
168	167	}
169	168
	169	void v99x8_device::set_resolution (int i)
	170	{
	171	if (i == RENDER_AUTO)
	172	{
	173	m_size_auto = 1;
	174	}
	175	else
	176	{
	177	m_size = i;
	178	m_size_auto = 0;
	179	}
	180	}
	181
170	182	/*
171	183	Not really right... won't work with sprites in graphics 7
172	184	and with palette updated mid-screen
r248389	r248390
557	569	m_vdp_engine = NULL;
558	570
559	571	m_screen->register_screen_bitmap(m_bitmap);
	572	m_size_old = -1;
560	573
561	574	// Video RAM is allocated as an own address space
562	575	m_vram_space = &space(AS_DATA);
r248389	r248390
589	602	save_item(NAME(m_scanline));
590	603	save_item(NAME(m_blink));
591	604	save_item(NAME(m_blink_count));
	605	save_item(NAME(m_size));
	606	save_item(NAME(m_size_old));
	607	save_item(NAME(m_size_auto));
	608	save_item(NAME(m_size_now));
592	609	save_item(NAME(m_mx_delta));
593	610	save_item(NAME(m_my_delta));
594	611	save_item(NAME(m_button_state));
r248389	r248390
859	876	return !(((m_cont_reg[9] & 0x04) && !(m_stat_reg[2] & 2)) \|\| m_blink);
860	877	}
861	878
	879	/*
	880	* This file is included for a number of different situations:
	881	* _Width : can be 512 + 32 or 256 + 16
	882	* V9938_BPP : can be 8 or 16
	883	*/
862	884
863		void v99x8_device::default_border(const pen_t pens, UINT16 ln)
	885
	886	template<typename _PixelType, int _Width>
	887	void v99x8_device::default_border(const pen_t pens, _PixelType ln)
864	888	{
865		~~UIN~~T16 pen;
	889	_PixelType pen;
866	890	int i;
867	891
868	892	pen = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
869		i = ~~LONG~~_W~~IDTH~~;
	893	i = _Width;
870	894	while (i--) *ln++ = pen;
	895
	896	if (m_size_now != RENDER_HIGH) m_size_now = RENDER_LOW;
871	897	}
872	898
873		void v99x8_device::graphic7_border(const pen_t pens, UINT16 ln)
	899	template<typename _PixelType, int _Width>
	900	void v99x8_device::graphic7_border(const pen_t pens, _PixelType ln)
874	901	{
875		~~UIN~~T16 pen;
	902	_PixelType pen;
876	903	int i;
877	904
878	905	pen = pens[m_pal_ind256[m_cont_reg[7]]];
879		i = ~~LONG~~_W~~IDTH~~;
	906	i = _Width;
880	907	while (i--) *ln++ = pen;
	908
	909	if (m_size_now != RENDER_HIGH) m_size_now = RENDER_LOW;
881	910	}
882	911
883		void v99x8_device::graphic5_border(const pen_t pens, UINT16 ln)
	912	template<typename _PixelType, int _Width>
	913	void v99x8_device::graphic5_border(const pen_t pens, _PixelType ln)
884	914	{
885	915	int i;
886		UINT16 pen0;
887		UINT16 pen1;
	916	_PixelType pen0;
	917	if (_Width > 512)
	918	{
	919	_PixelType pen1;
888	920
889		pen1 = pens[m_pal_ind16[(m_cont_reg[7]&0x03)]];
890		pen0 = pens[m_pal_ind16[((m_cont_reg[7]>>2)&0x03)]];
891		i = LONG_WIDTH / 2;
892		while (i--) { ln++ = pen0; ln++ = pen1; }
	921	pen1 = pens[m_pal_ind16[(m_cont_reg[7]&0x03)]];
	922	pen0 = pens[m_pal_ind16[((m_cont_reg[7]>>2)&0x03)]];
	923	i = (_Width) / 2;
	924	while (i--) { ln++ = pen0; ln++ = pen1; }
	925	}
	926	else
	927	{
	928	pen0 = pens[m_pal_ind16[((m_cont_reg[7]>>2)&0x03)]];
	929	i = _Width;
	930	while (i--) *ln++ = pen0;
	931	}
	932	m_size_now = RENDER_HIGH;
893	933	}
894	934
895		void v99x8_device::mode_text1(const pen_t pens, UINT16 ln, int line)
	935	template<typename _PixelType, int _Width>
	936	void v99x8_device::mode_text1(const pen_t pens, _PixelType ln, int line)
896	937	{
897	938	int pattern, x, xx, name, xxx;
898		~~UIN~~T16 fg, bg, pen;
	939	_PixelType fg, bg, pen;
899	940	int nametbl_addr, patterntbl_addr;
900	941
901	942	patterntbl_addr = m_cont_reg[4] << 11;
r248389	r248390
908	949
909	950	pen = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
910	951
911		xxx = (m_offset_x + 8) * 2;
	952	xxx = m_offset_x + 8;
	953	if (_Width > 512)
	954	xxx *= 2;
912	955	while (xxx--) *ln++ = pen;
913	956
914	957	for (x=0;x<40;x++)
r248389	r248390
918	961	for (xx=0;xx<6;xx++)
919	962	{
920	963	*ln++ = (pattern & 0x80) ? fg : bg;
921		*ln++ = (pattern & 0x80) ? fg : bg;
	964	if (_Width > 512)
	965	*ln++ = (pattern & 0x80) ? fg : bg;
922	966	pattern <<= 1;
923	967	}
924	968	/* width height 212, characters start repeating at the bottom */
925	969	name = (name + 1) & 0x3ff;
926	970	}
927	971
928		xxx = ((16 - m_offset_x) + 8) * 2;
	972	xxx = (16 - m_offset_x) + 8;
	973	if (_Width > 512)
	974	xxx *= 2;
929	975	while (xxx--) *ln++ = pen;
	976	if (m_size_now != RENDER_HIGH) m_size_now = RENDER_LOW;
930	977	}
931	978
932		void v99x8_device::mode_text2(const pen_t pens, UINT16 ln, int line)
	979	template<typename _PixelType, int _Width>
	980	void v99x8_device::mode_text2(const pen_t pens, _PixelType ln, int line)
933	981	{
934	982	int pattern, x, charcode, name, xxx, patternmask, colourmask;
935		~~UIN~~T16 fg, bg, fg0, bg0, pen;
	983	_PixelType fg, bg, fg0, bg0, pen;
936	984	int nametbl_addr, patterntbl_addr, colourtbl_addr;
937	985
938	986	patterntbl_addr = m_cont_reg[4] << 11;
r248389	r248390
952	1000
953	1001	name = (line/8)*80;
954	1002
955		xxx = (m_offset_x + 8~~) * 2~~;
	1003	xxx = m_offset_x + 8;
956	1004	pen = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
	1005	if (_Width > 512)
	1006	xxx *= 2;
957	1007	while (xxx--) *ln++ = pen;
958	1008
959	1009	for (x=0;x<80;x++)
r248389	r248390
967	1017	pattern = m_vram_space->read_byte(patterntbl_addr + ((charcode * 8) +
968	1018	((line + m_cont_reg[23]) & 7)));
969	1019
970		*ln++ = (pattern & 0x80) ? fg0 : bg0;
971		*ln++ = (pattern & 0x40) ? fg0 : bg0;
972		*ln++ = (pattern & 0x20) ? fg0 : bg0;
973		*ln++ = (pattern & 0x10) ? fg0 : bg0;
974		*ln++ = (pattern & 0x08) ? fg0 : bg0;
975		*ln++ = (pattern & 0x04) ? fg0 : bg0;
	1020	if (_Width > 512)
	1021	{
	1022	*ln++ = (pattern & 0x80) ? fg0 : bg0;
	1023	*ln++ = (pattern & 0x40) ? fg0 : bg0;
	1024	*ln++ = (pattern & 0x20) ? fg0 : bg0;
	1025	*ln++ = (pattern & 0x10) ? fg0 : bg0;
	1026	*ln++ = (pattern & 0x08) ? fg0 : bg0;
	1027	*ln++ = (pattern & 0x04) ? fg0 : bg0;
	1028	}
	1029	else
	1030	{
	1031	*ln++ = (pattern & 0x80) ? fg0 : bg0;
	1032	*ln++ = (pattern & 0x20) ? fg0 : bg0;
	1033	*ln++ = (pattern & 0x08) ? fg0 : bg0;
	1034	}
976	1035
977	1036	name++;
978	1037	continue;
r248389	r248390
982	1041	pattern = m_vram_space->read_byte(patterntbl_addr + ((charcode * 8) +
983	1042	((line + m_cont_reg[23]) & 7)));
984	1043
985		*ln++ = (pattern & 0x80) ? fg : bg;
986		*ln++ = (pattern & 0x40) ? fg : bg;
987		*ln++ = (pattern & 0x20) ? fg : bg;
988		*ln++ = (pattern & 0x10) ? fg : bg;
989		*ln++ = (pattern & 0x08) ? fg : bg;
990		*ln++ = (pattern & 0x04) ? fg : bg;
	1044	if (_Width > 512)
	1045	{
	1046	*ln++ = (pattern & 0x80) ? fg : bg;
	1047	*ln++ = (pattern & 0x40) ? fg : bg;
	1048	*ln++ = (pattern & 0x20) ? fg : bg;
	1049	*ln++ = (pattern & 0x10) ? fg : bg;
	1050	*ln++ = (pattern & 0x08) ? fg : bg;
	1051	*ln++ = (pattern & 0x04) ? fg : bg;
	1052	}
	1053	else
	1054	{
	1055	*ln++ = (pattern & 0x80) ? fg : bg;
	1056	*ln++ = (pattern & 0x20) ? fg : bg;
	1057	*ln++ = (pattern & 0x08) ? fg : bg;
	1058	}
991	1059
992	1060	name++;
993	1061	}
994	1062
995		xxx = (16 - m_offset_x + 8) * 2;
	1063	xxx = 16 - m_offset_x + 8;
	1064	if (_Width > 512)
	1065	xxx *= 2;
996	1066	while (xxx--) *ln++ = pen;
	1067	m_size_now = RENDER_HIGH;
997	1068	}
998	1069
999		void v99x8_device::mode_multi(const pen_t pens, UINT16 ln, int line)
	1070	template<typename _PixelType, int _Width>
	1071	void v99x8_device::mode_multi(const pen_t pens, _PixelType ln, int line)
1000	1072	{
1001	1073	int nametbl_addr, patterntbl_addr, colour;
1002	1074	int name, line2, x, xx;
1003		~~UIN~~T16 pen, pen_bg;
	1075	_PixelType pen, pen_bg;
1004	1076
1005	1077	nametbl_addr = (m_cont_reg[2] << 10);
1006	1078	patterntbl_addr = (m_cont_reg[4] << 11);
r248389	r248390
1009	1081	name = (line2/8)*32;
1010	1082
1011	1083	pen_bg = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
1012		xx = m_offset_x * 2;
	1084	if (_Width < 512)
	1085	xx = m_offset_x;
	1086	else
	1087	xx = m_offset_x * 2;
1013	1088	while (xx--) *ln++ = pen_bg;
1014	1089
1015	1090	for (x=0;x<32;x++)
r248389	r248390
1021	1096	*ln++ = pen;
1022	1097	*ln++ = pen;
1023	1098	*ln++ = pen;
1024		*ln++ = pen;
1025		*ln++ = pen;
1026		*ln++ = pen;
1027		*ln++ = pen;
	1099	if (_Width > 512)
	1100	{
	1101	*ln++ = pen;
	1102	*ln++ = pen;
	1103	*ln++ = pen;
	1104	*ln++ = pen;
	1105	}
1028	1106	pen = pens[m_pal_ind16[colour&15]];
1029	1107	/* eight pixels */
1030	1108	*ln++ = pen;
1031	1109	*ln++ = pen;
1032	1110	*ln++ = pen;
1033	1111	*ln++ = pen;
1034		*ln++ = pen;
1035		*ln++ = pen;
1036		*ln++ = pen;
1037		*ln++ = pen;
	1112	if (_Width > 512)
	1113	{
	1114	*ln++ = pen;
	1115	*ln++ = pen;
	1116	*ln++ = pen;
	1117	*ln++ = pen;
	1118	}
1038	1119	name++;
1039	1120	}
1040	1121
1041		xx = (16 - m_offset_x) * 2;
	1122	xx = 16 - m_offset_x;
	1123	if (_Width > 512)
	1124	xx *= 2;
1042	1125	while (xx--) *ln++ = pen_bg;
	1126	if (m_size_now != RENDER_HIGH) m_size_now = RENDER_LOW;
1043	1127	}
1044	1128
1045		void v99x8_device::mode_graphic1(const pen_t pens, UINT16 ln, int line)
	1129	template<typename _PixelType, int _Width>
	1130	void v99x8_device::mode_graphic1(const pen_t pens, _PixelType ln, int line)
1046	1131	{
1047		~~UIN~~T16 fg, bg, pen;
	1132	_PixelType fg, bg, pen;
1048	1133	int nametbl_addr, patterntbl_addr, colourtbl_addr;
1049	1134	int pattern, x, xx, line2, name, charcode, colour, xxx;
1050	1135
r248389	r248390
1057	1142	name = (line2/8)*32;
1058	1143
1059	1144	pen = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
1060		xxx = m_offset_x * 2;
	1145	if (_Width < 512)
	1146	xxx = m_offset_x;
	1147	else
	1148	xxx = m_offset_x * 2;
1061	1149	while (xxx--) *ln++ = pen;
1062	1150
1063	1151	for (x=0;x<32;x++)
r248389	r248390
1071	1159	for (xx=0;xx<8;xx++)
1072	1160	{
1073	1161	*ln++ = (pattern & 0x80) ? fg : bg;
1074		*ln++ = (pattern & 0x80) ? fg : bg;
	1162	if (_Width > 512)
	1163	*ln++ = (pattern & 0x80) ? fg : bg;
1075	1164	pattern <<= 1;
1076	1165	}
1077	1166	name++;
1078	1167	}
1079	1168
1080		xx = (16 - m_offset_x) * 2;
	1169	xx = 16 - m_offset_x;
	1170	if (_Width > 512)
	1171	xx *= 2;
1081	1172	while (xx--) *ln++ = pen;
	1173	if (m_size_now != RENDER_HIGH) m_size_now = RENDER_LOW;
1082	1174	}
1083	1175
1084		void v99x8_device::mode_graphic23(const pen_t pens, UINT16 ln, int line)
	1176	template<typename _PixelType, int _Width>
	1177	void v99x8_device::mode_graphic23(const pen_t pens, _PixelType ln, int line)
1085	1178	{
1086		~~UIN~~T16 fg, bg, pen;
	1179	_PixelType fg, bg, pen;
1087	1180	int nametbl_addr, patterntbl_addr, colourtbl_addr;
1088	1181	int pattern, x, xx, line2, name, charcode,
1089	1182	colour, colourmask, patternmask, xxx;
1090	1183
1091		colourmask = ((m_cont_reg[3] & 0x7f) * 8) \| 7;
1092		patternmask = ((m_cont_reg[4] & 0x03) * 256) \| 0xff;
	1184	colourmask = (m_cont_reg[3] & 0x7f) * 8 \| 7;
	1185	patternmask = (m_cont_reg[4] & 0x03) * 256 \| (colourmask & 255);
1093	1186
1094	1187	nametbl_addr = (m_cont_reg[2] << 10);
1095	1188	colourtbl_addr = ((m_cont_reg[3] & 0x80) << 6) + (m_cont_reg[10] << 14);
r248389	r248390
1099	1192	name = (line2/8)*32;
1100	1193
1101	1194	pen = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
1102		xxx = m_offset_x * 2;
	1195	if (_Width < 512)
	1196	xxx = m_offset_x;
	1197	else
	1198	xxx = m_offset_x * 2;
1103	1199	while (xxx--) *ln++ = pen;
1104	1200
1105	1201	for (x=0;x<32;x++)
r248389	r248390
1112	1208	for (xx=0;xx<8;xx++)
1113	1209	{
1114	1210	*ln++ = (pattern & 0x80) ? fg : bg;
1115		*ln++ = (pattern & 0x80) ? fg : bg;
	1211	if (_Width > 512)
	1212	*ln++ = (pattern & 0x80) ? fg : bg;
1116	1213	pattern <<= 1;
1117	1214	}
1118	1215	name++;
1119	1216	}
1120	1217
1121		xx = (16 - m_offset_x) * 2;
	1218	xx = 16 - m_offset_x;
	1219	if (_Width > 512)
	1220	xx *= 2;
1122	1221	while (xx--) *ln++ = pen;
	1222	if (m_size_now != RENDER_HIGH) m_size_now = RENDER_LOW;
1123	1223	}
1124	1224
1125		void v99x8_device::mode_graphic4(const pen_t pens, UINT16 ln, int line)
	1225	template<typename _PixelType, int _Width>
	1226	void v99x8_device::mode_graphic4(const pen_t pens, _PixelType ln, int line)
1126	1227	{
1127	1228	int nametbl_addr, colour;
1128	1229	int line2, linemask, x, xx;
1129		~~UIN~~T16 pen, pen_bg;
	1230	_PixelType pen, pen_bg;
1130	1231
1131	1232	linemask = ((m_cont_reg[2] & 0x1f) << 3) \| 7;
1132	1233
r248389	r248390
1137	1238	nametbl_addr += 0x8000;
1138	1239
1139	1240	pen_bg = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
1140		xx = m_offset_x * 2;
	1241	if (_Width < 512)
	1242	xx = m_offset_x;
	1243	else
	1244	xx = m_offset_x * 2;
1141	1245	while (xx--) *ln++ = pen_bg;
1142	1246
1143	1247	for (x=0;x<128;x++)
r248389	r248390
1145	1249	colour = m_vram_space->read_byte(nametbl_addr++);
1146	1250	pen = pens[m_pal_ind16[colour>>4]];
1147	1251	*ln++ = pen;
1148		*ln++ = pen;
	1252	if (_Width > 512)
	1253	*ln++ = pen;
1149	1254	pen = pens[m_pal_ind16[colour&15]];
1150	1255	*ln++ = pen;
1151		*ln++ = pen;
	1256	if (_Width > 512)
	1257	*ln++ = pen;
1152	1258	}
1153	1259
1154		xx = (16 - m_offset_x) * 2;
	1260	xx = 16 - m_offset_x;
	1261	if (_Width > 512)
	1262	xx *= 2;
1155	1263	while (xx--) *ln++ = pen_bg;
	1264	if (m_size_now != RENDER_HIGH) m_size_now = RENDER_LOW;
1156	1265	}
1157	1266
1158		void v99x8_device::mode_graphic5(const pen_t pens, UINT16 ln, int line)
	1267	template<typename _PixelType, int _Width>
	1268	void v99x8_device::mode_graphic5(const pen_t pens, _PixelType ln, int line)
1159	1269	{
1160	1270	int nametbl_addr, colour;
1161	1271	int line2, linemask, x, xx;
1162		UINT16 pen_bg0[4];
1163		UINT16 pen_bg1[4];
	1272	_PixelType pen_bg0[4];
	1273	_PixelType pen_bg1[4];
1164	1274
1165	1275	linemask = ((m_cont_reg[2] & 0x1f) << 3) \| 7;
1166	1276
r248389	r248390
1170	1280	if ( (m_cont_reg[2] & 0x20) && v9938_second_field() )
1171	1281	nametbl_addr += 0x8000;
1172	1282
1173		pen_bg1[0] = pens[m_pal_ind16[(m_cont_reg[7]&0x03)]];
1174		pen_bg0[0] = pens[m_pal_ind16[((m_cont_reg[7]>>2)&0x03)]];
	1283	if (_Width > 512)
	1284	{
	1285	pen_bg1[0] = pens[m_pal_ind16[(m_cont_reg[7]&0x03)]];
	1286	pen_bg0[0] = pens[m_pal_ind16[((m_cont_reg[7]>>2)&0x03)]];
1175	1287
1176		xx = m_offset_x;
1177		while (xx--) { ln++ = pen_bg0[0]; ln++ = pen_bg1[0]; }
	1288	xx = m_offset_x;
	1289	while (xx--) { ln++ = pen_bg0[0]; ln++ = pen_bg1[0]; }
1178	1290
1179		x = (m_cont_reg[8] & 0x20) ? 0 : 1;
	1291	x = (m_cont_reg[8] & 0x20) ? 0 : 1;
1180	1292
1181		for (;x<4;x++)
1182		{
1183		pen_bg0[x] = pens[m_pal_ind16[x]];
1184		pen_bg1[x] = pens[m_pal_ind16[x]];
	1293	for (;x<4;x++)
	1294	{
	1295	pen_bg0[x] = pens[m_pal_ind16[x]];
	1296	pen_bg1[x] = pens[m_pal_ind16[x]];
	1297	}
	1298
	1299	for (x=0;x<128;x++)
	1300	{
	1301	colour = m_vram_space->read_byte(nametbl_addr++);
	1302
	1303	*ln++ = pen_bg0[colour>>6];
	1304	*ln++ = pen_bg1[(colour>>4)&3];
	1305	*ln++ = pen_bg0[(colour>>2)&3];
	1306	*ln++ = pen_bg1[(colour&3)];
	1307	}
	1308
	1309	pen_bg1[0] = pens[m_pal_ind16[(m_cont_reg[7]&0x03)]];
	1310	pen_bg0[0] = pens[m_pal_ind16[((m_cont_reg[7]>>2)&0x03)]];
	1311	xx = 16 - m_offset_x;
	1312	while (xx--) { ln++ = pen_bg0[0]; ln++ = pen_bg1[0]; }
1185	1313	}
1186
1187		for (x=0;x<128;x++)
	1314	else
1188	1315	{
1189		~~colour~~ = m_~~vram_s~~pa~~ce->read~~_~~byte(~~nametbl_~~add~~r++);
	1316	pen_bg0[0] = pens[m_pal_ind16[((m_cont_reg[7]>>2)&0x03)]];
1190	1317
1191		*ln++ = pen_bg0[colour>>6];
1192		*ln++ = pen_bg1[(colour>>4)&3];
1193		*ln++ = pen_bg0[(colour>>2)&3];
1194		*ln++ = pen_bg1[(colour&3)];
	1318	x = (m_cont_reg[8] & 0x20) ? 0 : 1;
	1319
	1320	for (;x<4;x++)
	1321	pen_bg0[x] = pens[m_pal_ind16[x]];
	1322
	1323	xx = m_offset_x;
	1324	while (xx--) *ln++ = pen_bg0[0];
	1325
	1326	for (x=0;x<128;x++)
	1327	{
	1328	colour = m_vram_space->read_byte(nametbl_addr++);
	1329	*ln++ = pen_bg0[colour>>6];
	1330	*ln++ = pen_bg0[(colour>>2)&3];
	1331	}
	1332
	1333	pen_bg0[0] = pens[m_pal_ind16[((m_cont_reg[7]>>2)&0x03)]];
	1334	xx = 16 - m_offset_x;
	1335	while (xx--) *ln++ = pen_bg0[0];
1195	1336	}
1196
1197		pen_bg1[0] = pens[m_pal_ind16[(m_cont_reg[7]&0x03)]];
1198		pen_bg0[0] = pens[m_pal_ind16[((m_cont_reg[7]>>2)&0x03)]];
1199		xx = 16 - m_offset_x;
1200		while (xx--) { ln++ = pen_bg0[0]; ln++ = pen_bg1[0]; }
	1337	m_size_now = RENDER_HIGH;
1201	1338	}
1202	1339
1203		void v99x8_device::mode_graphic6(const pen_t pens, UINT16 ln, int line)
	1340	template<typename _PixelType, int _Width>
	1341	void v99x8_device::mode_graphic6(const pen_t pens, _PixelType ln, int line)
1204	1342	{
1205	1343	UINT8 colour;
1206	1344	int line2, linemask, x, xx, nametbl_addr;
1207		UINT16 pen_bg, fg0;
1208		UINT16 fg1;
	1345	_PixelType pen_bg, fg0;
	1346	_PixelType fg1;
1209	1347
1210	1348	linemask = ((m_cont_reg[2] & 0x1f) << 3) \| 7;
1211	1349
r248389	r248390
1216	1354	nametbl_addr += 0x10000;
1217	1355
1218	1356	pen_bg = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
1219		xx = m_offset_x * 2;
	1357	if (_Width < 512)
	1358	xx = m_offset_x;
	1359	else
	1360	xx = m_offset_x * 2;
1220	1361	while (xx--) *ln++ = pen_bg;
1221	1362
1222	1363	if (m_cont_reg[2] & 0x40)
r248389	r248390
1226	1367	nametbl_addr++;
1227	1368	colour = m_vram_space->read_byte(((nametbl_addr&1) << 16) \| (nametbl_addr>>1));
1228	1369	fg0 = pens[m_pal_ind16[colour>>4]];
1229		fg1 = pens[m_pal_ind16[colour&15]];
1230		ln++ = fg0; ln++ = fg1; ln++ = fg0; ln++ = fg1;
1231		ln++ = fg0; ln++ = fg1; ln++ = fg0; ln++ = fg1;
1232		ln++ = fg0; ln++ = fg1; ln++ = fg0; ln++ = fg1;
1233		ln++ = fg0; ln++ = fg1; ln++ = fg0; ln++ = fg1;
	1370	if (_Width < 512)
	1371	{
	1372	ln++ = fg0; ln++ = fg0;
	1373	ln++ = fg0; ln++ = fg0;
	1374	ln++ = fg0; ln++ = fg0;
	1375	ln++ = fg0; ln++ = fg0;
	1376	}
	1377	else
	1378	{
	1379	fg1 = pens[m_pal_ind16[colour&15]];
	1380	ln++ = fg0; ln++ = fg1; ln++ = fg0; ln++ = fg1;
	1381	ln++ = fg0; ln++ = fg1; ln++ = fg0; ln++ = fg1;
	1382	ln++ = fg0; ln++ = fg1; ln++ = fg0; ln++ = fg1;
	1383	ln++ = fg0; ln++ = fg1; ln++ = fg0; ln++ = fg1;
	1384	}
1234	1385	nametbl_addr += 7;
1235	1386	}
1236	1387	}
r248389	r248390
1240	1391	{
1241	1392	colour = m_vram_space->read_byte(((nametbl_addr&1) << 16) \| (nametbl_addr>>1));
1242	1393	*ln++ = pens[m_pal_ind16[colour>>4]];
1243		*ln++ = pens[m_pal_ind16[colour&15]];
	1394	if (_Width > 512)
	1395	*ln++ = pens[m_pal_ind16[colour&15]];
1244	1396	nametbl_addr++;
1245	1397	}
1246	1398	}
1247	1399
1248		xx = (16 - m_offset_x) * 2;
	1400	xx = 16 - m_offset_x;
	1401	if (_Width > 512)
	1402	xx *= 2;
1249	1403	while (xx--) *ln++ = pen_bg;
	1404	m_size_now = RENDER_HIGH;
1250	1405	}
1251	1406
1252		void v99x8_device::mode_graphic7(const pen_t pens, UINT16 ln, int line)
	1407	template<typename _PixelType, int _Width>
	1408	void v99x8_device::mode_graphic7(const pen_t pens, _PixelType ln, int line)
1253	1409	{
1254	1410	UINT8 colour;
1255	1411	int line2, linemask, x, xx, nametbl_addr;
1256		~~UIN~~T16 pen, pen_bg;
	1412	_PixelType pen, pen_bg;
1257	1413
1258	1414	linemask = ((m_cont_reg[2] & 0x1f) << 3) \| 7;
1259	1415
r248389	r248390
1264	1420	nametbl_addr += 0x10000;
1265	1421
1266	1422	pen_bg = pens[m_pal_ind256[m_cont_reg[7]]];
1267		xx = m_offset_x * 2;
	1423	if (_Width < 512)
	1424	xx = m_offset_x;
	1425	else
	1426	xx = m_offset_x * 2;
1268	1427	while (xx--) *ln++ = pen_bg;
1269	1428
1270	1429	if ((m_v9958_sp_mode & 0x18) == 0x08) // v9958 screen 12, puzzle star title screen
r248389	r248390
1286	1445	(colour[2] & 7) << 5 \| (colour[3] & 7) << 8;
1287	1446
1288	1447	*ln++ = s_pal_indYJK[ind \| ((colour[0] >> 3) & 31)];
1289		*ln++ = s_pal_indYJK[ind \| ((colour[0] >> 3) & 31)];
	1448	if (_Width > 512)
	1449	*ln++ = s_pal_indYJK[ind \| ((colour[0] >> 3) & 31)];
1290	1450
1291	1451	*ln++ = s_pal_indYJK[ind \| ((colour[1] >> 3) & 31)];
1292		*ln++ = s_pal_indYJK[ind \| ((colour[1] >> 3) & 31)];
1293	1452
	1453	if (_Width > 512)
	1454	*ln++ = s_pal_indYJK[ind \| ((colour[1] >> 3) & 31)];
	1455
1294	1456	*ln++ = s_pal_indYJK[ind \| ((colour[2] >> 3) & 31)];
1295		*ln++ = s_pal_indYJK[ind \| ((colour[2] >> 3) & 31)];
1296	1457
	1458	if (_Width > 512)
	1459	*ln++ = s_pal_indYJK[ind \| ((colour[2] >> 3) & 31)];
	1460
1297	1461	*ln++ = s_pal_indYJK[ind \| ((colour[3] >> 3) & 31)];
1298		*ln++ = s_pal_indYJK[ind \| ((colour[3] >> 3) & 31)];
1299	1462
	1463	if (_Width > 512)
	1464	*ln++ = s_pal_indYJK[ind \| ((colour[3] >> 3) & 31)];
	1465
1300	1466	nametbl_addr++;
1301	1467	}
1302	1468	}
r248389	r248390
1319	1485	(colour[2] & 7) << 5 \| (colour[3] & 7) << 8;
1320	1486
1321	1487	*ln++ = colour[0] & 8 ? m_pal_ind16[colour[0] >> 4] : s_pal_indYJK[ind \| ((colour[0] >> 3) & 30)];
1322		*ln++ = colour[0] & 8 ? m_pal_ind16[colour[0] >> 4] : s_pal_indYJK[ind \| ((colour[0] >> 3) & 30)];
	1488	if (_Width > 512)
	1489	*ln++ = colour[0] & 8 ? m_pal_ind16[colour[0] >> 4] : s_pal_indYJK[ind \| ((colour[0] >> 3) & 30)];
1323	1490
1324	1491	*ln++ = colour[1] & 8 ? m_pal_ind16[colour[1] >> 4] : s_pal_indYJK[ind \| ((colour[1] >> 3) & 30)];
1325		*ln++ = colour[1] & 8 ? m_pal_ind16[colour[1] >> 4] : s_pal_indYJK[ind \| ((colour[1] >> 3) & 30)];
1326	1492
	1493	if (_Width > 512)
	1494	*ln++ = colour[1] & 8 ? m_pal_ind16[colour[1] >> 4] : s_pal_indYJK[ind \| ((colour[1] >> 3) & 30)];
	1495
1327	1496	*ln++ = colour[2] & 8 ? m_pal_ind16[colour[2] >> 4] : s_pal_indYJK[ind \| ((colour[2] >> 3) & 30)];
1328		*ln++ = colour[2] & 8 ? m_pal_ind16[colour[2] >> 4] : s_pal_indYJK[ind \| ((colour[2] >> 3) & 30)];
1329	1497
	1498	if (_Width > 512)
	1499	*ln++ = colour[2] & 8 ? m_pal_ind16[colour[2] >> 4] : s_pal_indYJK[ind \| ((colour[2] >> 3) & 30)];
	1500
1330	1501	*ln++ = colour[3] & 8 ? m_pal_ind16[colour[3] >> 4] : s_pal_indYJK[ind \| ((colour[3] >> 3) & 30)];
1331		*ln++ = colour[3] & 8 ? m_pal_ind16[colour[3] >> 4] : s_pal_indYJK[ind \| ((colour[3] >> 3) & 30)];
1332	1502
	1503	if (_Width > 512)
	1504	*ln++ = colour[3] & 8 ? m_pal_ind16[colour[3] >> 4] : s_pal_indYJK[ind \| ((colour[3] >> 3) & 30)];
	1505
1333	1506	nametbl_addr++;
1334	1507	}
1335	1508	}
r248389	r248390
1344	1517	ln++ = pen; ln++ = pen;
1345	1518	ln++ = pen; ln++ = pen;
1346	1519	ln++ = pen; ln++ = pen;
1347		ln++ = pen; ln++ = pen;
1348		ln++ = pen; ln++ = pen;
1349		ln++ = pen; ln++ = pen;
1350		ln++ = pen; ln++ = pen;
	1520	if (_Width > 512)
	1521	{
	1522	ln++ = pen; ln++ = pen;
	1523	ln++ = pen; ln++ = pen;
	1524	ln++ = pen; ln++ = pen;
	1525	ln++ = pen; ln++ = pen;
	1526	}
1351	1527	nametbl_addr++;
1352	1528	}
1353	1529	}
r248389	r248390
1358	1534	colour = m_vram_space->read_byte(((nametbl_addr&1) << 16) \| (nametbl_addr>>1));
1359	1535	pen = pens[m_pal_ind256[colour]];
1360	1536	*ln++ = pen;
1361		*ln++ = pen;
	1537	if (_Width > 512)
	1538	*ln++ = pen;
1362	1539	nametbl_addr++;
1363	1540	}
1364	1541	}
1365	1542
1366		xx = (16 - m_offset_x) * 2;
	1543	xx = 16 - m_offset_x;
	1544	if (_Width > 512)
	1545	xx *= 2;
1367	1546	while (xx--) *ln++ = pen_bg;
	1547	if (m_size_now != RENDER_HIGH) m_size_now = RENDER_LOW;
1368	1548	}
1369	1549
1370		void v99x8_device::mode_unknown(const pen_t pens, UINT16 ln, int line)
	1550	template<typename _PixelType, int _Width>
	1551	void v99x8_device::mode_unknown(const pen_t pens, _PixelType ln, int line)
1371	1552	{
1372		~~UIN~~T16 fg, bg;
	1553	_PixelType fg, bg;
1373	1554	int x;
1374	1555
1375	1556	fg = pens[m_pal_ind16[m_cont_reg[7] >> 4]];
1376	1557	bg = pens[m_pal_ind16[m_cont_reg[7] & 15]];
1377	1558
1378		x = m_offset_x * 2;
1379		while (x--) *ln++ = bg;
	1559	if (_Width < 512)
	1560	{
	1561	x = m_offset_x;
	1562	while (x--) *ln++ = bg;
1380	1563
1381		x = 512;
1382		while (x--) *ln++ = fg;
	1564	x = 256;
	1565	while (x--) *ln++ = fg;
1383	1566
1384		x = (16 - m_offset_x) * 2;
1385		while (x--) *ln++ = bg;
	1567	x = 16 - m_offset_x;
	1568	while (x--) *ln++ = bg;
	1569	}
	1570	else
	1571	{
	1572	x = m_offset_x * 2;
	1573	while (x--) *ln++ = bg;
	1574
	1575	x = 512;
	1576	while (x--) *ln++ = fg;
	1577
	1578	x = (16 - m_offset_x) * 2;
	1579	while (x--) *ln++ = bg;
	1580	}
	1581	if (m_size_now != RENDER_HIGH) m_size_now = RENDER_LOW;
1386	1582	}
1387	1583
1388		void v99x8_device::default_draw_sprite(const pen_t pens, UINT16 ln, UINT8 *col)
	1584	template<typename _PixelType, int _Width>
	1585	void v99x8_device::default_draw_sprite(const pen_t pens, _PixelType ln, UINT8 *col)
1389	1586	{
1390	1587	int i;
1391		ln += m_offset_x * 2;
	1588	if (_Width > 512)
	1589	ln += m_offset_x * 2;
	1590	else
	1591	ln += m_offset_x;
1392	1592
1393	1593	for (i=0;i<256;i++)
1394	1594	{
1395	1595	if (col[i] & 0x80)
1396	1596	{
1397	1597	*ln++ = pens[m_pal_ind16[col[i]&0x0f]];
1398		*ln++ = pens[m_pal_ind16[col[i]&0x0f]];
	1598	if (_Width > 512)
	1599	*ln++ = pens[m_pal_ind16[col[i]&0x0f]];
1399	1600	}
1400	1601	else
1401	1602	{
1402		ln += 2;
	1603	if (_Width > 512)
	1604	ln += 2;
	1605	else
	1606	ln++;
1403	1607	}
1404	1608	}
1405	1609	}
1406
1407		void v99x8_device::graphic5_draw_sprite(const pen_t pens, UINT16 ln, UINT8 *col)
	1610	template<typename _PixelType, int _Width>
	1611	void v99x8_device::graphic5_draw_sprite(const pen_t pens, _PixelType ln, UINT8 *col)
1408	1612	{
1409	1613	int i;
1410		ln += m_offset_x * 2;
	1614	if (_Width > 512)
	1615	ln += m_offset_x * 2;
	1616	else
	1617	ln += m_offset_x;
1411	1618
1412	1619	for (i=0;i<256;i++)
1413	1620	{
1414	1621	if (col[i] & 0x80)
1415	1622	{
1416	1623	*ln++ = pens[m_pal_ind16[(col[i]>>2)&0x03]];
1417		*ln++ = pens[m_pal_ind16[col[i]&0x03]];
	1624	if (_Width > 512)
	1625	*ln++ = pens[m_pal_ind16[col[i]&0x03]];
1418	1626	}
1419	1627	else
1420	1628	{
1421		ln += 2;
	1629	if (_Width > 512)
	1630	ln += 2;
	1631	else
	1632	ln++;
1422	1633	}
1423	1634	}
1424	1635	}
1425	1636
1426	1637
1427		void v99x8_device::graphic7_draw_sprite(const pen_t pens, UINT16 ln, UINT8 *col)
	1638	template<typename _PixelType, int _Width>
	1639	void v99x8_device::graphic7_draw_sprite(const pen_t pens, _PixelType ln, UINT8 *col)
1428	1640	{
1429	1641	static const UINT16 g7_ind16[16] = {
1430	1642	0, 2, 192, 194, 48, 50, 240, 242,
1431	1643	482, 7, 448, 455, 56, 63, 504, 511 };
1432	1644	int i;
1433	1645
1434		ln += m_offset_x * 2;
	1646	if (_Width > 512)
	1647	ln += m_offset_x * 2;
	1648	else
	1649	ln += m_offset_x;
1435	1650
1436	1651	for (i=0;i<256;i++)
1437	1652	{
1438	1653	if (col[i] & 0x80)
1439	1654	{
1440	1655	*ln++ = pens[g7_ind16[col[i]&0x0f]];
1441		*ln++ = pens[g7_ind16[col[i]&0x0f]];
	1656	if (_Width > 512)
	1657	*ln++ = pens[g7_ind16[col[i]&0x0f]];
1442	1658	}
1443	1659	else
1444	1660	{
1445		ln += 2;
	1661	if (_Width > 512)
	1662	ln += 2;
	1663	else
	1664	ln++;
1446	1665	}
1447	1666	}
1448	1667	}
r248389	r248390
1698	1917	m_stat_reg[0] = (m_stat_reg[0] & 0xa0) \| p;
1699	1918	}
1700	1919
	1920	#define SHORT_WIDTH (256 + 16)
	1921	#define LONG_WIDTH (512 + 32)
1701	1922
1702	1923	const v99x8_device::v99x8_mode v99x8_device::s_modes[] = {
1703	1924	{ 0x02,
1704		&v99x8_device::mode_text1,
1705		&v99x8_device::default_border,
	1925	&v99x8_device::mode_text1<UINT16, LONG_WIDTH>,
	1926	&v99x8_device::mode_text1<UINT16, SHORT_WIDTH>,
	1927	&v99x8_device::default_border<UINT16, LONG_WIDTH>,
	1928	&v99x8_device::default_border<UINT16, SHORT_WIDTH>,
1706	1929	NULL,
1707		NULL
1708		},
	1930	NULL,
	1931	NULL },
1709	1932	{ 0x01,
1710		&v99x8_device::mode_multi,
1711		&v99x8_device::default_border,
	1933	&v99x8_device::mode_multi<UINT16, LONG_WIDTH>,
	1934	&v99x8_device::mode_multi<UINT16, SHORT_WIDTH>,
	1935	&v99x8_device::default_border<UINT16, LONG_WIDTH>,
	1936	&v99x8_device::default_border<UINT16, SHORT_WIDTH>,
1712	1937	&v99x8_device::sprite_mode1,
1713		&v99x8_device::default_draw_sprite
1714		},
	1938	&v99x8_device::default_draw_sprite<UINT16, LONG_WIDTH>,
	1939	&v99x8_device::default_draw_sprite<UINT16, SHORT_WIDTH> },
1715	1940	{ 0x00,
1716		&v99x8_device::mode_graphic1,
1717		&v99x8_device::default_border,
	1941	&v99x8_device::mode_graphic1<UINT16, LONG_WIDTH>,
	1942	&v99x8_device::mode_graphic1<UINT16, SHORT_WIDTH>,
	1943	&v99x8_device::default_border<UINT16, LONG_WIDTH>,
	1944	&v99x8_device::default_border<UINT16, SHORT_WIDTH>,
1718	1945	&v99x8_device::sprite_mode1,
1719		&v99x8_device::default_draw_sprite
1720		},
	1946	&v99x8_device::default_draw_sprite<UINT16, LONG_WIDTH>,
	1947	&v99x8_device::default_draw_sprite<UINT16, SHORT_WIDTH> },
1721	1948	{ 0x04,
1722		&v99x8_device::mode_graphic23,
1723		&v99x8_device::default_border,
	1949	&v99x8_device::mode_graphic23<UINT16, LONG_WIDTH>,
	1950	&v99x8_device::mode_graphic23<UINT16, SHORT_WIDTH>,
	1951	&v99x8_device::default_border<UINT16, LONG_WIDTH>,
	1952	&v99x8_device::default_border<UINT16, SHORT_WIDTH>,
1724	1953	&v99x8_device::sprite_mode1,
1725		&v99x8_device::default_draw_sprite
1726		},
	1954	&v99x8_device::default_draw_sprite<UINT16, LONG_WIDTH>,
	1955	&v99x8_device::default_draw_sprite<UINT16, SHORT_WIDTH> },
1727	1956	{ 0x08,
1728		&v99x8_device::mode_graphic23,
1729		&v99x8_device::default_border,
	1957	&v99x8_device::mode_graphic23<UINT16, LONG_WIDTH>,
	1958	&v99x8_device::mode_graphic23<UINT16, SHORT_WIDTH>,
	1959	&v99x8_device::default_border<UINT16, LONG_WIDTH>,
	1960	&v99x8_device::default_border<UINT16, SHORT_WIDTH>,
1730	1961	&v99x8_device::sprite_mode2,
1731		&v99x8_device::default_draw_sprite
1732		},
	1962	&v99x8_device::default_draw_sprite<UINT16, LONG_WIDTH>,
	1963	&v99x8_device::default_draw_sprite<UINT16, SHORT_WIDTH> },
1733	1964	{ 0x0c,
1734		&v99x8_device::mode_graphic4,
1735		&v99x8_device::default_border,
	1965	&v99x8_device::mode_graphic4<UINT16, LONG_WIDTH>,
	1966	&v99x8_device::mode_graphic4<UINT16, SHORT_WIDTH>,
	1967	&v99x8_device::default_border<UINT16, LONG_WIDTH>,
	1968	&v99x8_device::default_border<UINT16, SHORT_WIDTH>,
1736	1969	&v99x8_device::sprite_mode2,
1737		&v99x8_device::default_draw_sprite
1738		},
	1970	&v99x8_device::default_draw_sprite<UINT16, LONG_WIDTH>,
	1971	&v99x8_device::default_draw_sprite<UINT16, SHORT_WIDTH> },
1739	1972	{ 0x10,
1740		&v99x8_device::mode_graphic5,
1741		&v99x8_device::graphic5_border,
	1973	&v99x8_device::mode_graphic5<UINT16, LONG_WIDTH>,
	1974	&v99x8_device::mode_graphic5<UINT16, SHORT_WIDTH>,
	1975	&v99x8_device::graphic5_border<UINT16, LONG_WIDTH>,
	1976	&v99x8_device::graphic5_border<UINT16, SHORT_WIDTH>,
1742	1977	&v99x8_device::sprite_mode2,
1743		&v99x8_device::graphic5_draw_sprite
1744		},
	1978	&v99x8_device::graphic5_draw_sprite<UINT16, LONG_WIDTH>,
	1979	&v99x8_device::graphic5_draw_sprite<UINT16, SHORT_WIDTH> },
1745	1980	{ 0x14,
1746		&v99x8_device::mode_graphic6,
1747		&v99x8_device::default_border,
	1981	&v99x8_device::mode_graphic6<UINT16, LONG_WIDTH>,
	1982	&v99x8_device::mode_graphic6<UINT16, SHORT_WIDTH>,
	1983	&v99x8_device::default_border<UINT16, LONG_WIDTH>,
	1984	&v99x8_device::default_border<UINT16, SHORT_WIDTH>,
1748	1985	&v99x8_device::sprite_mode2,
1749		&v99x8_device::default_draw_sprite
1750		},
	1986	&v99x8_device::default_draw_sprite<UINT16, LONG_WIDTH>,
	1987	&v99x8_device::default_draw_sprite<UINT16, SHORT_WIDTH> },
1751	1988	{ 0x1c,
1752		&v99x8_device::mode_graphic7,
1753		&v99x8_device::graphic7_border,
	1989	&v99x8_device::mode_graphic7<UINT16, LONG_WIDTH>,
	1990	&v99x8_device::mode_graphic7<UINT16, SHORT_WIDTH>,
	1991	&v99x8_device::graphic7_border<UINT16, LONG_WIDTH>,
	1992	&v99x8_device::graphic7_border<UINT16, SHORT_WIDTH>,
1754	1993	&v99x8_device::sprite_mode2,
1755		&v99x8_device::graphic7_draw_sprite
1756		},
	1994	&v99x8_device::graphic7_draw_sprite<UINT16, LONG_WIDTH>,
	1995	&v99x8_device::graphic7_draw_sprite<UINT16, SHORT_WIDTH> },
1757	1996	{ 0x0a,
1758		&v99x8_device::mode_text2,
1759		&v99x8_device::default_border,
	1997	&v99x8_device::mode_text2<UINT16, LONG_WIDTH>,
	1998	&v99x8_device::mode_text2<UINT16, SHORT_WIDTH>,
	1999	&v99x8_device::default_border<UINT16, LONG_WIDTH>,
	2000	&v99x8_device::default_border<UINT16, SHORT_WIDTH>,
1760	2001	NULL,
1761		NULL
1762		},
	2002	NULL,
	2003	NULL },
1763	2004	{ 0xff,
1764		&v99x8_device::mode_unknown,
1765		&v99x8_device::default_border,
	2005	&v99x8_device::mode_unknown<UINT16, LONG_WIDTH>,
	2006	&v99x8_device::mode_unknown<UINT16, SHORT_WIDTH>,
	2007	&v99x8_device::default_border<UINT16, LONG_WIDTH>,
	2008	&v99x8_device::default_border<UINT16, SHORT_WIDTH>,
1766	2009	NULL,
1767		NULL
1768		}
	2010	NULL,
	2011	NULL },
1769	2012	};
1770	2013
1771	2014	void v99x8_device::set_mode()
r248389	r248390
1783	2026	void v99x8_device::refresh_16(int line)
1784	2027	{
1785	2028	const pen_t *pens = m_palette->pens();
1786		~~bool~~ double_lines ~~= false~~;
	2029	int i, double_lines;
1787	2030	UINT8 col[256];
1788	2031	UINT16 ln, ln2 = NULL;
1789	2032
1790		if (m_cont_reg[9] & 0x08)
	2033	double_lines = 0;
	2034
	2035	if (m_size == RENDER_HIGH)
1791	2036	{
1792		ln = &m_bitmap.pix16(line*2+((m_stat_reg[2]>>1)&1));
	2037	if (m_cont_reg[9] & 0x08)
	2038	{
	2039	m_size_now = RENDER_HIGH;
	2040	ln = &m_bitmap.pix16(line*2+((m_stat_reg[2]>>1)&1));
	2041	}
	2042	else
	2043	{
	2044	ln = &m_bitmap.pix16(line*2);
	2045	ln2 = &m_bitmap.pix16(line*2+1);
	2046	double_lines = 1;
	2047	}
1793	2048	}
1794	2049	else
1795		{
1796		ln = &m_bitmap.pix16(line*2);
1797		ln2 = &m_bitmap.pix16(line*2+1);
1798		double_lines = true;
1799		}
	2050	ln = &m_bitmap.pix16(line);
1800	2051
1801	2052	if ( !(m_cont_reg[1] & 0x40) \|\| (m_stat_reg[2] & 0x40) )
1802	2053	{
1803		(this->*s_modes[m_mode].border_16) (pens, ln);
	2054	if (m_size == RENDER_HIGH)
	2055	(this->*s_modes[m_mode].border_16) (pens, ln);
	2056	else
	2057	(this->*s_modes[m_mode].border_16s) (pens, ln);
1804	2058	}
1805	2059	else
1806	2060	{
1807		int i = (line - m_offset_y) & 255;
1808		(this->*s_modes[m_mode].visible_16) (pens, ln, i);
1809		if (s_modes[m_mode].sprites)
	2061	i = (line - m_offset_y) & 255;
	2062	if (m_size == RENDER_HIGH)
1810	2063	{
1811		(this->*s_modes[m_mode].sprites) (i, col);
1812		(this->*s_modes[m_mode].draw_sprite_16) (pens, ln, col);
	2064	(this->*s_modes[m_mode].visible_16) (pens, ln, i);
	2065	if (s_modes[m_mode].sprites)
	2066	{
	2067	(this->*s_modes[m_mode].sprites) (i, col);
	2068	(this->*s_modes[m_mode].draw_sprite_16) (pens, ln, col);
	2069	}
1813	2070	}
	2071	else
	2072	{
	2073	(this->*s_modes[m_mode].visible_16s) (pens, ln, i);
	2074	if (s_modes[m_mode].sprites)
	2075	{
	2076	(this->*s_modes[m_mode].sprites) (i, col);
	2077	(this->*s_modes[m_mode].draw_sprite_16s) (pens, ln, col);
	2078	}
	2079	}
1814	2080	}
1815	2081
1816	2082	if (double_lines)
r248389	r248390
1975	2241	m_blink_count = (m_cont_reg[13] & 0x0f) * 10;
1976	2242	}
1977	2243	}
	2244
	2245	// check screen rendering size
	2246	if (m_size_auto && (m_size_now >= 0) && (m_size != m_size_now) )
	2247	m_size = m_size_now;
	2248
	2249	if (m_size != m_size_old)
	2250	{
	2251	if (m_size == RENDER_HIGH)
	2252	m_screen->set_visible_area (0, 512 + 32 - 1, 0, 424 + 56 - 1);
	2253	else
	2254	m_screen->set_visible_area (0, 256 + 16 - 1, 0, 212 + 28 - 1);
	2255
	2256	m_size_old = m_size;
	2257	}
	2258
	2259	m_size_now = -1;
1978	2260	}
1979	2261
1980	2262	/***************************************************************************

trunk/src/emu/video/v9938.h
r248389	r248390
29	29	#define MCFG_V99X8_INTERRUPT_CALLBACK(_irq) \
30	30	downcast<v99x8_device *>(device)->set_interrupt_callback(DEVCB_##_irq);
31	31
	32	// init functions
32	33
	34	#define MODEL_V9938 (0)
	35	#define MODEL_V9958 (1)
	36
	37	// resolutions
	38	#define RENDER_HIGH (0)
	39	#define RENDER_LOW (1)
	40	#define RENDER_AUTO (2)
	41
	42
33	43	//**************************************************************************
34	44	// GLOBAL VARIABLES
35	45	//**************************************************************************
r248389	r248390
40	50
41	51
42	52
	53
43	54	//**************************************************************************
44	55	// TYPE DEFINITIONS
45	56	//**************************************************************************
r248389	r248390
59	70	m_int_callback.set_callback(irq);
60	71	}
61	72	int interrupt ();
	73	void set_resolution (int);
62	74	int get_transpen();
63	75	bitmap_ind16 &get_bitmap() { return m_bitmap; }
64	76	void update_mouse_state(int mx_delta, int my_delta, int button_state);
r248389	r248390
101	113	void check_int();
102	114	void register_write(int reg, int data);
103	115
104		void default_border(const pen_t pens, UINT16 ln);
105		void graphic7_border(const pen_t pens, UINT16 ln);
106		void graphic5_border(const pen_t pens, UINT16 ln);
107		void mode_text1(const pen_t pens, UINT16 ln, int line);
108		void mode_text2(const pen_t pens, UINT16 ln, int line);
109		void mode_multi(const pen_t pens, UINT16 ln, int line);
110		void mode_graphic1(const pen_t pens, UINT16 ln, int line);
111		void mode_graphic23(const pen_t pens, UINT16 ln, int line);
112		void mode_graphic4(const pen_t pens, UINT16 ln, int line);
113		void mode_graphic5(const pen_t pens, UINT16 ln, int line);
114		void mode_graphic6(const pen_t pens, UINT16 ln, int line);
115		void mode_graphic7(const pen_t pens, UINT16 ln, int line);
	116	template<typename _PixelType, int _Width> void default_border(const pen_t pens, _PixelType ln);
	117	template<typename _PixelType, int _Width> void graphic7_border(const pen_t pens, _PixelType ln);
	118	template<typename _PixelType, int _Width> void graphic5_border(const pen_t pens, _PixelType ln);
	119	template<typename _PixelType, int _Width> void mode_text1(const pen_t pens, _PixelType ln, int line);
	120	template<typename _PixelType, int _Width> void mode_text2(const pen_t pens, _PixelType ln, int line);
	121	template<typename _PixelType, int _Width> void mode_multi(const pen_t pens, _PixelType ln, int line);
	122	template<typename _PixelType, int _Width> void mode_graphic1(const pen_t pens, _PixelType ln, int line);
	123	template<typename _PixelType, int _Width> void mode_graphic23(const pen_t pens, _PixelType ln, int line);
	124	template<typename _PixelType, int _Width> void mode_graphic4(const pen_t pens, _PixelType ln, int line);
	125	template<typename _PixelType, int _Width> void mode_graphic5(const pen_t pens, _PixelType ln, int line);
	126	template<typename _PixelType, int _Width> void mode_graphic6(const pen_t pens, _PixelType ln, int line);
	127	template<typename _PixelType, int _Width> void mode_graphic7(const pen_t pens, _PixelType ln, int line);
116	128	// template<typename _PixelType, int _Width> void mode_yae(const pen_t pens, _PixelType ln, int line);
117	129	// template<typename _PixelType, int _Width> void mode_yjk(const pen_t pens, _PixelType ln, int line);
118		void mode_unknown(const pen_t pens, UINT16 ln, int line);
119		void default_draw_sprite(const pen_t pens, UINT16 ln, UINT8 *col);
120		void graphic5_draw_sprite(const pen_t pens, UINT16 ln, UINT8 *col);
121		void graphic7_draw_sprite(const pen_t pens, UINT16 ln, UINT8 *col);
	130	template<typename _PixelType, int _Width> void mode_unknown(const pen_t pens, _PixelType ln, int line);
	131	template<typename _PixelType, int _Width> void default_draw_sprite(const pen_t pens, _PixelType ln, UINT8 *col);
	132	template<typename _PixelType, int _Width> void graphic5_draw_sprite(const pen_t pens, _PixelType ln, UINT8 *col);
	133	template<typename _PixelType, int _Width> void graphic7_draw_sprite(const pen_t pens, _PixelType ln, UINT8 *col);
122	134
123	135	void sprite_mode1(int line, UINT8 *col);
124	136	void sprite_mode2(int line, UINT8 *col);
r248389	r248390
185	197	int m_scanline;
186	198	// blinking
187	199	int m_blink, m_blink_count;
	200	// size
	201	int m_size, m_size_old, m_size_auto, m_size_now;
188	202	// mouse
189	203	UINT8 m_mx_delta, m_my_delta;
190	204	// mouse & lightpen
r248389	r248390
214	228	{
215	229	UINT8 m;
216	230	void (v99x8_device::visible_16)(const pen_t , UINT16*, int);
	231	void (v99x8_device::visible_16s)(const pen_t , UINT16*, int);
217	232	void (v99x8_device::border_16)(const pen_t , UINT16*);
	233	void (v99x8_device::border_16s)(const pen_t , UINT16*);
218	234	void (v99x8_device::sprites)(int, UINT8);
219	235	void (v99x8_device::draw_sprite_16)(const pen_t , UINT16, UINT8);
	236	void (v99x8_device::draw_sprite_16s)(const pen_t , UINT16, UINT8);
220	237	} ;
221	238	static const v99x8_mode s_modes[];
222	239	required_device<palette_device> m_palette;

trunk/src/emu/video/voodoo.c
r248389	r248390
174	174
175	175	#define MODIFY_PIXEL(VV)
176	176
177		// Need to turn off cycle eating when debugging MIPS drc
178		// otherwise timer interrupts won't match nodrc debug mode.
179		#define EAT_CYCLES (1)
180	177
181	178
	179
182	180	/*************************************
183	181	*
184	182	* Statics
r248389	r248390
3953	3951	/* bit 31 is not used */
3954	3952
3955	3953	/* eat some cycles since people like polling here */
3956		~~if (EAT_CYCLES)~~ v->cpu->execute().eat_cycles(1000);
	3954	v->cpu->execute().eat_cycles(1000);
3957	3955	break;
3958	3956
3959	3957	/* bit 2 of the initEnable register maps this to dacRead */
r248389	r248390
3966	3964	case vRetrace:
3967	3965
3968	3966	/* eat some cycles since people like polling here */
3969		~~if (EAT_CYCLES)~~ v->cpu->execute().eat_cycles(10);
	3967	v->cpu->execute().eat_cycles(10);
3970	3968	result = v->screen->vpos();
3971	3969	break;
3972	3970
r248389	r248390
3981	3979	result = v->fbi.cmdfifo[0].rdptr;
3982	3980
3983	3981	/* eat some cycles since people like polling here */
3984		~~if (EAT_CYCLES)~~ v->cpu->execute().eat_cycles(1000);
	3982	v->cpu->execute().eat_cycles(1000);
3985	3983	break;
3986	3984
3987	3985	case cmdFifoAMin:

trunk/src/mame/arcade.lst
r248389	r248390
3139	3139	cawingbl // bootleg
3140	3140	cawingb2 // bootleg
3141	3141	nemo // 30/11/1990 (c) 1990 (World)
3142		nemor1 // 09/11/1990 (c) 1990 (World)
	3142	nemor1 // 09/11/1990 (c) 1990 (World)
3143	3143	nemoj // 20/11/1990 (c) 1990 (Japan)
3144	3144	sf2 // 22/05/1991 (c) 1991 (World)
3145	3145	sf2eb // 14/02/1991 (c) 1991 (World)
r248389	r248390
3206	3206	sf2v004 // hack
3207	3207	sf2acc // hack
3208	3208	sf2acca // hack
3209		sf2ceblp // hack
	3209	sf2ceblp // hack
3210	3210	sf2accp2 // hack
3211	3211	sf2amf // bootleg
3212	3212	sf2amf2 // bootleg
r248389	r248390
3234	3234	varthr1 // 12/06/1992 (c) 1992 (World)
3235	3235	varthu // 12/06/1992 (c) 1992 (USA)
3236	3236	varthj // 14/07/1992 (c) 1992 (Japan)
3237		varthjr // 14/07/1992 (c) 1992 (Japan)
3238	3237	qad // 01/07/1992 (c) 1992 (USA)
3239	3238	qadjr // 21/09/1994 (c) 1994 (Japan)
3240	3239	wof // 31/10/1992 (c) 1992 (World) (CPS1 + QSound)
r248389	r248390
3279	3278	rockmanj // 22/09/1995 (c) 1995 (Japan)
3280	3279	fcrash // bootleg of Final Fight
3281	3280	ffightbl // bootleg
3282		ffightbla // bootleg
3283	3281	ganbare // 11/04/2000 (c) 2000 (Japan)
3284	3282
3285	3283
r248389	r248390
4689	4687	passshtb // bootleg
4690	4688	shinoblb // (c) 1987 (but bootleg)
4691	4689	shinobld // (c) 1987 (but bootleg)
4692		shinoblda //
4693	4690	tetrisbl // (c) 1988 (but bootleg)
4694	4691	beautyb // (c) 1991 AMT
4695	4692	iqpipe // (c) 1991 AMT
r248389	r248390
4822	4819	// Sega System 24 games
4823	4820	// disk based
4824	4821	hotrodj // 1988.03 Hot Rod (Japan)
4825		hotrodja // 1988.03 Hot Rod (Japan)
4826	4822	hotrod // 1988.?? Hot Rod (World)
4827	4823	hotroda
4828	4824	// 1988.07 Hot Rod (US)
r248389	r248390
5764	5760	// 2006.09 Sega Network Taisen Mahjong MJ 3 Evolution (Rev A)
5765	5761	// 2006.10 Quest of D Oukoku no Syugosya Ver.3.00
5766	5762	// 2006.11 Quest of D Oukoku no Syugosya Ver.3.01
5767		mj3evo // 2007.06 Sega Network Taisen Mahjong MJ 3 Evolution (Rev B)
5768	5763	// 2007.11 Quest of D The Battle Kingdom Ver.4.00
5769	5764	// 2008.01 Quest of D The Battle Kingdom Ver.4.00b
5770	5765	// 2008.02 Quest of D The Battle Kingdom Ver.4.00c
r248389	r248390
6022	6017	midres // (c) 1989 Data East Corporation (World)
6023	6018	midresu // (c) 1989 Data East USA (US)
6024	6019	midresj // (c) 1989 Data East Corporation (Japan)
6025		midresb // bootleg
6026		midresbj // bootleg
	6020	midresb // (c) 1989 Data East Corporation (Japan)
6027	6021	bouldash // (c) 1990 Data East Corporation (World)
6028	6022	bouldashj // (c) 1990 Data East Corporation (Japan)
6029	6023	// end of similar hardware
r248389	r248390
6483	6477	wecleman // GX602 (c) 1986
6484	6478	wecleman2 // GX602?(c) 1988
6485	6479	hotchase // GX763 (c) 1988
6486		hotchasea
6487	6480	chqflag // GX717 (c) 1988
6488	6481	chqflagj // GX717 (c) 1988 (Japan)
6489	6482	ultraman // GX910 (c) 1991 Banpresto/Bandai
r248389	r248390
9671	9664	maya // (c) 1994 Promat
9672	9665	mayaa // (c) 1994 Promat
9673	9666	mayab // (c) 1994 Promat
9674		mayac // (c) 1994 Promat
9675	9667	inca // (c) 199? ????
9676	9668	blktouch // (c) Yang Gi Co Ltd.
9677	9669	mcnpshnt // "33" Mahjong Campus Hunting 1990 Dynax
r248389	r248390
9726	9718	ddenlovj // "112" (c) 1995 Dynax (Japan)
9727	9719	ddenlovrk // "113" (c) 1995 Dynax (Korea)
9728	9720	ddenlovr // "113" (c) 1996 Dynax (Hong Kong)
9729		mjschuka // "115" (c) 1995 Dynax
9730	9721	mjchuuka // "121" (c) 1998 Dynax
9731	9722	ddenlovrb // bootleg
9732	9723	mjflove // "500" 1996 Dynax
r248389	r248390
10657	10648	koftball // (c) 1995 BMC
10658	10649	bmcpokr // (c) 1999 BMC
10659	10650	popobear // (c) 2000 BMC
10660		mjmaglmp // (c) 2000 BMC
10661	10651
10662	10652	// Merit
10663	10653	mgames // (c) 1981 Merit

trunk/src/mame/audio/nl_kidniki.c
r248389	r248390
16	16	#ifndef __PLIB_PREPROCESSOR__
17	17
18	18	#define MC14584B_GATE(_name) \
19		NET_REGISTER_DEV(MC14584B_GATE, _name)
	19	NET_REGISTER_DEV_X(MC14584B_GATE, _name)
20	20
21	21	#define MC14584B_DIP(_name) \
22		NET_REGISTER_DEV(MC14584B_DIP, _name)
	22	NET_REGISTER_DEV_X(MC14584B_DIP, _name)
23	23
24	24	#define LM324_DIP(_name) \
25		NET_REGISTER_DEV(LM324_DIP, _name)
	25	NET_REGISTER_DEV_X(LM324_DIP, _name)
26	26
27	27	#define LM358_DIP(_name) \
28		NET_REGISTER_DEV(LM358_DIP, _name)
	28	NET_REGISTER_DEV_X(LM358_DIP, _name)
29	29
30	30	NETLIST_EXTERNAL(kidniki_lib)
31	31

trunk/src/mame/audio/poolshrk.c
r248389	r248390
157	157	*
158	158	*************************************/
159	159
160		WRITE8_MEMBER(poolshrk_state::scratch_sound_w)
	160	WRITE8_MEMBER(poolshrk_state::poolshrk_scratch_sound_w)
161	161	{
162	162	m_discrete->write(space, POOLSHRK_SCRATCH_SND, offset & 1);
163	163	}
164	164
165		WRITE8_MEMBER(poolshrk_state::score_sound_w)
	165	WRITE8_MEMBER(poolshrk_state::poolshrk_score_sound_w)
166	166	{
167	167	m_discrete->write(space, POOLSHRK_SCORE_EN, 1); /* this will trigger the sound code for 1 sample */
168	168	}
169	169
170		WRITE8_MEMBER(poolshrk_state::click_sound_w)
	170	WRITE8_MEMBER(poolshrk_state::poolshrk_click_sound_w)
171	171	{
172	172	m_discrete->write(space, POOLSHRK_CLICK_EN, 1); /* this will trigger the sound code for 1 sample */
173	173	}
174	174
175		WRITE8_MEMBER(poolshrk_state::bump_sound_w)
	175	WRITE8_MEMBER(poolshrk_state::poolshrk_bump_sound_w)
176	176	{
177	177	m_discrete->write(space, POOLSHRK_BUMP_EN, offset & 1);
178	178	}

trunk/src/mame/audio/scramble.c
r248389	r248390
162	162	}
163	163
164	164
165		// Harem ~~(same as scorpion)~~
	165	// Harem
166	166
167		READ8_MEMBER(scramble_state::harem_~~digitalke~~r~~_in~~tr_r)
	167	WRITE8_MEMBER( scramble_state::harem_portA_w )
168	168	{
169		~~return~~ ~~m_digitalk~~e~~r->digitalk~~e~~r_0_intr_r();~~
	169	// Speech?
170	170	}
171
172		WRITE8_MEMBER(scramble_state::harem_digitalker_control_w)
	171	WRITE8_MEMBER( scramble_state::harem_portB_w )
173	172	{
174		m_digitalker->digitalker_0_cs_w (data & 1 ? ASSERT_LINE : CLEAR_LINE);
175		m_digitalker->digitalker_0_cms_w(data & 2 ? ASSERT_LINE : CLEAR_LINE);
176		m_digitalker->digitalker_0_wr_w (data & 4 ? ASSERT_LINE : CLEAR_LINE);
	173	// Speech?
177	174	}
178	175
179	176

trunk/src/mame/drivers/1942.c
r248389	r248390
168	168	}
169	169
170	170
171
172
173	171	static ADDRESS_MAP_START( c1942_map, AS_PROGRAM, 8, _1942_state )
174	172	AM_RANGE(0x0000, 0x7fff) AM_ROM
175	173	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
r248389	r248390
205	203	m_palette->set_indirect_color(offset, rgb_t(r<<5,g<<5,b<<6));
206	204	}
207	205
208		WRITE8_MEMBER(_1942_state::c1942p_soundlatch_w)
209		{
210		soundlatch_byte_w(space, 0, data);
211		m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
212		}
213
214	206	static ADDRESS_MAP_START( c1942p_map, AS_PROGRAM, 8, _1942_state )
215	207	AM_RANGE(0x0000, 0x7fff) AM_ROM
216	208	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
r248389	r248390
229	221	AM_RANGE(0xf000, 0xf3ff) AM_RAM AM_WRITE(c1942p_palette_w) AM_SHARE("protopal")
230	222
231	223	AM_RANGE(0xf400, 0xf400) AM_WRITE(c1942_bankswitch_w)
232		AM_RANGE(0xf500, 0xf500) AM_WRITE(~~c1942p_~~soundlatch_w)
	224	AM_RANGE(0xf500, 0xf500) AM_WRITE(soundlatch_byte_w)
233	225	AM_RANGE(0xf600, 0xf600) AM_WRITE(c1942p_f600_w)
234	226
235	227	AM_RANGE(0xf700, 0xf700) AM_READ_PORT("DSWA")
r248389	r248390
239	231	AM_RANGE(0xf704, 0xf704) AM_READ_PORT("P2")
240	232	ADDRESS_MAP_END
241	233
242
243		static ADDRESS_MAP_START(c1942p_sound_map, AS_PROGRAM, 8, _1942_state )
244		AM_RANGE(0x0000, 0x3fff) AM_ROM
245		AM_RANGE(0x4000, 0x47ff) AM_RAM
246
247		AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_byte_r)
248		ADDRESS_MAP_END
249
250		static ADDRESS_MAP_START( c1942p_sound_io, AS_IO, 8, _1942_state )
251		ADDRESS_MAP_GLOBAL_MASK(0xff)
252		AM_RANGE(0x0000, 0x0000) AM_WRITENOP
253		AM_RANGE(0x0014, 0x0015) AM_DEVWRITE("ay1", ay8910_device, address_data_w)
254		AM_RANGE(0x0018, 0x0019) AM_DEVWRITE("ay2", ay8910_device, address_data_w)
255		ADDRESS_MAP_END
256
257
258
259	234	static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, _1942_state )
260	235	AM_RANGE(0x0000, 0x3fff) AM_ROM
261	236	AM_RANGE(0x4000, 0x47ff) AM_RAM
r248389	r248390
625	600	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", _1942_state, c1942_scanline, "screen", 0, 1)
626	601
627	602	MCFG_CPU_ADD("audiocpu", Z80, SOUND_CPU_CLOCK) /* 3 MHz ??? */
628		MCFG_CPU_PROGRAM_MAP(c1942p_sound_map)
629		MCFG_CPU_IO_MAP(c1942p_sound_io)
	603	MCFG_CPU_PROGRAM_MAP(sound_map)
630	604	MCFG_CPU_PERIODIC_INT_DRIVER(_1942_state, irq0_line_hold, 4*60)
631	605
632	606
r248389	r248390
917	891	ROM_LOAD( "3.bin", 0x14000, 0x4000, CRC(108fda63) SHA1(6ffdf57a04bcfae9fdb2343f30cff50926188cbf) ) // sldh
918	892
919	893	ROM_REGION( 0x10000, "audiocpu", 0 )
920		ROM_LOAD( "04.bin", 0x0000, 0x4000, CRC(b4efd1af) SHA1(015b687b1714f892c3b2528bceb2df8ca48b6b8e) )
	894	ROM_LOAD( "snd.bin", 0x0000, 0x4000, BAD_DUMP CRC(43d6df9f) SHA1(c34579c73faa7e9552a6721ef8050b33ca158588) ) // sldh - looks bad, window was smashed, likely dead.
	895	ROM_LOAD( "sr-01.c11", 0x0000, 0x4000, CRC(bd87f06b) SHA1(821f85cf157f81117eeaba0c3cf0337eac357e58) ) // works but we can't be 100% sure it was the same.
921	896
922	897	ROM_REGION( 0x2000, "gfx1", ROMREGION_INVERT )
923	898	ROM_LOAD( "8.bin", 0x0000, 0x2000, CRC(6ebca191) SHA1(0dbddadde54a0ab66994c4a8726be05c6ca88a0e) ) /* characters */ // sldh
r248389	r248390
951	926	GAME( 198?, 1942h, 1942, 1942, 1942, _1942_state, 1942, ROT270, "hack (Two Bit Score?)", "42", GAME_SUPPORTS_SAVE )
952	927	GAME( 1984, 1942b, 1942, 1942, 1942, _1942_state, 1942, ROT270, "Capcom", "1942 (First Version)", GAME_SUPPORTS_SAVE )
953	928	GAME( 1985, 1942w, 1942, 1942, 1942, _1942_state, 1942, ROT270, "Capcom (Williams Electronics license)", "1942 (Williams Electronics license)", GAME_SUPPORTS_SAVE ) /* Based on 1942 (Revision B) */
954		GAME( 1984, 1942p, 1942, 1942p,1942p,_1942_state, 1942, ROT270, "bo~~otleg~~", "1942 (~~Tecf~~r~~i PCB, b~~ootleg?)", GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE )
	929	GAME( 1984, 1942p, 1942, 1942p,1942p,_1942_state, 1942, ROT270, "Capcom", "1942 (prototype)", GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE )

trunk/src/mame/drivers/bmcpokr.c
r248389	r248390
1	1	// license:BSD-3-Clause
2	2	// copyright-holders:Luca Elia
3		/***************************************************************************
	3	/************************************************************************************************************
4	4
5		BMC games using a 68k + VDB40817/SYA70521
	5	Dongfang Shenlong ("Eastern Dragon")
	6	BMC 1999
6	7
7	8	driver by Luca Elia
8
9	9	Similar to bmcbowl, koftball, popobear
10	10
11		CPU: 68000
12		Video: BMC VDB40817 + BMC SYA70521
13		Sound: M6295 + UM3567
14		Other: BMC B816140 (CPLD)
	11	PCB Layout
	12	----------
15	13
16		***************************************************************************/
	14	BMC-A81212
	15	\|---------------------------------------\|
	16	\| CH-A-401 CH-M-301 CH-M-701 \|
	17	\|M11B416256A UM3567 \|
	18	\|42MHz CH-M-201 CH-M-101 M6295 \|
	19	\| VDB40817 1\|
	20	\| HM86171-80 VOL 0\|
	21	\| SYA70521 W\|
	22	\| LM324 7805 A\|
	23	\|DSW1 Y\|
	24	\| 68000 TDA2003 \|
	25	\|DSW2 CH-M-505 CH-M-605 \|
	26	\| 6264 6264 2\|
	27	\|DSW3 CPLD 74HC132 74LS05 2\|
	28	\| 555 W\|
	29	\|DSW4 A\|
	30	\| BATT SW JAMMA Y\|
	31	\|---------------------------------------\|
	32	Notes:
	33	RAM - M11B416256, 6264(x2)
	34	VDB40817/SYA70521 - Unknown QFP100
	35	CPLD - unknown PLCC44 chip labelled 'BMC B816140'
	36	BATT - 5.5 volt 0.047F super cap
	37	68000 @10.50MHz (42/4)
	38	M6295 @1.05MHz (42/40)
	39	UM3567 @3.50MHz (42/12)
	40	HSync - 15.440kHz
	41	VSync - 58.935Hz
17	42
	43	************************************************************************************************************/
	44
18	45	#include "emu.h"
19	46	#include "cpu/m68000/m68000.h"
20		#include "video/ramdac.h"
21	47	#include "sound/2413intf.h"
22	48	#include "sound/okim6295.h"
	49	#include "video/ramdac.h"
23	50	#include "machine/nvram.h"
24	51	#include "machine/ticket.h"
25	52
r248389	r248390
42	69	m_palette(*this, "palette")
43	70	{ }
44	71
45		// Devices
46	72	required_device<cpu_device> m_maincpu;
47	73	required_device<ticket_dispenser_device> m_hopper;
48	74	required_shared_ptr<UINT16> m_videoram_1;
r248389	r248390
56	82	required_device<gfxdecode_device> m_gfxdecode;
57	83	required_device<palette_device> m_palette;
58	84
59		// Protection
	85	tilemap_t *m_tilemap_1;
	86	tilemap_t *m_tilemap_2;
	87	TILE_GET_INFO_MEMBER(get_t1_tile_info);
	88	TILE_GET_INFO_MEMBER(get_t2_tile_info);
	89	TILE_GET_INFO_MEMBER(get_t3_tile_info);
	90	DECLARE_WRITE16_MEMBER(videoram_1_w);
	91	DECLARE_WRITE16_MEMBER(videoram_2_w);
	92
60	93	UINT16 m_prot_val;
61	94	DECLARE_READ16_MEMBER(prot_r);
62	95	DECLARE_WRITE16_MEMBER(prot_w);
63	96	DECLARE_READ16_MEMBER(unk_r);
64	97
65		// I/O
66	98	UINT16 m_mux;
67	99	DECLARE_WRITE16_MEMBER(mux_w);
68	100	DECLARE_READ16_MEMBER(dsw_r);
69	101	DECLARE_CUSTOM_INPUT_MEMBER(hopper_r);
70		DECLARE_READ16_MEMBER(mjmaglmp_dsw_r);
71		DECLARE_READ16_MEMBER(mjmaglmp_key_r);
72	102
73		// Interrrupts
74	103	UINT16 m_irq_enable;
75	104	DECLARE_WRITE16_MEMBER(irq_enable_w);
76	105	DECLARE_WRITE16_MEMBER(irq_ack_w);
77		TIMER_DEVICE_CALLBACK_MEMBER(interrupt);
78	106
79		// Video
80		tilemap_t *m_tilemap_1;
81		tilemap_t *m_tilemap_2;
82		TILE_GET_INFO_MEMBER(get_t1_tile_info);
83		TILE_GET_INFO_MEMBER(get_t2_tile_info);
84		TILE_GET_INFO_MEMBER(get_t3_tile_info);
85		DECLARE_WRITE16_MEMBER(videoram_1_w);
86		DECLARE_WRITE16_MEMBER(videoram_2_w);
87
88	107	bitmap_ind16 *m_pixbitmap;
89	108	void pixbitmap_redraw();
90	109	UINT16 m_pixpal;
r248389	r248390
95	114	void draw_layer(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int layer);
96	115	UINT32 screen_update_bmcpokr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
97	116
	117	TIMER_DEVICE_CALLBACK_MEMBER(interrupt);
	118
98	119	void save_state()
99	120	{
100	121	save_item(NAME(m_prot_val));
r248389	r248390
418	439	AM_RANGE(0x3b0000, 0x3b0001) AM_READ_PORT("INPUTS2")
419	440	ADDRESS_MAP_END
420	441
421
422		READ16_MEMBER(bmcpokr_state::mjmaglmp_dsw_r)
423		{
424		switch ((m_mux >> 4) & 7)
425		{
426		case 7: return ioport("DSW1")->read() << 8;
427		case 6: return ioport("DSW2")->read() << 8;
428		case 5: return ioport("DSW3")->read() << 8;
429		case 3: return ioport("DSW4")->read() << 8;
430		}
431		return 0xff << 8;
432		}
433
434		READ16_MEMBER(bmcpokr_state::mjmaglmp_key_r)
435		{
436		UINT16 key = 0x3f;
437		switch ((m_mux >> 4) & 7)
438		{
439		case 0: key = ioport("KEY1")->read(); break;
440		case 1: key = ioport("KEY2")->read(); break;
441		case 2: key = ioport("KEY3")->read(); break;
442		case 3: key = ioport("KEY4")->read(); break;
443		case 4: key = ioport("KEY5")->read(); break;
444		}
445		return ioport("INPUTS")->read() \| (key & 0x3f);
446		}
447
448		static ADDRESS_MAP_START( mjmaglmp_map, AS_PROGRAM, 16, bmcpokr_state )
449		AM_RANGE(0x000000, 0x03ffff) AM_ROM
450		AM_RANGE(0x210000, 0x21ffff) AM_RAM AM_SHARE("nvram")
451
452		AM_RANGE(0x280000, 0x287fff) AM_RAM_WRITE(videoram_1_w) AM_SHARE("videoram_1")
453		AM_RANGE(0x288000, 0x28ffff) AM_RAM_WRITE(videoram_2_w) AM_SHARE("videoram_2")
454		AM_RANGE(0x290000, 0x297fff) AM_RAM
455
456		AM_RANGE(0x2a0000, 0x2dffff) AM_RAM_WRITE(pixram_w) AM_SHARE("pixram")
457
458		AM_RANGE(0x2ff800, 0x2ff9ff) AM_RAM AM_SHARE("scrollram_1")
459		AM_RANGE(0x2ffa00, 0x2ffbff) AM_RAM AM_SHARE("scrollram_2")
460		AM_RANGE(0x2ffc00, 0x2ffdff) AM_RAM AM_SHARE("scrollram_3")
461		AM_RANGE(0x2ffe00, 0x2fffff) AM_RAM
462
463		AM_RANGE(0x320000, 0x320003) AM_RAM AM_SHARE("layerctrl")
464
465		AM_RANGE(0x388000, 0x388001) AM_WRITE(mux_w)
466
467		AM_RANGE(0x390000, 0x390001) AM_READ(mjmaglmp_dsw_r)
468
469		AM_RANGE(0x398000, 0x398001) AM_READ(mjmaglmp_key_r)
470
471		AM_RANGE(0x3c8800, 0x3c8803) AM_DEVWRITE8("ymsnd", ym2413_device, write, 0x00ff)
472		AM_RANGE(0x3c9000, 0x3c9001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
473
474		AM_RANGE(0x3c9800, 0x3c9801) AM_DEVWRITE8("ramdac",ramdac_device, index_w, 0x00ff )
475		AM_RANGE(0x3c9802, 0x3c9803) AM_DEVWRITE8("ramdac",ramdac_device, pal_w, 0x00ff )
476		AM_RANGE(0x3c9804, 0x3c9805) AM_DEVWRITE8("ramdac",ramdac_device, mask_w, 0x00ff )
477
478		AM_RANGE(0x3ca000, 0x3ca001) AM_RAM // 3ca001.b, rw
479		AM_RANGE(0x3ca002, 0x3ca003) AM_RAM // 3ca003.b, w(9d)
480		AM_RANGE(0x3ca006, 0x3ca007) AM_WRITE(irq_ack_w)
481		AM_RANGE(0x3ca008, 0x3ca009) AM_WRITE(irq_enable_w)
482		AM_RANGE(0x3ca00e, 0x3ca00f) AM_RAM AM_SHARE("priority") // 3ca00f.b, w (priority?)
483		AM_RANGE(0x3ca016, 0x3ca017) AM_WRITE(pixpal_w)
484		AM_RANGE(0x3ca018, 0x3ca019) AM_RAM // 3ca019.b, w
485		AM_RANGE(0x3ca01a, 0x3ca01b) AM_READ(unk_r) AM_WRITENOP
486		AM_RANGE(0x3ca01c, 0x3ca01d) AM_RAM // 3ca01d.b, w(0)
487		ADDRESS_MAP_END
488
489	442	/***************************************************************************
490	443	Input Ports
491	444	***************************************************************************/
r248389	r248390
609	562	PORT_DIPSETTING( 0x00, DEF_STR( Joystick ) )
610	563	INPUT_PORTS_END
611	564
612		static INPUT_PORTS_START( mjmaglmp )
613		PORT_START("INPUTS")
614		// Joystick controls:
615		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 ) PORT_CONDITION("DSW2",0x01,EQUALS,0x00) // START
616		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_CONDITION("DSW2",0x01,EQUALS,0x00) // UP
617		PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_CONDITION("DSW2",0x01,EQUALS,0x00) // DOWN
618		PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_CONDITION("DSW2",0x01,EQUALS,0x00) // LEFT
619		PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_CONDITION("DSW2",0x01,EQUALS,0x00) // RIGHT
620		PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CONDITION("DSW2",0x01,EQUALS,0x00) // 1P E1 (select)
621
622		PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_COIN2 ) // NOTE
623		PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // KEY DOWN
624		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Pay Out") PORT_CODE(KEYCODE_O) // PAY
625		PORT_BIT( 0x0200, IP_ACTIVE_HIGH,IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, bmcpokr_state,hopper_r, NULL) // HOPPER
626		PORT_SERVICE_NO_TOGGLE( 0x0400, IP_ACTIVE_LOW ) // ACCOUNT
627		PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Reset") // RESET
628		PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // (unused)
629		PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CONDITION("DSW2",0x01,EQUALS,0x00) // 1P E2 (bet)
630		PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CONDITION("DSW2",0x01,EQUALS,0x00) // 1P E3 (select)
631		PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN1 ) // COIN
632
633		PORT_START("KEY1")
634		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
635		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
636		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
637		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
638		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
639		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
640
641		PORT_START("KEY2")
642		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
643		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
644		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
645		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
646		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
647		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
648
649		PORT_START("KEY3")
650		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
651		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
652		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
653		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
654		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
655		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
656
657		PORT_START("KEY4")
658		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
659		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
660		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
661		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
662		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
663		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
664
665		PORT_START("KEY5")
666		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
667		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
668		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
669		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
670		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
671		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_CONDITION("DSW2",0x01,EQUALS,0x01)
672
673		PORT_START("DSW1")
674		PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DIP1:1")
675		PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
676		PORT_DIPSETTING( 0x01, DEF_STR( No ) )
677		PORT_DIPNAME( 0x02, 0x00, "Doube-Up Game" ) PORT_DIPLOCATION("DIP1:2")
678		PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
679		PORT_DIPSETTING( 0x02, DEF_STR( No ) )
680		PORT_DIPNAME( 0x04, 0x04, "Coin Sw. Function" ) PORT_DIPLOCATION("DIP1:3")
681		PORT_DIPSETTING( 0x00, "Coin" )
682		PORT_DIPSETTING( 0x04, "Note" )
683		PORT_DIPNAME( 0x08, 0x08, "Pay Sw. Function" ) PORT_DIPLOCATION("DIP1:4")
684		PORT_DIPSETTING( 0x00, "Pay-Out" )
685		PORT_DIPSETTING( 0x08, "Key-Down" )
686		PORT_DIPNAME( 0x10, 0x10, "Game Hint" ) PORT_DIPLOCATION("DIP1:5")
687		PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
688		PORT_DIPSETTING( 0x10, DEF_STR( No ) )
689		PORT_DIPNAME( 0x20, 0x20, "Direct Double" ) PORT_DIPLOCATION("DIP1:6")
690		PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
691		PORT_DIPSETTING( 0x20, DEF_STR( No ) )
692		PORT_DIPNAME( 0x40, 0x40, "Coin Acceptor" ) PORT_DIPLOCATION("DIP1:7")
693		PORT_DIPSETTING( 0x00, "Mechanical" )
694		PORT_DIPSETTING( 0x40, "Electronic" )
695		PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "DIP1:8" )
696
697		PORT_START("DSW2")
698		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Controls ) ) PORT_DIPLOCATION("DIP2:1")
699		PORT_DIPSETTING( 0x01, "Keyboard" )
700		PORT_DIPSETTING( 0x00, DEF_STR( Joystick ) )
701		PORT_DIPNAME( 0x02, 0x02, "Key-In Limit" ) PORT_DIPLOCATION("DIP2:2")
702		PORT_DIPSETTING( 0x00, "1000" )
703		PORT_DIPSETTING( 0x02, "5000" )
704		PORT_DIPNAME( 0x04, 0x04, "Double Lose Pool" ) PORT_DIPLOCATION("DIP2:3")
705		PORT_DIPSETTING( 0x00, "50" )
706		PORT_DIPSETTING( 0x04, "100" )
707		PORT_DIPNAME( 0x18, 0x18, "Double Over / Round Bonus" ) PORT_DIPLOCATION("DIP2:4,5")
708		PORT_DIPSETTING( 0x10, "100 / 10" )
709		PORT_DIPSETTING( 0x18, "200 / 10" )
710		PORT_DIPSETTING( 0x08, "300 / 15" )
711		PORT_DIPSETTING( 0x00, "500 / 25" )
712		PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "DIP2:6" )
713		PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "DIP2:7" )
714		PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "DIP2:8" )
715
716		PORT_START("DSW3")
717		PORT_DIPNAME( 0x03, 0x03, "Pay-Out Rate" ) PORT_DIPLOCATION("DIP3:1,2")
718		PORT_DIPSETTING( 0x02, "75" )
719		PORT_DIPSETTING( 0x01, "82" )
720		PORT_DIPSETTING( 0x03, "85" )
721		PORT_DIPSETTING( 0x00, "88" )
722		PORT_DIPNAME( 0x0c, 0x0c, "Double-Up Rate" ) PORT_DIPLOCATION("DIP3:3,4")
723		PORT_DIPSETTING( 0x08, "95" )
724		PORT_DIPSETTING( 0x04, "96" )
725		PORT_DIPSETTING( 0x00, "97" )
726		PORT_DIPSETTING( 0x0c, "98" )
727		PORT_DIPNAME( 0x30, 0x30, "Game Enhance Type" ) PORT_DIPLOCATION("DIP3:5,6")
728		PORT_DIPSETTING( 0x10, "Small" )
729		PORT_DIPSETTING( 0x00, "Big" )
730		PORT_DIPSETTING( 0x30, "Normal" )
731		PORT_DIPSETTING( 0x20, "Bonus" )
732		PORT_DIPNAME( 0xc0, 0xc0, "Credit Limit" ) PORT_DIPLOCATION("DIP3:7,8")
733		PORT_DIPSETTING( 0x00, "300" )
734		PORT_DIPSETTING( 0x80, "500" )
735		PORT_DIPSETTING( 0x40, "1000" )
736		PORT_DIPSETTING( 0xc0, "2000" )
737
738		PORT_START("DSW4")
739		PORT_DIPNAME( 0x01, 0x01, "Max Bet" ) PORT_DIPLOCATION("DIP4:1")
740		PORT_DIPSETTING( 0x01, "10" )
741		PORT_DIPSETTING( 0x00, "20" )
742		PORT_DIPNAME( 0x06, 0x06, "Min Bet" ) PORT_DIPLOCATION("DIP4:2,3")
743		PORT_DIPSETTING( 0x00, "1" )
744		PORT_DIPSETTING( 0x06, "3" )
745		PORT_DIPSETTING( 0x04, "6" )
746		PORT_DIPSETTING( 0x02, "9" )
747		PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DIP4:4,5")
748		PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
749		PORT_DIPSETTING( 0x18, DEF_STR( 1C_1C ) )
750		PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
751		PORT_DIPSETTING( 0x08, DEF_STR( 1C_3C ) )
752		PORT_DIPNAME( 0x60, 0x60, "Credits Per Key-In" ) PORT_DIPLOCATION("DIP4:6,7")
753		PORT_DIPSETTING( 0x40, "5" )
754		PORT_DIPSETTING( 0x60, "10" )
755		PORT_DIPSETTING( 0x20, "50" )
756		PORT_DIPSETTING( 0x00, "100" )
757		PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "DIP4:8" )
758		INPUT_PORTS_END
759
760	565	/***************************************************************************
761	566	Graphics Layout
762	567	***************************************************************************/
r248389	r248390
831	636	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50)
832	637	MACHINE_CONFIG_END
833	638
834		static MACHINE_CONFIG_DERIVED( mjmaglmp, bmcpokr )
835		MCFG_CPU_MODIFY("maincpu")
836		MCFG_CPU_PROGRAM_MAP(mjmaglmp_map)
837		MACHINE_CONFIG_END
838
839	639	/***************************************************************************
840	640	ROMs Loading
841	641	***************************************************************************/
842	642
843		/***************************************************************************
844
845		Dongfang Shenlong ("Eastern Dragon")
846		BMC 1999
847
848		PCB Layout
849		----------
850
851		BMC-A81212
852		\|---------------------------------------\|
853		\| CH-A-401 CH-M-301 CH-M-701 \|
854		\|M11B416256A UM3567 \|
855		\|42MHz CH-M-201 CH-M-101 M6295 \|
856		\| VDB40817 1\|
857		\| HM86171-80 VOL 0\|
858		\| SYA70521 W\|
859		\| LM324 7805 A\|
860		\|DSW1 Y\|
861		\| 68000 TDA2003 \|
862		\|DSW2 CH-M-505 CH-M-605 \|
863		\| 6264 6264 2\|
864		\|DSW3 CPLD 74HC132 74LS05 2\|
865		\| 555 W\|
866		\|DSW4 A\|
867		\| BATT SW JAMMA Y\|
868		\|---------------------------------------\|
869		Notes:
870		RAM - M11B416256, 6264(x2)
871		VDB40817/SYA70521 - Unknown QFP100
872		CPLD - unknown PLCC44 chip labelled 'BMC B816140'
873		BATT - 5.5 volt 0.047F super cap
874		68000 @10.50MHz (42/4)
875		M6295 @1.05MHz (42/40)
876		UM3567 @3.50MHz (42/12)
877		HSync - 15.440kHz
878		VSync - 58.935Hz
879
880		***************************************************************************/
881
882	643	ROM_START( bmcpokr )
883	644	ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 Code */
884	645	ROM_LOAD16_BYTE( "ch-m-605.u13", 0x000000, 0x20000, CRC(c5c3fcd1) SHA1(b77fef734c290d52ae877a24bb3ee42b24eb5cb8) )
r248389	r248390
894	655	ROM_LOAD( "ch-m-701.u10", 0x00000, 0x40000, CRC(e01be644) SHA1(b68682786d5b40cb5672cfd7f717adcfb8fac7d3) )
895	656	ROM_END
896	657
897		/***************************************************************************
898
899		Mahjong Magic Lamp (BMC, 2000)
900
901		PCB Layout
902		----------
903
904		BMC-A70809
905		\|--------------------------------------\|
906		\|-\| 6116 555 \|
907		\| 0.1UF JA-A-602 JA-A-502 \|
908		\| 68000 \|
909		\| TD62003 42MHz \|
910		\| PAL \|
911		\| PAL 51C4160 \|
912		\| SYA70521 \|
913		\|-\| U3567 \|
914		\| \|
915		\| HM86171 VDB40817 \|
916		\|-\| VOL DSW4 \|
917		\| 7805 6295 DSW3 \|
918		\| AMP JA-A-301 JA-A-401 DSW2 \|
919		\|-\| JA-A-901 JA-A-201 JA-A-101 DSW1 \|
920		\|--------------------------------------\|
921		Notes:
922		68000 - clock 10.5000MHz [42/4]
923		M6295 - clock 1.0500MHz [42/40]. Pin 7 HIGH
924		U3567 - = YM2413, clock 3.5000MHz [42/12]
925		HM86171 - HMC RAMDAC. Clock input 10.5000MHz [42/4]
926		VDB/SYA - custom QFP100 GFX chips badged with BMC logo
927		51C4160 - SOJ40 video RAM, possibly 4M DRAM (256k x 16-bit)
928		555 - 555 Timer
929		DSW1-4 - 8-position DIP switches
930		AMP - NEC uPC1241H
931		VSync - 58.9342Hz
932		HSync - 15.4408kHz
933
934		***************************************************************************/
935
936		ROM_START( mjmaglmp )
937		ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 Code */
938		ROM_LOAD16_BYTE( "ja-a-602.u10", 0x000000, 0x20000, CRC(b69e235c) SHA1(04e5d0d667de29680e4a35d0d98b587447e54ce3) )
939		ROM_LOAD16_BYTE( "ja-a-502.u11", 0x000001, 0x20000, CRC(bb609da3) SHA1(ffadc20912e0a9ebe0d1a1f7f94dfaccb48be5c1) )
940
941		ROM_REGION( 0x200000, "gfx1", 0 )
942		ROM_LOAD16_BYTE( "ja-a-101.u41", 0x000000, 0x80000, CRC(7878b9a1) SHA1(7efacb063b47e518c4d3856e90d7532f478e54dd) )
943		ROM_LOAD16_BYTE( "ja-a-201.u42", 0x000001, 0x80000, CRC(b74f3b2b) SHA1(09724909a14aebc135029d97fafcd215a84f05e3) )
944		ROM_LOAD16_BYTE( "ja-a-301.u43", 0x100000, 0x80000, CRC(2bbaf65e) SHA1(d792054671671a2e479b89ad29bc7b3f935804f9) )
945		ROM_LOAD16_BYTE( "ja-a-401.u44", 0x100001, 0x80000, CRC(9292acb1) SHA1(01ce7997305dd5fdc5dc2b801046303a4d8a89c0) )
946
947		ROM_REGION( 0x40000, "oki", 0 ) /* Samples */
948		ROM_LOAD( "ja-a-901.u6", 0x00000, 0x40000, CRC(25f36d00) SHA1(c182348340ca67ad69d1a67c58b47d6371a725c9) )
949		ROM_END
950
951		GAME( 1999, bmcpokr, 0, bmcpokr, bmcpokr, driver_device, 0, ROT0, "BMC", "Dongfang Shenlong", GAME_SUPPORTS_SAVE )
952		GAME( 2000, mjmaglmp, 0, mjmaglmp, mjmaglmp, driver_device, 0, ROT0, "BMC", "Mahjong Magic Lamp (v. JAA02)", GAME_SUPPORTS_SAVE )
	658	GAME( 1999, bmcpokr, 0, bmcpokr, bmcpokr, driver_device, 0, ROT0, "BMC", "Dongfang Shenlong", GAME_SUPPORTS_SAVE )

trunk/src/mame/drivers/chihiro.c
r248389	r248390
52	52	\|*\| 2005 \| Sega Club Golf 2006: Next Tours (Rev A) \| Sega \| GDROM \| GDX-0018A \| \|
53	53	\| \| 2006 \| Sega Network Taisen Mahjong MJ 3 Evolution \| Sega \| GDROM \| GDX-0021 \| \|
54	54	\| \| 2006 \| Sega Network Taisen Mahjong MJ 3 Evolution (Rev A) \| Sega \| GDROM \| GDX-0021A \| \|
55		\|*\| 2007 \| Sega Network Taisen Mahjong MJ 3 Evolution (Rev B) \| Sega \| GDROM \| GDX-0021B \| \|
56	55	\| \| 2009 \| Firmware Update For Compact Flash Box \| Sega \| GDROM \| GDX-0024 \| \|
57	56	\|*\| 2009 \| Firmware Update For Compact Flash Box (Rev A) \| Sega \| GDROM \| GDX-0024A \| 317-0567-EXP \|
58	57	\|*\| 2004 \| Quest Of D (Ver.1.01C) \| Sega \| CDROM \| CDV-10005C \| \|
r248389	r248390
2932	2931	ROM_LOAD("gdx-0018.data", 0x00, 0x50, CRC(1a210abd) SHA1(43a54d028315d2dfa9f8ea6fb59265e0b980b02f) )
2933	2932	ROM_END
2934	2933
2935		ROM_START( mj3evo )
2936		CHIHIRO_BIOS
2937
2938		DISK_REGION( "gdrom" )
2939		DISK_IMAGE_READONLY( "gdx-0021b", 0, SHA1(c97d1dc95cdf1b4bd5d7cf6b4db0757f3d6bd723) )
2940
2941		// PIC label is unknown
2942		ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF)
2943		ROM_LOAD( "317-xxxx-jpn.pic", 0x000000, 0x004000, CRC(650fcc94) SHA1(c88488900460fb3deecb3cf376fc043b10c020ef) )
2944		ROM_END
2945
2946	2934	/*
2947	2935	Title BOX GDROM CF-BOX FIRM
2948	2936	Media ID EB08
r248389	r248390
3021	3009	/* 0018A */ GAME( 2005, scg06nt, chihiro, chihirogd, chihiro, driver_device, 0, ROT0, "Sega", "Sega Club Golf 2006 Next Tours (Rev A) (GDX-0018A)", GAME_NO_SOUND\|GAME_NOT_WORKING )
3022	3010	// 0019
3023	3011	// 0020
3024		// 0021 GAME( 2006, mj3evoo, mj3evo, chihirogd, chihiro, driver_device, 0, ROT0, "Sega", "Sega Network Taisen Mahjong MJ 3 Evolution (GDX-0021)", GAME_NO_SOUND\|GAME_NOT_WORKING )
3025		// 0021A GAME( 2006, mj3evoa, mj3evo, chihirogd, chihiro, driver_device, 0, ROT0, "Sega", "Sega Network Taisen Mahjong MJ 3 Evolution (Rev A) (GDX-0021A)", GAME_NO_SOUND\|GAME_NOT_WORKING )
3026		/* 0021B */ GAME( 2007, mj3evo, chihiro, chihirogd, chihiro, driver_device, 0, ROT0, "Sega", "Sega Network Taisen Mahjong MJ 3 Evolution (Rev B) (GDX-0021B)", GAME_NO_SOUND\|GAME_NOT_WORKING )
	3012	// 0021 GAME( 2005, mj3evo, mj3ev, chihirogd, chihiro, driver_device, 0, ROT0, "Sega", "Sega Network Taisen Mahjong MJ 3 Evolution (GDX-0021)", GAME_NO_SOUND\|GAME_NOT_WORKING )
	3013	// 0021A GAME( 2005, mj3ev, chihiro, chihirogd, chihiro, driver_device, 0, ROT0, "Sega", "Sega Network Taisen Mahjong MJ 3 Evolution (Rev A) (GDX-0021A)", GAME_NO_SOUND\|GAME_NOT_WORKING )
3027	3014	// 0022
3028	3015	// 0023
3029	3016	// 0024 GAME( 2009, ccfboxo, ccfboxa, chihirogd, chihiro, driver_device, 0, ROT0, "Sega", "Chihiro Firmware Update For Compact Flash Box (GDX-0024)", GAME_NO_SOUND\|GAME_NOT_WORKING )

trunk/src/mame/drivers/cps1.c
r248389	r248390
9601	9601	ROM_LOAD( "ioc1.ic1", 0x0000, 0x0117, CRC(0d182081) SHA1(475b3d417785da4bc512cce2b274bb00d4cc6792) )
9602	9602	ROM_END
9603	9603
9604		/* B-Board 91634B-2, Japan Resale Ver. */
9605		ROM_START( varthjr )
9606		ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
9607		ROM_LOAD16_WORD_SWAP( "vaj_23b.8f", 0x00000, 0x80000, CRC(ad3d3522) SHA1(db627233f9d8a03c2d4bb31614951a0cdc81600d) )
9608		ROM_LOAD16_WORD_SWAP( "vaj_22b.7f", 0x80000, 0x80000, CRC(034e3e55) SHA1(eeb85a827cf18dafbdf0a2828aa39128352857f3) )
9609
9610		ROM_REGION( 0x200000, "gfx", 0 )
9611		ROMX_LOAD( "va_01.3a", 0x000000, 0x80000, CRC(b1fb726e) SHA1(5ac0876b6c49d0a99710dda68653664f4d8c1167) , ROM_GROUPWORD \| ROM_SKIP(6) ) // == va-5m.7a
9612		ROMX_LOAD( "va_02.4a", 0x000002, 0x80000, CRC(4c6588cd) SHA1(d14e8cf051ac934ccc989d8c571c6cc9eed34af5) , ROM_GROUPWORD \| ROM_SKIP(6) ) // == va-7m.9a
9613		ROMX_LOAD( "va_03.5a", 0x000004, 0x80000, CRC(0b1ace37) SHA1(6f9493c22f667f683db2789972fd16bb94724679) , ROM_GROUPWORD \| ROM_SKIP(6) ) // == va-1m.3a
9614		ROMX_LOAD( "va_04.6a", 0x000006, 0x80000, CRC(44dfe706) SHA1(a013a434df3161a91aafbb35dc4e20dfb3f177f4) , ROM_GROUPWORD \| ROM_SKIP(6) ) // == va-3m.5a
9615
9616		ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
9617		ROM_LOAD( "va_09.12a", 0x00000, 0x08000, CRC(7a99446e) SHA1(ca027f41e3e58be5abc33ad7380746658cb5380a) )
9618		ROM_CONTINUE( 0x10000, 0x08000 )
9619
9620		ROM_REGION( 0x40000, "oki", 0 ) /* Samples */
9621		ROM_LOAD( "va_18.11c", 0x00000, 0x20000, CRC(de30510e) SHA1(8e878696192606b76a3a0e53553e638d9621cff7) )
9622		ROM_LOAD( "va_19.12c", 0x20000, 0x20000, CRC(0610a4ac) SHA1(3da02ea6a7a56c85de898806d2a1cf6bc526c1b3) )
9623
9624		ROM_REGION( 0x0200, "aboardplds", 0 )
9625		ROM_LOAD( "buf1", 0x0000, 0x0117, CRC(eb122de7) SHA1(b26b5bfe258e3e184f069719f9fd008d6b8f6b9b) )
9626		ROM_LOAD( "ioa1", 0x0000, 0x0117, CRC(59c7ee3b) SHA1(fbb887c5b4f5cb8df77cec710eaac2985bc482a6) )
9627		ROM_LOAD( "prg1", 0x0000, 0x0117, CRC(f1129744) SHA1(a5300f301c1a08a7da768f0773fa0fe3f683b237) )
9628		ROM_LOAD( "rom1", 0x0000, 0x0117, CRC(41dc73b9) SHA1(7d4c9f1693c821fbf84e32dd6ef62ddf14967845) )
9629		ROM_LOAD( "sou1", 0x0000, 0x0117, CRC(84f4b2fe) SHA1(dcc9e86cc36316fe42eace02d6df75d08bc8bb6d) )
9630
9631		ROM_REGION( 0x0200, "bboardplds", 0 )
9632		ROM_LOAD( "va63b.1a", 0x0000, 0x0117, BAD_DUMP CRC(38540e86) SHA1(86e0aba363108f80a8eff84b99d11528ad6db099) ) /* Handcrafted but works on actual US PCB. Redump needed */
9633		ROM_LOAD( "iob1.12d", 0x0000, 0x0117, CRC(3abc0700) SHA1(973043aa46ec6d5d1db20dc9d5937005a0f9f6ae) )
9634		ROM_LOAD( "bprg1.11d", 0x0000, 0x0117, CRC(31793da7) SHA1(400fa7ac517421c978c1ee7773c30b9ed0c5d3f3) )
9635
9636		ROM_REGION( 0x0200, "cboardplds", 0 )
9637		ROM_LOAD( "ioc1.ic1", 0x0000, 0x0117, CRC(0d182081) SHA1(475b3d417785da4bc512cce2b274bb00d4cc6792) )
9638		ROM_END
9639
9640	9604	/* B-Board 89625B-1 */
9641	9605	ROM_START( qad )
9642	9606	ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
r248389	r248390
11855	11819	GAME( 1992, varthr1, varth, cps1_12MHz, varth, cps_state, cps1, ROT270, "Capcom", "Varth: Operation Thunderstorm (World 920612)", GAME_SUPPORTS_SAVE ) // "ETC"
11856	11820	GAME( 1992, varthu, varth, cps1_12MHz, varth, cps_state, cps1, ROT270, "Capcom (Romstar license)", "Varth: Operation Thunderstorm (USA 920612)", GAME_SUPPORTS_SAVE )
11857	11821	GAME( 1992, varthj, varth, cps1_12MHz, varth, cps_state, cps1, ROT270, "Capcom", "Varth: Operation Thunderstorm (Japan 920714)", GAME_SUPPORTS_SAVE )
11858		GAME( 1992, varthjr, varth, cps1_12MHz, varth, cps_state, cps1, ROT270, "Capcom", "Varth: Operation Thunderstorm (Japan Resale Ver. 920714)", GAME_SUPPORTS_SAVE )
11859	11822	GAME( 1992, qad, 0, cps1_12MHz, qad, cps_state, cps1, ROT0, "Capcom", "Quiz & Dragons: Capcom Quiz Game (USA 920701)", GAME_SUPPORTS_SAVE ) // 12MHz verified
11860	11823	GAME( 1994, qadjr, qad, cps1_12MHz, qadjr, cps_state, cps1, ROT0, "Capcom", "Quiz & Dragons: Capcom Quiz Game (Japan Resale Ver. 940921)", GAME_SUPPORTS_SAVE )
11861	11824	GAME( 1992, wof, 0, qsound, wof, cps_state, wof, ROT0, "Capcom", "Warriors of Fate (World 921031)", GAME_SUPPORTS_SAVE ) // "ETC"

trunk/src/mame/drivers/csplayh5.c
r248389	r248390
443	443
444	444	if((scanline % 2) == 0)
445	445	{
	446	m_v9958->set_resolution(RENDER_HIGH);
446	447	m_v9958->interrupt();
447	448	}
448	449	}

trunk/src/mame/drivers/ddenlovr.c
r248389	r248390
26	26	94 Hf Hana Ginga D8102048L1 Z80 YM2149 YM2413 M6295 NL-002 1108F0405 1427F0071 4L02?
27	27	94 Super Hana Paradise N8010178L1+N73RSUB Z80 YM2413 M6295 NL-002 1108F0406 1427F0071 4L02F2637
28	28	95 Mj Dai Chuuka Ken D11107218L1 Z80 AY8910 YM2413 M6295 70C160F009
29		95 Mj Super Dai Chuuka Ken D11510198L1 Z80 AY8910 YM2413 M6295
30	29	95 Hf Hana Gokou N83061581L1 Z80 AY8910 YM2413 M6295 NL-002 1108? 1427? 4L02?
31	30	95 Hf Hana Gokou Bangaihen N10805078L1 Z80 AY8910 YM2413 M6295 NL-002 1108? 1427? 4L02?
32	31	95 Nettoh Quiz Champion 68000 AY8910 YM2413 M6295
r248389	r248390
341	340	DECLARE_READ8_MEMBER(hanakanz_rand_r);
342	341	DECLARE_WRITE8_MEMBER(mjreach1_protection_w);
343	342	DECLARE_READ8_MEMBER(mjreach1_protection_r);
344		DECLARE_WRITE8_MEMBER(mjschuka_protection_w);
345		DECLARE_READ8_MEMBER(mjschuka_protection_r);
346	343	DECLARE_READ8_MEMBER(mjchuuka_keyb_r);
347	344	DECLARE_WRITE8_MEMBER(mjchuuka_blitter_w);
348	345	DECLARE_READ8_MEMBER(mjchuuka_gfxrom_0_r);
r248389	r248390
3041	3038
3042	3039
3043	3040	/***************************************************************************
3044		Mahjong Super Dai Chuuka Ken
3045		***************************************************************************/
3046
3047		// 255F: 13 34 7A 96 A8
3048		// 2564: 13 34 7A 96 13
3049
3050		WRITE8_MEMBER(ddenlovr_state::mjschuka_protection_w)
3051		{
3052		m_prot_val = data;
3053		}
3054
3055		READ8_MEMBER(ddenlovr_state::mjschuka_protection_r)
3056		{
3057		switch (m_prot_val)
3058		{
3059		case 0xa8: return 0x13;
3060		}
3061		return m_prot_val;
3062		}
3063
3064		static ADDRESS_MAP_START( mjschuka_portmap, AS_IO, 8, ddenlovr_state )
3065		ADDRESS_MAP_GLOBAL_MASK(0xff)
3066		AM_RANGE(0x00, 0x0f) AM_DEVREADWRITE("rtc", msm6242_device, read, write)
3067		AM_RANGE(0x1c, 0x1c) AM_READNOP AM_WRITE(sryudens_rambank_w) // ? ack on RTC int
3068		AM_RANGE(0x1e, 0x1e) AM_WRITE(mjflove_rombank_w)
3069
3070		AM_RANGE(0x20, 0x23) AM_WRITE(ddenlovr_palette_base_w)
3071		AM_RANGE(0x24, 0x27) AM_WRITE(ddenlovr_palette_mask_w)
3072		AM_RANGE(0x28, 0x2b) AM_WRITE(ddenlovr_transparency_pen_w)
3073		AM_RANGE(0x2c, 0x2f) AM_WRITE(ddenlovr_transparency_mask_w)
3074		AM_RANGE(0x34, 0x34) AM_WRITE(ddenlovr_bgcolor_w)
3075		AM_RANGE(0x35, 0x35) AM_WRITE(ddenlovr_priority_w)
3076		AM_RANGE(0x36, 0x36) AM_WRITE(ddenlovr_layer_enable_w)
3077		AM_RANGE(0x38, 0x38) AM_READNOP // ? ack or watchdog
3078
3079		AM_RANGE(0x40, 0x41) AM_WRITE(mjmyster_blitter_w)
3080		AM_RANGE(0x43, 0x43) AM_READ(rongrong_gfxrom_r)
3081		AM_RANGE(0x50, 0x50) AM_WRITE(mjflove_okibank_w)
3082
3083		AM_RANGE(0x54, 0x54) AM_READWRITE(mjschuka_protection_r, mjschuka_protection_w)
3084		// 58 writes ? (0/1)
3085		AM_RANGE(0x5c, 0x5c) AM_READ(hanakanz_rand_r)
3086
3087		AM_RANGE(0x60, 0x60) AM_WRITE(sryudens_coincounter_w)
3088		AM_RANGE(0x61, 0x61) AM_WRITE(hanakanz_keyb_w)
3089		AM_RANGE(0x62, 0x62) AM_READ_PORT("SYSTEM")
3090		AM_RANGE(0x63, 0x64) AM_READ(sryudens_keyb_r)
3091
3092		AM_RANGE(0x68, 0x68) AM_READ_PORT("DSW1")
3093		AM_RANGE(0x69, 0x69) AM_READ_PORT("DSW2")
3094		AM_RANGE(0x6a, 0x6a) AM_READ_PORT("DSW3")
3095		AM_RANGE(0x6b, 0x6b) AM_READ_PORT("DSW4")
3096		AM_RANGE(0x6c, 0x6c) AM_READ_PORT("DSW5") // DSW 1-4 high bits
3097		AM_RANGE(0x70, 0x71) AM_DEVWRITE("aysnd", ay8910_device, address_data_w)
3098		AM_RANGE(0x74, 0x74) AM_DEVREADWRITE("oki", okim6295_device, read, write)
3099		AM_RANGE(0x78, 0x79) AM_DEVWRITE("ym2413", ym2413_device, write)
3100		ADDRESS_MAP_END
3101
3102
3103		/***************************************************************************
3104	3041	Mahjong The Mysterious World
3105	3042	***************************************************************************/
3106	3043
r248389	r248390
6754	6691	INPUT_PORTS_END
6755	6692
6756	6693
6757		static INPUT_PORTS_START( mjschuka )
6758
6759		PORT_START("SYSTEM")
6760		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE3 ) // medal out
6761		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
6762		PORT_SERVICE(0x04, IP_ACTIVE_LOW)
6763		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) // analyzer
6764		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE2 ) // data clear
6765		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) // note
6766		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1)
6767		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
6768
6769		PORT_START("KEY0")
6770		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(2) // A
6771		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_PLAYER(2) // E
6772		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_PLAYER(2) // I
6773		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_PLAYER(2) // M
6774		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_PLAYER(2) // Kan
6775		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 ) // Start 2
6776
6777		PORT_START("KEY1")
6778		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(2) // B
6779		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_PLAYER(2) // F
6780		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_PLAYER(2) // J
6781		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_PLAYER(2) // N
6782		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_PLAYER(2) // Reach
6783		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_PLAYER(2) // BET
6784
6785		PORT_START("KEY2")
6786		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(2) // C
6787		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_PLAYER(2) // G
6788		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_PLAYER(2) // K
6789		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_PLAYER(2) // Chi
6790		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_PLAYER(2) // Ron
6791		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing
6792
6793		PORT_START("KEY3")
6794		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(2) // D
6795		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_PLAYER(2) // H
6796		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_PLAYER(2) // L
6797		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_PLAYER(2) // Pon
6798		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing
6799		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing
6800
6801		PORT_START("KEY4")
6802		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) PORT_PLAYER(2) // "l"
6803		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) PORT_PLAYER(2) // "t"
6804		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) PORT_PLAYER(2) // "w"
6805		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) PORT_PLAYER(2) // Flip Flop
6806		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) PORT_PLAYER(2) // "b"
6807		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_PLAYER(2) // "s"
6808
6809		PORT_START("KEY5")
6810		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) // A
6811		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) // E
6812		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) // I
6813		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) // M
6814		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) // Kan
6815		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) // Start 1
6816
6817		PORT_START("KEY6")
6818		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) // B
6819		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) // F
6820		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) // J
6821		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) // N
6822		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) // Reach
6823		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) // BET
6824
6825		PORT_START("KEY7")
6826		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) // C
6827		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) // G
6828		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) // K
6829		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) // Chi
6830		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) // Ron
6831		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing
6832
6833		PORT_START("KEY8")
6834		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) // D
6835		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) // H
6836		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) // L
6837		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) // Pon
6838		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing
6839		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing
6840
6841		PORT_START("KEY9")
6842		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) // "l"
6843		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) // "t"
6844		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) // "w"
6845		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) // Flip Flop
6846		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) // "b"
6847		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) // "s"
6848
6849		PORT_START("DSW1")
6850		PORT_DIPNAME( 0x0f, 0x07, "Pay Out Rate (%)" )
6851		PORT_DIPSETTING( 0x00, "50" )
6852		PORT_DIPSETTING( 0x01, "53" )
6853		PORT_DIPSETTING( 0x02, "56" )
6854		PORT_DIPSETTING( 0x03, "59" )
6855		PORT_DIPSETTING( 0x04, "62" )
6856		PORT_DIPSETTING( 0x05, "65" )
6857		PORT_DIPSETTING( 0x06, "68" )
6858		PORT_DIPSETTING( 0x07, "71" )
6859		PORT_DIPSETTING( 0x08, "75" )
6860		PORT_DIPSETTING( 0x09, "78" )
6861		PORT_DIPSETTING( 0x0a, "81" )
6862		PORT_DIPSETTING( 0x0b, "84" )
6863		PORT_DIPSETTING( 0x0c, "87" )
6864		PORT_DIPSETTING( 0x0d, "90" )
6865		PORT_DIPSETTING( 0x0e, "93" )
6866		PORT_DIPSETTING( 0x0f, "96" )
6867		PORT_DIPNAME( 0x30, 0x30, "Odds Rate" )
6868		PORT_DIPSETTING( 0x20, "1 2 3 4 6 8 10 15" )
6869		PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" )
6870		PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" )
6871		PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" )
6872		PORT_DIPNAME( 0xc0, 0xc0, "Max Bet" )
6873		PORT_DIPSETTING( 0xc0, "1" )
6874		PORT_DIPSETTING( 0x80, "5" )
6875		PORT_DIPSETTING( 0x40, "10" )
6876		PORT_DIPSETTING( 0x00, "20" )
6877
6878		PORT_START("DSW2")
6879		PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) )
6880		PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
6881		PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
6882		PORT_DIPSETTING( 0x01, DEF_STR( 1C_5C ) )
6883		PORT_DIPSETTING( 0x00, "1 Coin/10 Credits" )
6884		PORT_DIPNAME( 0x0c, 0x0c, "Min Rate To Play" )
6885		PORT_DIPSETTING( 0x0c, "1" )
6886		PORT_DIPSETTING( 0x08, "2" )
6887		PORT_DIPSETTING( 0x04, "3" )
6888		PORT_DIPSETTING( 0x00, "5" )
6889		PORT_DIPNAME( 0x30, 0x30, "Payout" )
6890		PORT_DIPSETTING( 0x30, "300" )
6891		PORT_DIPSETTING( 0x20, "500" )
6892		PORT_DIPSETTING( 0x10, "700" )
6893		PORT_DIPSETTING( 0x00, "1000" )
6894		PORT_DIPNAME( 0x40, 0x40, "W-BET" )
6895		PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
6896		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6897		PORT_DIPNAME( 0x80, 0x80, "Last Chance" )
6898		PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
6899		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6900
6901		PORT_START("DSW3")
6902		PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) )
6903		PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
6904		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6905		PORT_DIPNAME( 0x02, 0x00, "In Game Music" )
6906		PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
6907		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6908		PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
6909		PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
6910		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6911		PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
6912		PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
6913		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6914		PORT_DIPNAME( 0x10, 0x00, "Girls" )
6915		PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
6916		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6917		PORT_DIPNAME( 0x20, 0x00, "Girls Speech" )
6918		PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
6919		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6920		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
6921		PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
6922		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6923		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
6924		PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
6925		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6926
6927		PORT_START("DSW4")
6928		PORT_DIPNAME( 0x07, 0x07, "YAKUMAN Bonus" )
6929		PORT_DIPSETTING( 0x07, "Cut" )
6930		PORT_DIPSETTING( 0x06, "1 T" )
6931		PORT_DIPSETTING( 0x05, "300" )
6932		PORT_DIPSETTING( 0x04, "500" )
6933		PORT_DIPSETTING( 0x03, "700" )
6934		PORT_DIPSETTING( 0x02, "1000" )
6935		PORT_DIPSETTING( 0x01, "1000?" )
6936		PORT_DIPSETTING( 0x00, "1000?" )
6937		PORT_DIPNAME( 0x08, 0x08, "YAKUMAN Times?" )
6938		PORT_DIPSETTING( 0x00, "1" )
6939		PORT_DIPSETTING( 0x08, "2" )
6940		PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
6941		PORT_DIPSETTING( 0x00, "140" )
6942		PORT_DIPSETTING( 0x10, "160" )
6943		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
6944		PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
6945		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6946		PORT_DIPNAME( 0x40, 0x40, "DonDen Key" )
6947		PORT_DIPSETTING( 0x40, "Start" )
6948		PORT_DIPSETTING( 0x00, "Flip Flop" )
6949		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
6950		PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
6951		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6952
6953		PORT_START("DSW5")
6954		PORT_DIPNAME( 0x01, 0x01, "Credits Per Note" )
6955		PORT_DIPSETTING( 0x01, "5" )
6956		PORT_DIPSETTING( 0x00, "10" )
6957		PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
6958		PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
6959		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6960		PORT_DIPNAME( 0x0c, 0x0c, "Computer Strength?" )
6961		PORT_DIPSETTING( 0x0c, "Weak" )
6962		PORT_DIPSETTING( 0x08, DEF_STR( Normal ))
6963		PORT_DIPSETTING( 0x04, "Strong" )
6964		PORT_DIPSETTING( 0x00, "Very Strong" )
6965		PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
6966		PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
6967		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6968		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
6969		PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
6970		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6971		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
6972		PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
6973		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6974		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
6975		PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
6976		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6977
6978		PORT_START("BET")
6979		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
6980		PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
6981		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6982
6983		PORT_START("HOPPER")
6984		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
6985		PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
6986		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
6987
6988		INPUT_PORTS_END
6989
6990
6991	6694	static INPUT_PORTS_START( funkyfig )
6992	6695	PORT_START("IN0") /* Keys (port 83 with port 80 = 20) */
6993	6696	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
r248389	r248390
10208	9911
10209	9912
10210	9913	/***************************************************************************
10211		Mahjong Super Dai Chuuka Ken
10212		***************************************************************************/
10213
10214		static MACHINE_CONFIG_START( mjschuka, ddenlovr_state )
10215
10216		/* basic machine hardware */
10217		MCFG_CPU_ADD("maincpu",Z80,XTAL_16MHz/2)
10218		MCFG_CPU_PROGRAM_MAP(mjmyster_map)
10219		MCFG_CPU_IO_MAP(mjschuka_portmap)
10220		MCFG_CPU_VBLANK_INT_DRIVER("screen", ddenlovr_state, hginga_irq)
10221
10222		MCFG_MACHINE_START_OVERRIDE(ddenlovr_state,hanakanz)
10223		MCFG_MACHINE_RESET_OVERRIDE(ddenlovr_state,ddenlovr)
10224
10225		/* video hardware */
10226		MCFG_SCREEN_ADD("screen", RASTER)
10227		MCFG_SCREEN_REFRESH_RATE(60)
10228		MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
10229		MCFG_SCREEN_SIZE(336, 256+22)
10230		MCFG_SCREEN_VISIBLE_AREA(0, 336-1, 5, 256-11-1)
10231		MCFG_SCREEN_UPDATE_DRIVER(ddenlovr_state, screen_update_ddenlovr)
10232		MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE)
10233		MCFG_SCREEN_PALETTE("palette")
10234
10235		MCFG_PALETTE_ADD("palette", 0x200)
10236
10237		MCFG_VIDEO_START_OVERRIDE(ddenlovr_state,mjflove) // blitter commands in the roms are shuffled around
10238
10239		/* sound hardware */
10240		MCFG_SPEAKER_STANDARD_MONO("mono")
10241
10242		MCFG_SOUND_ADD("ym2413", YM2413, XTAL_28_63636MHz / 8)
10243		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
10244
10245		MCFG_SOUND_ADD("aysnd", AY8910, XTAL_28_63636MHz / 8)
10246		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
10247
10248		MCFG_OKIM6295_ADD("oki", XTAL_28_63636MHz / 28, OKIM6295_PIN7_HIGH)
10249		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
10250
10251		/* devices */
10252		MCFG_DEVICE_ADD("rtc", MSM6242, XTAL_32_768kHz)
10253		MCFG_MSM6242_OUT_INT_HANDLER(WRITELINE(ddenlovr_state, hginga_rtc_irq))
10254		MACHINE_CONFIG_END
10255
10256
10257		/***************************************************************************
10258	9914	Mahjong The Mysterious World
10259	9915	***************************************************************************/
10260	9916
r248389	r248390
11840	11496
11841	11497	/***************************************************************************
11842	11498
11843		Mahjong Super Dai Chuuka Ken (Dynax, 1995)
11844
11845		PCB Layout
11846		----------
11847
11848		Dynax Inc. Nagoya Japan D11510198L1
11849		sticker: D11509208L1
11850		\|----------------------------------------\|
11851		\| MB3714A TA7535(x2) M6295 1151 3V_BATT\|
11852		\| VOL YMZ284-D YM2413 1152 \|
11853		\| DSW5 16MHz PAL \|
11854		\| CPU 62256 \|
11855		\| ULN2003 1153 62421RTC\|
11856		\| PLCC44/68 \|
11857		\| \|
11858		\| 28.63636MHz M514262 \|
11859		\| M514262 \|
11860		\| QFP208 M514262 \|
11861		\| CXK5863 M514262 \|
11862		\| PAL \|
11863		\|DSW1 DSW2 1154 \|
11864		\|DSW3 DSW4 1155 \|
11865		\|----------------------------------------\|
11866		Notes:
11867		PLCC44 and QFP208 unknown (surface scratched), location has alternative pads for PLCC68
11868		CPU - surface scratched. clock input 16MHz, looks like TMPZ8400
11869		M6295 - clock 1.0227MHz (28.63636/28). Pin 7 HIGH
11870		YMZ284 - clock 3.579545MHz (28.63636/8)
11871		YM2413 - clock 3.579545MHz (28.63636/8)
11872		DSW1-4 - 10-position DIP switches
11873		DSW5 - 4-position DIP switch
11874		TA7535 - = LM358
11875		VSync - 60.8529Hz
11876		HSync - 15.2790kHz
11877		EPROM 1152 is M27C1001, others are MX27C4000
11878
11879		***************************************************************************/
11880
11881		ROM_START( mjschuka )
11882		ROM_REGION( 0x90000+160x1000, "maincpu", 0 ) / Z80 Code */
11883		ROM_LOAD( "1153.5c", 0x00000, 0x80000, CRC(67cf10db) SHA1(a813f44578eb2d67b4346ffd9c15e44e7fa91ca7) )
11884		ROM_RELOAD( 0x10000, 0x80000 )
11885
11886		ROM_REGION( 0x100000, "blitter", 0 ) /* blitter data */
11887		ROM_LOAD( "1154.11b", 0x00000, 0x80000, CRC(b8d04189) SHA1(1acac851c21e1055843e1398087d7afd8b9201b8) )
11888		ROM_LOAD( "1155.12b", 0x80000, 0x80000, CRC(4208edcf) SHA1(444472107dac548956d2749cd892214efb6ff2f6) )
11889
11890		ROM_REGION( 0x200000, "oki", 0 ) /* Samples */
11891		ROM_LOAD( "1151.1c", 0x000000, 0x80000, CRC(c92065a9) SHA1(65c38c3a31d3f4b8240a16fdcdf376acdf5c17d2) )
11892		ROM_RELOAD( 0x100000, 0x20000 )
11893		ROM_LOAD( "1152.2c", 0x080000, 0x20000, CRC(f9244532) SHA1(b502d8d3569c4b4d655af3baf05a3c79831a84ff) )
11894		ROM_RELOAD( 0x180000, 0x20000 )
11895		ROM_RELOAD( 0x0a0000, 0x20000 )
11896		ROM_RELOAD( 0x1a0000, 0x20000 )
11897		ROM_RELOAD( 0x0c0000, 0x20000 )
11898		ROM_RELOAD( 0x1c0000, 0x20000 )
11899		ROM_END
11900
11901
11902		/***************************************************************************
11903
11904	11499	The First Funky Fighter
11905	11500	Nakanihon, 1994
11906	11501
r248389	r248390
13021	12616	GAME( 1994, hparadis, 0, hparadis, hparadis, driver_device, 0, ROT0, "Dynax", "Super Hana Paradise (Japan)", GAME_NO_COCKTAIL )
13022	12617	GAME( 1995, hgokou, 0, hgokou, hgokou, driver_device, 0, ROT0, "Dynax (Alba license)", "Hanafuda Hana Gokou (Japan)", GAME_NO_COCKTAIL )
13023	12618	GAME( 1995, hgokbang, hgokou, hgokbang, hgokou, driver_device, 0, ROT0, "Dynax", "Hanafuda Hana Gokou Bangaihen (Japan)", GAME_NO_COCKTAIL )
13024		GAME( 1995, mjdchuka, 0, mjchuuka, mjchuuka, driver_device, 0, ROT0, "Dynax", "Mahjong The Dai Chuuka Ken (China, D111)", GAME_NO_COCKTAIL )
13025		GAME( 1995, mjschuka, 0, mjschuka, mjschuka, driver_device, 0, ROT0, "Dynax", "Mahjong Super Dai Chuuka Ken (Japan, D115)", GAME_NO_COCKTAIL )
	12619	GAME( 1995, mjdchuka, 0, mjchuuka, mjchuuka, driver_device, 0, ROT0, "Dynax", "Mahjong The Dai Chuuka Ken (China, v. D111)", GAME_NO_COCKTAIL )
13026	12620	GAME( 1995, nettoqc, 0, nettoqc, nettoqc, driver_device, 0, ROT0, "Nakanihon", "Nettoh Quiz Champion (Japan)", GAME_NO_COCKTAIL \| GAME_IMPERFECT_COLORS )
13027	12621	GAME( 1995, ultrchmp, nettoqc, ultrchmp, ultrchmp, driver_device, 0, ROT0, "Nakanihon", "Se Gye Hweng Dan Ultra Champion (Korea)", GAME_NO_COCKTAIL \| GAME_IMPERFECT_COLORS )
13028	12622	GAME( 1995, ultrchmph, nettoqc, ultrchmp, ultrchmp, driver_device, 0, ROT0, "Nakanihon", "Cheng Ba Shi Jie - Chao Shi Kong Guan Jun (Taiwan)", GAME_NO_COCKTAIL \| GAME_IMPERFECT_COLORS )
r248389	r248390
13042	12636	GAME( 1997, hkagerou, 0, hkagerou, hkagerou, driver_device, 0, ROT0, "Nakanihon / Dynax", "Hana Kagerou [BET] (Japan)", GAME_NO_COCKTAIL )
13043	12637	GAME( 1998, mjchuuka, 0, mjchuuka, mjchuuka, driver_device, 0, ROT0, "Dynax", "Mahjong Chuukanejyo (China)", GAME_NO_COCKTAIL )
13044	12638	GAME( 1998, mjreach1, 0, mjreach1, mjreach1, driver_device, 0, ROT0, "Nihon System", "Mahjong Reach Ippatsu (Japan)", GAME_NO_COCKTAIL )
13045		GAME( 1999, jongtei, 0, jongtei, jongtei, driver_device, 0, ROT0, "Dynax", "Mahjong Jong-Tei (Japan, NM532-01)", GAME_NO_COCKTAIL )
	12639	GAME( 1999, jongtei, 0, jongtei, jongtei, driver_device, 0, ROT0, "Dynax", "Mahjong Jong-Tei (Japan, ver. NM532-01)", GAME_NO_COCKTAIL )
13046	12640	GAME( 2002, daimyojn, 0, daimyojn, daimyojn, driver_device, 0, ROT0, "Dynax / Techno-Top / Techno-Planning", "Mahjong Daimyojin (Japan, T017-PB-00)", GAME_NO_COCKTAIL )
13047		GAME( 2004, momotaro, 0, daimyojn, daimyojn, ddenlovr_state,momotaro, ROT0, "Techno-Top", "Mahjong Momotarou (Japan)", GAME_NO_COCKTAIL \| GAME_IMPERFECT_GRAPHICS \| GAME_NOT_WORKING )
	12641	GAME( 2004, momotaro, 0, daimyojn, daimyojn, ddenlovr_state, momotaro, ROT0, "Techno-Top", "Mahjong Momotarou (Japan)", GAME_NO_COCKTAIL \| GAME_IMPERFECT_GRAPHICS \| GAME_NOT_WORKING )

trunk/src/mame/drivers/dec0.c
r248389	r248390
2941	2941	ROM_END
2942	2942
2943	2943
2944		ROM_START( midresbj )
2945		ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
2946		ROM_LOAD16_BYTE( "14", 0x00000, 0x10000, CRC(6b3bc886) SHA1(998ef6ae89565148bcb8909f21acbec378ed5f4f) )
2947		ROM_LOAD16_BYTE( "11", 0x00001, 0x10000, CRC(9b6faab3) SHA1(b60e41972f52df910bfa09accd5fde7d858b55bf) )
2948		ROM_LOAD16_BYTE( "13", 0x20000, 0x10000, CRC(d1bb2cd6) SHA1(6d4afd8dd8c4c3e90de199358da27108286637e2) )
2949		ROM_LOAD16_BYTE( "10", 0x20001, 0x10000, CRC(42ccdd0d) SHA1(ef17cc984a8d57e9c52877f4e9b78e9976f99033) )
2950		ROM_LOAD16_BYTE( "12", 0x40000, 0x10000, CRC(258b10b2) SHA1(f0849801ab2c72bc6e929b230d0c6d41823f18ae) )
2951		ROM_LOAD16_BYTE( "9", 0x40001, 0x10000, CRC(dd6985d5) SHA1(bd58a1da2c5152464d7660f5b931d6257cb87c4e) )
2952
2953		ROM_REGION( 0x10000, "audiocpu", 0 ) /* 6502 sound */
2954		ROM_LOAD( "15", 0x0000, 0x10000, CRC(99d47166) SHA1(a9a1adfe47be8dd3e4d6f8c783447e09be1747b2) )
2955
2956		ROM_REGION( 0x10000, "cpu2", ROMREGION_ERASE00 ) /* 68705 MCU */
2957		//ROM_LOAD( "68705r3.bin", 0x00000, 0x1000, CRC(ad5b1c13) SHA1(3616dc5969323a54e3e171d169f76250ae4e711a) ) // unpopulated socket
2958
2959		ROM_REGION( 0x20000, "gfx1", 0 ) /* chars */
2960		ROM_LOAD( "23", 0x08000, 0x08000, CRC(d75aba06) SHA1(cb3b969db3dd8e0c5c3729482f7461cde3a961f3) )
2961		ROM_CONTINUE( 0x00000, 0x08000 ) /* the two halves are swapped */
2962		ROM_LOAD( "24", 0x18000, 0x08000, CRC(8f5bbb79) SHA1(cb10f68787606111ba5e9967bf0b0cd21269a902) )
2963		ROM_CONTINUE( 0x10000, 0x08000 )
2964
2965		ROM_REGION( 0x80000, "gfx2", 0 ) /* tiles */
2966		ROM_LOAD( "19", 0x00000, 0x20000, CRC(fd9ba1bd) SHA1(a105a4335eeed19662c89ab0f90485f1029cf03f) )
2967		ROM_LOAD( "18", 0x20000, 0x20000, CRC(a936c03c) SHA1(293e69874ce9b2dfb1d605c9f988fa736b12bbcf) )
2968		ROM_LOAD( "20", 0x40000, 0x20000, CRC(4d8e3cf1) SHA1(db804a608f6ba9ce4cedfec2581bcbb00de3f2ba) )
2969		ROM_LOAD( "17", 0x60000, 0x20000, CRC(b7241ab9) SHA1(3e83f9285ff4c476f1287bf73b514eace482dccc) )
2970
2971		ROM_REGION( 0x40000, "gfx3", 0 ) /* tiles */
2972		ROM_LOAD( "22", 0x10000, 0x10000, CRC(35a54bb4) SHA1(1869eb77a060e9df42b761b02e7fa5ecb7c414d1) )
2973		ROM_CONTINUE(0x00000,0x10000)
2974		ROM_LOAD( "21", 0x30000, 0x10000, CRC(4b9227b3) SHA1(7059f2d07fffa0468a45a42b87bf561da5e9c5a4) )
2975		ROM_CONTINUE(0x20000,0x10000)
2976
2977		ROM_REGION( 0x80000, "gfx4", 0 ) /* sprites */
2978		ROM_LOAD( "4", 0x00000, 0x10000, CRC(3f499acb) SHA1(1a22cfeed0497ddc2d571114d9f246b3ae18ede9) )
2979		ROM_LOAD( "8", 0x10000, 0x10000, CRC(5e7a6800) SHA1(8dd5c9005b6804a30627644053f14e4477fe0074) )
2980		ROM_LOAD( "2", 0x20000, 0x10000, CRC(897ba6e4) SHA1(70fd9cba3922751cb317770d6effdc2fb94c1324) )
2981		ROM_LOAD( "6", 0x30000, 0x10000, CRC(9fefb810) SHA1(863a81540261e78de5c612dea807ba29b12054d4) )
2982		ROM_LOAD( "3", 0x40000, 0x10000, CRC(ebafe720) SHA1(b9f76d2f1b59f1d028e6156b831c5c8ada033641) )
2983		ROM_LOAD( "7", 0x50000, 0x10000, CRC(bb8cf641) SHA1(a22e47a15d38d4f33e5a2c90f3a90a16a4231d2c) ) // slight changes, check (equivalent to 3.bin in above)
2984		ROM_LOAD( "1", 0x60000, 0x10000, CRC(fd0bd8d3) SHA1(d6b19869ddc2a8ed4f38ba9d613b71853f2d13c0) )
2985		ROM_LOAD( "5", 0x70000, 0x10000, CRC(fc46d5ed) SHA1(20ddf3f67f0dfb222ad8d3fd464b892ec9c9e4f5) )
2986
2987		ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
2988		ROM_LOAD( "16", 0x00000, 0x10000, CRC(ccf24b52) SHA1(39b2663c548b30684197284cb8e7a6ca803330c9))
2989		ROM_END
2990
2991	2944	ROM_START( bouldash )
2992	2945	ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
2993	2946	ROM_LOAD16_BYTE( "fw-15-2.17l", 0x00000, 0x10000, CRC(ca19a967) SHA1(b9dc2b1323f19b6239e550ed020943bf13de8db0) )
r248389	r248390
3129	3082	GAME( 1988, drgninjab, baddudes, baddudes, drgninja, dec0_state, baddudes, ROT0, "bootleg", "Dragonninja (bootleg)", GAME_SUPPORTS_SAVE )
3130	3083
3131	3084	// this is a common bootleg board
3132		GAME( 1989, midresb, midres, midresb, midresb, dec0_state, midresb, ROT0, "bootleg", "Midnight Resistance (bootleg with 68705)", GAME_SUPPORTS_SAVE ) // need to hook up 68705? (probably unused)
3133		GAME( 1989, midresbj, midres, midresb, midresb, dec0_state, midresb, ROT0, "bootleg", "Midnight Resistance (Joystick bootleg)", GAME_SUPPORTS_SAVE )
	3085	GAME( 1989, midresb, midres, midresb, midresb, dec0_state, midresb, ROT0, "bootleg", "Midnight Resistance (bootleg with 68705)", GAME_SUPPORTS_SAVE ) // need to hook up 68705?
3134	3086	GAME( 1989, ffantasybl, hippodrm, ffantasybl, ffantasybl, dec0_state, ffantasybl, ROT0, "bootleg", "Fighting Fantasy (bootleg with 68705)", GAME_IMPERFECT_GRAPHICS \| GAME_SUPPORTS_SAVE ) // 68705 not dumped, might be the same as midresb
3135	3087	/* A Bad Dudes bootleg with 68705 like the midres and ffantasy ones exists, but is not dumped */
3136	3088

trunk/src/mame/drivers/destroyr.c
r248389	r248390
29	29
30	30	destroyr_state(const machine_config &mconfig, device_type type, const char *tag)
31	31	: driver_device(mconfig, type, tag),
	32	m_alpha_num_ram(*this, "alpha_nuram"),
	33	m_major_obj_ram(*this, "major_obj_ram"),
	34	m_minor_obj_ram(*this, "minor_obj_ram"),
32	35	m_maincpu(*this, "maincpu"),
33	36	m_gfxdecode(*this, "gfxdecode"),
34	37	m_screen(*this, "screen"),
35		m_palette(*this, "palette"),
36		m_alpha_num_ram(*this, "alpha_nuram"),
37		m_major_obj_ram(*this, "major_obj_ram"),
38		m_minor_obj_ram(*this, "minor_obj_ram") { }
	38	m_palette(*this, "palette") { }
39	39
40		/* devices */
41		required_device<cpu_device> m_maincpu;
42		required_device<gfxdecode_device> m_gfxdecode;
43		required_device<screen_device> m_screen;
44		required_device<palette_device> m_palette;
45
46	40	/* memory pointers */
47	41	required_shared_ptr<UINT8> m_alpha_num_ram;
48	42	required_shared_ptr<UINT8> m_major_obj_ram;
r248389	r248390
58	52	int m_attract;
59	53	int m_motor_speed;
60	54	int m_noise;
61		emu_timer *m_dial_timer;
62		emu_timer *m_frame_timer;
63	55
64		DECLARE_WRITE8_MEMBER(misc_w);
65		DECLARE_WRITE8_MEMBER(cursor_load_w);
66		DECLARE_WRITE8_MEMBER(interrupt_ack_w);
67		DECLARE_WRITE8_MEMBER(output_w);
68		DECLARE_READ8_MEMBER(input_r);
69		DECLARE_READ8_MEMBER(scanline_r);
	56	/* devices */
	57	required_device<cpu_device> m_maincpu;
	58	required_device<gfxdecode_device> m_gfxdecode;
	59	required_device<screen_device> m_screen;
	60	required_device<palette_device> m_palette;
70	61
	62	DECLARE_WRITE8_MEMBER(destroyr_misc_w);
	63	DECLARE_WRITE8_MEMBER(destroyr_cursor_load_w);
	64	DECLARE_WRITE8_MEMBER(destroyr_interrupt_ack_w);
	65	DECLARE_WRITE8_MEMBER(destroyr_output_w);
	66	DECLARE_READ8_MEMBER(destroyr_input_r);
	67	DECLARE_READ8_MEMBER(destroyr_scanline_r);
71	68	virtual void machine_start();
72	69	virtual void machine_reset();
73	70	DECLARE_PALETTE_INIT(destroyr);
	71	UINT32 screen_update_destroyr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	72	TIMER_CALLBACK_MEMBER(destroyr_dial_callback);
	73	TIMER_CALLBACK_MEMBER(destroyr_frame_callback);
74	74
75		UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
76
77		TIMER_CALLBACK_MEMBER(dial_callback);
78		TIMER_CALLBACK_MEMBER(frame_callback);
79
80	75	protected:
81	76	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
82	77	};
83	78
84	79
85		UINT32 destroyr_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	80	UINT32 destroyr_state::screen_update_destroyr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
86	81	{
87	82	int i, j;
88	83
r248389	r248390
154	149	switch (id)
155	150	{
156	151	case TIMER_DESTROYR_DIAL:
157		dial_callback(ptr, param);
	152	destroyr_dial_callback(ptr, param);
158	153	break;
159	154	case TIMER_DESTROYR_FRAME:
160		frame_callback(ptr, param);
	155	destroyr_frame_callback(ptr, param);
161	156	break;
162	157	default:
163	158	assert_always(FALSE, "Unknown id in destroyr_state::device_timer");
r248389	r248390
165	160	}
166	161
167	162
168		TIMER_CALLBACK_MEMBER(destroyr_state::dial_callback)
	163	TIMER_CALLBACK_MEMBER(destroyr_state::destroyr_dial_callback)
169	164	{
170	165	int dial = param;
171	166
r248389	r248390
185	180	}
186	181
187	182
188		TIMER_CALLBACK_MEMBER(destroyr_state::frame_callback)
	183	TIMER_CALLBACK_MEMBER(destroyr_state::destroyr_frame_callback)
189	184	{
190	185	m_potsense[0] = 0;
191	186	m_potsense[1] = 0;
192	187
193	188	/* PCB supports two dials, but cab has only got one */
194		m_dial_timer->adjust(m_screen->time_until_pos(ioport("PADDLE")->read()));
195		m_frame_timer->adjust(m_screen->time_until_pos(0));
	189	timer_set(m_screen->time_until_pos(ioport("PADDLE")->read()), TIMER_DESTROYR_DIAL);
	190	timer_set(m_screen->time_until_pos(0), TIMER_DESTROYR_FRAME);
196	191	}
197	192
198	193
r248389	r248390
212	207	}
213	208
214	209
215		WRITE8_MEMBER(destroyr_state::misc_w)
	210	WRITE8_MEMBER(destroyr_state::destroyr_misc_w)
216	211	{
217	212	/* bits 0 to 2 connect to the sound circuits */
218	213	m_attract = data & 0x01;
r248389	r248390
227	222	}
228	223
229	224
230		WRITE8_MEMBER(destroyr_state::cursor_load_w)
	225	WRITE8_MEMBER(destroyr_state::destroyr_cursor_load_w)
231	226	{
232	227	m_cursor = data;
233	228	watchdog_reset_w(space, offset, data);
234	229	}
235	230
236	231
237		WRITE8_MEMBER(destroyr_state::interrupt_ack_w)
	232	WRITE8_MEMBER(destroyr_state::destroyr_interrupt_ack_w)
238	233	{
239	234	m_maincpu->set_input_line(0, CLEAR_LINE);
240	235	}
241	236
242	237
243		WRITE8_MEMBER(destroyr_state::output_w)
	238	WRITE8_MEMBER(destroyr_state::destroyr_output_w)
244	239	{
245		if (offset & 8) misc_w(space, 8, data);
	240	if (offset & 8) destroyr_misc_w(space, 8, data);
246	241
247	242	else switch (offset & 7)
248	243	{
r248389	r248390
274	269	}
275	270
276	271
277		READ8_MEMBER(destroyr_state::input_r)
	272	READ8_MEMBER(destroyr_state::destroyr_input_r)
278	273	{
279	274	if (offset & 1)
280	275	{
r248389	r248390
295	290	}
296	291
297	292
298		READ8_MEMBER(destroyr_state::scanline_r)
	293	READ8_MEMBER(destroyr_state::destroyr_scanline_r)
299	294	{
300	295	return m_screen->vpos();
301	296	}
r248389	r248390
304	299	static ADDRESS_MAP_START( destroyr_map, AS_PROGRAM, 8, destroyr_state )
305	300	ADDRESS_MAP_GLOBAL_MASK(0x7fff)
306	301	AM_RANGE(0x0000, 0x00ff) AM_MIRROR(0xf00) AM_RAM
307		AM_RANGE(0x1000, 0x1fff) AM_READWRITE(input_r, output_w)
	302	AM_RANGE(0x1000, 0x1fff) AM_READWRITE(destroyr_input_r, destroyr_output_w)
308	303	AM_RANGE(0x2000, 0x2fff) AM_READ_PORT("IN2")
309	304	AM_RANGE(0x3000, 0x30ff) AM_MIRROR(0xf00) AM_WRITEONLY AM_SHARE("alpha_nuram")
310	305	AM_RANGE(0x4000, 0x401f) AM_MIRROR(0xfe0) AM_WRITEONLY AM_SHARE("major_obj_ram")
311		AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xff8) AM_WRITE(cursor_load_w)
312		AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xff8) AM_WRITE(interrupt_ack_w)
	306	AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xff8) AM_WRITE(destroyr_cursor_load_w)
	307	AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xff8) AM_WRITE(destroyr_interrupt_ack_w)
313	308	AM_RANGE(0x5002, 0x5007) AM_MIRROR(0xff8) AM_WRITEONLY AM_SHARE("minor_obj_ram")
314		AM_RANGE(0x6000, 0x6fff) AM_READ(scanline_r)
	309	AM_RANGE(0x6000, 0x6fff) AM_READ(destroyr_scanline_r)
315	310	AM_RANGE(0x7000, 0x7fff) AM_ROM
316	311	ADDRESS_MAP_END
317	312
r248389	r248390
474	469
475	470	void destroyr_state::machine_start()
476	471	{
477		m_dial_timer = timer_alloc(TIMER_DESTROYR_DIAL);
478		m_frame_timer = timer_alloc(TIMER_DESTROYR_FRAME);
479
480	472	save_item(NAME(m_cursor));
481	473	save_item(NAME(m_wavemod));
482	474	save_item(NAME(m_attract));
r248389	r248390
499	491	MCFG_SCREEN_REFRESH_RATE(60)
500	492	MCFG_SCREEN_SIZE(256, 262)
501	493	MCFG_SCREEN_VISIBLE_AREA(0, 255, 0, 239)
502		MCFG_SCREEN_UPDATE_DRIVER(destroyr_state, screen_update)
	494	MCFG_SCREEN_UPDATE_DRIVER(destroyr_state, screen_update_destroyr)
503	495	MCFG_SCREEN_PALETTE("palette")
504	496
505	497	MCFG_GFXDECODE_ADD("gfxdecode", "palette", destroyr)
r248389	r248390
560	552	ROM_END
561	553
562	554
563		GAMEL( 1977, destroyr, 0, destroyr, destroyr, driver_device, 0, ORIENTATION_FLIP_X, "Atari", "Destroyer (version O2)", GAME_NO_SOUND \| GAME_SUPPORTS_SAVE, layout_destroyr )
564		GAMEL( 1977, destroyr1, destroyr, destroyr, destroyr, driver_device, 0, ORIENTATION_FLIP_X, "Atari", "Destroyer (version O1)", GAME_NO_SOUND \| GAME_SUPPORTS_SAVE, layout_destroyr )
	555	GAMEL( 1977, destroyr, 0, destroyr, destroyr, driver_device, 0, ORIENTATION_FLIP_X, "Atari", "Destroyer (version O2)", GAME_NO_SOUND, layout_destroyr )
	556	GAMEL( 1977, destroyr1, destroyr, destroyr, destroyr, driver_device, 0, ORIENTATION_FLIP_X, "Atari", "Destroyer (version O1)", GAME_NO_SOUND, layout_destroyr )

trunk/src/mame/drivers/dynax.c
r248389	r248390
5352	5352	ROM_LOAD( "promat02.bin", 0x200, 0x200, CRC(e38eb360) SHA1(739960dd57ec3305edd57aa63816a81ddfbebf3e) )
5353	5353	ROM_END
5354	5354
5355		ROM_START( mayac )
5356		ROM_REGION( 0x90000, "maincpu", 0 ) // Z80 Code
5357		ROM_LOAD( "e16", 0x00000, 0x10000, CRC(badafb62) SHA1(eabe390f5b3ca6acd4b194b65b81fda7ddca35b8) )
5358		ROM_LOAD( "e15", 0x28000, 0x10000, CRC(7ea5b49a) SHA1(aaae848669d9f88c0660f46cc801e4eb0f5e3b89) )
5359
5360		ROM_REGION( 0xc0000, "gfx1", 0 )
5361		ROM_LOAD( "g18", 0x00000, 0x40000, CRC(b621955c) SHA1(8bb3cf16585f33e81921efe7958cf8ca08e8df7f) )
5362		ROM_LOAD( "g16", 0x40000, 0x40000, CRC(26b1c824) SHA1(e1a1a51ef94a3933d5fe4b3d47ad2c1dfb9a1c19) )
5363		ROM_LOAD( "g15", 0x80000, 0x40000, CRC(f7c6f77e) SHA1(27ba271ec67504dc0c6f9b20362206bbd4b0d90a) )
5364
5365		ROM_REGION( 0x400, "proms", 0 ) // Color PROMs
5366		ROM_LOAD( "82s147-2.b5", 0x000, 0x200, CRC(5091de2b) SHA1(ae13676cd2fbde1b87c85480283b24440e069ba4) ) // FIXED BITS (0xxxxxxx)
5367		ROM_LOAD( "82s147-1.b6", 0x200, 0x200, CRC(6d4940cd) SHA1(33875fd846977f8839fdb0f2a259959994552f35) )
5368		ROM_END
5369
5370
5371	5355	ROM_START( inca )
5372	5356	ROM_REGION( 0x90000, "maincpu", 0 ) // Z80 Code
5373	5357	ROM_LOAD( "am27c512.1", 0x00000, 0x10000, CRC(b0d513f7) SHA1(65ef4702302bbfc7c7a77f7353120ee3f5c94b31) )
r248389	r248390
5456	5440
5457	5441	}
5458	5442	}
5459
5460	5443
5461		DRIVER_INIT_MEMBER(dynax_state, maya~~_common~~)
	5444	DRIVER_INIT_MEMBER(dynax_state,maya)
5462	5445	{
5463	5446	/* Address lines scrambling on 1 z80 rom */
	5447	int i;
	5448	UINT8 gfx = (UINT8 )memregion("gfx1")->base();
5464	5449	UINT8 rom = memregion("maincpu")->base() + 0x28000, end = rom + 0x10000;
5465	5450	for ( ; rom < end; rom += 8)
5466	5451	{
r248389	r248390
5471	5456	rom[0] = temp[0]; rom[1] = temp[4]; rom[2] = temp[1]; rom[3] = temp[5];
5472	5457	rom[4] = temp[2]; rom[5] = temp[6]; rom[6] = temp[3]; rom[7] = temp[7];
5473	5458	}
5474		}
5475	5459
5476
5477		DRIVER_INIT_MEMBER(dynax_state,maya)
5478		{
5479		DRIVER_INIT_CALL(maya_common);
5480
5481		UINT8 gfx = (UINT8 )memregion("gfx1")->base();
5482		int i;
5483
5484	5460	/* Address lines scrambling on the blitter data roms */
5485	5461	{
5486	5462	dynamic_buffer rom(0xc0000);
5487	5463	memcpy(&rom[0], gfx, 0xc0000);
5488	5464	for (i = 0; i < 0xc0000; i++)
5489		gfx[i] = rom[BITSWAP24(i, 23, 22, 21, 20, 19, 18, 14, 15, 16, 17, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)];
	5465	gfx[i] = rom[BITSWAP24(i,23,22,21,20,19,18,14,15, 16,17,13,12,11,10,9,8, 7,6,5,4,3,2,1,0)];
5490	5466	}
5491	5467	}
5492	5468
5493	5469
5494		DRIVER_INIT_MEMBER(dynax_state,mayac)
5495		{
5496		DRIVER_INIT_CALL(maya_common);
5497
5498		UINT8 gfx = (UINT8 )memregion("gfx1")->base();
5499		int i;
5500
5501		/* Address lines scrambling on the blitter data roms */
5502		{
5503		dynamic_buffer rom(0xc0000);
5504		memcpy(&rom[0], gfx, 0xc0000);
5505		for (i = 0; i < 0xc0000; i++)
5506		gfx[i] = rom[BITSWAP24(i, 23, 22, 21, 20, 19, 18, 17, 14, 16, 15, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)];
5507		}
5508		}
5509
5510
5511	5470	/***************************************************************************
5512	5471
5513	5472	Mahjong Dial Q2
r248389	r248390
7380	7339	GAME( 1989, hnoridur, hjingi, hnoridur, hnoridur, driver_device, 0, ROT180, "Dynax", "Hana Oriduru (Japan)", GAME_SUPPORTS_SAVE )
7381	7340	GAME( 1989, drgpunch, 0, sprtmtch, drgpunch, driver_device, 0, ROT0, "Dynax", "Dragon Punch (Japan)", GAME_SUPPORTS_SAVE )
7382	7341	GAME( 1989, sprtmtch, drgpunch, sprtmtch, sprtmtch, driver_device, 0, ROT0, "Dynax (Fabtek license)", "Sports Match", GAME_SUPPORTS_SAVE )
7383		/* these 3 are Korean hacks / bootlegs of Dragon Punch / Sports Match */
	7342	/* these 5 are Korean hacks / bootlegs of Dragon Punch / Sports Match */
7384	7343	GAME( 1994, maya, 0, sprtmtch, drgpunch, dynax_state, maya, ROT0, "Promat", "Maya (set 1)", GAME_SUPPORTS_SAVE ) // this set has backgrounds blacked out in attract
7385	7344	GAME( 1994, mayaa, maya, sprtmtch, drgpunch, dynax_state, maya, ROT0, "Promat", "Maya (set 2)", GAME_SUPPORTS_SAVE ) // this set has backgrounds blacked out in attract
7386	7345	GAME( 1994, mayab, maya, sprtmtch, drgpunch, dynax_state, maya, ROT0, "Promat", "Maya (set 3)", GAME_SUPPORTS_SAVE )
7387		GAME( 1994, mayac, maya, sprtmtch, drgpunch, dynax_state, mayac, ROT0, "Promat", "Maya (set 4, clean)", GAME_SUPPORTS_SAVE )
7388	7346	GAME( 199?, inca, 0, sprtmtch, drgpunch, dynax_state, maya, ROT0, "<unknown>", "Inca", GAME_SUPPORTS_SAVE )
7389	7347	GAME( 199?, blktouch, 0, sprtmtch, drgpunch, dynax_state, blktouch, ROT0, "Yang Gi Co Ltd.", "Black Touch (Korea)", GAME_SUPPORTS_SAVE )
7390	7348

trunk/src/mame/drivers/fcrash.c
r248389	r248390
1782	1782	ROMX_LOAD( "12.bin", 0x080001, 0x20000, CRC(25055642) SHA1(578cf6a436489cc1f2d1acdb0cba6c1cbee2e21f) , ROM_SKIP(3) )
1783	1783	ROMX_LOAD( "14.bin", 0x080002, 0x20000, CRC(b77d0328) SHA1(42eb1ebfda301f2b09f3add5932e8331f4790706) , ROM_SKIP(3) )
1784	1784	ROMX_LOAD( "16.bin", 0x080003, 0x20000, CRC(ea111a79) SHA1(1b86aa984d2d6c527e96b61274a82263f34d0d89) , ROM_SKIP(3) )
1785		ROMX_LOAD( "19.bin", 0x100000, 0x20000, CRC(b3aa1f48) SHA1(411f3855739992f5967e915f2a5255afcedeac2e) , ROM_SKIP(3) ) // only these 4 differ from ffightbla (new title logo)
1786		ROMX_LOAD( "21.bin", 0x100001, 0x20000, CRC(04d175c9) SHA1(33e6e3fefae4e3977c8c954fbd7feff36e92d723) , ROM_SKIP(3) ) // ^
1787		ROMX_LOAD( "23.bin", 0x100002, 0x20000, CRC(e592ba4f) SHA1(62559481e0da3954a90da0ab0fb51f87f1b3dd9d) , ROM_SKIP(3) ) // ^
1788		ROMX_LOAD( "25.bin", 0x100003, 0x20000, CRC(b89a740f) SHA1(516d73c772e0a904dfb0bd84874919d78bbbd200) , ROM_SKIP(3) ) // ^
	1785	ROMX_LOAD( "19.bin", 0x100000, 0x20000, CRC(b3aa1f48) SHA1(411f3855739992f5967e915f2a5255afcedeac2e) , ROM_SKIP(3) )
	1786	ROMX_LOAD( "21.bin", 0x100001, 0x20000, CRC(04d175c9) SHA1(33e6e3fefae4e3977c8c954fbd7feff36e92d723) , ROM_SKIP(3) )
	1787	ROMX_LOAD( "23.bin", 0x100002, 0x20000, CRC(e592ba4f) SHA1(62559481e0da3954a90da0ab0fb51f87f1b3dd9d) , ROM_SKIP(3) )
	1788	ROMX_LOAD( "25.bin", 0x100003, 0x20000, CRC(b89a740f) SHA1(516d73c772e0a904dfb0bd84874919d78bbbd200) , ROM_SKIP(3) )
1789	1789	ROMX_LOAD( "11.bin", 0x180000, 0x20000, CRC(d4457a60) SHA1(9e956efafa81a81aca92837df03968f5670ffc15) , ROM_SKIP(3) )
1790	1790	ROMX_LOAD( "13.bin", 0x180001, 0x20000, CRC(3b26a37d) SHA1(58d8d0cdef81c938fb1a5595f2d02b228865893b) , ROM_SKIP(3) )
1791	1791	ROMX_LOAD( "15.bin", 0x180002, 0x20000, CRC(6d837e09) SHA1(b4a133ab96c35b689ee692bfcc04981791099b6f) , ROM_SKIP(3) )
r248389	r248390
1814	1814	ROM_COPY( "gfx", 0x000000, 0x000000, 0x8000 ) /* stars */
1815	1815	ROM_END
1816	1816
1817		// this is identical to the Final Crash bootleg but without the modified gfx.
1818		// it's less common than Final Crash, but is either the original bootleg, or the bootleggers wanted to restore the
1819		// original title.
1820		ROM_START( ffightbla )
1821		ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
1822		ROM_LOAD16_BYTE( "9.bin", 0x00000, 0x20000, CRC(c6854c91) SHA1(29f01cc65be5eaa3f86e99eebdd284104623abb0) )
1823		ROM_LOAD16_BYTE( "5.bin", 0x00001, 0x20000, CRC(77f7c2b3) SHA1(feea48d9555824a2e5bf5e99ce159edc015f0792) )
1824		ROM_LOAD16_BYTE( "8.bin", 0x40000, 0x20000, CRC(1895b3df) SHA1(415a26050c50ed79a7ee5ddd1b8d61593b1ce876) )
1825		ROM_LOAD16_BYTE( "4.bin", 0x40001, 0x20000, CRC(bbd411ee) SHA1(85d50ca72ec46d627f9c88ff0809aa30e164821a) )
1826		ROM_LOAD16_BYTE( "7.bin", 0x80000, 0x20000, CRC(5b23ebf2) SHA1(8c28c21a72a28ad249170026891c6bb865943f84) )
1827		ROM_LOAD16_BYTE( "3.bin", 0x80001, 0x20000, CRC(aba2aebe) SHA1(294109b5929ed63859a55bef16643e3ade7da16f) )
1828		ROM_LOAD16_BYTE( "6.bin", 0xc0000, 0x20000, CRC(d4bf37f6) SHA1(f47e1cc9aa3b3019ee57f59715e3a611acf9fe3e) )
1829		ROM_LOAD16_BYTE( "2.bin", 0xc0001, 0x20000, CRC(07ac8f43) SHA1(7a41b003c76adaabd3f94929cc163461b70e0ed9) )
1830		//ROM_FILL(0x2610, 1, 7) // temporary patch to fix transitions
1831	1817
1832		ROM_REGION( 0x30000, "audiocpu", 0 ) /* Audio CPU + Sample Data */
1833		ROM_LOAD( "1.bin", 0x00000, 0x20000, CRC(5b276c14) SHA1(73e53c077d4e3c1b919eee28b29e34176ee204f8) )
1834		ROM_RELOAD( 0x10000, 0x20000 )
1835	1818
1836		ROM_REGION( 0x200000, "gfx", 0 )
1837		ROMX_LOAD( "18.bin", 0x000000, 0x20000, CRC(f1eee6d9) SHA1(bee95efbff49c582cff1cc6d9bb5ef4ea5c4a074) , ROM_SKIP(3) )
1838		ROMX_LOAD( "20.bin", 0x000001, 0x20000, CRC(675f4537) SHA1(acc68822da3aafbb62f76cbffa5f3389fcc91447) , ROM_SKIP(3) )
1839		ROMX_LOAD( "22.bin", 0x000002, 0x20000, CRC(db8a32ac) SHA1(b95f73dff291acee239e22e5fd7efe15d0de23be) , ROM_SKIP(3) )
1840		ROMX_LOAD( "24.bin", 0x000003, 0x20000, CRC(f4113e57) SHA1(ff1f443c13494a169b9be24abc361d27a6d01c09) , ROM_SKIP(3) )
1841		ROMX_LOAD( "10.bin", 0x080000, 0x20000, CRC(d478853e) SHA1(91fcf8eb022ccea66d291bec84ace557181cf861) , ROM_SKIP(3) )
1842		ROMX_LOAD( "12.bin", 0x080001, 0x20000, CRC(25055642) SHA1(578cf6a436489cc1f2d1acdb0cba6c1cbee2e21f) , ROM_SKIP(3) )
1843		ROMX_LOAD( "14.bin", 0x080002, 0x20000, CRC(b77d0328) SHA1(42eb1ebfda301f2b09f3add5932e8331f4790706) , ROM_SKIP(3) )
1844		ROMX_LOAD( "16.bin", 0x080003, 0x20000, CRC(ea111a79) SHA1(1b86aa984d2d6c527e96b61274a82263f34d0d89) , ROM_SKIP(3) )
1845		ROMX_LOAD( "ff-19.bin", 0x100000, 0x20000, CRC(7bc03747) SHA1(6964e5c562d6af5b4327ff828f3d0522c34911bc) , ROM_SKIP(3) ) // only these 4 differ from fcrash
1846		ROMX_LOAD( "ff-21.bin", 0x100001, 0x20000, CRC(0c248e2b) SHA1(28731fe25a8eb39c1e0822cf9074a7a32c6b2978) , ROM_SKIP(3) ) // ^
1847		ROMX_LOAD( "ff-23.bin", 0x100002, 0x20000, CRC(53949d0e) SHA1(1b11134005a47c323917b9892fe44819c36c6ee2) , ROM_SKIP(3) ) // ^
1848		ROMX_LOAD( "ff-25.bin", 0x100003, 0x20000, CRC(8d34a67d) SHA1(69e9f52efb73952313848a6d54dbdc17a2275c59) , ROM_SKIP(3) ) // ^
1849		ROMX_LOAD( "11.bin", 0x180000, 0x20000, CRC(d4457a60) SHA1(9e956efafa81a81aca92837df03968f5670ffc15) , ROM_SKIP(3) )
1850		ROMX_LOAD( "13.bin", 0x180001, 0x20000, CRC(3b26a37d) SHA1(58d8d0cdef81c938fb1a5595f2d02b228865893b) , ROM_SKIP(3) )
1851		ROMX_LOAD( "15.bin", 0x180002, 0x20000, CRC(6d837e09) SHA1(b4a133ab96c35b689ee692bfcc04981791099b6f) , ROM_SKIP(3) )
1852		ROMX_LOAD( "17.bin", 0x180003, 0x20000, CRC(c59a4d6c) SHA1(59e49c7d24dd333007de4bb621050011a5392bcc) , ROM_SKIP(3) )
1853	1819
1854		ROM_REGION( 0x8000, "gfx2", 0 )
1855		ROM_COPY( "gfx", 0x000000, 0x000000, 0x8000 ) /* stars */
1856		ROM_END
1857	1820
1858
1859
1860	1821	// ************************************************************************* KODB
1861	1822
1862	1823	/*
r248389	r248390
2942	2903
2943	2904	GAME( 1990, fcrash, ffight, fcrash, fcrash, cps_state, cps1, ROT0, "bootleg (Playmark)", "Final Crash (bootleg of Final Fight)", GAME_SUPPORTS_SAVE )
2944	2905	GAME( 1990, ffightbl, ffight, fcrash, fcrash, cps_state, cps1, ROT0, "bootleg", "Final Fight (bootleg)", GAME_SUPPORTS_SAVE )
2945		GAME( 1990, ffightbla, ffight, fcrash, fcrash, cps_state, cps1, ROT0, "bootleg", "Final Fight (bootleg on Final Crash PCB)", GAME_SUPPORTS_SAVE ) // same as Final Crash without the modified gfx
2946	2906
2947	2907	GAME( 1991, kodb, kod, kodb, kodb, cps_state, kodb, ROT0, "bootleg (Playmark)", "The King of Dragons (bootleg)", GAME_IMPERFECT_GRAPHICS \| GAME_SUPPORTS_SAVE ) // 910731 "ETC"
2948	2908	GAME( 1991, knightsb, knights, knightsb, knights, cps_state, dinopic, ROT0, "bootleg", "Knights of the Round (bootleg)", GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) // 911127 - based on World version

trunk/src/mame/drivers/fuukifg3.c
r248389	r248390
38	38	- PCM channels of music in asurabus is sometimes off-tune, check Chen-Mao's stage for example
39	39	note: srom.u7 (z80 prg) is a good dump
40	40
	41	- YMF278B and YMF262 are hooked up in an awkward way (real chip has YMF262 integrated)
	42
41	43	Asura Blade
42	44	Fuuki Co. Ltd., 1998
43	45
r248389	r248390
160	162	#include "cpu/z80/z80.h"
161	163	#include "cpu/m68000/m68000.h"
162	164	#include "sound/ymf278b.h"
	165	#include "sound/262intf.h"
163	166	#include "includes/fuukifg3.h"
164	167
165	168
r248389	r248390
255	258	WRITE8_MEMBER(fuuki32_state::snd_ymf278b_w)
256	259	{
257	260	machine().device<ymf278b_device>("ymf1")->write(space, offset, data);
	261
	262	// also write to ymf262
	263	if (offset < 4)
	264	machine().device<ymf262_device>("ymf2")->write(space, offset, data);
258	265	}
259	266
260	267	static ADDRESS_MAP_START( fuuki32_sound_map, AS_PROGRAM, 8, fuuki32_state )
r248389	r248390
577	584	MCFG_YMF278B_IRQ_HANDLER(INPUTLINE("soundcpu", 0))
578	585	MCFG_SOUND_ROUTE(0, "lspeaker", 0.50)
579	586	MCFG_SOUND_ROUTE(1, "rspeaker", 0.50)
	587
	588	MCFG_SOUND_ADD("ymf2", YMF262, YMF278B_STD_CLOCK / (19/8.0))
	589	MCFG_SOUND_ROUTE(0, "lspeaker", 0.40)
	590	MCFG_SOUND_ROUTE(1, "rspeaker", 0.40)
580	591	MCFG_SOUND_ROUTE(2, "lspeaker", 0.40)
581	592	MCFG_SOUND_ROUTE(3, "rspeaker", 0.40)
582		MCFG_SOUND_ROUTE(4, "lspeaker", 0.40)
583		MCFG_SOUND_ROUTE(5, "rspeaker", 0.40)
584	593
585	594	MACHINE_CONFIG_END
586	595

trunk/src/mame/drivers/kurukuru.c
r248389	r248390
266	266
267	267	TIMER_DEVICE_CALLBACK_MEMBER(kurukuru_state::kurukuru_vdp_scanline)
268	268	{
	269	m_v9938->set_resolution(0);
269	270	m_v9938->interrupt();
270	271	}
271	272

trunk/src/mame/drivers/mazerbla.c
r248389	r248390
21	21	- 32 dipswitches in 4 banks of 8
22	22	- four 'test button' style switches
23	23	- one 4Mhz xtal @A1
24		- this same board is shared with cliff hanger (cliffhgr.c)
	24	- this same board is shared with cliff hanger (clifhgr.c)
25	25
26	26	CFB-1000 - video/subcpu board (Color Frame Board)
27	27	- this board has a sub-cpu on it and four roms (six sockets for roms, two empty)
r248389	r248390
48	48	- PROMS: 82s123: @B8 @B9; 82s129: @G8 @G9 (all dumped)
49	49
50	50	CRF-1001 - RF Filter board for video/audio output
51		- this same board is shared with cliff hanger (cliffhgr.c)
	51	- this same board is shared with cliff hanger (clifhgr.c)
52	52
53	53	Versions:
54	54	======
r248389	r248390
61	61
62	62	Issues:
63	63	======
64		Sprites leave trails in both games
	64	Sprites leave trails in both ganes
65	65	Sprites should be transparent (color 0x0f)
66	66	Screen flickers heavily in Great Guns (double buffer issue?).
67	67
r248389	r248390
233	233	TIMER_CALLBACK_MEMBER(deferred_ls670_1_w);
234	234	TIMER_CALLBACK_MEMBER(delayed_sound_w);
235	235	IRQ_CALLBACK_MEMBER(irq_callback);
	236	void rom_bank_select();
236	237	};
237	238
238	239
r248389	r248390
350	351	WRITE8_MEMBER(mazerbla_state::cfb_rom_bank_sel_w)
351	352	{
352	353	m_gfx_rom_bank = data;
353
354		membank("bank1")->set_entry(m_gfx_rom_bank);
	354	rom_bank_select();
355	355	}
356	356
	357	void mazerbla_state::rom_bank_select()
	358	{
	359	membank("bank1")->set_base(memregion("sub2")->base() + (m_gfx_rom_bank * 0x2000) + 0x10000);
	360	}
	361
	362
357	363	#if 0
358	364	WRITE8_MEMBER(mazerbla_state::vcu_video_reg_w)
359	365	{
r248389	r248390
1380	1386
1381	1387	void mazerbla_state::machine_start()
1382	1388	{
1383		membank("bank1")->configure_entries(0, 256, memregion("sub2")->base() + 0x10000, 0x2000);
1384
1385	1389	save_item(NAME(m_vcu_video_reg));
1386	1390	save_item(NAME(m_vcu_gfx_addr));
1387	1391	save_item(NAME(m_vcu_gfx_param_addr));
r248389	r248390
1409	1413
1410	1414	save_item(NAME(m_vsb_ls273));
1411	1415	save_item(NAME(m_soundlatch));
	1416
	1417	machine().save().register_postload(save_prepost_delegate(FUNC(mazerbla_state::rom_bank_select), this));
1412	1418	}
1413	1419
1414	1420	void mazerbla_state::machine_reset()

trunk/src/mame/drivers/mcr3.c
r248389	r248390
2033	2033	/* MCR scrolling games */
2034	2034	GAMEL(1983, spyhunt, 0, mcrsc_csd, spyhunt, mcr3_state, spyhunt, ROT90, "Bally Midway", "Spy Hunter", GAME_SUPPORTS_SAVE, layout_spyhunt )
2035	2035	GAMEL(1983, spyhuntp, spyhunt, mcrsc_csd, spyhunt, mcr3_state, spyhunt, ROT90, "Bally Midway (Playtronic license)", "Spy Hunter (Playtronic license)", GAME_SUPPORTS_SAVE, layout_spyhunt )
	2036	GAME (1983, spyhuntpr,spyhunt, spyhuntpr, spyhuntpr,mcr3_state, spyhuntpr,ROT90, "Bally Midway (Recreativos Franco S.A. license)", "Spy Hunter (Spain, Recreativos Franco S.A. PCB)", GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) // PCB made by Recreativos Franco S.A. in Spain, has Bally Midway logo, board is dated '85' so seems to be a low-cost rebuild? it is unclear if it made it to market.
2036	2037	GAME( 1984, crater, 0, mcrscroll, crater, mcr3_state, crater, ORIENTATION_FLIP_X, "Bally Midway", "Crater Raider", GAME_SUPPORTS_SAVE )
2037	2038	GAMEL(1985, turbotag, 0, mcrsc_csd, turbotag, mcr3_state, turbotag, ROT90, "Bally Midway", "Turbo Tag (prototype)", GAME_SUPPORTS_SAVE, layout_turbotag )
2038
2039		// very different hardware, probably bootleg despite the license text printed on the PCB, similar to '1942p' in 1942.c. Probably should be put in separate driver.
2040		// PCB made by Tecfri for Recreativos Franco S.A. in Spain, has Bally Midway logo, and licensing text on the PCB. Board is dated '85' so seems to be a low-cost rebuild? it is unclear if it made it to market.
2041		GAME (1983, spyhuntpr,spyhunt, spyhuntpr, spyhuntpr,mcr3_state, spyhuntpr,ROT90, "Bally Midway (Recreativos Franco S.A. license)", "Spy Hunter (Spain, Tecfri / Recreativos Franco S.A. PCB)", GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE )

trunk/src/mame/drivers/megatech.c
r248389	r248390
1451	1451	/* 52 */ GAME( 1991, mt_sonic, megatech, megatech, megatech, mtech_state, mt_crt, ROT0, "Sega", "Sonic The Hedgehog (Mega-Tech, set 1)", GAME_NOT_WORKING )
1452	1452	/* */ GAME( 1991, mt_sonia, mt_sonic, megatech, megatech, mtech_state, mt_crt, ROT0, "Sega", "Sonic The Hedgehog (Mega-Tech, set 2)", GAME_NOT_WORKING )
1453	1453	/* 53 */ GAME( 1990, mt_fshrk, megatech, megatech, megatech, mtech_state, mt_crt, ROT0, "Toaplan / Sega", "Fire Shark (Mega-Tech)", GAME_NOT_WORKING )
1454		/* 54 */ GAME( 1991, mt_spman, megatech, megatech, megatech, mtech_state, mt_crt, ROT0, "~~Sega /~~ Marvel", "Spider-Man vs The Kingpin (Mega-Tech)", GAME_NOT_WORKING )
	1454	/* 54 */ GAME( 1991, mt_spman, megatech, megatech, megatech, mtech_state, mt_crt, ROT0, "Marvel / Sega", "Spider-Man vs The Kingpin (Mega-Tech)", GAME_NOT_WORKING )
1455	1455	/* 55 */ GAME( 1991, mt_calga, megatech, megatech, megatech, mtech_state, mt_crt, ROT0, "Sega", "California Games (Mega-Tech)", GAME_NOT_WORKING )
1456	1456	/* 56 */ // unknown
1457	1457	/* 57 */ GAME( 1991, mt_gaxe2, megatech, megatech, megatech, mtech_state, mt_crt, ROT0, "Sega", "Golden Axe II (Mega-Tech)", GAME_NOT_WORKING )

trunk/src/mame/drivers/meritm.c
r248389	r248390
301	301
302	302	if((scanline % 2) == 0)
303	303	{
	304	m_v9938_0->set_resolution(RENDER_HIGH);
304	305	m_v9938_0->interrupt();
	306
	307	m_v9938_1->set_resolution(RENDER_HIGH);
305	308	m_v9938_1->interrupt();
306	309	}
307	310	}

trunk/src/mame/drivers/namcona1.c
r248389	r248390
319	319	}
320	320	if( dest>=0xf00000 && dest<0xf02000 )
321	321	{
322		paletteram_w(space, (dest-0xf00000)/2, data, 0xffff );
	322	namcona1_paletteram_w(space, (dest-0xf00000)/2, data, 0xffff );
323	323	}
324	324	else if( dest>=0xf40000 && dest<0xf80000 )
325	325	{
326		gfxram_w(space, (dest-0xf40000)/2, data, 0xffff );
	326	namcona1_gfxram_w(space, (dest-0xf40000)/2, data, 0xffff );
327	327	}
328	328	else if( dest>=0xff0000 && dest<0xffc000 )
329	329	{
330		videoram_w(space, (dest-0xff0000)/2, data, 0xffff );
	330	namcona1_videoram_w(space, (dest-0xff0000)/2, data, 0xffff );
331	331	}
332	332	else if( dest>=0xfff000 && dest<0x1000000 )
333	333	{
r248389	r248390
412	412	}
413	413	} /* blit_setup */
414	414
415		void namcona1_state::blit()
	415	void namcona1_state::namcona1_blit()
416	416	{
417	417	int src0 = m_vreg[0x0];
418	418	int src1 = m_vreg[0x1];
r248389	r248390
487	487	src_offset = 0;
488	488	}
489	489	}
490		} /* blit */
	490	} /* namcona1_blit */
491	491
492		WRITE16_MEMBER(namcona1_state::vreg_w)
	492	WRITE16_MEMBER(namcona1_state::namcona1_vreg_w)
493	493	{
494	494	COMBINE_DATA( &m_vreg[offset] );
495	495
496	496	switch( offset )
497	497	{
498	498	case 0x18/2:
499		blit();
	499	namcona1_blit();
500	500	/* see also 0x1e */
501	501	break;
502	502
r248389	r248390
505	505	/* interrupt enable mask; 0 enables INT level */
506	506	break;
507	507	}
508		} /* vreg_w */
	508	} /* namcona1_vreg_w */
509	509
510	510	/***************************************************************/
511	511
r248389	r248390
546	546	AM_RANGE(0xc00000, 0xdfffff) AM_ROM AM_REGION("maincpu", 0) // code
547	547	AM_RANGE(0xe00000, 0xe00fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
548	548	AM_RANGE(0xe40000, 0xe4000f) AM_READWRITE(custom_key_r, custom_key_w)
549		AM_RANGE(0xefff00, 0xefffff) AM_RAM_WRITE(vreg_w) AM_SHARE("vreg")
550		AM_RANGE(0xf00000, 0xf01fff) AM_RAM_WRITE(paletteram_w) AM_SHARE("paletteram")
551		AM_RANGE(0xf40000, 0xf7ffff) AM_READWRITE(gfxram_r, gfxram_w) AM_SHARE("cgram")
552		AM_RANGE(0xff0000, 0xffbfff) AM_RAM_WRITE(videoram_w) AM_SHARE("videoram")
	549	AM_RANGE(0xefff00, 0xefffff) AM_RAM_WRITE(namcona1_vreg_w) AM_SHARE("vreg")
	550	AM_RANGE(0xf00000, 0xf01fff) AM_RAM_WRITE(namcona1_paletteram_w) AM_SHARE("paletteram")
	551	AM_RANGE(0xf40000, 0xf7ffff) AM_READWRITE(namcona1_gfxram_r, namcona1_gfxram_w) AM_SHARE("cgram")
	552	AM_RANGE(0xff0000, 0xffbfff) AM_RAM_WRITE(namcona1_videoram_w) AM_SHARE("videoram")
553	553	AM_RANGE(0xffd000, 0xffdfff) AM_RAM /* unknown */
554	554	AM_RANGE(0xffe000, 0xffefff) AM_RAM AM_SHARE("scroll") /* scroll registers */
555	555	AM_RANGE(0xfff000, 0xffffff) AM_RAM AM_SHARE("spriteram") /* spriteram */
r248389	r248390
694	694	m_maskrom = (UINT16 *)memregion("maskrom")->base();
695	695	m_mEnableInterrupts = 0;
696	696	m_c140->set_base(m_workram);
697
698		save_item(NAME(m_mEnableInterrupts));
699		save_item(NAME(m_count));
700		save_item(NAME(m_mcu_mailbox));
701		save_item(NAME(m_mcu_port4));
702		save_item(NAME(m_mcu_port5));
703		save_item(NAME(m_mcu_port6));
704		save_item(NAME(m_mcu_port8));
705	697	}
706	698
707	699	// the MCU boots the 68000
r248389	r248390
901	893	// IRQ 1 =>
902	894	// IRQ 2 =>
903	895
904		TIMER_DEVICE_CALLBACK_MEMBER(namcona1_state::interrupt)
	896	TIMER_DEVICE_CALLBACK_MEMBER(namcona1_state::namcona1_interrupt)
905	897	{
906	898	int scanline = param;
907	899	int enabled = m_mEnableInterrupts ? ~m_vreg[0x1a/2] : 0;
r248389	r248390
941	933	MCFG_CPU_PROGRAM_MAP(namcona1_mcu_map)
942	934	MCFG_CPU_IO_MAP( namcona1_mcu_io_map)
943	935
944		MCFG_TIMER_DRIVER_ADD_SCANLINE("scan_main", namcona1_state, interrupt, "screen", 0, 1)
	936	MCFG_TIMER_DRIVER_ADD_SCANLINE("scan_main", namcona1_state, namcona1_interrupt, "screen", 0, 1)
945	937
946	938	MCFG_EEPROM_2816_ADD("eeprom")
947	939
r248389	r248390
951	943	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
952	944	MCFG_SCREEN_SIZE(388, 328)
953	945	MCFG_SCREEN_VISIBLE_AREA(8, 388-1-8, 48, 32*8-1)
954		MCFG_SCREEN_UPDATE_DRIVER(namcona1_state, screen_update)
	946	MCFG_SCREEN_UPDATE_DRIVER(namcona1_state, screen_update_namcona1)
955	947	MCFG_SCREEN_PALETTE("palette")
956	948
957	949	MCFG_PALETTE_ADD("palette", 0x2000)
r248389	r248390
1000	992	DRIVER_INIT_MEMBER(namcona1_state,numanath) { m_gametype = NAMCO_NUMANATH; }
1001	993	DRIVER_INIT_MEMBER(namcona1_state,quiztou) { m_gametype = NAMCO_QUIZTOU; }
1002	994	DRIVER_INIT_MEMBER(namcona1_state,swcourt) { m_gametype = NAMCO_SWCOURT; }
1003		DRIVER_INIT_MEMBER(namcona1_state,tinklpit) { m_gametype = NAMCO_TINKLPIT; ~~save_item(NAME(m_keyval));~~ }
	995	DRIVER_INIT_MEMBER(namcona1_state,tinklpit) { m_gametype = NAMCO_TINKLPIT; }
1004	996	DRIVER_INIT_MEMBER(namcona1_state,xday2) { m_gametype = NAMCO_XDAY2; }
1005	997
1006	998	ROM_START( bkrtmaq )
r248389	r248390
1309	1301	ROM_END
1310	1302
1311	1303	// NA-1 (C69 MCU)
1312		GAME( 1992, bkrtmaq, 0, namcona1w, namcona1_quiz, namcona1_state,bkrtmaq, ROT0, "Namco", "Bakuretsu Quiz Ma-Q Dai Bouken (Japan)", GAME_SUPPORTS_SAVE )
1313		GAME( 1992, cgangpzl, 0, namcona1w, namcona1_joy, namcona1_state, cgangpzl, ROT0, "Namco", "Cosmo Gang the Puzzle (US)", GAME_SUPPORTS_SAVE )
1314		GAME( 1992, cgangpzlj, cgangpzl, namcona1w, namcona1_joy, namcona1_state, cgangpzl, ROT0, "Namco", "Cosmo Gang the Puzzle (Japan)", GAME_SUPPORTS_SAVE )
1315		GAME( 1992, exvania, 0, namcona1, namcona1_joy, namcona1_state, exbania, ROT0, "Namco", "Exvania (World)", GAME_SUPPORTS_SAVE )
1316		GAME( 1992, exvaniaj, exvania, namcona1, namcona1_joy, namcona1_state, exbania, ROT0, "Namco", "Exvania (Japan)", GAME_SUPPORTS_SAVE )
1317		GAME( 1992, fghtatck, 0, namcona1, namcona1_joy, namcona1_state, fa, ROT90,"Namco", "Fighter & Attacker (US)", GAME_SUPPORTS_SAVE )
1318		GAME( 1992, fa, fghtatck, namcona1, namcona1_joy, namcona1_state, fa, ROT90,"Namco", "F/A (Japan)", GAME_SUPPORTS_SAVE )
1319		GAME( 1992, swcourt, 0, namcona1w, namcona1_joy, namcona1_state, swcourt, ROT0, "Namco", "Super World Court (World)", GAME_SUPPORTS_SAVE )
1320		GAME( 1992, swcourtj, swcourt, namcona1w, namcona1_joy, namcona1_state, swcourt, ROT0, "Namco", "Super World Court (Japan)", GAME_SUPPORTS_SAVE )
1321		GAME( 1993, emeraldaj, emeralda, namcona1w, namcona1_joy, namcona1_state, emeraldj, ROT0, "Namco", "Emeraldia (Japan Version B)", GAME_SUPPORTS_SAVE ) /* Parent is below on NA-2 Hardware */
1322		GAME( 1993, emeraldaja, emeralda, namcona1w, namcona1_joy, namcona1_state, emeraldj, ROT0, "Namco", "Emeraldia (Japan)", GAME_SUPPORTS_SAVE ) /* Parent is below on NA-2 Hardware */
1323		GAME( 1993, tinklpit, 0, namcona1w, namcona1_joy, namcona1_state, tinklpit, ROT0, "Namco", "Tinkle Pit (Japan)", GAME_SUPPORTS_SAVE )
	1304	GAME( 1992, bkrtmaq, 0, namcona1w, namcona1_quiz, namcona1_state,bkrtmaq, ROT0, "Namco", "Bakuretsu Quiz Ma-Q Dai Bouken (Japan)", 0 )
	1305	GAME( 1992, cgangpzl, 0, namcona1w, namcona1_joy, namcona1_state, cgangpzl, ROT0, "Namco", "Cosmo Gang the Puzzle (US)", 0 )
	1306	GAME( 1992, cgangpzlj, cgangpzl, namcona1w, namcona1_joy, namcona1_state, cgangpzl, ROT0, "Namco", "Cosmo Gang the Puzzle (Japan)", 0 )
	1307	GAME( 1992, exvania, 0, namcona1, namcona1_joy, namcona1_state, exbania, ROT0, "Namco", "Exvania (World)", 0 )
	1308	GAME( 1992, exvaniaj, exvania, namcona1, namcona1_joy, namcona1_state, exbania, ROT0, "Namco", "Exvania (Japan)", 0 )
	1309	GAME( 1992, fghtatck, 0, namcona1, namcona1_joy, namcona1_state, fa, ROT90,"Namco", "Fighter & Attacker (US)", 0 )
	1310	GAME( 1992, fa, fghtatck, namcona1, namcona1_joy, namcona1_state, fa, ROT90,"Namco", "F/A (Japan)", 0 )
	1311	GAME( 1992, swcourt, 0, namcona1w, namcona1_joy, namcona1_state, swcourt, ROT0, "Namco", "Super World Court (World)", 0 )
	1312	GAME( 1992, swcourtj, swcourt, namcona1w, namcona1_joy, namcona1_state, swcourt, ROT0, "Namco", "Super World Court (Japan)", 0 )
	1313	GAME( 1993, emeraldaj, emeralda, namcona1w, namcona1_joy, namcona1_state, emeraldj, ROT0, "Namco", "Emeraldia (Japan Version B)", 0 ) /* Parent is below on NA-2 Hardware */
	1314	GAME( 1993, emeraldaja, emeralda, namcona1w, namcona1_joy, namcona1_state, emeraldj, ROT0, "Namco", "Emeraldia (Japan)", 0 ) /* Parent is below on NA-2 Hardware */
	1315	GAME( 1993, tinklpit, 0, namcona1w, namcona1_joy, namcona1_state, tinklpit, ROT0, "Namco", "Tinkle Pit (Japan)", 0 )
1324	1316
1325	1317	// NA-2 (C70 MCU)
1326		GAME( 1992, knckhead, 0, namcona2, namcona1_joy, namcona1_state, knckhead, ROT0, "Namco", "Knuckle Heads (World)", GAME_SUPPORTS_SAVE )
1327		GAME( 1992, knckheadj, knckhead, namcona2, namcona1_joy, namcona1_state, knckhead, ROT0, "Namco", "Knuckle Heads (Japan)", GAME_SUPPORTS_SAVE )
1328		GAME( 1992, knckheadjp, knckhead, namcona2, namcona1_joy, namcona1_state, knckhead, ROT0, "Namco", "Knuckle Heads (Japan, Prototype?)", GAME_SUPPORTS_SAVE )
1329		GAME( 1993, emeralda, 0, namcona2, namcona1_joy, namcona1_state, emeralda, ROT0, "Namco", "Emeraldia (World)", GAME_SUPPORTS_SAVE )
1330		GAME( 1993, numanath, 0, namcona2, namcona1_joy, namcona1_state, numanath, ROT0, "Namco", "Numan Athletics (World)", GAME_SUPPORTS_SAVE )
1331		GAME( 1993, numanathj, numanath, namcona2, namcona1_joy, namcona1_state, numanath, ROT0, "Namco", "Numan Athletics (Japan)", GAME_SUPPORTS_SAVE )
1332		GAME( 1993, quiztou, 0, namcona2, namcona1_quiz, namcona1_state,quiztou, ROT0, "Namco", "Nettou! Gekitou! Quiztou!! (Japan)", GAME_SUPPORTS_SAVE )
1333		GAME( 1995, xday2, 0, namcona2, namcona1_joy, namcona1_state, xday2, ROT0, "Namco", "X-Day 2 (Japan)", GAME_IMPERFECT_GRAPHICS \| GAME_SUPPORTS_SAVE )
	1318	GAME( 1992, knckhead, 0, namcona2, namcona1_joy, namcona1_state, knckhead, ROT0, "Namco", "Knuckle Heads (World)", 0 )
	1319	GAME( 1992, knckheadj, knckhead, namcona2, namcona1_joy, namcona1_state, knckhead, ROT0, "Namco", "Knuckle Heads (Japan)", 0 )
	1320	GAME( 1992, knckheadjp, knckhead, namcona2, namcona1_joy, namcona1_state, knckhead, ROT0, "Namco", "Knuckle Heads (Japan, Prototype?)", 0 )
	1321	GAME( 1993, emeralda, 0, namcona2, namcona1_joy, namcona1_state, emeralda, ROT0, "Namco", "Emeraldia (World)", 0 )
	1322	GAME( 1993, numanath, 0, namcona2, namcona1_joy, namcona1_state, numanath, ROT0, "Namco", "Numan Athletics (World)", 0 )
	1323	GAME( 1993, numanathj, numanath, namcona2, namcona1_joy, namcona1_state, numanath, ROT0, "Namco", "Numan Athletics (Japan)", 0 )
	1324	GAME( 1993, quiztou, 0, namcona2, namcona1_quiz, namcona1_state,quiztou, ROT0, "Namco", "Nettou! Gekitou! Quiztou!! (Japan)", 0 )
	1325	GAME( 1995, xday2, 0, namcona2, namcona1_joy, namcona1_state, xday2, ROT0, "Namco", "X-Day 2 (Japan)", GAME_IMPERFECT_GRAPHICS )

trunk/src/mame/drivers/naomi.c
r248389	r248390
9151	9151	/* 0004 */ GAME( 1999, shangril, naomi, naomim2, naomi_mp,naomi_state,naomi_mp,ROT0, "Marvelous Ent.", "Dengen Tenshi Taisen Janshi Shangri-la (JPN, USA, EXP, KOR, AUS)", GAME_FLAGS )
9152	9152	/* 0005 */ GAME( 1999, spawn, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Todd Mc Farlane / Capcom","Spawn In the Demon's Hand (JPN, USA, EUR, ASI, AUS) (Rev B)", GAME_FLAGS )
9153	9153	/* 0006 */ GAME( 1999, puyoda, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Compile", "Puyo Puyo Da!", GAME_FLAGS )
9154		/* 0007-02 */ GAME( 2000,mvsc2, naomi, naomim1, naomi, naomi_state, mvsc2, ROT0, "~~Capcom /~~ Marvel", "Marvel Vs. Capcom 2 New Age of Heroes (JPN, USA, EUR, ASI, AUS) (Rev A)", GAME_FLAGS )
	9154	/* 0007-02 */ GAME( 2000,mvsc2, naomi, naomim1, naomi, naomi_state, mvsc2, ROT0, "Marvel / Capcom", "Marvel Vs. Capcom 2 New Age of Heroes (JPN, USA, EUR, ASI, AUS) (Rev A)", GAME_FLAGS )
9155	9155	/* 0008 */ GAME( 2000, pstone2, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom", "Power Stone 2 (JPN, USA, EUR, ASI, AUS)", GAME_FLAGS )
9156	9156	/* 0011 */ GAME( 2000, capsnk, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / SNK", "Capcom Vs. SNK Millennium Fight 2000 (JPN, USA, EXP, KOR, AUS) (Rev C)", GAME_FLAGS )
9157	9157	/* 0011 */ GAME( 2000, capsnka, capsnk,naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / SNK", "Capcom Vs. SNK Millennium Fight 2000 (JPN, USA, EXP, KOR, AUS) (Rev A)", GAME_FLAGS )

trunk/src/mame/drivers/naughtyb.c
r248389	r248390
416	416	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
417	417	MCFG_SCREEN_SIZE(368, 288)
418	418	MCFG_SCREEN_VISIBLE_AREA(08, 368-1, 08, 288-1)
419		MCFG_SCREEN_UPDATE_DRIVER(naughtyb_state, screen_update)
	419	MCFG_SCREEN_UPDATE_DRIVER(naughtyb_state, screen_update_naughtyb)
420	420	MCFG_SCREEN_PALETTE("palette")
421	421
422	422	MCFG_GFXDECODE_ADD("gfxdecode", "palette", naughtyb)
r248389	r248390
453	453	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
454	454	MCFG_SCREEN_SIZE(368, 288)
455	455	MCFG_SCREEN_VISIBLE_AREA(08, 368-1, 08, 288-1)
456		MCFG_SCREEN_UPDATE_DRIVER(naughtyb_state, screen_update)
	456	MCFG_SCREEN_UPDATE_DRIVER(naughtyb_state, screen_update_naughtyb)
457	457	MCFG_SCREEN_PALETTE("palette")
458	458
459	459	MCFG_GFXDECODE_ADD("gfxdecode", "palette", naughtyb)
r248389	r248390
832	832	m_maincpu->space(AS_PROGRAM).install_read_handler(0x9090, 0x9090, read8_delegate(FUNC(naughtyb_state::popflame_protection_r),this));
833	833
834	834	m_maincpu->space(AS_PROGRAM).install_write_handler(0xb000, 0xb0ff, write8_delegate(FUNC(naughtyb_state::popflame_protection_w),this));
835
836		save_item(NAME(m_popflame_prot_seed));
837		save_item(NAME(m_r_index));
838		save_item(NAME(m_prot_count));
839	835	}
840	836
841	837
r248389	r248390
864	860	{
865	861	/* install questions' handlers */
866	862	m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xc000, 0xc002, read8_delegate(FUNC(naughtyb_state::trvmstr_questions_r),this), write8_delegate(FUNC(naughtyb_state::trvmstr_questions_w),this));
867
868		save_item(NAME(m_question_offset));
869	863	}
870	864
871	865
872		GAME( 1982, naughtyb, 0, naughtyb, naughtyb, driver_device, 0, ROT90, "Jaleco", "Naughty Boy", GAME_SUPPORTS_SAVE )
873		GAME( 1982, naughtyba,naughtyb, naughtyb, naughtyb, driver_device, 0, ROT90, "bootleg", "Naughty Boy (bootleg)", GAME_SUPPORTS_SAVE )
874		GAME( 1982, naughtybc,naughtyb, naughtyb, naughtyb, driver_device, 0, ROT90, "Jaleco (Cinematronics license)", "Naughty Boy (Cinematronics)", GAME_SUPPORTS_SAVE )
875		GAME( 1982, popflame, 0, popflame, naughtyb, naughtyb_state, popflame, ROT90, "Jaleco", "Pop Flamer (protected)", GAME_SUPPORTS_SAVE )
876		GAME( 1982, popflamea,popflame, popflame, naughtyb, driver_device, 0, ROT90, "Jaleco", "Pop Flamer (not protected)", GAME_SUPPORTS_SAVE )
877		GAME( 1982, popflameb,popflame, popflame, naughtyb, driver_device, 0, ROT90, "Jaleco", "Pop Flamer (hack?)", GAME_SUPPORTS_SAVE )
878		GAME( 1982, popflamen,popflame, naughtyb, naughtyb, driver_device, 0, ROT90, "Jaleco", "Pop Flamer (bootleg on Naughty Boy PCB)", GAME_SUPPORTS_SAVE )
879		GAME( 1985, trvmstr, 0, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "Enerdyne Technologies Inc.", "Trivia Master (set 1)", GAME_SUPPORTS_SAVE )
880		GAME( 1985, trvmstra, trvmstr, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "Enerdyne Technologies Inc.", "Trivia Master (set 2)", GAME_SUPPORTS_SAVE )
881		GAME( 1985, trvmstrb, trvmstr, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "Enerdyne Technologies Inc.", "Trivia Master (set 3)", GAME_SUPPORTS_SAVE )
882		GAME( 1985, trvmstrc, trvmstr, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "Enerdyne Technologies Inc.", "Trivia Master (set 4)", GAME_SUPPORTS_SAVE )
883		GAME( 1985, trvgns, trvmstr, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "bootleg", "Trivia Genius", GAME_SUPPORTS_SAVE )
	866	GAME( 1982, naughtyb, 0, naughtyb, naughtyb, driver_device, 0, ROT90, "Jaleco", "Naughty Boy", 0 )
	867	GAME( 1982, naughtyba,naughtyb, naughtyb, naughtyb, driver_device, 0, ROT90, "bootleg", "Naughty Boy (bootleg)", 0 )
	868	GAME( 1982, naughtybc,naughtyb, naughtyb, naughtyb, driver_device, 0, ROT90, "Jaleco (Cinematronics license)", "Naughty Boy (Cinematronics)", 0 )
	869	GAME( 1982, popflame, 0, popflame, naughtyb, naughtyb_state, popflame, ROT90, "Jaleco", "Pop Flamer (protected)", 0 )
	870	GAME( 1982, popflamea,popflame, popflame, naughtyb, driver_device, 0, ROT90, "Jaleco", "Pop Flamer (not protected)", 0 )
	871	GAME( 1982, popflameb,popflame, popflame, naughtyb, driver_device, 0, ROT90, "Jaleco", "Pop Flamer (hack?)", 0 )
	872	GAME( 1982, popflamen,popflame, naughtyb, naughtyb, driver_device, 0, ROT90, "Jaleco", "Pop Flamer (bootleg on Naughty Boy PCB)", 0 )
	873	GAME( 1985, trvmstr, 0, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "Enerdyne Technologies Inc.", "Trivia Master (set 1)", 0 )
	874	GAME( 1985, trvmstra, trvmstr, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "Enerdyne Technologies Inc.", "Trivia Master (set 2)", 0 )
	875	GAME( 1985, trvmstrb, trvmstr, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "Enerdyne Technologies Inc.", "Trivia Master (set 3)", 0 )
	876	GAME( 1985, trvmstrc, trvmstr, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "Enerdyne Technologies Inc.", "Trivia Master (set 4)", 0 )
	877	GAME( 1985, trvgns, trvmstr, naughtyb, trvmstr, naughtyb_state, trvmstr, ROT90, "bootleg", "Trivia Genius", 0 )

trunk/src/mame/drivers/nl_breakout.c
r248389	r248390
133	133	CHIP("F1", 9316)
134	134	NET_C(Y1.Q, F1.2)
135	135
136		CONNECTION("F1", 14, d, 13)
	136	CONNECTION("F1", 14, "H1", 13)
137	137	CONNECTION("F1", 13, "H1", 12)
138	138	CONNECTION("F1", 15, "E1", 5)
139	139	CONNECTION(P, "F1", 1)

trunk/src/mame/drivers/nl_pong.c
r248389	r248390
16	16	#define TTL_7400A_NAND(_name, _A, _B) TTL_7400_NAND(_name, _A, _B)
17	17	#else
18	18	#define TTL_7400A_NAND(_name, _A, _B) \
19		NET_REGISTER_DEV(TTL_7400A_NAND, _name) \
	19	NET_REGISTER_DEV_X(TTL_7400A_NAND, _name) \
20	20	NET_CONNECT(_name, A, _A) \
21	21	NET_CONNECT(_name, B, _B)
22	22	#endif

trunk/src/mame/drivers/paranoia.c
r248389	r248390
51	51	paranoia_state(const machine_config &mconfig, device_type type, const char *tag)
52	52	: pce_common_state(mconfig, type, tag) { }
53	53
54		DECLARE_WRITE8_MEMBER(i8085_d000_w);
55		DECLARE_READ8_MEMBER(z80_io_01_r);
56		DECLARE_READ8_MEMBER(z80_io_02_r);
57		DECLARE_WRITE8_MEMBER(z80_io_17_w);
58		DECLARE_WRITE8_MEMBER(z80_io_37_w);
59		DECLARE_WRITE8_MEMBER(i8155_a_w);
60		DECLARE_WRITE8_MEMBER(i8155_b_w);
61		DECLARE_WRITE8_MEMBER(i8155_c_w);
62		DECLARE_WRITE_LINE_MEMBER(i8155_timer_out);
	54	DECLARE_WRITE8_MEMBER(paranoia_8085_d000_w);
	55	DECLARE_READ8_MEMBER(paranoia_z80_io_01_r);
	56	DECLARE_READ8_MEMBER(paranoia_z80_io_02_r);
	57	DECLARE_WRITE8_MEMBER(paranoia_z80_io_17_w);
	58	DECLARE_WRITE8_MEMBER(paranoia_z80_io_37_w);
	59	DECLARE_WRITE8_MEMBER(paranoia_i8155_a_w);
	60	DECLARE_WRITE8_MEMBER(paranoia_i8155_b_w);
	61	DECLARE_WRITE8_MEMBER(paranoia_i8155_c_w);
	62	DECLARE_WRITE_LINE_MEMBER(paranoia_i8155_timer_out);
63	63	};
64	64
65	65
r248389	r248390
90	90	AM_RANGE( 0x00, 0x03) AM_DEVREADWRITE( "huc6270", huc6270_device, read, write )
91	91	ADDRESS_MAP_END
92	92
93		WRITE8_MEMBER(paranoia_state::i8085_d000_w)
	93	WRITE8_MEMBER(paranoia_state::paranoia_8085_d000_w)
94	94	{
95	95	//logerror( "D000 (8085) write %02x\n", data );
96	96	}
r248389	r248390
99	99	AM_RANGE( 0x0000, 0x7fff) AM_ROM
100	100	AM_RANGE( 0x8000, 0x80ff) AM_DEVREADWRITE("i8155", i8155_device, memory_r, memory_w)
101	101	AM_RANGE( 0x8100, 0x8107) AM_DEVREADWRITE("i8155", i8155_device, io_r, io_w)
102		AM_RANGE( 0xd000, 0xd000) AM_WRITE(i8085_d000_w )
	102	AM_RANGE( 0xd000, 0xd000) AM_WRITE(paranoia_8085_d000_w )
103	103	AM_RANGE( 0xe000, 0xe1ff) AM_RAM
104	104	ADDRESS_MAP_END
105	105
r248389	r248390
112	112	AM_RANGE( 0x7000, 0x73ff) AM_RAM
113	113	ADDRESS_MAP_END
114	114
115		READ8_MEMBER(paranoia_state::z80_io_01_r)
	115	READ8_MEMBER(paranoia_state::paranoia_z80_io_01_r)
116	116	{
117	117	return 0;
118	118	}
119	119
120		READ8_MEMBER(paranoia_state::z80_io_02_r)
	120	READ8_MEMBER(paranoia_state::paranoia_z80_io_02_r)
121	121	{
122	122	return 0;
123	123	}
124	124
125		WRITE8_MEMBER(paranoia_state::z80_io_17_w)
	125	WRITE8_MEMBER(paranoia_state::paranoia_z80_io_17_w)
126	126	{
127	127	}
128	128
129		WRITE8_MEMBER(paranoia_state::z80_io_37_w)
	129	WRITE8_MEMBER(paranoia_state::paranoia_z80_io_37_w)
130	130	{
131	131	}
132	132
133	133	static ADDRESS_MAP_START(paranoia_z80_io_map, AS_IO, 8, paranoia_state )
134	134	ADDRESS_MAP_GLOBAL_MASK(0xff)
135		AM_RANGE( 0x01, 0x01 ) AM_READ(z80_io_01_r )
136		AM_RANGE( 0x02, 0x02 ) AM_READ(z80_io_02_r )
137		AM_RANGE( 0x17, 0x17 ) AM_WRITE(z80_io_17_w )
138		AM_RANGE( 0x37, 0x37 ) AM_WRITE(z80_io_37_w )
	135	AM_RANGE( 0x01, 0x01 ) AM_READ(paranoia_z80_io_01_r )
	136	AM_RANGE( 0x02, 0x02 ) AM_READ(paranoia_z80_io_02_r )
	137	AM_RANGE( 0x17, 0x17 ) AM_WRITE(paranoia_z80_io_17_w )
	138	AM_RANGE( 0x37, 0x37 ) AM_WRITE(paranoia_z80_io_37_w )
139	139	ADDRESS_MAP_END
140	140
141		WRITE8_MEMBER(paranoia_state::i8155_a_w)
	141	WRITE8_MEMBER(paranoia_state::paranoia_i8155_a_w)
142	142	{
143	143	//logerror("i8155 Port A: %02X\n", data);
144	144	}
145	145
146		WRITE8_MEMBER(paranoia_state::i8155_b_w)
	146	WRITE8_MEMBER(paranoia_state::paranoia_i8155_b_w)
147	147	{
148	148	//logerror("i8155 Port B: %02X\n", data);
149	149	}
150	150
151		WRITE8_MEMBER(paranoia_state::i8155_c_w)
	151	WRITE8_MEMBER(paranoia_state::paranoia_i8155_c_w)
152	152	{
153	153	//logerror("i8155 Port C: %02X\n", data);
154	154	}
155	155
156		WRITE_LINE_MEMBER(paranoia_state::i8155_timer_out)
	156	WRITE_LINE_MEMBER(paranoia_state::paranoia_i8155_timer_out)
157	157	{
158	158	//m_subcpu->set_input_line(I8085_RST55_LINE, state ? CLEAR_LINE : ASSERT_LINE );
159	159	//logerror("Timer out %d\n", state);
r248389	r248390
175	175	MCFG_CPU_IO_MAP(paranoia_z80_io_map)
176	176
177	177	MCFG_DEVICE_ADD("i8155", I8155, 1000000 /?/)
178		MCFG_I8155_OUT_PORTA_CB(WRITE8(paranoia_state, i8155_a_w))
179		MCFG_I8155_OUT_PORTB_CB(WRITE8(paranoia_state, i8155_b_w))
180		MCFG_I8155_OUT_PORTC_CB(WRITE8(paranoia_state, i8155_c_w))
181		MCFG_I8155_OUT_TIMEROUT_CB(WRITELINE(paranoia_state, i8155_timer_out))
	178	MCFG_I8155_OUT_PORTA_CB(WRITE8(paranoia_state, paranoia_i8155_a_w))
	179	MCFG_I8155_OUT_PORTB_CB(WRITE8(paranoia_state, paranoia_i8155_b_w))
	180	MCFG_I8155_OUT_PORTC_CB(WRITE8(paranoia_state, paranoia_i8155_c_w))
	181	MCFG_I8155_OUT_TIMEROUT_CB(WRITELINE(paranoia_state, paranoia_i8155_timer_out))
182	182
183	183	/* video hardware */
184	184	MCFG_SCREEN_ADD("screen", RASTER)
r248389	r248390
217	217	ROM_LOAD( "4.352", 0x18000, 0x8000, CRC(11297fed) SHA1(17a294e65ba1c4806307602dee4c7c627ad1fcfd) )
218	218	ROM_END
219	219
220		GAME( 1990, paranoia, 0, paranoia, paranoia, pce_common_state, pce_common, ROT0, "Naxat Soft", "Paranoia", GAME_IMPERFECT_SOUND \| GAME_NOT_WORKING ~~\| GAME_SUPPORTS_SAVE~~ )
	220	GAME( 1990, paranoia, 0, paranoia, paranoia, pce_common_state, pce_common, ROT0, "Naxat Soft", "Paranoia", GAME_IMPERFECT_SOUND \| GAME_NOT_WORKING )

trunk/src/mame/drivers/poolshrk.c
r248389	r248390
19	19	UINT8* pSprite = memregion("gfx1")->base();
20	20	UINT8* pOffset = memregion("proms")->base();
21	21
	22	int i;
	23	int j;
	24
22	25	/* re-arrange sprite data using the PROM */
23	26
24		for (i~~nt i~~ = 0; i < 16; i++)
	27	for (i = 0; i < 16; i++)
25	28	{
26		for (~~int~~ j = 0; j < 16; j++)
	29	for (j = 0; j < 16; j++)
27	30	{
28	31	UINT16 v =
29	32	(pSprite[0] << 0xC) \|
r248389	r248390
41	44	pSprite += 4;
42	45	}
43	46	}
44
45		save_item(NAME(m_da_latch));
46	47	}
47	48
48	49
49		WRITE8_MEMBER(poolshrk_state::da_latch_w)
	50	WRITE8_MEMBER(poolshrk_state::poolshrk_da_latch_w)
50	51	{
51	52	m_da_latch = data & 15;
52	53	}
53	54
54	55
55		WRITE8_MEMBER(poolshrk_state::led_w)
	56	WRITE8_MEMBER(poolshrk_state::poolshrk_led_w)
56	57	{
57	58	if (offset & 2)
58	59	set_led_status(machine(), 0, offset & 1);
r248389	r248390
61	62	}
62	63
63	64
64		WRITE8_MEMBER(poolshrk_state::watchdog_w)
	65	WRITE8_MEMBER(poolshrk_state::poolshrk_watchdog_w)
65	66	{
66	67	if ((offset & 3) == 3)
67	68	{
r248389	r248390
70	71	}
71	72
72	73
73		READ8_MEMBER(poolshrk_state::input_r)
	74	READ8_MEMBER(poolshrk_state::poolshrk_input_r)
74	75	{
75	76	static const char *const portnames[] = { "IN0", "IN1", "IN2", "IN3" };
76	77	UINT8 val = ioport(portnames[offset & 3])->read();
r248389	r248390
90	91	}
91	92
92	93
93		READ8_MEMBER(poolshrk_state::irq_reset_r)
	94	READ8_MEMBER(poolshrk_state::poolshrk_irq_reset_r)
94	95	{
95	96	m_maincpu->set_input_line(0, CLEAR_LINE);
96	97
r248389	r248390
104	105	AM_RANGE(0x0400, 0x07ff) AM_MIRROR(0x2000) AM_WRITEONLY AM_SHARE("playfield_ram")
105	106	AM_RANGE(0x0800, 0x080f) AM_MIRROR(0x23f0) AM_WRITEONLY AM_SHARE("hpos_ram")
106	107	AM_RANGE(0x0c00, 0x0c0f) AM_MIRROR(0x23f0) AM_WRITEONLY AM_SHARE("vpos_ram")
107		AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0x2000) AM_READWRITE(input_r, watchdog_w)
108		AM_RANGE(0x1400, 0x17ff) AM_MIRROR(0x2000) AM_WRITE(scratch_sound_w)
109		AM_RANGE(0x1800, 0x1bff) AM_MIRROR(0x2000) AM_WRITE(score_sound_w)
110		AM_RANGE(0x1c00, 0x1fff) AM_MIRROR(0x2000) AM_WRITE(click_sound_w)
	108	AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0x2000) AM_READWRITE(poolshrk_input_r, poolshrk_watchdog_w)
	109	AM_RANGE(0x1400, 0x17ff) AM_MIRROR(0x2000) AM_WRITE(poolshrk_scratch_sound_w)
	110	AM_RANGE(0x1800, 0x1bff) AM_MIRROR(0x2000) AM_WRITE(poolshrk_score_sound_w)
	111	AM_RANGE(0x1c00, 0x1fff) AM_MIRROR(0x2000) AM_WRITE(poolshrk_click_sound_w)
111	112	AM_RANGE(0x4000, 0x4000) AM_NOP /* diagnostic ROM location */
112		AM_RANGE(0x6000, 0x63ff) AM_WRITE(da_latch_w)
113		AM_RANGE(0x6400, 0x67ff) AM_WRITE(bump_sound_w)
114		AM_RANGE(0x6800, 0x6bff) AM_READ(irq_reset_r)
115		AM_RANGE(0x6c00, 0x6fff) AM_WRITE(led_w)
	113	AM_RANGE(0x6000, 0x63ff) AM_WRITE(poolshrk_da_latch_w)
	114	AM_RANGE(0x6400, 0x67ff) AM_WRITE(poolshrk_bump_sound_w)
	115	AM_RANGE(0x6800, 0x6bff) AM_READ(poolshrk_irq_reset_r)
	116	AM_RANGE(0x6c00, 0x6fff) AM_WRITE(poolshrk_led_w)
116	117	AM_RANGE(0x7000, 0x7fff) AM_ROM
117	118	ADDRESS_MAP_END
118	119
r248389	r248390
224	225	MCFG_SCREEN_REFRESH_RATE(60)
225	226	MCFG_SCREEN_SIZE(256, 256)
226	227	MCFG_SCREEN_VISIBLE_AREA(1, 255, 24, 255)
227		MCFG_SCREEN_UPDATE_DRIVER(poolshrk_state, screen_update)
	228	MCFG_SCREEN_UPDATE_DRIVER(poolshrk_state, screen_update_poolshrk)
228	229	MCFG_SCREEN_PALETTE("palette")
229	230
230	231	MCFG_GFXDECODE_ADD("gfxdecode", "palette", poolshrk)
r248389	r248390
257	258	ROM_END
258	259
259	260
260		GAME( 1977, poolshrk, 0, poolshrk, poolshrk, poolshrk_state, poolshrk, 0, "Atari", "Poolshark", ~~GAME_SUPPORTS_SAVE~~ )
	261	GAME( 1977, poolshrk, 0, poolshrk, poolshrk, poolshrk_state, poolshrk, 0, "Atari", "Poolshark", 0 )

trunk/src/mame/drivers/sangho.c
r248389	r248390
444	444
445	445	if((scanline % 2) == 0)
446	446	{
	447	m_v9958->set_resolution(RENDER_HIGH);
447	448	m_v9958->interrupt();
448	449	}
449	450	}

trunk/src/mame/drivers/sbowling.c
r248389	r248390
55	55	m_videoram(*this, "videoram"),
56	56	m_gfxdecode(*this, "gfxdecode") { }
57	57
	58	int m_bgmap;
58	59	required_device<cpu_device> m_maincpu;
59	60	required_shared_ptr<UINT8> m_videoram;
60	61	required_device<gfxdecode_device> m_gfxdecode;
61	62
62		int m_bgmap;
63		int m_system;
64		tilemap_t *m_tilemap;
	63	int m_sbw_system;
	64	tilemap_t *m_sb_tilemap;
65	65	bitmap_ind16 *m_tmpbitmap;
66	66	UINT32 m_color_prom_address;
67	67	UINT8 m_pix_sh;
68	68	UINT8 m_pix[2];
69	69
70		DECLARE_WRITE8_MEMBER(videoram_w);
	70	DECLARE_WRITE8_MEMBER(sbw_videoram_w);
71	71	DECLARE_WRITE8_MEMBER(pix_shift_w);
72	72	DECLARE_WRITE8_MEMBER(pix_data_w);
73	73	DECLARE_READ8_MEMBER(pix_data_r);
74	74	DECLARE_WRITE8_MEMBER(system_w);
75	75	DECLARE_WRITE8_MEMBER(graph_control_w);
76	76	DECLARE_READ8_MEMBER(controls_r);
77
78		TILE_GET_INFO_MEMBER(get_tile_info);
79		TIMER_DEVICE_CALLBACK_MEMBER(interrupt);
80
	77	TILE_GET_INFO_MEMBER(get_sb_tile_info);
81	78	virtual void video_start();
82	79	DECLARE_PALETTE_INIT(sbowling);
83
84		UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
85		void postload();
	80	UINT32 screen_update_sbowling(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	81	TIMER_DEVICE_CALLBACK_MEMBER(sbw_interrupt);
86	82	};
87	83
88		TILE_GET_INFO_MEMBER(sbowling_state::get_tile_info)
	84	TILE_GET_INFO_MEMBER(sbowling_state::get_sb_tile_info)
89	85	{
90	86	UINT8 *rom = memregion("user1")->base();
91	87	int tileno = rom[tile_index + m_bgmap * 1024];
r248389	r248390
100	96	y = 255-y;
101	97	x = 247-x;
102	98	}
103
104	99	tmpbitmap->pix16(y, x) = col;
105	100	}
106	101
107		WRITE8_MEMBER(sbowling_state::videoram_w)
	102	WRITE8_MEMBER(sbowling_state::sbw_videoram_w)
108	103	{
109	104	int flip = flip_screen();
110		int x,y,v1,v2;
	105	int x,y,i,v1,v2;
111	106
112	107	m_videoram[offset] = data;
113	108
r248389	r248390
119	114	v1 = m_videoram[offset];
120	115	v2 = m_videoram[offset+0x2000];
121	116
122		for (i~~nt i~~ = 0; i < 8; i++)
	117	for (i = 0; i < 8; i++)
123	118	{
124	119	plot_pixel_sbw(m_tmpbitmap, x++, y, m_color_prom_address \| ( ((v1&1)0x20) \| ((v2&1)0x40) ), flip);
125	120	v1 >>= 1;
r248389	r248390
127	122	}
128	123	}
129	124
130		UINT32 sbowling_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	125	UINT32 sbowling_state::screen_update_sbowling(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
131	126	{
132	127	bitmap.fill(0x18, cliprect);
133		m_tilemap->draw(screen, bitmap, cliprect, 0, 0);
	128	m_sb_tilemap->draw(screen, bitmap, cliprect, 0, 0);
134	129	copybitmap_trans(bitmap, *m_tmpbitmap, 0, 0, 0, 0, cliprect, m_color_prom_address);
135	130	return 0;
136	131	}
r248389	r248390
138	133	void sbowling_state::video_start()
139	134	{
140	135	m_tmpbitmap = auto_bitmap_ind16_alloc(machine(),328,328);
141		m_tilemap = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(sbowling_state::get_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 32, 32);
142
143		save_item(NAME(m_bgmap));
144		save_item(NAME(m_system));
145		save_item(NAME(m_color_prom_address));
146		save_item(NAME(m_pix_sh));
147		save_item(NAME(m_pix));
148		machine().save().register_postload(save_prepost_delegate(FUNC(sbowling_state::postload), this));
	136	m_sb_tilemap = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(sbowling_state::get_sb_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 32, 32);
149	137	}
150	138
151		void sbowling_state::postload()
152		{
153		address_space &space = m_maincpu->space(AS_PROGRAM);
154		for (int offs = 0; offs < 0x4000; offs++)
155		videoram_w(space, offs, m_videoram[offs]);
156		}
157
158	139	WRITE8_MEMBER(sbowling_state::pix_shift_w)
159	140	{
160	141	m_pix_sh = data;
r248389	r248390
180	161
181	162
182	163
183		TIMER_DEVICE_CALLBACK_MEMBER(sbowling_state::interrupt)
	164	TIMER_DEVICE_CALLBACK_MEMBER(sbowling_state::sbw_interrupt)
184	165	{
185	166	int scanline = param;
186	167
r248389	r248390
205	186
206	187	flip_screen_set(data&1);
207	188
208		if ((m_system^data)&1)
	189	if ((m_sbw_system^data)&1)
209	190	{
210	191	int offs;
211	192	for (offs = 0;offs < 0x4000; offs++)
212		videoram_w(space, offs, m_videoram[offs]);
	193	sbw_videoram_w(space, offs, m_videoram[offs]);
213	194	}
214		m_system = data;
	195	m_sbw_system = data;
215	196	}
216	197
217	198	WRITE8_MEMBER(sbowling_state::graph_control_w)
r248389	r248390
229	210	m_color_prom_address = ((data&0x07)<<7) \| ((data&0xc0)>>3);
230	211
231	212	m_bgmap = ((data>>4)^3) & 0x3;
232		m_tilemap->mark_all_dirty();
	213	m_sb_tilemap->mark_all_dirty();
233	214	}
234	215
235	216	READ8_MEMBER(sbowling_state::controls_r)
236	217	{
237		if (m_system & 2)
	218	if (m_sbw_system & 2)
238	219	return ioport("TRACKY")->read();
239	220	else
240	221	return ioport("TRACKX")->read();
r248389	r248390
242	223
243	224	static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, sbowling_state )
244	225	AM_RANGE(0x0000, 0x2fff) AM_ROM
245		AM_RANGE(0x8000, 0xbfff) AM_RAM_WRITE(videoram_w) AM_SHARE("videoram")
	226	AM_RANGE(0x8000, 0xbfff) AM_RAM_WRITE(sbw_videoram_w) AM_SHARE("videoram")
246	227	AM_RANGE(0xf800, 0xf801) AM_DEVWRITE("aysnd", ay8910_device, address_data_w)
247	228	AM_RANGE(0xf801, 0xf801) AM_DEVREAD("aysnd", ay8910_device, data_r)
248	229	AM_RANGE(0xfc00, 0xffff) AM_RAM
r248389	r248390
362	343	PALETTE_INIT_MEMBER(sbowling_state, sbowling)
363	344	{
364	345	const UINT8 *color_prom = memregion("proms")->base();
	346	int i;
365	347
366	348	static const int resistances_rg[3] = { 470, 270, 100 };
367	349	static const int resistances_b[2] = { 270, 100 };
r248389	r248390
373	355	3, resistances_rg, outputs_g, 0, 100,
374	356	2, resistances_b, outputs_b, 0, 100);
375	357
376		for (i~~nt i~~ = 0;i < palette.entries();i++)
	358	for (i = 0;i < palette.entries();i++)
377	359	{
378	360	int bit0,bit1,bit2,r,g,b;
379	361
r248389	r248390
402	384	MCFG_CPU_ADD("maincpu", I8080, XTAL_19_968MHz/10) /* ? */
403	385	MCFG_CPU_PROGRAM_MAP(main_map)
404	386	MCFG_CPU_IO_MAP(port_map)
405		MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", sbowling_state, interrupt, "screen", 0, 1)
	387	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", sbowling_state, sbw_interrupt, "screen", 0, 1)
406	388
407	389	/* video hardware */
408	390	MCFG_SCREEN_ADD("screen", RASTER)
409	391	MCFG_SCREEN_REFRESH_RATE(60)
410	392	MCFG_SCREEN_SIZE(328, 262) / vert size taken from mw8080bw */
411	393	MCFG_SCREEN_VISIBLE_AREA(18, 318-1, 48, 328-1)
412		MCFG_SCREEN_UPDATE_DRIVER(sbowling_state, screen_update)
	394	MCFG_SCREEN_UPDATE_DRIVER(sbowling_state, screen_update_sbowling)
413	395	MCFG_SCREEN_PALETTE("palette")
414	396
415	397	MCFG_GFXDECODE_ADD("gfxdecode", "palette", sbowling)
r248389	r248390
443	425	ROM_LOAD( "kb09.6m", 0x0400, 0x0400, CRC(e29191a6) SHA1(9a2c78a96ef6d118f4dacbea0b7d454b66a452ae))
444	426	ROM_END
445	427
446		GAME( 1982, sbowling, 0, sbowling, sbowling, driver_device, 0, ROT90, "Taito Corporation", "Strike Bowling", GAME_IMPERFECT_SOUND ~~\| GAME_SUPPORTS_SAVE~~ )
	428	GAME( 1982, sbowling, 0, sbowling, sbowling, driver_device, 0, ROT90, "Taito Corporation", "Strike Bowling",GAME_IMPERFECT_SOUND)

trunk/src/mame/drivers/scramble.c
r248389	r248390
412	412
413	413	static ADDRESS_MAP_START( harem_sound_map, AS_PROGRAM, 8, scramble_state )
414	414	AM_RANGE(0x0000, 0x2fff) AM_ROM
415		AM_RANGE(0x6000, 0x6000) AM_READ~~(harem_digitalker_intr_r)~~
	415	AM_RANGE(0x6000, 0x6000) AM_READNOP
416	416	AM_RANGE(0x8000, 0x83ff) AM_RAM
417	417	AM_RANGE(0xa000, 0xafff) AM_WRITE(scramble_filter_w)
418	418	ADDRESS_MAP_END
r248389	r248390
420	420	static ADDRESS_MAP_START( harem_sound_io_map, AS_IO, 8, scramble_state )
421	421	ADDRESS_MAP_GLOBAL_MASK(0xff)
422	422
423		// ports->speech:
	423	// ports->speech?:
424	424	AM_RANGE(0x04, 0x04) AM_DEVWRITE("8910.3", ay8910_device, address_w)
425	425	AM_RANGE(0x08, 0x08) AM_DEVREADWRITE("8910.3", ay8910_device, data_r, data_w)
426	426	// same as scramble:
r248389	r248390
1688	1688
1689	1689	MCFG_VIDEO_START_OVERRIDE(scramble_state,harem)
1690	1690
1691		/* ~~extra~~ ~~AY8910 wit~~h ~~I/O po~~rts */
	1691	/* sound hardware */
1692	1692	MCFG_SOUND_ADD("8910.3", AY8910, 14318000/8)
1693	1693	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.16)
1694		MCFG_AY8910_PORT_A_WRITE_CB(DEVWRITE8("digitalker", digitalker_device, digitalker_data_w))
1695		MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(scramble_state, harem_digitalker_control_w))
1696
1697		MCFG_DIGITALKER_ADD("digitalker", 4000000)
1698		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.16)
	1694	MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(scramble_state, harem_portA_w)) // Port A write
	1695	MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(scramble_state, harem_portB_w)) // Port B write
1699	1696	MACHINE_CONFIG_END
1700	1697
1701	1698	/***************************************************************************
r248389	r248390
2221	2218	ROM_LOAD( "harem_sound1.ic12", 0x0000, 0x2000, CRC(b54799dd) SHA1(b6aeb010257cba48a52afd33b4f8031c7d99550c) )
2222	2219	ROM_LOAD( "harem_sound2.ic13", 0x2000, 0x1000, CRC(2d5573a4) SHA1(1fdcd99d89e078509634742b2116a35bb199fe4b) )
2223	2220
2224		ROM_REGION( 0x2000, "~~digital~~ker", 0 ) // DigiTalker ROM (same exact sound PCB as Scorpion (gal~~axian~~.c))
	2221	ROM_REGION( 0x2000, "unknown", 0 ) // DigiTalker ROM (same exact sound PCB as Scorpion (galdrv.c))
2225	2222	ROM_LOAD( "harem_h1+h2.ic25", 0x0000, 0x2000, CRC(279f923a) SHA1(166b1b625997766f0de7cc18af52c42268022fcb) )
2226	2223
2227	2224	ROM_REGION( 0x4000, "gfx1", 0 )
r248389	r248390
2271	2268
2272	2269	GAME( 1981, turpins, turtles, turpins, turpins, driver_device, 0, ROT90, "bootleg", "Turpin (bootleg on Scramble hardware)", GAME_NO_SOUND \| GAME_SUPPORTS_SAVE ) // haven't hooked up the sound CPU yet
2273	2270
2274		GAME( 1983, harem, 0, harem, harem, scramble_state, harem, ROT90, "I.G.R.", "Harem", GAME_SUPPORTS_SAVE )
	2271	GAME( 1983, harem, 0, harem, harem, scramble_state, harem, ROT90, "I.G.R.", "Harem", GAME_IMPERFECT_COLORS \| GAME_IMPERFECT_SOUND ) // colors, missing speech?

trunk/src/mame/drivers/segas24.c
r248389	r248390
1978	1978	ROM_LOAD16_BYTE( "epr-11338.ic1", 0x000001, 0x20000, CRC(7d4a7ff3) SHA1(3d3af04d990d232ba0a8fe155de59bc632a0a461) )
1979	1979
1980	1980	ROM_REGION( 0x1d6000, "floppy", 0)
1981		ROM_LOAD( "ds3-5000-01d_3p_turbo.img", 0x000000, 0x1d6000, CRC(8420~~06fd~~) SHA1(d5~~432~~f58c0fb39~~f2bf62786~~a0d~~842~~b~~dd4~~6~~9ab2~~cb) )
	1981	ROM_LOAD( "ds3-5000-01d_3p_turbo.img", 0x000000, 0x1d6000, CRC(627e8053) SHA1(d1a95f99078f5a29cccacfb1b30c3c9ead7b605c) )
1982	1982	ROM_END
1983	1983
1984	1984	ROM_START( hotroda )
r248389	r248390
1987	1987	ROM_LOAD16_BYTE( "epr-11338.ic1", 0x000001, 0x20000, CRC(7d4a7ff3) SHA1(3d3af04d990d232ba0a8fe155de59bc632a0a461) )
1988	1988
1989	1989	ROM_REGION( 0x1d6000, "floppy", 0)
1990		ROM_LOAD( "ds3-5000-01d.img", 0x000000, 0x1d6000, CRC(~~e25c6~~b63) SHA1(f~~bf86d2ebccd805~~3b9~~909~~39f63f5~~497907~~d18321) )
	1990	ROM_LOAD( "ds3-5000-01d.img", 0x000000, 0x1d6000, CRC(abf67b02) SHA1(f397435eaad691ff5a38d6d1d27840ed95a62df3) ) // World? 3 Player TURBO
1991	1991	ROM_END
1992	1992
1993		ROM_START( hotrodja )
1994		ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */
1995		ROM_LOAD16_BYTE( "epr-11339.ic2", 0x000000, 0x20000, CRC(75130e73) SHA1(e079739f4a3da3807aac570442c5afef1a7d7b0e) )
1996		ROM_LOAD16_BYTE( "epr-11338.ic1", 0x000001, 0x20000, CRC(7d4a7ff3) SHA1(3d3af04d990d232ba0a8fe155de59bc632a0a461) )
1997
1998		ROM_REGION( 0x1d6000, "floppy", 0)
1999		ROM_LOAD( "ds3-5000-01a-rev-b.img", 0x000000, 0x1d6000, CRC(c18f6dca) SHA1(6f2b5a9567a340324a5f3fb57a3b744de0924a23) )
2000		ROM_END
2001
2002	1993	ROM_START( hotrodj )
2003	1994	ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */
2004	1995	ROM_LOAD16_BYTE( "epr-11339.ic2", 0x000000, 0x20000, CRC(75130e73) SHA1(e079739f4a3da3807aac570442c5afef1a7d7b0e) )
2005	1996	ROM_LOAD16_BYTE( "epr-11338.ic1", 0x000001, 0x20000, CRC(7d4a7ff3) SHA1(3d3af04d990d232ba0a8fe155de59bc632a0a461) )
2006	1997
2007	1998	ROM_REGION( 0x1d6000, "floppy", 0)
2008		ROM_LOAD( "ds3-5000-01a-rev-c.img", 0x000000, 0x1d6000, CRC(~~852f~~9~~b5f~~) SHA1(~~159~~e1~~61f55beed~~0~~f90~~cce8a73b0a~~eb45~~6~~4d6a~~f90) )
	1999	ROM_LOAD( "ds3-5000-01a-rev-b.img", 0x000000, 0x1d6000, CRC(a39a0c2d) SHA1(ea8104c2266c48f480837aa7679c0a6f0c5e5452) ) // Japanese 4 Player
2009	2000	ROM_END
2010	2001
2011	2002	ROM_START( qgh )
r248389	r248390
2080	2071	ROM_RELOAD ( 0x180001, 0x40000)
2081	2072
2082	2073	ROM_REGION( 0x1c2000, "floppy", 0)
2083		ROM_LOAD( "ds3-5000-07d.img", 0x000000, 0x1c2000, CRC(2e702~~51f~~) SHA1(1c2~~616d~~fa5cc15e8eb~~f14~~2~~401~~2f2dd~~66f3a00~~1a1) ) /* Region letter needs to be verfied */
	2074	ROM_LOAD( "ds3-5000-07d.img", 0x000000, 0x1c2000, CRC(ea7a3302) SHA1(5f92efb2e1135c1f3eeca38ba5789739a22dbd11) ) /* Region letter needs to be verfied */
2084	2075	ROM_END
2085	2076
2086	2077	ROM_START( bnzabrosj )
r248389	r248390
2120	2111	ROM_LOAD16_BYTE( "epr-12186.ic1", 0x000001, 0x20000, CRC(ce76319d) SHA1(0ede61f0700f9161285c768fa97636f0e42b96f8) )
2121	2112
2122	2113	ROM_REGION( 0x1c2000, "floppy", 0)
2123		ROM_LOAD( "ds3-5000-02-.img", 0x000000, 0x1c2000, CRC(~~179~~b9~~8e9~~) SHA1(f~~6fc~~52c59~~9c33~~6~~d5c6f~~7aa199~~51526~~8~~b4b32~~1~~8a8~~) )
	2114	ROM_LOAD( "ds3-5000-02-.img", 0x000000, 0x1c2000, CRC(cefbda69) SHA1(5b47ae0f1584ce1eb697246273ba761bd9e981c1) )
2124	2115	ROM_END
2125	2116
2126	2117	ROM_START( sspiritj )
r248389	r248390
2166	2157	ROM_LOAD( "317-0058-05c.key", 0x0000, 0x2000, CRC(ae0eabe5) SHA1(692d7565bf9c5b32cc80bb4bd88c9193aa04cbb0) )
2167	2158
2168	2159	ROM_REGION( 0x1c2000, "floppy", 0)
2169		ROM_LOAD( "ds3-5000-05c.img", 0x000000, 0x1c2000, CRC(6~~3a6e~~f3a) SHA1(~~f39f~~e0bf8930d~~e994b1~~a77e0ba787d~~249d73~~c5e5) )
	2160	ROM_LOAD( "ds3-5000-05c.img", 0x000000, 0x1c2000, CRC(06c4f834) SHA1(5e178ed0edff7721c93f76da2e03ae188dc5efa4) )
2170	2161	ROM_END
2171	2162
2172	2163	ROM_START( sgmastj )
r248389	r248390
2475	2466	/* Disk Based Games */
2476	2467	/* 01 */GAME( 1988, hotrod, 0, system24_floppy, hotrod, segas24_state, hotrod, ROT0, "Sega", "Hot Rod (World, 3 Players, Turbo set 1, Floppy Based)", 0 )
2477	2468	/* 01 */GAME( 1988, hotroda, hotrod, system24_floppy, hotrod, segas24_state, hotrod, ROT0, "Sega", "Hot Rod (World, 3 Players, Turbo set 2, Floppy Based)", 0 )
2478		/* 01 */GAME( 1988, hotrodj, hotrod, system24_floppy, hotrodj, segas24_state, hotrod, ROT0, "Sega", "Hot Rod (Japan, 4 Players, Floppy Based, Rev C)", 0 )
2479		/* 01 */GAME( 1988, hotrodja, hotrod, system24_floppy, hotrodj, segas24_state, hotrod, ROT0, "Sega", "Hot Rod (Japan, 4 Players, Floppy Based, Rev B)", 0 )
	2469	/* 01 */GAME( 1988, hotrodj, hotrod, system24_floppy, hotrodj, segas24_state, hotrod, ROT0, "Sega", "Hot Rod (Japan, 4 Players, Floppy Based)", 0 )
2480	2470	/* 02 */GAME( 1988, sspirits, 0, system24_floppy, sspirits, segas24_state, sspirits, ROT270, "Sega", "Scramble Spirits (World, Floppy Based)", 0 )
2481	2471	/* 02 */GAME( 1988, sspiritj, sspirits, system24_floppy, sspirits, segas24_state, sspiritj, ROT270, "Sega", "Scramble Spirits (Japan, Floppy DS3-5000-02-REV-A Based)", 0 )
2482	2472	/* 02 /GAME( 1988, sspirtfc, sspirits, system24_floppy_fd1094, sspirits, segas24_state, sspirits, ROT270, "Sega", "Scramble Spirits (World, Floppy Based, FD1094 317-0058-02c)", GAME_NOT_WORKING ) / MISSING disk image */

trunk/src/mame/drivers/seta2.c
r248389	r248390
2123	2123	MCFG_PALETTE_FORMAT(xRRRRRGGGGGBBBBB)
2124	2124
2125	2125	// sound hardware
2126		MCFG_SPEAKER_STANDARD_MONO("~~mono~~")
	2126	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2127	2127
2128	2128	MCFG_SOUND_ADD("x1snd", X1_010, XTAL_50MHz/3) // clock?
2129		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
	2129	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
	2130	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
2130	2131	MACHINE_CONFIG_END
2131	2132
2132	2133

trunk/src/mame/drivers/snk.c
r248389	r248390
3979	3979	MCFG_CPU_MODIFY("audiocpu")
3980	3980	MCFG_CPU_PROGRAM_MAP(YM3812_Y8950_sound_map)
3981	3981
	3982	/* video hardware */
	3983	MCFG_SCREEN_MODIFY("screen")
	3984	// this visible area matches the flyer
	3985	MCFG_SCREEN_SIZE(518, 288)
	3986	MCFG_SCREEN_VISIBLE_AREA(18, 508-1, 08, 288-1)
	3987
3982	3988	/* sound hardware */
3983	3989	MCFG_SOUND_REPLACE("ym1", YM3812, 4000000)
3984	3990	MCFG_YM3812_IRQ_HANDLER(WRITELINE(snk_state, ymirq_callback_1))

trunk/src/mame/drivers/spbactn.c
r248389	r248390
84	84
85	85	TODO : (also check the notes from the galspnbl.c driver)
86	86
87		- coin insertion is not recognized consistently.
	87	- coin insertion is not recognized consistenly.
88	88	- rewrite video, do single pass sprite render, move sprite code to device, share with gaiden.c etc.
89	89	- convert to tilemaps
90	90	- all the unknown regs
r248389	r248390
580	580
581	581
582	582	/* does this have an extra (horizontal) screen maybe, with the girls being displayed on that instead of the main one.. */
583		ROM_REGION( 0x10000, "extracpu", 0 ) // what? it's another z80 rom... unused for now
	583	ROM_REGION( 0x10000, "extracpu", 0 ) // what? it's annother z80 rom... unused for now
584	584	ROM_LOAD( "6204_6-6.29c", 0x00000, 0x10000, CRC(e8250c26) SHA1(9b669878790c8e3c5d80f165b5ffa1d6830f4696) )
585	585
586	586	ROM_REGION( 0x080000, "gfx4", 0 ) /* 8x8 BG Tiles */ // more 8x8 tiles, with the girl graphics? unused for now .. for horizontal orientation??
r248389	r248390
592	592	ROM_LOAD( "tcm1.19g.bin", 0x00000, 0x53, CRC(2c54354a) SHA1(11d8b6cdaf052b5a9fbcf6b6fbf99c5f89575cfa) )
593	593	ROM_END
594	594
595		GAME( 1991, spbactn, 0, spbactn, spbactn, driver_device, 0, ROT90, "Tecmo", "Super Pinball Action (US)", GAME_IMPERFECT_GRAPHICS \| GAME_SUPPORTS_SAVE )
596		GAME( 1991, spbactnj, spbactn, spbactn, spbactn, driver_device, 0, ROT90, "Tecmo", "Super Pinball Action (Japan)", GAME_IMPERFECT_GRAPHICS \| GAME_SUPPORTS_SAVE )
597		GAME( 1989, spbactnp, spbactn, spbactnp, spbactn, driver_device, 0, ROT90, "Tecmo", "Super Pinball Action (prototype)", GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) // early proto, (c) date is 2 years earlier!
	595	GAME( 1991, spbactn, 0, spbactn, spbactn, driver_device, 0, ROT90, "Tecmo", "Super Pinball Action (US)", GAME_IMPERFECT_GRAPHICS )
	596	GAME( 1991, spbactnj, spbactn, spbactn, spbactn, driver_device, 0, ROT90, "Tecmo", "Super Pinball Action (Japan)", GAME_IMPERFECT_GRAPHICS )
	597	GAME( 1989, spbactnp, spbactn, spbactnp, spbactn, driver_device, 0, ROT90, "Tecmo", "Super Pinball Action (prototype)", GAME_NOT_WORKING ) // early proto, (c) date is 2 years earlier!

trunk/src/mame/drivers/ssingles.c
r248389	r248390
1	1	// license:LGPL-2.1+
2	2	// copyright-holders:Tomasz Slanina
3	3	/*
4		'Swinging Singles' US distribution by Ent. Ent. Ltd
5		Original Japan release is 'Utamaro' by 'Yachiyo' (undumped!)
	4	'Swinging Singles' by Ent. Ent. Ltd
6	5	driver by Tomasz Slanina
7	6
8	7
r248389	r248390
665	664	save_item(NAME(m_colorram));
666	665	}
667	666
668		GAME( 1983, ssingles, 0, ssingles, ssingles, ssingles_state, ssingles, ROT90, "~~Yachiyo Denki (~~Entertainment Enterprises, Ltd. ~~license)~~", "Swinging Singles ~~(US)~~", GAME_SUPPORTS_SAVE \| GAME_WRONG_COLORS \| GAME_IMPERFECT_SOUND )
	667	GAME( 1983, ssingles, 0, ssingles, ssingles, ssingles_state, ssingles, ROT90, "Entertainment Enterprises, Ltd.", "Swinging Singles", GAME_SUPPORTS_SAVE \| GAME_WRONG_COLORS \| GAME_IMPERFECT_SOUND )
669	668	GAME( 1983, atamanot, 0, atamanot, ssingles, ssingles_state, ssingles, ROT90, "Yachiyo Denki / Uni Enterprize", "Computer Quiz Atama no Taisou (Japan)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION )

trunk/src/mame/drivers/system1.c
r248389	r248390
47	47	thetogyu 3x16k 1x8k 6x8k 2x16k no pio 6073
48	48
49	49	spatter 3x16k 1x8k 6x8k 4x16k no pio 6394 6306
50		spattera 3x16k 1x8k 6x8k 4x16k no pio 6599 6306
51	50	ssanchan 3x16k 1x8k 6x8k 4x16k no pio 6312
52	51
53	52	pitfall2 3x16k 1x8k 6x8k 2x16k no pio 6458(a) 6454
r248389	r248390
122	121
123	122	*******************************************************************************
124	123
125		Spatter (315-5099)
126		Sega 1984
127
128		This game runs on Sega System 1 hardware.
129
130		834-5583-12 SPATTER (sticker)
131		834-5542 daughter board with 4 eproms (EPR6306, EPR6307, EPR6308, EPR6309)
132		834-5540 daughter board with logic ICs
133		315-5099 custom Z80 CPU w/security
134
135		*******************************************************************************
136
137	124	Chop Lifter
138	125	Sega 1985
139	126
r248389	r248390
2821	2808
2822	2809	ROM_START( spattera )
2823	2810	ROM_REGION( 0x10000, "maincpu", 0 )
2824		ROM_LOAD( "epr-6597.116", 0x0000, 0x4000, CRC(fb928b9d) SHA1(0a9be~~de7a~~147009b9~~ebb~~8~~a0b7~~3~~681~~3~~59da~~665982) ) /* encrypted */
	2811	ROM_LOAD( "epr-6597.116", 0x0000, 0x4000, BAD_DUMP CRC(be80384d) SHA1(9e1f5807492b98c3f36a5b80466dcb2a1f1fead8) ) /* encrypted */ // consistent read, but fails ingame ROM check on PCB
2825	2812	ROM_LOAD( "epr-6598.109", 0x4000, 0x4000, CRC(5dff037a) SHA1(8e6f6b75a89609ab0498d317c11e6d653343ffbe) ) /* encrypted */
2826	2813	ROM_LOAD( "epr-6599.96", 0x8000, 0x4000, CRC(7ba9de5b) SHA1(f18542c95e8241433ed995c213924ad1ce03cd5b) )
2827	2814
r248389	r248390
4971	4958	sega_decode(m_maincpu_region->base(), m_decrypted_opcodes, 0x8000, convtable);
4972	4959	}
4973	4960
4974		DRIVER_INIT_MEMBER(system1_state,spattera)
4975		{
4976		static const UINT8 convtable[32][4] =
4977		{
4978		/* opcode data address */
4979		/* A B C D A B C D */
4980		{ 0xa0,0xa8,0x20,0x28 }, { 0x80,0xa0,0x00,0x20 }, /* ...0...0...0...0 */
4981		{ 0x20,0x28,0x00,0x08 }, { 0x20,0x28,0x00,0x08 }, /* ...0...0...0...1 */
4982		{ 0xa0,0xa8,0x20,0x28 }, { 0x08,0x28,0x00,0x20 }, /* ...0...0...1...0 */
4983		{ 0x88,0x08,0xa8,0x28 }, { 0x88,0x08,0xa8,0x28 }, /* ...0...0...1...1 */
4984		{ 0xa0,0xa8,0x20,0x28 }, { 0x20,0x28,0x00,0x08 }, /* ...0...1...0...0 */
4985		{ 0x28,0xa8,0x20,0xa0 }, { 0x20,0x28,0x00,0x08 }, /* ...0...1...0...1 */
4986		{ 0xa0,0xa8,0x20,0x28 }, { 0x08,0x28,0x00,0x20 }, /* ...0...1...1...0 */
4987		{ 0x88,0x08,0xa8,0x28 }, { 0x88,0x08,0xa8,0x28 }, /* ...0...1...1...1 */
4988		{ 0x28,0xa8,0x20,0xa0 }, { 0xa0,0xa8,0x20,0x28 }, /* ...1...0...0...0 */
4989		{ 0x88,0x08,0xa8,0x28 }, { 0x80,0xa0,0x00,0x20 }, /* ...1...0...0...1 */
4990		{ 0x28,0xa8,0x20,0xa0 }, { 0x08,0x28,0x00,0x20 }, /* ...1...0...1...0 */
4991		{ 0x28,0xa8,0x20,0xa0 }, { 0x80,0xa0,0x00,0x20 }, /* ...1...0...1...1 */
4992		{ 0x20,0x28,0x00,0x08 }, { 0x20,0x28,0x00,0x08 }, /* ...1...1...0...0 */
4993		{ 0x88,0x08,0xa8,0x28 }, { 0x20,0x28,0x00,0x08 }, /* ...1...1...0...1 */
4994		{ 0x08,0x28,0x00,0x20 }, { 0x80,0xa0,0x00,0x20 }, /* ...1...1...1...0 */
4995		{ 0x08,0x28,0x00,0x20 }, { 0x88,0x08,0xa8,0x28 } /* ...1...1...1...1 */
4996		};
4997
4998		DRIVER_INIT_CALL(bank00);
4999		sega_decode(m_maincpu_region->base(), m_decrypted_opcodes, 0x8000, convtable);
5000		}
5001
5002	4961	DRIVER_INIT_MEMBER(system1_state,pitfall2)
5003	4962	{
5004	4963	static const UINT8 convtable[32][4] =
r248389	r248390
5656	5615	GAME( 1984, flickys2, flicky, sys1pio, flickys2, system1_state, bank00, ROT0, "Sega", "Flicky (128k Version, System 2, not encrypted)", GAME_SUPPORTS_SAVE )
5657	5616	GAME( 1984, thetogyu, bullfgt, sys1piox, bullfgt, system1_state, bullfgtj, ROT0, "Coreland / Sega", "The Togyu (315-5065, Japan)", GAME_SUPPORTS_SAVE )
5658	5617	GAME( 1984, spatter, 0, sys1piosx, spatter, system1_state, spatter, ROT0, "Sega", "Spatter (set 1)", GAME_SUPPORTS_SAVE )
5659		GAME( 1984, spattera, spatter, sys1piosx, spatter, system1_state, spattera, ROT0, "Sega", "Spatter (315-5099)", GAME_SUPPORTS_SAVE )
	5618	GAME( 1984, spattera, spatter, sys1piosx, spatter, system1_state, spatter, ROT0, "Sega", "Spatter (315-5099)", GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE )
5660	5619	GAME( 1984, ssanchan, spatter, sys1piosx, spatter, system1_state, spatter, ROT0, "Sega", "Sanrin San Chan (Japan)", GAME_SUPPORTS_SAVE )
5661	5620	GAME( 1985, pitfall2, 0, sys1piox, pitfall2, system1_state, pitfall2, ROT0, "Sega", "Pitfall II (315-5093)", GAME_SUPPORTS_SAVE )
5662	5621	GAME( 1985, pitfall2a, pitfall2, sys1piox, pitfall2, system1_state, pitfall2, ROT0, "Sega", "Pitfall II (315-5093, Flicky Conversion)", GAME_SUPPORTS_SAVE )

trunk/src/mame/drivers/system16.c
r248389	r248390
97	97	#include "sound/2612intf.h"
98	98	#include "sound/rf5c68.h"
99	99	#include "video/segaic16.h"
100		#include "sound/2203intf.h"
101	100
102	101	#define SHADOW_COLORS_MULTIPLIER 3
103	102
r248389	r248390
119	118	}
120	119	}
121	120
122		WRITE16_MEMBER(segas1x_bootleg_state::sound_command_irq_w)
123		{
124		if (ACCESSING_BITS_0_7)
125		{
126		soundlatch_byte_w(space, 0, data & 0xff);
127		m_soundcpu->set_input_line(0, HOLD_LINE);
128		}
129		}
130	121
131
132	122	static ADDRESS_MAP_START( shinobib_map, AS_PROGRAM, 16, segas1x_bootleg_state )
133	123	AM_RANGE(0x000000, 0x03ffff) AM_ROM
134	124	AM_RANGE(0x400000, 0x40ffff) AM_RAM // tilemap ram on the original, used as a buffer on the bootlegs
r248389	r248390
137	127	AM_RANGE(0x412000, 0x412fff) AM_RAM AM_SHARE("bg1_tileram")
138	128	AM_RANGE(0x440000, 0x440fff) AM_RAM AM_SHARE("sprites")
139	129	AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE(paletteram_w) AM_SHARE("paletteram")
140		// AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sound_command_irq_w)
141		AM_RANGE(0xC42006, 0xC42007) AM_WRITE(sound_command_irq_w)
142
143		AM_RANGE(0xC44000, 0xC44001) AM_READNOP
	130	AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sound_command_nmi_w)
144	131	AM_RANGE(0xc41000, 0xc41001) AM_READ_PORT("SERVICE")
145	132	AM_RANGE(0xc41002, 0xc41003) AM_READ_PORT("P1")
146	133	AM_RANGE(0xc41006, 0xc41007) AM_READ_PORT("P2")
r248389	r248390
159	146
160	147	/***************************************************************************/
161	148
	149	WRITE16_MEMBER(segas1x_bootleg_state::sound_command_w)
	150	{
	151	if (ACCESSING_BITS_0_7)
	152	{
	153	soundlatch_byte_w(space, 0, data & 0xff);
	154	m_soundcpu->set_input_line(0, HOLD_LINE);
	155	}
	156	}
	157
162	158	WRITE16_MEMBER(segas1x_bootleg_state::sys16_coinctrl_w)
163	159	{
164	160	if (ACCESSING_BITS_0_7)
r248389	r248390
191	187	AM_RANGE(0xc41000, 0xc41001) AM_READ_PORT("SERVICE")
192	188	AM_RANGE(0xc42002, 0xc42003) AM_READ_PORT("DSW1")
193	189	AM_RANGE(0xc42000, 0xc42001) AM_READ_PORT("DSW2")
194		AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_~~irq_~~w)
	190	AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_w)
195	191	AM_RANGE(0xc46000, 0xc46001) AM_WRITE(s16a_bootleg_bgscrolly_w)
196	192	AM_RANGE(0xc46002, 0xc46003) AM_WRITE(s16a_bootleg_bgscrollx_w)
197	193	AM_RANGE(0xc46004, 0xc46005) AM_WRITE(s16a_bootleg_fgscrolly_w)
r248389	r248390
269	265	AM_RANGE(0xc41006, 0xc41007) AM_READ(passht4b_io3_r)
270	266	AM_RANGE(0xc42000, 0xc42001) AM_READ_PORT("DSW2")
271	267	AM_RANGE(0xc42002, 0xc42003) AM_READ_PORT("DSW1")
272		AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_~~irq_~~w)
	268	AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_w)
273	269	AM_RANGE(0xc43000, 0xc43001) AM_READ_PORT("P1") // test mode only
274	270	AM_RANGE(0xc43002, 0xc43003) AM_READ_PORT("P2")
275	271	AM_RANGE(0xc43004, 0xc43005) AM_READ_PORT("P3")
r248389	r248390
317	313	AM_RANGE(0xc41004, 0xc41005) AM_READ_PORT("P2")
318	314	AM_RANGE(0xc42000, 0xc42001) AM_READ_PORT("DSW2")
319	315	AM_RANGE(0xc42002, 0xc42003) AM_READ_PORT("DSW1")
320		AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_~~irq_~~w)
	316	AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_w)
321	317	AM_RANGE(0xC44000, 0xC44001) AM_WRITENOP
322	318	AM_RANGE(0xc46000, 0xc46001) AM_WRITE(s16a_bootleg_bgscrolly_w)
323	319	AM_RANGE(0xc46002, 0xc46003) AM_WRITE(s16a_bootleg_bgscrollx_w)
r248389	r248390
428	424
429	425	/*******************************************************************************/
430	426
431		static ADDRESS_MAP_START(shinobi_datsu_sound_map, AS_PROGRAM, 8, segas1x_bootleg_state )
432		AM_RANGE(0x0000, 0x7fff) AM_ROM
433
434		AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ym1", ym2203_device, read, write)
435		AM_RANGE(0xe400, 0xe401) AM_DEVREADWRITE("ym2", ym2203_device, read, write)
436		AM_RANGE(0xe800, 0xe800) AM_READ(soundlatch_byte_r)
437
438		AM_RANGE(0xf800, 0xffff) AM_RAM
439		ADDRESS_MAP_END
440
441		static ADDRESS_MAP_START( shinobi_datsu_sound_io, AS_IO, 8, segas1x_bootleg_state )
442		ADDRESS_MAP_GLOBAL_MASK(0xff)
443		ADDRESS_MAP_END
444
445
446
447		/*******************************************************************************/
448
449	427	static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, segas1x_bootleg_state )
450	428	AM_RANGE(0x0000, 0x7fff) AM_ROM
451	429	AM_RANGE(0xe800, 0xe800) AM_READ(soundlatch_byte_r)
r248389	r248390
526	504	AM_RANGE(0x901000, 0x901001) AM_READ_PORT("SERVICE")
527	505	AM_RANGE(0x902002, 0x902003) AM_READ_PORT("DSW1")
528	506	AM_RANGE(0x902000, 0x902001) AM_READ_PORT("DSW2")
529		AM_RANGE(0xff0006, 0xff0007) AM_WRITE(sound_command_~~irq_~~w)
	507	AM_RANGE(0xff0006, 0xff0007) AM_WRITE(sound_command_w)
530	508	AM_RANGE(0xff0020, 0xff003f) AM_WRITENOP // config regs
531	509	ADDRESS_MAP_END
532	510	#endif
r248389	r248390
713	691	AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(paletteram_w) AM_SHARE("paletteram")
714	692	AM_RANGE(0x900000, 0x900001) AM_READ_PORT("DSW1")
715	693	AM_RANGE(0x900002, 0x900003) AM_READ_PORT("DSW2")
716		AM_RANGE(0x900006, 0x900007) AM_WRITE(sound_command_~~irq_~~w)
	694	AM_RANGE(0x900006, 0x900007) AM_WRITE(sound_command_w)
717	695	AM_RANGE(0x901000, 0x901001) AM_READ_PORT("SERVICE") AM_WRITE(sys16_coinctrl_w)
718	696	AM_RANGE(0x901002, 0x901003) AM_READ_PORT("P1")
719	697	AM_RANGE(0x901006, 0x901007) AM_READ_PORT("P2")
r248389	r248390
727	705	AM_RANGE(0x440000, 0x440fff) AM_RAM AM_SHARE("sprites")
728	706	AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE(paletteram_w) AM_SHARE("paletteram")
729	707	AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sys16_coinctrl_w)
730		AM_RANGE(0xc40006, 0xc40007) AM_WRITE(sound_command_~~irq_~~w)
	708	AM_RANGE(0xc40006, 0xc40007) AM_WRITE(sound_command_w)
731	709	AM_RANGE(0xc41002, 0xc41003) AM_READ_PORT("P1")
732	710	AM_RANGE(0xc41004, 0xc41005) AM_READ_PORT("P2")
733	711	AM_RANGE(0xc41000, 0xc41001) AM_READ_PORT("SERVICE")
r248389	r248390
847	825	AM_RANGE(0x410000, 0x410fff) AM_RAM_WRITE(sys16_textram_w) AM_SHARE("textram")
848	826	AM_RANGE(0x440000, 0x440fff) AM_RAM AM_SHARE("sprites")
849	827
850		AM_RANGE(0x600006, 0x600007) AM_WRITE(sound_command_~~irq_~~w)
	828	AM_RANGE(0x600006, 0x600007) AM_WRITE(sound_command_w)
851	829	AM_RANGE(0x601000, 0x601001) AM_READ_PORT("SERVICE")
852	830	AM_RANGE(0x601002, 0x601003) AM_READ_PORT("P1")
853	831	AM_RANGE(0x601004, 0x601005) AM_READ_PORT("P2")
r248389	r248390
901	879	AM_RANGE(0xc41000, 0xc41001) AM_READ_PORT("SERVICE")
902	880	AM_RANGE(0xc42002, 0xc42003) AM_READ_PORT("DSW1")
903	881	AM_RANGE(0xc42000, 0xc42001) AM_READ_PORT("DSW2")
904		AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_~~irq_~~w)
	882	AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_w)
905	883	AM_RANGE(0xc80000, 0xc80001) AM_WRITENOP
906	884	AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
907	885	ADDRESS_MAP_END
r248389	r248390
928	906	AM_RANGE(0xc41006, 0xc41007) AM_READ_PORT("P2")
929	907	AM_RANGE(0xc42000, 0xc42001) AM_READ_PORT("DSW2")
930	908	AM_RANGE(0xc42002, 0xc42003) AM_READ_PORT("DSW1")
931		AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_~~irq_~~w)
	909	AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_w)
932	910	AM_RANGE(0xc43034, 0xc43035) AM_WRITENOP
933	911	AM_RANGE(0xc80000, 0xc80001) AM_NOP
934	912	AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
r248389	r248390
965	943	AM_RANGE(0xc41000, 0xc41001) AM_READ_PORT("SERVICE")
966	944	AM_RANGE(0xc41002, 0xc41003) AM_READ_PORT("P1")
967	945	AM_RANGE(0xc41004, 0xc41005) AM_READ_PORT("P2")
968		AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_~~irq_~~w)
	946	AM_RANGE(0xc42006, 0xc42007) AM_WRITE(sound_command_w)
969	947
970	948	AM_RANGE(0xc40000, 0xc40001) AM_WRITENOP
971	949	AM_RANGE(0xc80000, 0xc80001) AM_WRITENOP // vblank irq ack
r248389	r248390
985	963	AM_RANGE(0x600000, 0x600001) AM_WRITE(sys16_coinctrl_w)
986	964	AM_RANGE(0x600000, 0x600001) AM_READ_PORT("DSW2")
987	965	AM_RANGE(0x600002, 0x600003) AM_READ_PORT("DSW1")
988		AM_RANGE(0x600006, 0x600007) AM_WRITE(sound_command_~~irq_~~w)
	966	AM_RANGE(0x600006, 0x600007) AM_WRITE(sound_command_w)
989	967	AM_RANGE(0x601000, 0x601001) AM_READ_PORT("SERVICE")
990	968	AM_RANGE(0x601002, 0x601003) AM_READ_PORT("P1")
991	969	AM_RANGE(0x601004, 0x601005) AM_READ_PORT("P2")
r248389	r248390
1105	1083
1106	1084	***************************************************************************/
1107	1085
	1086	WRITE16_MEMBER(segas1x_bootleg_state::sound_command_irq_w)
	1087	{
	1088	if (ACCESSING_BITS_0_7)
	1089	{
	1090	soundlatch_byte_w(space, 0, data & 0xff);
	1091	m_soundcpu->set_input_line(0, HOLD_LINE);
	1092	}
	1093	}
1108	1094
1109	1095	static ADDRESS_MAP_START( shdancbl_map, AS_PROGRAM, 16, segas1x_bootleg_state )
1110	1096	AM_RANGE(0x000000, 0x07ffff) AM_ROM
r248389	r248390
2030	2016	*************************************/
2031	2017
2032	2018	/* System 16A/B Bootlegs */
2033		static MACHINE_CONFIG_START( system16~~_base~~, segas1x_bootleg_state )
	2019	static MACHINE_CONFIG_START( system16, segas1x_bootleg_state )
2034	2020
2035	2021	/* basic machine hardware */
2036	2022	MCFG_CPU_ADD("maincpu", M68000, 10000000)
2037	2023	MCFG_CPU_VBLANK_INT_DRIVER("screen", segas1x_bootleg_state, sys16_interrupt)
2038	2024
	2025	MCFG_CPU_ADD("soundcpu", Z80, 4000000)
	2026	MCFG_CPU_PROGRAM_MAP(sound_map)
	2027	MCFG_CPU_IO_MAP(sound_io_map)
	2028
2039	2029	/* video hardware */
2040	2030	MCFG_SCREEN_ADD("screen", RASTER)
2041	2031	MCFG_SCREEN_REFRESH_RATE(60)
r248389	r248390
2049	2039	MCFG_PALETTE_ADD("palette", 2048*SHADOW_COLORS_MULTIPLIER)
2050	2040
2051	2041	MCFG_VIDEO_START_OVERRIDE(segas1x_bootleg_state,system16)
2052		MACHINE_CONFIG_END
2053	2042
2054		static MACHINE_CONFIG_DERIVED( system16, system16_base )
2055
2056		MCFG_CPU_ADD("soundcpu", Z80, 4000000)
2057		MCFG_CPU_PROGRAM_MAP(sound_map)
2058		MCFG_CPU_IO_MAP(sound_io_map)
2059
2060	2043	/* sound hardware */
2061	2044	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2062	2045
r248389	r248390
2065	2048	MCFG_SOUND_ROUTE(1, "rspeaker", 0.32)
2066	2049	MACHINE_CONFIG_END
2067	2050
	2051
2068	2052	WRITE_LINE_MEMBER(segas1x_bootleg_state::sound_cause_nmi)
2069	2053	{
2070	2054	/* upd7759 callback */
r248389	r248390
2110	2094	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.80)
2111	2095	MACHINE_CONFIG_END
2112	2096
2113		static MACHINE_CONFIG_DERIVED( shinobi_datsu, system16_base )
2114	2097
	2098	static MACHINE_CONFIG_DERIVED( shinobib, system16 )
	2099
2115	2100	/* basic machine hardware */
2116	2101	MCFG_CPU_MODIFY("maincpu")
2117	2102	MCFG_CPU_PROGRAM_MAP(shinobib_map)
r248389	r248390
2122	2107	MCFG_VIDEO_START_OVERRIDE(segas1x_bootleg_state, s16a_bootleg_shinobi )
2123	2108	MCFG_SCREEN_MODIFY("screen")
2124	2109	MCFG_SCREEN_UPDATE_DRIVER(segas1x_bootleg_state, screen_update_s16a_bootleg)
2125
2126		MCFG_CPU_ADD("soundcpu", Z80, 4000000)
2127		MCFG_CPU_PERIODIC_INT_DRIVER(segas1x_bootleg_state, nmi_line_pulse, 3000) // or from the YM2203?
2128		MCFG_CPU_PROGRAM_MAP(shinobi_datsu_sound_map)
2129		MCFG_CPU_IO_MAP(shinobi_datsu_sound_io)
2130
2131		/* sound hardware */
2132		MCFG_SPEAKER_STANDARD_MONO("mono")
2133
2134		// 2x YM2203C, one at U57, one at U56
2135		MCFG_SOUND_ADD("ym1", YM2203, 4000000)
2136		// MCFG_YM2203_IRQ_HANDLER(WRITELINE(segas1x_bootleg_state, datsu_irq_handler))
2137		MCFG_SOUND_ROUTE(0, "mono", 0.50)
2138		MCFG_SOUND_ROUTE(1, "mono", 0.50)
2139		MCFG_SOUND_ROUTE(2, "mono", 0.50)
2140		MCFG_SOUND_ROUTE(3, "mono", 0.80)
2141
2142		MCFG_SOUND_ADD("ym2", YM2203, 4000000)
2143		MCFG_SOUND_ROUTE(0, "mono", 0.50)
2144		// MCFG_YM2203_IRQ_HANDLER(WRITELINE(segas1x_bootleg_state, datsu_irq_handler))
2145		MCFG_SOUND_ROUTE(1, "mono", 0.50)
2146		MCFG_SOUND_ROUTE(2, "mono", 0.50)
2147		MCFG_SOUND_ROUTE(3, "mono", 0.80)
2148
2149	2110	MACHINE_CONFIG_END
2150	2111
2151
2152	2112	static MACHINE_CONFIG_DERIVED( passshtb, system16_7759 )
2153	2113
2154	2114	/* basic machine hardware */
r248389	r248390
2471	2431	ROM_LOAD( "16.bin", 0x0000, 0x10000, CRC(52c8364e) SHA1(01d30b82f92498d155d2e31d43d58dff0285cce3) )
2472	2432	ROM_END
2473	2433
2474		ROM_START( shinoblda )
2475		ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 code */
2476		ROM_LOAD16_BYTE( "12.bin", 0x000001, 0x10000, CRC(68c91fd5) SHA1(54dc1d26711c73b30cbb5387dde27ba21cc102f4) ) // sldh
2477		ROM_LOAD16_BYTE( "14.bin", 0x000000, 0x10000, CRC(9e887c80) SHA1(798a3dc499ef14b362bc37ff91b247e367f42ab9) ) // sldh
2478		ROM_LOAD16_BYTE( "13.bin", 0x020001, 0x10000, CRC(c4334bcd) SHA1(ea1dd23ca6fbf632d8e10bbb9ced6515a69bd14a) )
2479		ROM_LOAD16_BYTE( "15.bin", 0x020000, 0x10000, CRC(b70a6ec1) SHA1(79db41c36d6a053bcdc355b46b19ae938a7755a9) )
2480
2481		ROM_REGION( 0x30000, "gfx1", ROMREGION_INVERT ) /* tiles */
2482		ROM_LOAD( "9.bin", 0x00000, 0x10000, CRC(565e11c6) SHA1(e063400b3d0470b932d75da0be9cd4b446189dea) )
2483		ROM_LOAD( "10.bin", 0x10000, 0x10000, CRC(7cc40b6c) SHA1(ffad7eef7ab2ff9a2e49a8d71b5785a61fa3c675) )
2484		ROM_LOAD( "11.bin", 0x20000, 0x10000, CRC(0f6c7b1c) SHA1(defc76592c285b3396e89a3cff7a73f3a948117f) )
2485
2486		ROM_REGION16_BE( 0x080000, "sprites", ROMREGION_ERASEFF ) /* sprites */
2487		ROM_LOAD16_BYTE( "5.bin", 0x00001, 0x10000, CRC(611f413a) SHA1(180f83216e2dfbfd77b0fb3be83c3042954d12df) )
2488		ROM_LOAD16_BYTE( "3.bin", 0x00000, 0x10000, CRC(5eb00fc1) SHA1(97e02eee74f61fabcad2a9e24f1868cafaac1d51) )
2489		ROM_LOAD16_BYTE( "8.bin", 0x20001, 0x10000, CRC(3c0797c0) SHA1(df18c7987281bd9379026c6cf7f96f6ae49fd7f9) )
2490		ROM_LOAD16_BYTE( "2.bin", 0x20000, 0x10000, CRC(25307ef8) SHA1(91ffbe436f80d583524ee113a8b7c0cf5d8ab286) )
2491		ROM_LOAD16_BYTE( "6.bin", 0x40001, 0x10000, CRC(c29ac34e) SHA1(b5e9b8c3233a7d6797f91531a0d9123febcf1660) )
2492		ROM_LOAD16_BYTE( "4.bin", 0x40000, 0x10000, CRC(04a437f8) SHA1(ea5fed64443236e3404fab243761e60e2e48c84c) )
2493		ROM_LOAD16_BYTE( "7.bin", 0x60001, 0x10000, CRC(41f41063) SHA1(5cc461e9738dddf9eea06831fce3702d94674163) )
2494		ROM_LOAD16_BYTE( "1.bin", 0x60000, 0x10000, CRC(b6e1fd72) SHA1(eb86e4bf880bd1a1d9bcab3f2f2e917bcaa06172) )
2495
2496		ROM_REGION( 0x10000, "soundcpu", 0 ) /* sound CPU + data */
2497		ROM_LOAD( "16.bin", 0x0000, 0x10000, CRC(52c8364e) SHA1(01d30b82f92498d155d2e31d43d58dff0285cce3) )
2498		ROM_END
2499
2500	2434	/* Passing Shot Bootleg is a decrypted version of Passing Shot Japanese (passshtj). It has been heavily modified */
2501	2435	ROM_START( passshtb )
2502	2436	ROM_REGION( 0x020000, "maincpu", 0 ) /* 68000 code */
r248389	r248390
3768	3702	*************************************/
3769	3703
3770	3704	/* System 16A based bootlegs (less complex tilemap system) */
3771		GAME( 1987, shinobld, shinobi, shinobi_datsu, shinobi, segas1x_bootleg_state, shinobl, ROT0, "bootleg (Datsu)", "Shinobi (Datsu bootleg, set 1)", GAME_NOT_WORKING \| GAME_IMPERFECT_GRAPHICS \| GAME_NO_SOUND )
3772		GAME( 1987, shinoblda, shinobi, shinobi_datsu, shinobi, segas1x_bootleg_state, shinobl, ROT0, "bootleg (Datsu)", "Shinobi (Datsu bootleg, set 2)", GAME_NOT_WORKING \| GAME_IMPERFECT_GRAPHICS \| GAME_NO_SOUND )
3773
3774
3775
	3705	GAME( 1987, shinobld, shinobi, shinobib, shinobi, segas1x_bootleg_state, shinobl, ROT0, "bootleg (Datsu)", "Shinobi (Datsu bootleg)", GAME_NOT_WORKING \| GAME_IMPERFECT_GRAPHICS \| GAME_NO_SOUND )
3776	3706	GAME( 1988, passshtb, passsht, passshtb, passsht, segas1x_bootleg_state, passsht, ROT270, "bootleg", "Passing Shot (2 Players) (bootleg)", GAME_NOT_WORKING \| GAME_IMPERFECT_GRAPHICS \| GAME_IMPERFECT_SOUND )
3777	3707	GAME( 1988, passht4b, passsht, passsht4b, passht4b, segas1x_bootleg_state, shinobl, ROT270, "bootleg", "Passing Shot (4 Players) (bootleg)", GAME_NOT_WORKING \| GAME_IMPERFECT_GRAPHICS \| GAME_NO_SOUND )
3778	3708	GAME( 1988, wb3bbl, wb3, wb3bb, wb3b, segas1x_bootleg_state, wb3bbl, ROT0, "bootleg", "Wonder Boy III - Monster Lair (bootleg)", GAME_NOT_WORKING )

trunk/src/mame/drivers/taito_x.c
r248389	r248390
1054	1054	ROM_REGION( 0x80000, "ymsnd", 0 ) /* ADPCM samples */
1055	1055	ROM_LOAD( "b61-01.e18", 0x00000, 0x80000, CRC(3cf99786) SHA1(f6febf9bda87ca04f0a5890d0e8001c26dfa6c81) )
1056	1056
1057		ROM_REGION( 0x10000, "cchip", 0 ) /* 64k for TC0030CMD (C-Chip protection, ~~uPD7~~8~~C11~~ with embedded 4K ~~mask~~rom, 8k ~~eprom, 8k~~ RAM) */
	1057	ROM_REGION( 0x10000, "cchip", 0 ) /* 64k for TC0030CMD (C-Chip protection, Z80 with embedded 64K rom + 64K RAM) */
1058	1058	ROM_LOAD( "b61_11.m11", 0x00000, 0x10000, NO_DUMP )
1059	1059	ROM_END
1060	1060

trunk/src/mame/drivers/taitoair.c
r248389	r248390
184	184
185	185	****************************************************************************/
186	186	/*!
187		@todo - Framebuffer DMA requires palette switch to be selected dynamically, see at first stage Course Select in Top Landing.
	187	@todo - Framebuffer DMA requires palette switch to be selected dynamically, see at first stage Course Select in Top Landing.
188	188	My gut feeling is that 3d poly fill operation actually copies to internal buffer then a DMA op actually do the buffer-to-screen copy, including gradiation ROZ too;
189	189	- Air Inferno: missing landing monitor camera (blackened);
190	190	- Air Inferno: missing 3d HUD graphics;
191	191	- Air Inferno: Expert course has wrong 3d geometry;
192		- Air Inferno: Almost surely crashing during replay has missing smoke effect, looks quite odd atm.
	192	- Air Inferno: Almost surely crashing during replay has missing smoke effect, looks quit odd atm.
193	193	- Top Landing: Night stages might have wrong priority for stars-above-sea;
194	194	- Input limiters / analog thresholds for both games;
	195	- Special thanks to syq for being a cunt.
195	196	*/
196	197
197	198	#include "emu.h"
r248389	r248390
354	355	[3] both games uses 0xb7, most likely a register setting.
355	356	*/
356	357	WRITE16_MEMBER(taitoair_state::dma_regs_w)
357		{
	358	{
358	359	printf("%08x %04x\n",offset,data);
359
	360
360	361	if(offset == 0 && ACCESSING_BITS_8_15)
361	362	{
362	363	if(data == 0x1fff)
r248389	r248390
480	481	{
481	482	if(m_dsp_muldiv_c_1 == 0)
482	483	return 0xffff; /*< @todo true value? /
483
	484
484	485	return m_dsp_muldiv_a_1*m_dsp_muldiv_b_1/m_dsp_muldiv_c_1;
485	486	}
486	487
r248389	r248390
503	504	{
504	505	if(m_dsp_muldiv_c_2 == 0)
505	506	return 0xffff; /*< @todo true value? /
506
	507
507	508	return m_dsp_muldiv_a_2*m_dsp_muldiv_b_2/m_dsp_muldiv_c_2;
508	509	}
509	510

trunk/src/mame/drivers/thedealr.c
r248389	r248390
371	371	PORT_DIPSETTING( 0x08, "2" )
372	372	PORT_DIPSETTING( 0x00, "3" )
373	373	PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW1:6" )
374		/*
375		Switches 7 & 8 control the payout as follows:
	374	PORT_DIPNAME( 0xc0, 0xc0, "SW1:7,8" ) PORT_DIPLOCATION("SW1:7,8")
	375	PORT_DIPSETTING( 0xc0, "0" )
	376	PORT_DIPSETTING( 0x80, "1" )
	377	PORT_DIPSETTING( 0x40, "2" )
	378	PORT_DIPSETTING( 0x00, "3" )
376	379
377		Off/Off Off/On On/Off On/On Notes
378		---------------------------------------------------------------------------------------------
379		Jackpot MB 5000 5000 5000 2000 Ryl Flush bonus at Max Bet
380		Jackpot 2500 2500 2500 1000 Ryl Flush bonus at 5 coins + 500 (or 200) per coin up to Max Bet
381		Mini JP 1500 1500 1000 500 Str Flush bonus at Max Bet
382		Ryl Flush 500 500 500 200 x Bet
383		Str Flush 150 150 100 50 x Bet
384		4K 60 60 40 25 x Bet
385		Full House 10 10 10 8 x Bet
386		Flush 7 6 7 6 x Bet
387		Straight 5 5 5 5 x Bet
388		3K 3 3 3 4 x Bet
389		Two pair 2 2 2 2 x Bet
390		Jacks+ 1 1 1 1 x Bet (When enabled - DSW 3-2)
391
392		Return Rate 111.9% 110.7% 106.6% 105.8% Jacks or Better
393		Return Rate 94.7% 92.9% 89.4% 87.8% Two Pair
394
395		NOTE: Jackpot & Mini Jackpot values based on 10 Coin Max Bet. Values increase with higher Max Bet values.
396
397		Calculated returns based on 1 coin bet and paytable as shown above, Two Pair through Royal Flush without bonuses.
398		*/
399		PORT_DIPNAME( 0xc0, 0xc0, "Payout Percentage" ) PORT_DIPLOCATION("SW1:7,8")
400		PORT_DIPSETTING( 0x00, "87.8%" ) PORT_CONDITION("DSW3", 0x02, EQUALS, 0x02)
401		PORT_DIPSETTING( 0x40, "89.4%" ) PORT_CONDITION("DSW3", 0x02, EQUALS, 0x02)
402		PORT_DIPSETTING( 0x80, "92.9%" ) PORT_CONDITION("DSW3", 0x02, EQUALS, 0x02)
403		PORT_DIPSETTING( 0xc0, "94.7%" ) PORT_CONDITION("DSW3", 0x02, EQUALS, 0x02)
404		PORT_DIPSETTING( 0x00, "105.8%" ) PORT_CONDITION("DSW3", 0x02, EQUALS, 0x00)
405		PORT_DIPSETTING( 0x40, "106.6%" ) PORT_CONDITION("DSW3", 0x02, EQUALS, 0x00)
406		PORT_DIPSETTING( 0x80, "110.7%" ) PORT_CONDITION("DSW3", 0x02, EQUALS, 0x00)
407		PORT_DIPSETTING( 0xc0, "111.9%" ) PORT_CONDITION("DSW3", 0x02, EQUALS, 0x00)
408
409	380	PORT_START("DSW2")
410	381	PORT_SERVICE_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW2:1" )
411		PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:2,3")
412		PORT_DIPSETTING( 0x06, DEF_STR( 1C_1C ) )
413		PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
414		PORT_DIPSETTING( 0x02, DEF_STR( 1C_5C ) )
415		PORT_DIPSETTING( 0x00, "1 Coin/10 Credits" )
	382	PORT_DIPNAME( 0x06, 0x06, "SW2:2,3" ) PORT_DIPLOCATION("SW2:2,3")
	383	PORT_DIPSETTING( 0x06, "0" )
	384	PORT_DIPSETTING( 0x04, "1" )
	385	PORT_DIPSETTING( 0x02, "2" )
	386	PORT_DIPSETTING( 0x00, "3" )
416	387	PORT_DIPNAME( 0x18, 0x18, "SW2:4,5" ) PORT_DIPLOCATION("SW2:4,5")
417	388	PORT_DIPSETTING( 0x18, "0" )
418	389	PORT_DIPSETTING( 0x10, "1" )
419	390	PORT_DIPSETTING( 0x08, "2" )
420	391	PORT_DIPSETTING( 0x00, "3" )
421		PORT_DIPNAME( 0xe0, 0xe0, "Max Bet" ) PORT_DIPLOCATION("SW2:6,7,8")
422		PORT_DIPSETTING( 0xc0, "5" )
423		PORT_DIPSETTING( 0xe0, "10" )
424		PORT_DIPSETTING( 0xa0, "20" )
425		PORT_DIPSETTING( 0x80, "20 Duplicate" )
426		PORT_DIPSETTING( 0x40, "30" )
427		PORT_DIPSETTING( 0x00, "30 Duplicate" )
428		PORT_DIPSETTING( 0x60, "60" )
429		PORT_DIPSETTING( 0x20, "60 Duplicate" )
	392	PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW2:6" )
	393	PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW2:7" )
	394	PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW2:8" )
430	395
431	396	PORT_START("DSW3")
432	397	PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW3:1" )
433		PORT_DIPNAME( 0x02, 0x02, "Lowest Paid Hand" ) PORT_DIPLOCATION("SW3:2")
434		PORT_DIPSETTING( 0x02, "Two Pair" )
435		PORT_DIPSETTING( 0x00, "Jacks or Better" )
436		PORT_DIPNAME( 0x04, 0x04, "Double Up" ) PORT_DIPLOCATION("SW3:3")
437		PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
438		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	398	PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW3:2" )
	399	PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "SW3:3" )
439	400	PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW3:4" )
440	401	PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW3:5" )
441		/*
442		Fever Mode:
443		Overrides Jacks or Better
444		3 of a Kind winning hand Jacks or higher enters Fever Mode
445		You start with a pair of your 3 of a Kind cards & you draw 3 cards each hand.
446		Jacks through Kings get 5 Fever Mode Draws
447		Aces get 15 Fever Mode Draws
448		*/
449		PORT_DIPNAME( 0x20, 0x20, "Fever Mode" ) PORT_DIPLOCATION("SW3:6")
450		PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
451		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
452		PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW3:7" ) /* Overrides Coinage - 1C / 1C */
453		PORT_DIPNAME( 0x80, 0x80, "Coin In / Coin Out" ) PORT_DIPLOCATION("SW3:8") /* No credit - payout waiting for hopper??? */
454		PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
455		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	402	PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW3:6" )
	403	PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW3:7" )
	404	PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW3:8" )
456	405
457	406	PORT_START("DSW4")
458	407	PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW4:7" ) // X in service mode

trunk/src/mame/drivers/timeplt.c
r248389	r248390
699	699	GAME( 1982, timepltc, timeplt, timeplt, timeplt, driver_device, 0, ROT90, "Konami (Centuri license)", "Time Pilot (Centuri)", GAME_SUPPORTS_SAVE )
700	700	GAME( 1982, timeplta, timeplt, timeplt, timeplt, driver_device, 0, ROT90, "Konami (Atari license)", "Time Pilot (Atari)", GAME_SUPPORTS_SAVE )
701	701	GAME( 1982, spaceplt, timeplt, timeplt, timeplt, driver_device, 0, ROT90, "bootleg", "Space Pilot", GAME_SUPPORTS_SAVE )
702
703	702	GAME( 1988, psurge, 0, psurge, psurge, driver_device, 0, ROT270, "Vision Electronics", "Power Surge", GAME_SUPPORTS_SAVE )
704
705		GAME( 1988, chkun, 0, chkun, chkun, driver_device, 0, ROT90, "Peni", "Chance Kun (Japan)", GAME_SUPPORTS_SAVE \| GAME_IMPERFECT_SOUND )
706		GAME( 1987, bikkuric, 0, bikkuric,bikkuric, driver_device,0, ROT90, "Peni", "Bikkuri Card (Japan)", GAME_SUPPORTS_SAVE )
	703	// ROM says manufactured by Peni Soft for these two ... no, I'm not going to add THAT -.-"
	704	GAME( 1988, chkun, 0, chkun, chkun, driver_device, 0, ROT90, "<unknown>", "Chance Kun (Japan)", GAME_SUPPORTS_SAVE \| GAME_IMPERFECT_SOUND )
	705	GAME( 1987, bikkuric, 0, bikkuric,bikkuric, driver_device,0, ROT90, "<unknown>", "Bikkuri Card (Japan)", GAME_SUPPORTS_SAVE )

trunk/src/mame/drivers/tmnt.c
r248389	r248390
2198	2198	MCFG_SCREEN_REFRESH_RATE(60)
2199	2199	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
2200	2200	MCFG_SCREEN_SIZE(648, 328)
2201		MCFG_SCREEN_VISIBLE_AREA(128, (64-12)8-1, 28, 308-1 )
	2201	MCFG_SCREEN_VISIBLE_AREA(148, (64-14)8-1, 28, 308-1 )
2202	2202	MCFG_SCREEN_UPDATE_DRIVER(tmnt_state, screen_update_lgtnfght)
2203	2203	MCFG_SCREEN_PALETTE("palette")
2204	2204

trunk/src/mame/drivers/tnzs.c
r248389	r248390
2195	2195	ROM_END
2196	2196
2197	2197	/* M6100309A PCB
2198		P0-0038A */
	2198	PO-0038A */
2199	2199	ROM_START( kageki )
2200	2200	ROM_REGION( 0x20000, "maincpu", 0 )
2201	2201	ROM_LOAD( "b35-16.11c", 0x00000, 0x10000, CRC(a4e6fd58) SHA1(7cfe5b3fa6c88cdab45719f5b58541270825ad30) ) /* US ver */
r248389	r248390
2502	2502	Taito ID: K1100356A
2503	2503	J1100156A
2504	2504	MAIN PCB
2505		Seta ID: P0-041A
	2505	Seta ID: PO-041A
2506	2506	*/
2507	2507	/* This pcb is similar but not identical to the Chuka Taisen pcb above;
2508	2508	there is an M-chip i8742 (with Taito silkscreen) and no 3rd z80.

trunk/src/mame/drivers/tonton.c
r248389	r248390
215	215
216	216	TIMER_DEVICE_CALLBACK_MEMBER(tonton_state::tonton_interrupt)
217	217	{
	218	m_v9938->set_resolution(0);
218	219	m_v9938->interrupt();
219	220	}
220	221

trunk/src/mame/drivers/ttchamp.c
r248389	r248390
31	31	_\| 74LS244 74LS14N 74HC74 16MHz \|D70116C-10 \| \|
32	32	\|__________________________________________________\|
33	33
34		The PCB is Spanish and manufactured by Gamart.
	34	The PCB is Spanish and manufacured by Gamart.
35	35
36	36
37	37	Table tennis Championships by Gamart 1995
r248389	r248390
46	46	ttennis2/3 main program
47	47	ttennis1 adpcm data
48	48	ttennis4/5 graphics
49		*there is a pic16c84 that I cannot dump because my programmer doesn't support it.
	49	*there is a pic16c84 that i cannot dump because my programmer doesn't support it.
50	50
51	51	Dumped by tirino73
52	52
r248389	r248390
59	59	- A bunch of spurious RAM writes to ROM area (genuine bug? left-overs?)
60	60
61	61	Notes
62		I think the PIC is used to interface with battery backed RAM instead of an EEPROM,
	62	I think the PIC is used to interface with battry backed RAM instead of an EEPROM,
63	63	we currently simulate this as the PIC is read protected.
64	64
65	65
r248389	r248390
71	71	#include "sound/okim6295.h"
72	72	#include "machine/nvram.h"
73	73
74
75	74	class ttchamp_state : public driver_device
76	75	{
77	76	public:
r248389	r248390
80	79	m_maincpu(*this, "maincpu"),
81	80	m_palette(*this, "palette") { }
82	81
83		required_device<cpu_device> m_maincpu;
84		required_device<palette_device> m_palette;
85
	82	UINT16* m_peno_mainram;
	83
86	84	UINT16 m_paloff;
	85	DECLARE_WRITE16_MEMBER(paloff_w);
	86	DECLARE_WRITE16_MEMBER(pcup_prgbank_w);
	87	DECLARE_WRITE16_MEMBER(paldat_w);
	88
	89	DECLARE_WRITE16_MEMBER(port10_w);
	90
	91	DECLARE_WRITE16_MEMBER(port20_w);
	92	DECLARE_WRITE16_MEMBER(port62_w);
	93
	94	DECLARE_READ16_MEMBER(port1e_r);
	95
	96	DECLARE_READ16_MEMBER(ttchamp_pic_r);
	97	DECLARE_WRITE16_MEMBER(ttchamp_pic_w);
	98
87	99	UINT16 m_port10;
88	100	UINT8 m_rombank;
	101
	102	DECLARE_DRIVER_INIT(ttchamp);
	103
	104	DECLARE_READ16_MEMBER(ttchamp_blit_start_r);
	105
	106	DECLARE_READ16_MEMBER(ttchamp_mem_r);
	107	DECLARE_WRITE16_MEMBER(ttchamp_mem_w);
	108
89	109	UINT16 m_videoram0[0x10000 / 2];
90	110	UINT16 m_videoram2[0x10000 / 2];
91	111
	112
92	113	enum picmode
93	114	{
94	115	PIC_IDLE = 0,
r248389	r248390
97	118	PIC_SET_WRITELATCH = 3,
98	119	PIC_SET_READLATCH = 4
99	120
100		};
	121	} picmodex;
101	122
102		picmode m_picmodex;
103	123
104	124	int m_pic_readaddr;
105	125	int m_pic_writeaddr;
r248389	r248390
113	133	int m_spritesinit;
114	134	int m_spriteswidth;
115	135	int m_spritesaddr;
	136
	137	virtual void machine_start();
116	138	UINT16* m_rom16;
117	139	UINT8* m_rom8;
118	140
119		DECLARE_WRITE16_MEMBER(paloff_w);
120		DECLARE_WRITE16_MEMBER(pcup_prgbank_w);
121		DECLARE_WRITE16_MEMBER(paldat_w);
122
123		DECLARE_WRITE16_MEMBER(port10_w);
124
125		DECLARE_WRITE16_MEMBER(port20_w);
126		DECLARE_WRITE16_MEMBER(port62_w);
127
128		DECLARE_READ16_MEMBER(port1e_r);
129
130		DECLARE_READ16_MEMBER(pic_r);
131		DECLARE_WRITE16_MEMBER(pic_w);
132
133		DECLARE_READ16_MEMBER(blit_start_r);
134
135		DECLARE_READ16_MEMBER(mem_r);
136		DECLARE_WRITE16_MEMBER(mem_w);
137
138		virtual void machine_start();
139	141	virtual void video_start();
140
141		UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
142
143		INTERRUPT_GEN_MEMBER(irq);
	142	UINT32 screen_update_ttchamp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	143	INTERRUPT_GEN_MEMBER(ttchamp_irq);
	144	required_device<cpu_device> m_maincpu;
	145	required_device<palette_device> m_palette;
144	146	};
145	147
146		ALLOW_SAVE_TYPE(ttchamp_state::picmode);
147
148
149	148	void ttchamp_state::machine_start()
150	149	{
151	150	m_rom16 = (UINT16*)memregion("maincpu")->base();
152	151	m_rom8 = memregion("maincpu")->base();
153	152
154		m_picmodex = PIC_IDLE;
	153	picmodex = PIC_IDLE;
155	154
156	155	m_bakram = auto_alloc_array(machine(), UINT8, 0x100);
157	156	machine().device<nvram_device>("backram")->set_base(m_bakram, 0x100);
158
159		save_item(NAME(m_paloff));
160		save_item(NAME(m_port10));
161		save_item(NAME(m_rombank));
162		save_item(NAME(m_videoram0));
163		save_item(NAME(m_videoram2));
164		save_item(NAME(m_picmodex));
165		save_item(NAME(m_pic_readaddr));
166		save_item(NAME(m_pic_writeaddr));
167		save_item(NAME(m_pic_latched));
168		save_item(NAME(m_pic_writelatched));
169		save_item(NAME(m_mainram));
170		save_item(NAME(m_spritesinit));
171		save_item(NAME(m_spriteswidth));
172		save_item(NAME(m_spritesaddr));
173	157
174	158	}
175	159
r248389	r248390
177	161	{
178	162	}
179	163
180		UINT32 ttchamp_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	164	UINT32 ttchamp_state::screen_update_ttchamp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
181	165	{
182	166	logerror("update\n");
183	167	int y,x,count;
r248389	r248390
277	261	m_palette->set_pen_color(m_paloff & 0x3ff,pal5bit(data>>0),pal5bit(data>>5),pal5bit(data>>10));
278	262	}
279	263
280		READ16_MEMBER(ttchamp_state::pic_r)
	264	READ16_MEMBER(ttchamp_state::ttchamp_pic_r)
281	265	{
282	266	// printf("%06x: read from PIC (%04x)\n", space.device().safe_pc(),mem_mask);
283		if (m_picmodex == PIC_SET_READLATCH)
	267	if (picmodex == PIC_SET_READLATCH)
284	268	{
285	269	// printf("read data %02x from %02x\n", m_pic_latched, m_pic_readaddr);
286		m_picmodex = PIC_IDLE;
	270	picmodex = PIC_IDLE;
287	271
288	272	return m_pic_latched << 8;
289	273
r248389	r248390
292	276
293	277	}
294	278
295		WRITE16_MEMBER(ttchamp_state::pic_w)
	279	WRITE16_MEMBER(ttchamp_state::ttchamp_pic_w)
296	280	{
297		// printf("%06x: write to PIC %04x (%04x) (%d)\n", space.device().safe_pc(),data,mem_mask, m_picmodex);
298		if (m_picmodex == PIC_IDLE)
	281	// printf("%06x: write to PIC %04x (%04x) (%d)\n", space.device().safe_pc(),data,mem_mask, picmodex);
	282	if (picmodex == PIC_IDLE)
299	283	{
300	284	if (data == 0x11)
301	285	{
302		m_picmodex = PIC_SET_READADDRESS;
	286	picmodex = PIC_SET_READADDRESS;
303	287	// printf("state = SET_READADDRESS\n");
304	288	}
305	289	else if (data == 0x12)
306	290	{
307		m_picmodex = PIC_SET_WRITELATCH;
	291	picmodex = PIC_SET_WRITELATCH;
308	292	// printf("latch write data.. \n" );
309	293	}
310	294	else if (data == 0x20)
311	295	{
312		m_picmodex = PIC_SET_WRITEADDRESS;
	296	picmodex = PIC_SET_WRITEADDRESS;
313	297	// printf("state = PIC_SET_WRITEADDRESS\n");
314	298	}
315	299	else if (data == 0x21) // write latched data
316	300	{
317		m_picmodex = PIC_IDLE;
	301	picmodex = PIC_IDLE;
318	302	m_bakram[m_pic_writeaddr] = m_pic_writelatched;
319	303	// printf("wrote %02x to %02x\n", m_pic_writelatched, m_pic_writeaddr);
320	304	}
r248389	r248390
325	309	m_pic_latched = m_bakram[m_pic_readaddr>>1];
326	310
327	311	// printf("latch read data %02x from %02x\n",m_pic_latched, m_pic_readaddr );
328		m_picmodex = PIC_SET_READLATCH; // waiting to read...
	312	picmodex = PIC_SET_READLATCH; // waiting to read...
329	313	}
330	314	else
331	315	{
332	316	// printf("unknown\n");
333	317	}
334	318	}
335		else if (m_picmodex == PIC_SET_READADDRESS)
	319	else if (picmodex == PIC_SET_READADDRESS)
336	320	{
337	321	m_pic_readaddr = data;
338		m_picmodex = PIC_IDLE;
	322	picmodex = PIC_IDLE;
339	323	}
340		else if (m_picmodex == PIC_SET_WRITEADDRESS)
	324	else if (picmodex == PIC_SET_WRITEADDRESS)
341	325	{
342	326	m_pic_writeaddr = data;
343		m_picmodex = PIC_IDLE;
	327	picmodex = PIC_IDLE;
344	328	}
345		else if (m_picmodex == PIC_SET_WRITELATCH)
	329	else if (picmodex == PIC_SET_WRITELATCH)
346	330	{
347	331	m_pic_writelatched = data;
348		m_picmodex = PIC_IDLE;
	332	picmodex = PIC_IDLE;
349	333	}
350	334
351	335	}
352	336
353	337
354		READ16_MEMBER(ttchamp_state::mem_r)
	338	READ16_MEMBER(ttchamp_state::ttchamp_mem_r)
355	339	{
356	340	// bits 0xf0 are used too, so this is likely wrong.
357	341
r248389	r248390
383	367	}
384	368	}
385	369
386		WRITE16_MEMBER(ttchamp_state::mem_w)
	370	WRITE16_MEMBER(ttchamp_state::ttchamp_mem_w)
387	371	{
388	372	// this is very strange, we use the offset (address bits) not data bits to set values..
389	373	// I get the impression this might actually overlay the entire address range, including RAM and regular VRAM?
r248389	r248390
500	484
501	485
502	486	static ADDRESS_MAP_START( ttchamp_map, AS_PROGRAM, 16, ttchamp_state )
503		AM_RANGE(0x00000, 0xfffff) AM_READWRITE(mem_r, mem_w)
	487	AM_RANGE(0x00000, 0xfffff) AM_READWRITE(ttchamp_mem_r, ttchamp_mem_w)
504	488	ADDRESS_MAP_END
505	489
506	490	/* Re-use same parameters as before (one-shot) */
r248389	r248390
510	494	return 0xff;
511	495	}
512	496
513		READ16_MEMBER(ttchamp_state::blit_start_r)
	497	READ16_MEMBER(ttchamp_state::ttchamp_blit_start_r)
514	498	{
515	499	m_spritesinit = 1;
516	500	return 0xff;
r248389	r248390
549	533
550	534	AM_RANGE(0x0006, 0x0007) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
551	535
552		AM_RANGE(0x0018, 0x0019) AM_READ(blit_start_r) // read before using bus write offset as blit parameters
	536	AM_RANGE(0x0018, 0x0019) AM_READ(ttchamp_blit_start_r) // read before using bus write offset as blit parameters
553	537	AM_RANGE(0x001e, 0x001f) AM_READ(port1e_r) // read before some blit operations (but not all)
554	538
555	539	AM_RANGE(0x0008, 0x0009) AM_WRITE(paldat_w)
r248389	r248390
559	543
560	544	AM_RANGE(0x0020, 0x0021) AM_WRITE(port20_w)
561	545
562		AM_RANGE(0x0034, 0x0035) AM_READWRITE(pic_r, pic_w)
	546	AM_RANGE(0x0034, 0x0035) AM_READWRITE(ttchamp_pic_r, ttchamp_pic_w)
563	547
564	548	AM_RANGE(0x0062, 0x0063) AM_WRITE(port62_w)
565	549
r248389	r248390
632	616	INPUT_PORTS_END
633	617
634	618
635		INTERRUPT_GEN_MEMBER(ttchamp_state::irq)/* right? */
	619	INTERRUPT_GEN_MEMBER(ttchamp_state::ttchamp_irq)/* right? */
636	620	{
637	621	device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
638	622	}
r248389	r248390
642	626	MCFG_CPU_ADD("maincpu", V30, 8000000)
643	627	MCFG_CPU_PROGRAM_MAP(ttchamp_map)
644	628	MCFG_CPU_IO_MAP(ttchamp_io)
645		MCFG_CPU_VBLANK_INT_DRIVER("screen", ttchamp_state, irq)
	629	MCFG_CPU_VBLANK_INT_DRIVER("screen", ttchamp_state, ttchamp_irq)
646	630
647	631	/* video hardware */
648	632	MCFG_SCREEN_ADD("screen", RASTER)
r248389	r248390
650	634	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
651	635	MCFG_SCREEN_SIZE(1024,1024)
652	636	MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 200-1)
653		MCFG_SCREEN_UPDATE_DRIVER(ttchamp_state, screen_update)
	637	MCFG_SCREEN_UPDATE_DRIVER(ttchamp_state, screen_update_ttchamp)
654	638	MCFG_SCREEN_PALETTE("palette")
655	639
656	640	MCFG_PALETTE_ADD("palette", 0x400)
r248389	r248390
692	676	ROM_LOAD( "27c020.1", 0x000000, 0x040000, CRC(e2c4fe95) SHA1(da349035cc348db220a1e12b4c2a6021e2168425) )
693	677	ROM_END
694	678
	679	DRIVER_INIT_MEMBER(ttchamp_state,ttchamp)
	680	{
	681	}
695	682
696	683	// only the graphics differ between the two sets, code section is the same
697		GAME( 1995, ttchamp, 0, ttchamp, ttchamp, driver_device, 0, ROT0, "Gamart", "Table Tennis Champions", GAME_SUPPORTS_SAVE ) // this has various advertising boards, including 'Electronic Devices' and 'Deniam'
698		GAME( 1995, ttchampa,ttchamp, ttchamp, ttchamp, driver_device, 0, ROT0, "Gamart (Palencia Elektronik license)", "Table Tennis Champions (Palencia Elektronik license)", GAME_SUPPORTS_SAVE ) // this only has Palencia Elektronik advertising boards
	684	GAME( 1995, ttchamp, 0, ttchamp, ttchamp, ttchamp_state, ttchamp, ROT0, "Gamart", "Table Tennis Champions", 0 ) // this has various advertising boards, including 'Electronic Devices' and 'Deniam'
	685	GAME( 1995, ttchampa,ttchamp, ttchamp, ttchamp, ttchamp_state, ttchamp, ROT0, "Gamart (Palencia Elektronik license)", "Table Tennis Champions (Palencia Elektronik license)", 0 ) // this only has Palencia Elektronik advertising boards

trunk/src/mame/drivers/wecleman.c
r248389	r248390
1405	1405	ROM_LOAD( "763a12", 0x000000, 0x008000, CRC(05f1e553) SHA1(8aaeb7374bd93038c24e6470398936f22cabb0fe) )
1406	1406	ROM_END
1407	1407
1408		/*
1409
1410		Hot Chase
1411		Konami 1988
1412
1413
1414
1415		E08D E08B E09D E09B E10D E10B
1416		E08A E08C E09A E09C E10A E10C
1417
1418		GX763 350861
1419
1420		E09 E10 E11
1421		E08 07232 07232
1422		07232 3.579MHz 2128
1423		6809 P01.R10
1424		SW1
1425		SW2 2128 2128
1426		6264 6264 6264 6264
1427		R02.P14 R03.R14
1428		07770 R04.P16 R05.R16
1429		2018-45 D06.E18 D07.H18 10MHz
1430		2018-45 68000-10 07641 68000-10
1431
1432		GX763 350860
1433
1434		051316 PSAC 051316 PSAC A13.H5 A14.J5
1435		2018-45 2018-R6
1436		2018-45
1437		2018-45 07558
1438		051316 PSAC 2018-45 A12.R13
1439
1440		A15.H14
1441
1442		A23.B17 07634
1443		07635
1444		2018-45 2018-45
1445		2018-45 2018-45 07557
1446		2018-45 2018-45 25.2MHz
1447		2018-45 2018-45
1448
1449
1450		Left EPROM board
1451
1452		E19A.A8 E19B.A7 E19C.A6 E19D.A5
1453		E22E.B12 E22F.B11 E22G.B10 E22H.B9 E19E.B8 E19F.B7 E19G.B6 E19H.B5
1454		E22A.D9 E22B.D7 E22C.D6 E22D.D5
1455
1456		Right EPROM board
1457
1458		E21E E21F E21G E21H E17A E17B E17C E17D E18A E18B E18C E18D
1459		E20E E20F E20G E20H E17E E17F E17G E17H E18E E18F E18G E18H
1460		E20A E20B E20C E20D E21A E21B E21C E21D
1461
1462		*/
1463
1464		// uses EPROM sub-boards in place of some of the MASK roms, different program too
1465		ROM_START( hotchasea )
1466		ROM_REGION( 0x40000, "maincpu", 0 ) /* Main Code */
1467		ROM_LOAD16_BYTE( "763r05.r16", 0x000000, 0x010000, CRC(c880d5e4) SHA1(3c3ab3ad5496cfbc8de76620eedc06601ee7a8c7) )
1468		ROM_LOAD16_BYTE( "763r04.p16", 0x000001, 0x010000, CRC(b732ee2c) SHA1(b3d73cf5039980ac74927eef656326515fd2026b) )
1469		ROM_LOAD16_BYTE( "763r03.r14", 0x020000, 0x010000, CRC(13dd71de) SHA1(4b86b81ef79e0e92a1e458010b0b9574183a9c29) )
1470		ROM_LOAD16_BYTE( "763r02.p14", 0x020001, 0x010000, CRC(6cd1a18e) SHA1(0ddfe6a46e95052534325f228b7f0faba121950e) )
1471
1472		ROM_REGION( 0x20000, "sub", 0 ) /* Sub Code */
1473		ROM_LOAD16_BYTE( "763d07.h18", 0x000000, 0x010000, CRC(ae12fa90) SHA1(7f76f09916fe152411b5af3c504ee7be07497ef4) )
1474		ROM_LOAD16_BYTE( "763d06.e18", 0x000001, 0x010000, CRC(b77e0c07) SHA1(98bf492ac889d31419df706029fdf3d51b85c936) )
1475
1476		ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Code */
1477		ROM_LOAD( "763p01.r10", 0x8000, 0x8000, CRC(15dbca7b) SHA1(ac0c965b72a8579a3b60dbadfb942248d2cff2d8) )
1478
1479		ROM_REGION( 0x300000 * 2, "gfx1", 0 ) /* x2, do not dispose, zooming sprites */
1480		ROM_LOAD16_BYTE( "763e17a", 0x000000, 0x010000, CRC(8542d7d7) SHA1(a7c8aa7d8e0cabdc5269eb7adff944aaa0f819b6) )
1481		ROM_LOAD16_BYTE( "763e17e", 0x000001, 0x010000, CRC(4b4d919c) SHA1(0364eb74da8db7238888274d12011de876662d5a) )
1482		ROM_LOAD16_BYTE( "763e17b", 0x020000, 0x010000, CRC(ba9d7e72) SHA1(3af618087dcc66552ffabaf655f97b20e597122c) )
1483		ROM_LOAD16_BYTE( "763e17f", 0x020001, 0x010000, CRC(582400bb) SHA1(9479e45087d908c9b20392dba2a752a7ec1482e2) )
1484		ROM_LOAD16_BYTE( "763e17c", 0x040000, 0x010000, CRC(0ed292f8) SHA1(8c161e73c7f27925377799f67585b888bade6d82) )
1485		ROM_LOAD16_BYTE( "763e17g", 0x040001, 0x010000, CRC(35b27ed7) SHA1(e17e7674ee210ff340482a16dce3439b55c29f72) )
1486		ROM_LOAD16_BYTE( "763e17d", 0x060000, 0x010000, CRC(0166d00d) SHA1(e58f6deabc5743f6610252242f97bd5e973316ae) )
1487		ROM_LOAD16_BYTE( "763e17h", 0x060001, 0x010000, CRC(e5b8e8e6) SHA1(ae1349977559ff24dcd1678d6fd3a3e118612d07) )
1488		ROM_LOAD16_BYTE( "763e20a", 0x080000, 0x010000, CRC(256fe63c) SHA1(414325f2ff9abc411e2401dddd216e1a4de8a01e) )
1489		ROM_LOAD16_BYTE( "763e20e", 0x080001, 0x010000, CRC(ee8ca7e1) SHA1(fee544d6508f4106176f39e3765961e9f80fe620) )
1490		ROM_LOAD16_BYTE( "763e20b", 0x0a0000, 0x010000, CRC(b6714c24) SHA1(88f6437e181f36b7e44f1c70872314d8c0cc30e7) )
1491		ROM_LOAD16_BYTE( "763e20f", 0x0a0001, 0x010000, CRC(9dbc4b21) SHA1(31559903707a4f8ba3b044e8aad928de38403dcf) )
1492		ROM_LOAD16_BYTE( "763e20c", 0x0c0000, 0x010000, CRC(5173ad9b) SHA1(afe82c69f7036c7595f1a56b22176ba202b00b5c) )
1493		ROM_LOAD16_BYTE( "763e20g", 0x0c0001, 0x010000, CRC(b8c77f99) SHA1(e3bea1481c5b1c4733130651f9cf18587d3efc46) )
1494		ROM_LOAD16_BYTE( "763e20d", 0x0e0000, 0x010000, CRC(4ebdba32) SHA1(ac7daa291c82f75b09faf7bc5f6257870cc46061) )
1495		ROM_LOAD16_BYTE( "763e20h", 0x0e0001, 0x010000, CRC(0a428654) SHA1(551026f6f57d38aedd3498cce33af7bb2cf07184) )
1496		ROM_LOAD16_BYTE( "763e18a", 0x100000, 0x010000, CRC(09748099) SHA1(1821e2067b9a50a0638c8d105c617f4030d61877) )
1497		ROM_LOAD16_BYTE( "763e18e", 0x100001, 0x010000, CRC(049d4fcf) SHA1(aed18297677a3bb0b7197f59ea329aef9b678c01) )
1498		ROM_LOAD16_BYTE( "763e18b", 0x120000, 0x010000, CRC(ed0c3369) SHA1(84f336546dee01fec31c9c256ee00a9f8448cea4) )
1499		ROM_LOAD16_BYTE( "763e18f", 0x120001, 0x010000, CRC(b596a9ce) SHA1(dea0fe1c3386b5f0d19df4467f42d077678ae220) )
1500		ROM_LOAD16_BYTE( "763e18c", 0x140000, 0x010000, CRC(5a278291) SHA1(05c529baa68ef5877a28901c6f221e3d3593735f) )
1501		ROM_LOAD16_BYTE( "763e18g", 0x140001, 0x010000, CRC(aa7263cd) SHA1(b2acf66c02faf7777c5cb947aaf8e038f29c0f2e) )
1502		ROM_LOAD16_BYTE( "763e18d", 0x160000, 0x010000, CRC(b0b79a71) SHA1(46d0f17b7a6e4fb94ac9b8335bc598339d7707a5) )
1503		ROM_LOAD16_BYTE( "763e18h", 0x160001, 0x010000, CRC(a18b9127) SHA1(890971d2922a59ff4beea00238e710c8d3e0f19d) )
1504		ROM_LOAD16_BYTE( "763e21a", 0x180000, 0x010000, CRC(60788c29) SHA1(4faaa192d07f6acac0e7d11676146ecd0e71541f) )
1505		ROM_LOAD16_BYTE( "763e21e", 0x180001, 0x010000, CRC(844799ff) SHA1(8dc3ae3bb30ecb4e921a5b2068d3cd9421577844) )
1506		ROM_LOAD16_BYTE( "763e21b", 0x1a0000, 0x010000, CRC(1eefed61) SHA1(9c09dbff073d63384bf1ec9df4db4833afa33826) )
1507		ROM_LOAD16_BYTE( "763e21f", 0x1a0001, 0x010000, CRC(3aacfb10) SHA1(fb3eebf1f0850ed2f8f02cd4b5b564524e391afd) )
1508		ROM_LOAD16_BYTE( "763e21c", 0x1c0000, 0x010000, CRC(97e48b37) SHA1(864c73f48d839c2afeecec99605be6111f450ddd) )
1509		ROM_LOAD16_BYTE( "763e21g", 0x1c0001, 0x010000, CRC(74fefb12) SHA1(7746918c3ea8981c9cb2ead79a252939ba8bde3f) )
1510		ROM_LOAD16_BYTE( "763e21d", 0x1e0000, 0x010000, CRC(dd41569e) SHA1(065ee2de9ad6980788807cb563feccef1c3d1b9d) )
1511		ROM_LOAD16_BYTE( "763e21h", 0x1e0001, 0x010000, CRC(7ea52bf6) SHA1(2be93f88ccdea989b05beca13ebbfb77626ea41f) )
1512		ROM_LOAD16_BYTE( "763e19a", 0x200000, 0x010000, CRC(8c912c46) SHA1(e314edc39c32471c6fa2969e7c5c771c19fda88c) )
1513		ROM_LOAD16_BYTE( "763e19e", 0x200001, 0x010000, CRC(0eb34787) SHA1(9b8145dae210a177585e672fce30339b39c3c0f3) )
1514		ROM_LOAD16_BYTE( "763e19b", 0x220000, 0x010000, CRC(79960729) SHA1(f5c20ed7683aad8a435c292fbd5a1acc2a97ecee) )
1515		ROM_LOAD16_BYTE( "763e19f", 0x220001, 0x010000, CRC(1764ec5f) SHA1(4f7a0a3667087523a1ccdfc2d0e54a520f1216b3) )
1516		ROM_LOAD16_BYTE( "763e19c", 0x240000, 0x010000, CRC(f13377ac) SHA1(89f8d730cb457cc9cf55049b7002514302b2b04f) )
1517		ROM_LOAD16_BYTE( "763e19g", 0x240001, 0x010000, CRC(f2102e89) SHA1(41ff5d8904618a77c7c3c78c52c6f1b9c5a318fd) )
1518		ROM_LOAD16_BYTE( "763e19d", 0x260000, 0x010000, CRC(0b2a19f4) SHA1(3689b2c1f6227224fbcecc0d2470048a99510794) )
1519		ROM_LOAD16_BYTE( "763e19h", 0x260001, 0x010000, CRC(cd6d08a5) SHA1(ce13a8bba84f24e7d1fb25254e2e95f591fe1d67) )
1520		ROM_LOAD16_BYTE( "763e22a", 0x280000, 0x010000, CRC(16eec250) SHA1(f50375f207575e9d280285aca493902afbb7d729) )
1521		ROM_LOAD16_BYTE( "763e22e", 0x280001, 0x010000, CRC(c184b1c0) SHA1(d765e6eb2631b77dff5331840ac2a99cf1250362) )
1522		ROM_LOAD16_BYTE( "763e22b", 0x2a0000, 0x010000, CRC(1afe4b0c) SHA1(ce5a855291b443c1e16dbf54730960600c754fee) )
1523		ROM_LOAD16_BYTE( "763e22f", 0x2a0001, 0x010000, CRC(61f27c98) SHA1(d80af1a3e424c8dbab4fd21d494a0580ab96cd8d) )
1524		ROM_LOAD16_BYTE( "763e22c", 0x2c0000, 0x010000, CRC(c19b4b63) SHA1(93708b8769c44d5b93dcd2928a0d1120cc52c6ee) )
1525		ROM_LOAD16_BYTE( "763e22g", 0x2c0001, 0x010000, CRC(5bcbaf29) SHA1(621aa19606a15abb1539c07a033b32fc374a2d6a) )
1526		ROM_LOAD16_BYTE( "763e22d", 0x2e0000, 0x010000, CRC(fd5b669d) SHA1(fd5d82886708187e53c204c574ee252fc8a793af) )
1527		ROM_LOAD16_BYTE( "763e22h", 0x2e0001, 0x010000, CRC(9a9f45d8) SHA1(24fa9425b00441fff124eae7b40df7e65c920323) )
1528
1529		ROM_REGION( 0x20000, "k051316_1", 0 ) /* bg */
1530		ROM_LOAD( "763a14", 0x000000, 0x020000, CRC(60392aa1) SHA1(8499eb40a246587e24f6fd00af2eaa6d75ee6363) )
1531
1532		ROM_REGION( 0x08000, "k051316_2", 0 ) /* fg */
1533		/* first half empty - PCB silkscreen reads "27256/27512" */
1534		ROM_LOAD( "763a13", 0x000000, 0x008000, CRC(8bed8e0d) SHA1(ccff330abc23fe499e76c16cab5783c3daf155dd) )
1535		ROM_CONTINUE( 0x000000, 0x008000 )
1536
1537		ROM_REGION( 0x20000, "gfx4", 0 ) /* road */
1538		ROM_LOAD( "763a15", 0x000000, 0x020000, CRC(7110aa43) SHA1(639dc002cc1580f0530bb5bb17f574e2258d5954) )
1539
1540		ROM_REGION( 0x40000, "k007232_1", 0 ) /* Samples, 2 banks */
1541		ROM_LOAD( "763e11a", 0x000000, 0x010000, CRC(a60a93c8) SHA1(ce319f2b30c82f66fee0bab65d091ef4bef58a89) )
1542		ROM_LOAD( "763e11b", 0x010000, 0x010000, CRC(7750feb5) SHA1(e0900b8af400a50a22907ffa514847003cef342d) )
1543		ROM_LOAD( "763e11c", 0x020000, 0x010000, CRC(78b89bf8) SHA1(b74427e363a486d4be003df39f4ca8d10b9d5fc9) )
1544		ROM_LOAD( "763e11d", 0x030000, 0x010000, CRC(5f38d054) SHA1(ce0c87a7b7c0806e09cce5d48a651f12f790dd27) )
1545
1546		ROM_REGION( 0x40000, "k007232_2", 0 ) /* Samples, 2 banks */
1547		ROM_LOAD( "763e10a", 0x000000, 0x010000, CRC(2b1cbefc) SHA1(f23fb943c277a05f2aa4d25de692d1fb3bb752ac) )
1548		ROM_LOAD( "763e10b", 0x010000, 0x010000, CRC(8209c950) SHA1(944c2afb4cfc67bd243de499f5ca6a7982980f45) )
1549		ROM_LOAD( "763e10c", 0x020000, 0x010000, CRC(b91d6c07) SHA1(ef90457cb495750c5793cd1716d0dc44d33d0a95) )
1550		ROM_LOAD( "763e10d", 0x030000, 0x010000, CRC(5b465d20) SHA1(66f10b58873e738f5539b960468c7f92d07c28bc) )
1551
1552		ROM_REGION( 0x100000, "k007232_3", 0 ) /* Samples, 4 banks for each ROM */
1553		ROM_LOAD( "763e08a", 0x000000, 0x020000, CRC(02e4e7ef) SHA1(1622e4d85a333acae6e5f9304a037389bfeb71dc) )
1554		ROM_LOAD( "763e08b", 0x020000, 0x020000, CRC(94edde2f) SHA1(b124f83f271dab710d5ecb67a70cac7b4b41931c) )
1555		ROM_LOAD( "763e08c", 0x040000, 0x020000, CRC(b1ab1529) SHA1(962ad45fdccf6431e05eaec65d1b2f7842bddc02) )
1556		ROM_LOAD( "763e08d", 0x060000, 0x020000, CRC(ee8d14db) SHA1(098ba4f27b8cbb0ce017b28e5b69d6a3d2efa1df) )
1557
1558		ROM_LOAD( "763e09a", 0x080000, 0x020000, CRC(1e6628ec) SHA1(9d24da1d32cb39dcbe3d0633045054d398ca8eb8) )
1559		ROM_LOAD( "763e09b", 0x0a0000, 0x020000, CRC(f0c2feb8) SHA1(9454d45a97dc2e823baf68dce85acce8e82a18f2) )
1560		ROM_LOAD( "763e09c", 0x0c0000, 0x020000, CRC(a0ade3e4) SHA1(1c94cede76f9350769a589625fadaee855c38866) )
1561		ROM_LOAD( "763e09d", 0x0e0000, 0x020000, CRC(c74e484d) SHA1(dd7ef64c30443847c638291f6cd2b45a5f0b2310) )
1562
1563		ROM_REGION( 0x08000, "user1", 0 ) /* extra data for road effects? */
1564		ROM_LOAD( "763a12", 0x000000, 0x008000, CRC(05f1e553) SHA1(8aaeb7374bd93038c24e6470398936f22cabb0fe) )
1565
1566		ROM_REGION( 0x200, "user2", 0 )
1567		ROM_LOAD( "763a23.b17", 0x00000, 0x200, CRC(81c30352) SHA1(20700aed065929835ef5c3b564a6f531f0a8fedf) )
1568		ROM_END
1569
1570
1571	1408	/* Important: you must leave extra space when listing sprite ROMs
1572	1409	in a ROM module definition. This routine unpacks each sprite nibble
1573	1410	into a byte, doubling the memory consumption. */
r248389	r248390
1637	1474
1638	1475	GAMEL( 1986, wecleman, 0, wecleman, wecleman, wecleman_state, wecleman, ROT0, "Konami", "WEC Le Mans 24 (set 1)", 0, layout_wecleman )
1639	1476	GAMEL( 1986, wecleman2, wecleman, wecleman, wecleman, wecleman_state, wecleman, ROT0, "Konami", "WEC Le Mans 24 (set 2)", 0, layout_wecleman ) // 1988 release
1640
1641		GAMEL( 1988, hotchase, 0, hotchase, hotchase, wecleman_state, hotchase, ROT0, "Konami", "Hot Chase (set 1)", 0, layout_wecleman )
1642		GAMEL( 1988, hotchasea, hotchase, hotchase, hotchase, wecleman_state, hotchase, ROT0, "Konami", "Hot Chase (set 2)", 0, layout_wecleman )
	1477	GAMEL( 1988, hotchase, 0, hotchase, hotchase, wecleman_state, hotchase, ROT0, "Konami", "Hot Chase", 0, layout_wecleman )

trunk/src/mame/drivers/xyonix.c
r248389	r248390
13	13	Dip SW is 1 x 8-position
14	14
15	15	on the PCB is an empty socket. written next to the socket is 68705P3. "oh no" you
16		say..... well, its unpopulated, so maybe it was never used? (another PCB was
17		found with the 68705 populated)
	16	say..... well, its unpopulated, so maybe it was never used?
18	17
19	18
20	19	TODO:
r248389	r248390
260	259	ROM_REGION( 0x10000, "maincpu", 0 )
261	260	ROM_LOAD( "xyonix3.bin", 0x00000, 0x10000, CRC(1960a74e) SHA1(5fd7bc31ca2f5f1e114d3d0ccf6554ebd712cbd3) )
262	261
263		ROM_REGION( 0x10000, "mcu", 0 )
264		ROM_LOAD( "mc68705p3s.e7", 0x00000, 0x780, BAD_DUMP CRC(f60cdd86) SHA1(e18cc598153b3e108942328ee9c5b9f83b034c41) ) // FIXED BITS (xxxxxx0x)
265
266	262	ROM_REGION( 0x10000, "gfx1", 0 )
267	263	ROM_LOAD( "xyonix1.bin", 0x00000, 0x08000, CRC(3dfa9596) SHA1(52cdbbe18f83cea7248c29588ea3a18c4bb7984f) )
268	264	ROM_LOAD( "xyonix2.bin", 0x08000, 0x08000, CRC(db87343e) SHA1(62bc30cd65b2f8976cd73a0b349a9ccdb3faaad2) )
r248389	r248390
274	270	/* GAME drivers **************************************************************/
275	271
276	272	GAME( 1989, xyonix, 0, xyonix, xyonix, driver_device, 0, ROT0, "Philko", "Xyonix", GAME_SUPPORTS_SAVE )
277
		No newline at end of file

trunk/src/mame/includes/1942.h
r248389	r248390
45	45	DECLARE_WRITE8_MEMBER(c1942_scroll_w);
46	46	DECLARE_WRITE8_MEMBER(c1942_c804_w);
47	47	DECLARE_WRITE8_MEMBER(c1942p_f600_w);
48		DECLARE_WRITE8_MEMBER(c1942p_soundlatch_w);
49	48	DECLARE_DRIVER_INIT(1942);
50	49	TILE_GET_INFO_MEMBER(get_fg_tile_info);
51	50	TILE_GET_INFO_MEMBER(get_bg_tile_info);

trunk/src/mame/includes/dynax.h
r248389	r248390
226	226	DECLARE_DRIVER_INIT(blktouch);
227	227	DECLARE_DRIVER_INIT(mjelct3a);
228	228	DECLARE_DRIVER_INIT(mjreach);
229		DECLARE_DRIVER_INIT(maya_common);
230		DECLARE_DRIVER_INIT(mayac);
231	229	DECLARE_DRIVER_INIT(maya);
232	230
233	231	UINT32 screen_update_hanamai(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);

trunk/src/mame/includes/namcona1.h
r248389	r248390
85	85
86	86	DECLARE_READ16_MEMBER(custom_key_r);
87	87	DECLARE_WRITE16_MEMBER(custom_key_w);
88		DECLARE_WRITE16_MEMBER(vreg_w);
	88	DECLARE_WRITE16_MEMBER(namcona1_vreg_w);
89	89	DECLARE_READ16_MEMBER(mcu_mailbox_r);
90	90	DECLARE_WRITE16_MEMBER(mcu_mailbox_w_68k);
91	91	DECLARE_WRITE16_MEMBER(mcu_mailbox_w_mcu);
r248389	r248390
105	105	void simulate_mcu();
106	106	void write_version_info();
107	107	int transfer_dword(UINT32 dest, UINT32 source);
108		void blit();
	108	void namcona1_blit();
109	109	void UpdatePalette(int offset);
110		DECLARE_WRITE16_MEMBER(videoram_w);
111		DECLARE_WRITE16_MEMBER(paletteram_w);
112		DECLARE_READ16_MEMBER(gfxram_r);
113		DECLARE_WRITE16_MEMBER(gfxram_w);
	110	DECLARE_WRITE16_MEMBER(namcona1_videoram_w);
	111	DECLARE_WRITE16_MEMBER(namcona1_paletteram_w);
	112	DECLARE_READ16_MEMBER(namcona1_gfxram_r);
	113	DECLARE_WRITE16_MEMBER(namcona1_gfxram_w);
114	114	void pdraw_tile( screen_device &screen, bitmap_ind16 &dest_bmp, const rectangle &clip, UINT32 code, int color,
115	115	int sx, int sy, int flipx, int flipy, int priority, int bShadow, int bOpaque, int gfx_region );
116	116	void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
117	117	void draw_background(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int which, int primask );
118	118	DECLARE_READ16_MEMBER(snd_r);
119	119	DECLARE_WRITE16_MEMBER(snd_w);
120
121	120	DECLARE_DRIVER_INIT(bkrtmaq);
122	121	DECLARE_DRIVER_INIT(quiztou);
123	122	DECLARE_DRIVER_INIT(emeralda);
r248389	r248390
130	129	DECLARE_DRIVER_INIT(xday2);
131	130	DECLARE_DRIVER_INIT(exbania);
132	131	DECLARE_DRIVER_INIT(emeraldj);
133		virtual void machine_start();
134		virtual void machine_reset();
135		virtual void video_start();
136
137	132	TILE_GET_INFO_MEMBER(tilemap_get_info0);
138	133	TILE_GET_INFO_MEMBER(tilemap_get_info1);
139	134	TILE_GET_INFO_MEMBER(tilemap_get_info2);
140	135	TILE_GET_INFO_MEMBER(tilemap_get_info3);
141	136	TILE_GET_INFO_MEMBER(roz_get_info);
	137	virtual void machine_start();
	138	virtual void machine_reset();
	139	virtual void video_start();
	140	UINT32 screen_update_namcona1(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	141	TIMER_DEVICE_CALLBACK_MEMBER(namcona1_interrupt);
142	142
143		UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
144
145		TIMER_DEVICE_CALLBACK_MEMBER(interrupt);
146		void postload();
147
148	143	private:
149	144	void tilemap_get_info(tile_data &tileinfo, int tile_index, const UINT16 *tilemap_videoram, bool use_4bpp_gfx);
150	145	};

trunk/src/mame/includes/naughtyb.h
r248389	r248390
7	7	public:
8	8	naughtyb_state(const machine_config &mconfig, device_type type, const char *tag)
9	9	: driver_device(mconfig, type, tag),
	10	m_videoram(*this, "videoram"),
	11	m_videoram2(*this, "videoram2"),
	12	m_scrollreg(*this, "scrollreg"),
10	13	m_maincpu(*this, "maincpu"),
11	14	m_naughtyb_custom(*this, "naughtyb_custom"),
12	15	m_popflame_custom(*this, "popflame_custom"),
13	16	m_gfxdecode(*this, "gfxdecode"),
14	17	m_screen(*this, "screen"),
15		m_palette(*this, "palette"),
16		m_videoram(*this, "videoram"),
17		m_videoram2(*this, "videoram2"),
18		m_scrollreg(*this, "scrollreg") { }
	18	m_palette(*this, "palette") { }
19	19
	20	required_shared_ptr<UINT8> m_videoram;
	21	required_shared_ptr<UINT8> m_videoram2;
	22	required_shared_ptr<UINT8> m_scrollreg;
20	23	required_device<cpu_device> m_maincpu;
21	24	optional_device<naughtyb_sound_device> m_naughtyb_custom;
22	25	optional_device<popflame_sound_device> m_popflame_custom;
r248389	r248390
24	27	required_device<screen_device> m_screen;
25	28	required_device<palette_device> m_palette;
26	29
27		required_shared_ptr<UINT8> m_videoram;
28		required_shared_ptr<UINT8> m_videoram2;
29		required_shared_ptr<UINT8> m_scrollreg;
30	30
31	31	UINT8 m_popflame_prot_seed;
32	32	int m_r_index;
r248389	r248390
36	36	UINT8 m_palreg;
37	37	int m_bankreg;
38	38	bitmap_ind16 m_tmpbitmap;
39
40	39	DECLARE_READ8_MEMBER(in0_port_r);
41	40	DECLARE_READ8_MEMBER(dsw0_port_r);
42	41	DECLARE_READ8_MEMBER(popflame_protection_r);
r248389	r248390
45	44	DECLARE_WRITE8_MEMBER(trvmstr_questions_w);
46	45	DECLARE_WRITE8_MEMBER(naughtyb_videoreg_w);
47	46	DECLARE_WRITE8_MEMBER(popflame_videoreg_w);
48
49	47	DECLARE_INPUT_CHANGED_MEMBER(coin_inserted);
50
51	48	DECLARE_DRIVER_INIT(trvmstr);
52	49	DECLARE_DRIVER_INIT(popflame);
53	50	virtual void video_start();
54	51	DECLARE_PALETTE_INIT(naughtyb);
	52	UINT32 screen_update_naughtyb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
55	53
56		UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
57	54	};

trunk/src/mame/includes/poolshrk.h
r248389	r248390
15	15	public:
16	16	poolshrk_state(const machine_config &mconfig, device_type type, const char *tag)
17	17	: driver_device(mconfig, type, tag),
18		m_maincpu(*this, "maincpu"),
19		m_gfxdecode(*this, "gfxdecode"),
20		m_palette(*this, "palette"),
21		m_discrete(*this, "discrete"),
22	18	m_playfield_ram(*this, "playfield_ram"),
23	19	m_hpos_ram(*this, "hpos_ram"),
24		m_vpos_ram(*this, "vpos_ram") { }
	20	m_vpos_ram(*this, "vpos_ram"),
	21	m_discrete(*this, "discrete"),
	22	m_maincpu(*this, "maincpu"),
	23	m_gfxdecode(*this, "gfxdecode"),
	24	m_palette(*this, "palette") { }
25	25
26		required_device<cpu_device> m_maincpu;
27		required_device<gfxdecode_device> m_gfxdecode;
28		required_device<palette_device> m_palette;
29		required_device<discrete_device> m_discrete;
30
	26	int m_da_latch;
31	27	required_shared_ptr<UINT8> m_playfield_ram;
32	28	required_shared_ptr<UINT8> m_hpos_ram;
33	29	required_shared_ptr<UINT8> m_vpos_ram;
34
	30	required_device<discrete_device> m_discrete;
35	31	tilemap_t* m_bg_tilemap;
36		int m_da_latch;
37
38		DECLARE_WRITE8_MEMBER(da_latch_w);
39		DECLARE_WRITE8_MEMBER(led_w);
40		DECLARE_WRITE8_MEMBER(watchdog_w);
41		DECLARE_READ8_MEMBER(input_r);
42		DECLARE_READ8_MEMBER(irq_reset_r);
43		DECLARE_WRITE8_MEMBER(scratch_sound_w);
44		DECLARE_WRITE8_MEMBER(score_sound_w);
45		DECLARE_WRITE8_MEMBER(click_sound_w);
46		DECLARE_WRITE8_MEMBER(bump_sound_w);
47
48		TILE_GET_INFO_MEMBER(get_tile_info);
49
	32	DECLARE_WRITE8_MEMBER(poolshrk_da_latch_w);
	33	DECLARE_WRITE8_MEMBER(poolshrk_led_w);
	34	DECLARE_WRITE8_MEMBER(poolshrk_watchdog_w);
	35	DECLARE_READ8_MEMBER(poolshrk_input_r);
	36	DECLARE_READ8_MEMBER(poolshrk_irq_reset_r);
50	37	DECLARE_DRIVER_INIT(poolshrk);
	38	TILE_GET_INFO_MEMBER(get_tile_info);
51	39	virtual void video_start();
52	40	DECLARE_PALETTE_INIT(poolshrk);
53
54		UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	41	UINT32 screen_update_poolshrk(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	42	DECLARE_WRITE8_MEMBER(poolshrk_scratch_sound_w);
	43	DECLARE_WRITE8_MEMBER(poolshrk_score_sound_w);
	44	DECLARE_WRITE8_MEMBER(poolshrk_click_sound_w);
	45	DECLARE_WRITE8_MEMBER(poolshrk_bump_sound_w);
	46	required_device<cpu_device> m_maincpu;
	47	required_device<gfxdecode_device> m_gfxdecode;
	48	required_device<palette_device> m_palette;
55	49	};
56	50
57	51

trunk/src/mame/includes/scramble.h
r248389	r248390
3	3	#include "machine/i8255.h"
4	4	#include "includes/galaxold.h"
5	5	#include "sound/tms5110.h"
6		#include "sound/digitalk.h"
7	6
8	7	class scramble_state : public galaxold_state
9	8	{
r248389	r248390
14	13	m_ppi8255_0(*this, "ppi8255_0"),
15	14	m_ppi8255_1(*this, "ppi8255_1"),
16	15	m_tmsprom(*this, "tmsprom"),
17		m_soundram(*this, "soundram"),
18		m_digitalker(*this, "digitalker")
	16	m_soundram(*this, "soundram")
19	17	{
20	18	}
21	19
r248389	r248390
24	22	optional_device<i8255_device> m_ppi8255_1;
25	23	optional_device<tmsprom_device> m_tmsprom;
26	24	optional_shared_ptr<UINT8> m_soundram;
27		optional_device<digitalker_device> m_digitalker;
28	25
29	26	UINT8 m_cavelon_bank;
30	27
r248389	r248390
53	50	DECLARE_WRITE8_MEMBER(mars_ppi8255_1_w);
54	51	DECLARE_WRITE8_MEMBER(ad2083_tms5110_ctrl_w);
55	52
56		// harem
	53	DECLARE_WRITE8_MEMBER(harem_portA_w);
	54	DECLARE_WRITE8_MEMBER(harem_portB_w);
	55
57	56	DECLARE_WRITE8_MEMBER(harem_decrypt_bit_w);
58	57	DECLARE_WRITE8_MEMBER(harem_decrypt_clk_w);
59	58	DECLARE_WRITE8_MEMBER(harem_decrypt_rst_w);
60		DECLARE_READ8_MEMBER(harem_digitalker_intr_r);
61		DECLARE_WRITE8_MEMBER(harem_digitalker_control_w);
62	59
63	60	DECLARE_DRIVER_INIT(cavelon);
64	61	DECLARE_DRIVER_INIT(mariner);

trunk/src/mame/includes/spbactn.h
r248389	r248390
9	9	public:
10	10	spbactn_state(const machine_config &mconfig, device_type type, const char *tag)
11	11	: driver_device(mconfig, type, tag),
	12	m_bgvideoram(*this, "bgvideoram"),
	13	m_fgvideoram(*this, "fgvideoram"),
	14	m_spvideoram(*this, "spvideoram"),
	15	m_extraram(*this, "extraram"),
	16	m_extraram2(*this, "extraram2"),
12	17	m_maincpu(*this, "maincpu"),
13	18	m_audiocpu(*this, "audiocpu"),
14	19	m_gfxdecode(*this, "gfxdecode"),
15	20	m_screen(*this, "screen"),
16	21	m_palette(*this, "palette"),
17	22	m_sprgen(*this, "spritegen"),
18		m_mixer(*this, "mixer"),
19		m_bgvideoram(*this, "bgvideoram"),
20		m_fgvideoram(*this, "fgvideoram"),
21		m_spvideoram(*this, "spvideoram"),
22		m_extraram(*this, "extraram"),
23		m_extraram2(*this, "extraram2")
	23	m_mixer(*this, "mixer")
24	24	{ }
25	25
26		required_device<cpu_device> m_maincpu;
27		required_device<cpu_device> m_audiocpu;
28		required_device<gfxdecode_device> m_gfxdecode;
29		required_device<screen_device> m_screen;
30		required_device<palette_device> m_palette;
31		required_device<tecmo_spr_device> m_sprgen;
32		required_device<tecmo_mix_device> m_mixer;
33
34	26	required_shared_ptr<UINT16> m_bgvideoram;
35	27	required_shared_ptr<UINT16> m_fgvideoram;
36	28	required_shared_ptr<UINT16> m_spvideoram;
r248389	r248390
82	74	{
83	75	return 0xffff;
84	76	}
	77	required_device<cpu_device> m_maincpu;
	78	required_device<cpu_device> m_audiocpu;
	79	required_device<gfxdecode_device> m_gfxdecode;
	80	required_device<screen_device> m_screen;
	81	required_device<palette_device> m_palette;
	82	required_device<tecmo_spr_device> m_sprgen;
	83	required_device<tecmo_mix_device> m_mixer;
	84
	85
	86
85	87	};

trunk/src/mame/includes/system1.h
r248389	r248390
115	115	DECLARE_DRIVER_INIT(seganinj);
116	116	DECLARE_DRIVER_INIT(gardia);
117	117	DECLARE_DRIVER_INIT(spatter);
118		DECLARE_DRIVER_INIT(spattera);
119	118	TILE_GET_INFO_MEMBER(tile_get_info);
120	119	virtual void machine_start();
121	120	virtual void machine_reset();

trunk/src/mame/includes/system16.h
r248389	r248390
125	125	optional_shared_ptr<UINT16> m_decrypted_opcodes;
126	126
127	127	DECLARE_WRITE16_MEMBER(sound_command_nmi_w);
128		DECLARE_WRITE16_MEMBER(sound_command_~~irq_~~w);
	128	DECLARE_WRITE16_MEMBER(sound_command_w);
129	129	DECLARE_WRITE16_MEMBER(sys16_coinctrl_w);
130	130	DECLARE_READ16_MEMBER(passht4b_service_r);
131	131	DECLARE_READ16_MEMBER(passht4b_io1_r);
r248389	r248390
159	159	DECLARE_WRITE16_MEMBER(sys18_tilebank_w);
160	160	DECLARE_READ8_MEMBER(system18_bank_r);
161	161	DECLARE_WRITE8_MEMBER(sys18_soundbank_w);
	162	DECLARE_WRITE16_MEMBER(sound_command_irq_w);
162	163	DECLARE_WRITE8_MEMBER(shdancbl_msm5205_data_w);
163	164	DECLARE_READ8_MEMBER(shdancbl_soundbank_r);
164	165	DECLARE_WRITE8_MEMBER(shdancbl_bankctrl_w);

trunk/src/mame/machine/scramble.c
r248389	r248390
675	675
676	676	membank("rombank")->set_base (m_harem_decrypted_data);
677	677	membank("rombank_decrypted")->set_base (m_harem_decrypted_opcodes);
678
679		save_item(NAME(m_harem_decrypt_mode));
680		save_item(NAME(m_harem_decrypt_bit));
681		save_item(NAME(m_harem_decrypt_clk));
682		save_item(NAME(m_harem_decrypt_count));
683	678	}

trunk/src/mame/mess.lst
r248389	r248390
327	327	fb01 // 1986 FB-01
328	328
329	329	// Roland
	330	tb303
330	331	mt32
331	332	cm32l
332	333	d110
r248389	r248390
1042	1043	avigo_it // 1997 Avigo (Italian)
1043	1044
1044	1045	// Texas Instruments Calculators
	1046	tisr16 // 1974 SR-16
	1047	tisr16ii
	1048	ti1270
	1049	ti1000
	1050	ti30 // 1976 TI-30
	1051	tiprog
	1052	tibusan1
	1053	wizatron
	1054	lilprof
	1055	lilprof78
1045	1056	ti73 // 1990 TI-73
1046	1057	ti74 // 1985 TI-74
1047	1058	ti95 // 1986 TI-95
r248389	r248390
2224	2235	elecbowl // Marx
2225	2236	mbdtower // Milton Bradley
2226	2237
2227		// ~~hh_tms1k~~ snspell.c
	2238	// TI snspell
2228	2239	snspell
2229	2240	snspella
2230	2241	snspellb
r248389	r248390
2237	2248	snread
2238	2249	lantutor
2239	2250
2240		// hh_tms1k ticalc1x.c
2241		tisr16
2242		tisr16ii
2243		ti1270
2244		ti1000
2245		ti30
2246		tiprog
2247		tibusan1
2248		wizatron
2249		lilprof
2250		lilprof78
2251
2252	2251	// hh_ucom4
2253	2252	ufombs // Bambino
2254	2253	ssfball // Bambino
r248389	r248390
2268	2267	tcaveman // Tomy
2269	2268	alnchase // Tomy
2270	2269
2271		// hh_ucom4 derivatives
2272		tb303 // Roland
2273
2274	2270	// other
2275	2271	tama // Bandai
2276	2272	advision // Entex
r248389	r248390
2444	2440	vector4
2445	2441	unistar
2446	2442	dual68
2447		sdk80
2448	2443	sdk85
2449	2444	rpc86
2450	2445	isbc86
r248389	r248390
2589	2584	eacc
2590	2585	argo
2591	2586	applix
2592		fccpu1
2593	2587	68ksbc
2594	2588	lcmate2
2595	2589	cm1800

trunk/src/mame/video/cps1.c
r248389	r248390
151	151	Varth: Operation Thunderstorm (World 920714) 89624B-3 VA24B IOB1 88622-C-5 CPS-B-04 DL-0411-10005 None
152	152	Varth: Operation Thunderstorm (USA 920612) 91635B-2 VA63B BPRG1 IOB1 88622-C-5 CPS-B-04 DL-0411-10005 None
153	153	Varth: Operation Thunderstorm* (Japan 920714) 88622B-3 VA22B LWIO 92641C-1 CPS-B-21 DL-0921-10014 IOC1
154		Varth: Operation Thunderstorm* (Japan Resale Ver. 920714) 91634B-2 VA63B BPRG1 IOB1 92641C-1 CPS-B-21 DL-0921-10014 IOC1
155	154
156	155	Quiz & Dragons: Capcom Quiz Game* (USA 920701) 1992 89625B-1 QD22B IOB1 92641C-1 CPS-B-21 DL-0921-10014 IOC1
157	156	Quiz & Dragons: Capcom Quiz Game (Japan Resale Ver. 940921) 1994 91634B-2 QAD63B BPRG1 IOB1 92631C-6 CPS-B-21 DL-0921-10014 C632 IOC1
r248389	r248390
1537	1536	{"varthr1", CPS_B_04, mapper_VA63B }, /* CPSB test has been patched out (60=0008) register is also written to, possibly leftover from development */ // wrong, this set uses VA24B, dumped but equations still not added
1538	1537	{"varthu", CPS_B_04, mapper_VA63B }, /* CPSB test has been patched out (60=0008) register is also written to, possibly leftover from development */
1539	1538	{"varthj", CPS_B_21_BT5, mapper_VA22B }, /* CPSB test has been patched out (72=0001) register is also written to, possibly leftover from development */
1540		{"varthjr", CPS_B_21_BT5, mapper_VA63B }, /* CPSB test has been patched out (72=0001) register is also written to, possibly leftover from development */
1541	1539	{"cworld2j", CPS_B_21_BT6, mapper_Q522B, 0x36, 0, 0x34 }, /* (ports 36, 34 probably leftover input code from another game) */
1542	1540	{"cworld2ja", CPS_B_21_DEF, mapper_Q522B }, // patched set, no battery, could be desuicided // wrong, this set uses Q529B, still not dumped
1543	1541	{"cworld2jb", CPS_B_21_BT6, mapper_Q522B, 0x36, 0, 0x34 }, // wrong, this set uses Q563B, still not dumped

trunk/src/mame/video/namcona1.c
r248389	r248390
36	36
37	37	TILE_GET_INFO_MEMBER(namcona1_state::tilemap_get_info0)
38	38	{
39		tilemap_get_info(tileinfo,tile_index,0*0x1000+m_videoram,m_vreg[0xbc/2]&1);
	39	UINT16 *videoram = m_videoram;
	40	tilemap_get_info(tileinfo,tile_index,0*0x1000+videoram,m_vreg[0xbc/2]&1);
40	41	}
41	42
42	43	TILE_GET_INFO_MEMBER(namcona1_state::tilemap_get_info1)
43	44	{
44		tilemap_get_info(tileinfo,tile_index,1*0x1000+m_videoram,m_vreg[0xbc/2]&2);
	45	UINT16 *videoram = m_videoram;
	46	tilemap_get_info(tileinfo,tile_index,1*0x1000+videoram,m_vreg[0xbc/2]&2);
45	47	}
46	48
47	49	TILE_GET_INFO_MEMBER(namcona1_state::tilemap_get_info2)
48	50	{
49		tilemap_get_info(tileinfo,tile_index,2*0x1000+m_videoram,m_vreg[0xbc/2]&4);
	51	UINT16 *videoram = m_videoram;
	52	tilemap_get_info(tileinfo,tile_index,2*0x1000+videoram,m_vreg[0xbc/2]&4);
50	53	}
51	54
52	55	TILE_GET_INFO_MEMBER(namcona1_state::tilemap_get_info3)
53	56	{
54		tilemap_get_info(tileinfo,tile_index,3*0x1000+m_videoram,m_vreg[0xbc/2]&8);
	57	UINT16 *videoram = m_videoram;
	58	tilemap_get_info(tileinfo,tile_index,3*0x1000+videoram,m_vreg[0xbc/2]&8);
55	59	}
56	60
57	61	TILE_GET_INFO_MEMBER(namcona1_state::roz_get_info)
r248389	r248390
78	82
79	83	/*************************************************************************/
80	84
81		WRITE16_MEMBER(namcona1_state::videoram_w)
	85	WRITE16_MEMBER(namcona1_state::namcona1_videoram_w)
82	86	{
83		COMBINE_DATA( &m_videoram[offset] );
	87	UINT16 *videoram = m_videoram;
	88	COMBINE_DATA( &videoram[offset] );
84	89	if( offset<0x8000/2 )
85	90	{
86	91	m_bg_tilemap[offset/0x1000]->mark_tile_dirty(offset&0xfff);
r248389	r248390
89	94	{
90	95	m_bg_tilemap[4]->mark_all_dirty();
91	96	}
92		} /* videoram_w */
	97	} /* namcona1_videoram_w */
93	98
94	99	/*************************************************************************/
95	100
r248389	r248390
108	113	m_palette->set_pen_color(offset+0x1000, r, g, b);
109	114
110	115	m_palette->set_pen_color(offset, pal5bit(data >> 10), pal5bit(data >> 5), pal5bit(data >> 0));
111		}
	116	} /* namcona1_paletteram_w */
112	117
113		WRITE16_MEMBER(namcona1_state::paletteram_w)
	118	WRITE16_MEMBER(namcona1_state::namcona1_paletteram_w)
114	119	{
115	120	COMBINE_DATA( &m_paletteram[offset] );
116	121	if( m_vreg[0x8e/2] )
r248389	r248390
124	129	}
125	130
126	131
127		READ16_MEMBER(namcona1_state::gfxram_r)
	132	READ16_MEMBER(namcona1_state::namcona1_gfxram_r)
128	133	{
129	134	UINT16 type = m_vreg[0x0c/2];
130	135	if( type == 0x03 )
r248389	r248390
140	145	return m_cgram[offset];
141	146	}
142	147	return 0x0000;
143		} /* gfxram_r */
	148	} /* namcona1_gfxram_r */
144	149
145		WRITE16_MEMBER(namcona1_state::gfxram_w)
	150	WRITE16_MEMBER(namcona1_state::namcona1_gfxram_w)
146	151	{
147	152	UINT16 type = m_vreg[0x0c/2];
148	153	UINT16 old_word;
r248389	r248390
169	174	m_gfxdecode->gfx(1)->mark_dirty(offset/0x20);
170	175	}
171	176	}
172		} /* gfxram_w */
	177	} /* namcona1_gfxram_w */
173	178
174	179	void namcona1_state::video_start()
175	180	{
r248389	r248390
185	190	m_shaperam.resize(0x8000);
186	191
187	192	m_gfxdecode->gfx(2)->set_source(&m_shaperam[0]);
188
189		save_item(NAME(m_shaperam));
190		save_item(NAME(m_palette_is_dirty));
191
192		machine().save().register_postload(save_prepost_delegate(FUNC(namcona1_state::postload), this));
193		} /* video_start */
	193	} /* namcona1_vh_start */
194	194
195		void namcona1_state::postload()
196		{
197		for (int i = 0; i < 3; i++)
198		m_gfxdecode->gfx(i)->mark_all_dirty();
199		}
200
201
202	195	/*************************************************************************/
203	196
204	197	void namcona1_state::pdraw_tile(
r248389	r248390
517	510	}
518	511	} /* draw_background */
519	512
520		UINT32 namcona1_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	513	UINT32 namcona1_state::screen_update_namcona1(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
521	514	{
522	515	int which;
523	516	int priority;

trunk/src/mame/video/naughtyb.c
r248389	r248390
64	64	const UINT8 *color_prom = memregion("proms")->base();
65	65	static const int resistances[2] = { 270, 130 };
66	66	double weights[2];
	67	int i;
67	68
68	69	/* compute the color output resistor weights */
69	70	compute_resistor_weights(0, 255, -1.0,
r248389	r248390
71	72	2, resistances, weights, 0, 0,
72	73	0, 0, 0, 0, 0);
73	74
74		for (i~~nt i~~ = 0;i < palette.entries(); i++)
	75	for (i = 0;i < palette.entries(); i++)
75	76	{
76	77	int bit0, bit1;
77	78	int r, g, b;
r248389	r248390
107	108
108	109	/* Naughty Boy has a virtual screen twice as large as the visible screen */
109	110	m_tmpbitmap.allocate(688,288,m_screen->format());
110
111		save_item(NAME(m_cocktail));
112		save_item(NAME(m_palreg));
113		save_item(NAME(m_bankreg));
114	111	}
115	112
116	113
r248389	r248390
186	183
187	184
188	185	***************************************************************************/
189		UINT32 naughtyb_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	186	UINT32 naughtyb_state::screen_update_naughtyb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
190	187	{
191	188	const rectangle scrollvisiblearea(28, 348-1, 08, 288-1);
192	189	const rectangle leftvisiblearea(08, 28-1, 08, 288-1);
193	190	const rectangle rightvisiblearea(348, 368-1, 08, 288-1);
194	191
	192	UINT8 *videoram = m_videoram;
	193	bitmap_ind16 &tmpbitmap = m_tmpbitmap;
	194	int offs;
	195
195	196	// for every character in the Video RAM
196	197
197		for (~~int~~ offs = 0x800 - 1; offs >= 0; offs--)
	198	for (offs = 0x800 - 1; offs >= 0; offs--)
198	199	{
199	200	int sx,sy;
200	201
r248389	r248390
225	226	}
226	227	}
227	228
228		m_gfxdecode->gfx(0)->opaque(m_tmpbitmap,m_tmpbitmap.cliprect(),
	229	m_gfxdecode->gfx(0)->opaque(tmpbitmap,tmpbitmap.cliprect(),
229	230	m_videoram2[offs] + 256 * m_bankreg,
230	231	(m_videoram2[offs] >> 5) + 8 * m_palreg,
231	232	m_cocktail,m_cocktail,
232	233	8sx,8sy);
233	234
234		m_gfxdecode->gfx(1)->transpen(m_tmpbitmap,m_tmpbitmap.cliprect(),
235		m_videoram[offs] + 256*m_bankreg,
236		(m_videoram[offs] >> 5) + 8 * m_palreg,
	235	m_gfxdecode->gfx(1)->transpen(tmpbitmap,tmpbitmap.cliprect(),
	236	videoram[offs] + 256*m_bankreg,
	237	(videoram[offs] >> 5) + 8 * m_palreg,
237	238	m_cocktail,m_cocktail,
238	239	8sx,8sy,0);
239	240	}
r248389	r248390
242	243	{
243	244	int scrollx;
244	245
245		copybitmap(bitmap,m_tmpbitmap,0,0,-66*8,0,leftvisiblearea);
246		copybitmap(bitmap,m_tmpbitmap,0,0,-30*8,0,rightvisiblearea);
	246	copybitmap(bitmap,tmpbitmap,0,0,-66*8,0,leftvisiblearea);
	247	copybitmap(bitmap,tmpbitmap,0,0,-30*8,0,rightvisiblearea);
247	248
248	249	scrollx = ( m_cocktail ) ? m_scrollreg - 239 : -m_scrollreg + 16;
249		copyscrollbitmap(bitmap,m_tmpbitmap,1,&scrollx,0,0,scrollvisiblearea);
	250	copyscrollbitmap(bitmap,tmpbitmap,1,&scrollx,0,0,scrollvisiblearea);
250	251	}
251	252	return 0;
252	253	}

trunk/src/mame/video/poolshrk.c
r248389	r248390
27	27	}
28	28
29	29
30		UINT32 poolshrk_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	30	UINT32 poolshrk_state::screen_update_poolshrk(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
31	31	{
	32	int i;
	33
32	34	m_bg_tilemap->mark_all_dirty();
33	35
34	36	bitmap.fill(0, cliprect);
35	37
36	38	/* draw sprites */
37	39
38		for (i~~nt i~~ = 0; i < 16; i++)
	40	for (i = 0; i < 16; i++)
39	41	{
40	42	int hpos = m_hpos_ram[i];
41	43	int vpos = m_vpos_ram[i];

trunk/src/mess/drivers/advision.c
r248389	r248390
78	78	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
79	79	MCFG_SCREEN_UPDATE_DRIVER(advision_state, screen_update)
80	80	MCFG_SCREEN_SIZE(320, 200)
81		MCFG_SCREEN_VISIBLE_AREA(84, 235, 60, 142)
	81	MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 200-1)
82	82	MCFG_SCREEN_PALETTE("palette")
83	83	MCFG_PALETTE_ADD("palette", 8)
84	84	MCFG_PALETTE_INIT_OWNER(advision_state, advision)

trunk/src/mess/drivers/force68k.c
r248389	r248390
1		// license:BSD-3-Clause
2		// copyright-holders:Joakim Larsson Edström
3		/***************************************************************************
4
5		Force SYS68K CPU-1/CPU-6 VME SBC drivers, initially based on the 68ksbc.c
6
7		13/06/2015
8
9		The info found on the links below is for a later revisions of the board I have
10		but I hope it is somewhat compatible so I can get it up and running at least.
11		My CPU-1 board has proms from 1983 and no rev markings so probably the original.
12
13		http://bitsavers.trailing-edge.com/pdf/forceComputers/1988_Force_VMEbus_Products.pdf
14		http://www.artisantg.com/info/P_wUovN.pdf
15
16		Some info from those documents:
17
18		Address Map
19		----------------------------------------------------------
20		Address Range Description
21		----------------------------------------------------------
22		000 000 - 000 007 Initialisation vectors from system EPROM
23		000 008 - 01F FFF Dynamic RAM on CPU-1 B
24		000 008 - 07F FFF Dynamic RAM on CPU-1 D
25		080 008 - 09F FFF SYSTEM EPROM Area
26		OAO 000 - OBF FFF USER EPROMArea
27		0C0 041 - 0C0 043 ACIA (P3) Host
28		0C0 080 - 0C0 082 ACIA (P4) Terminal
29		0C0 101 - 0C0 103 ACIA (P5) Remote device (eg serial printer)
30		0C0 401 - 0C0 42F RTC
31		OEO 001 - 0E0 035 PI/T (eg centronics printer)
32		OEO 200 - 0E0 2FF FPU
33		OEO 300 - 0E0 300 Reset Off
34		OEO 380 - 0E0 380 Reset On
35		100 000 - FEF FFF VMEbus addresses (A24)
36		FFO 000 - FFF FFF VMEbus Short I/O (A16)
37		----------------------------------------------------------
38
39		Interrupt sources
40		----------------------------------------------------------
41		Description Device Lvl IRQ VME board
42		/Board Vector Address
43		----------------------------------------------------------
44		On board Sources
45		ABORT Switch 7 31
46		Real Time Clock (RTC) 58167A 6 30
47		Parallel/Timer (PI/T) 68230 5 29
48		Terminal ACIA 6850 4 28
49		Remote ACIA 6850 3 27
50		Host ACIA 6850 2 26
51		ACFAIL, SYSFAIL VME 5 29
52		Off board Sources (other VME boards)
53		6 Port Serial I/O board SIO 4 64-75 0xb00000
54		8 Port Serial I/O board ISIO 4 76-83 0x960000
55		Disk Controller WFC 3 119 0xb01000
56		SCSI Controller ISCSI 4 119 0xa00000
57		Slot 1 Controller Board ASCU 7 31 0xb02000
58		----------------------------------------------------------
59
60		10. The VMEbus
61		---------------
62		The implemented VMEbus Interface includes 24 address, 16 data,
63		6 address modifier and the asynchronous control signals.
64		A single level bus arbiter is provided to build multi master
65		systems. In addition to the bus arbiter, a separate slave bus
66		arbitration allows selection of the arbitration level (0-3).
67
68		The address modifier range .,Short 110 Access« can be selected
69		via a jumper for variable system generation. The 7 interrupt
70		request levels of the VMEbus are fully supported from the
71		SYS68K1CPU-1 B/D. For multi-processing, each IRQ signal can be
72		enabled/disabled via a jumper field.
73
74		Additionally, the SYS68K1CPU-1 B/D supports the ACFAIL, SYSRESET,
75		SYSFAIL and SYSCLK signal (16 MHz).
76
77
78		TODO:
79		- Finish 2 x ACIA6850, host and remote interface left, terminal works
80		- Finish 1 x 68230 Motorola, Parallel Interface / Timer
81		- Connect Port B to a Centronics printer interface
82		- Add 1 x Abort Switch
83		- Add configurable serial connector between ACIA:s and
84		- Real terminal emulator, ie rs232 "socket"
85		- Debug console
86		- Add VME bus driver
87
88		****************************************************************************/
89
90		#include "emu.h"
91		#include "bus/rs232/rs232.h"
92		#include "cpu/m68000/m68000.h"
93		#include "machine/mm58167.h"
94		#include "machine/68230pit.h"
95		#include "machine/6850acia.h"
96		#include "machine/clock.h"
97
98		#define BAUDGEN_CLOCK XTAL_1_8432MHz
99		/*
100		The baudrate on the Force68k CPU-1 to CPU-6 is generated by a
101		Motorola 14411 bitrate generator, the CPU-6 documents matches the circuits
102		that I could find on the CPU-1 board. Here how I calculated the clock for
103		the factory settings. No need to add selectors until terminal.c supports
104		configurable baudrates. Fortunality CPU-1 was shipped with 9600N8!
105
106		From the documents:
107
108		3 RS232C interfaces, strap selectable baud rate from 110-9600 or 600-19200 baud
109
110		Default Jumper Settings of B7:
111		--------------------------------
112		GND 10 - 11 RSA input on 14411
113		F1 on 14411 1 - 20 Baud selector of the terminal port
114		F1 on 14411 3 - 18 Baud selector of the host port
115		F1 on 14411 5 - 16 Baud selector of the remote port
116
117		The RSB input on the 14411 is kept high always so RSA=0, RSB=1 and a 1.8432MHz crystal
118		generates 153600 on the F1 output pin which by default strapping is connected to all
119		three 6850 acias on the board. These can be strapped separatelly to speedup downloads.
120
121		The selectable outputs from 14411, F1-F16:
122		X16 RSA=0,RSB=1: 153600, 115200, 76800, 57600, 38400, 28800, 19200, 9600, 4800, 3200, 2153.3, 1758.8, 1200, 921600, 1843000
123		X64 RSA=1,RSB=1: 614400, 460800, 307200, 230400, 153600, 115200, 76800, 57600, 38400, 28800, 19200, 9600, 4800, 921600, 1843000
124
125		However, the datasheet says baudrate is strapable for 110-9600 but the output is 153600
126		so the system rom MUST setup the acia to divide by 16 to generate the correct baudrate.
127
128		*/
129		#define ACIA_CLOCK (BAUDGEN_CLOCK / 12)
130
131		class force68k_state : public driver_device
132		{
133		public:
134		force68k_state(const machine_config &mconfig, device_type type, const char *tag) :
135		driver_device(mconfig, type, tag),
136		// m_rtc(*this, "rtc")
137		m_maincpu(*this, "maincpu"),
138		m_rtc(*this, "rtc"),
139		m_pit(*this, "pit"),
140		m_aciahost(*this, "aciahost"),
141		m_aciaterm(*this, "aciaterm"),
142		m_aciaremt(*this, "aciaremt")
143		{
144		}
145
146		DECLARE_READ16_MEMBER(bootvect_r);
147		virtual void machine_start();
148		DECLARE_WRITE_LINE_MEMBER(write_aciahost_clock);
149		DECLARE_WRITE_LINE_MEMBER(write_aciaterm_clock);
150		DECLARE_WRITE_LINE_MEMBER(write_aciaremt_clock);
151
152		private:
153		required_device<cpu_device> m_maincpu;
154		required_device<mm58167_device> m_rtc;
155		required_device<pit68230_device> m_pit;
156		required_device<acia6850_device> m_aciahost;
157		required_device<acia6850_device> m_aciaterm;
158		required_device<acia6850_device> m_aciaremt;
159
160		// Pointer to System ROMs needed by bootvect_r
161		UINT16 *m_sysrom;
162		};
163
164		static ADDRESS_MAP_START(force68k_mem, AS_PROGRAM, 16, force68k_state)
165		ADDRESS_MAP_UNMAP_HIGH
166		AM_RANGE(0x000000, 0x000007) AM_ROM AM_READ(bootvect_r) /* Vectors mapped from System EPROM */
167		AM_RANGE(0x000008, 0x01ffff) AM_RAM /* DRAM */
168		AM_RANGE(0x080000, 0x09ffff) AM_ROM /* System EPROM Area */
169		// AM_RANGE(0x0a0000, 0x0bffff) AM_ROM /* User EPROM Area */
170		AM_RANGE(0x0c0040, 0x0c0041) AM_DEVREADWRITE8("aciahost", acia6850_device, status_r, control_w, 0x00ff)
171		AM_RANGE(0x0c0042, 0x0c0043) AM_DEVREADWRITE8("aciahost", acia6850_device, data_r, data_w, 0x00ff)
172		AM_RANGE(0x0c0080, 0x0c0081) AM_DEVREADWRITE8("aciaterm", acia6850_device, status_r, control_w, 0xff00)
173		AM_RANGE(0x0c0082, 0x0c0083) AM_DEVREADWRITE8("aciaterm", acia6850_device, data_r, data_w, 0xff00)
174		AM_RANGE(0x0c0100, 0x0c0101) AM_DEVREADWRITE8("aciaremt", acia6850_device, status_r, control_w, 0x00ff)
175		AM_RANGE(0x0c0102, 0x0c0103) AM_DEVREADWRITE8("aciaremt", acia6850_device, data_r, data_w, 0x00ff)
176		AM_RANGE(0x0c0400, 0x0c042f) AM_DEVREADWRITE8("rtc", mm58167_device, read, write, 0x00ff)
177		AM_RANGE(0x0e0000, 0x0e0035) AM_DEVREADWRITE8("pit", pit68230_device, data_r, data_w, 0x00ff)
178		// AM_RANGE(0x0e0200, 0x0e0380) AM_READWRITE(fpu_r, fpu_w) /* optional FPCP 68881 FPU interface */
179		// AM_RANGE(0x100000, 0xfeffff) /* VMEbus Rev B addresses (24 bits) */
180		// AM_RANGE(0xff0000, 0xffffff) /* VMEbus Rev B addresses (16 bits) */
181		ADDRESS_MAP_END
182
183		/* Input ports */
184		static INPUT_PORTS_START( force68k )
185		INPUT_PORTS_END
186
187		void force68k_state::machine_start()
188		{
189		m_sysrom = (UINT16*)(memregion("maincpu")->base() + 0x080000);
190		}
191
192		READ16_MEMBER(force68k_state::bootvect_r)
193		{
194		return m_sysrom[offset];
195		}
196
197		WRITE_LINE_MEMBER(force68k_state::write_aciahost_clock)
198		{
199		m_aciahost->write_txc(state);
200		m_aciahost->write_rxc(state);
201		}
202
203		WRITE_LINE_MEMBER(force68k_state::write_aciaterm_clock)
204		{
205		m_aciaterm->write_txc(state);
206		m_aciaterm->write_rxc(state);
207		}
208
209		WRITE_LINE_MEMBER(force68k_state::write_aciaremt_clock)
210		{
211		m_aciaremt->write_txc(state);
212		m_aciaremt->write_rxc(state);
213		}
214
215		static MACHINE_CONFIG_START( fccpu1, force68k_state )
216		/* basic machine hardware */
217		MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz / 2)
218		MCFG_CPU_PROGRAM_MAP(force68k_mem)
219
220		/* P3/Host Port config */
221		MCFG_DEVICE_ADD("aciahost", ACIA6850, 0)
222		MCFG_DEVICE_ADD("aciahost_clock", CLOCK, ACIA_CLOCK)
223		MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(force68k_state, write_aciahost_clock))
224
225		/* P4/Terminal Port config */
226		MCFG_DEVICE_ADD("aciaterm", ACIA6850, 0)
227
228		MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("rs232trm", rs232_port_device, write_txd))
229		MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("rs232trm", rs232_port_device, write_rts))
230
231		MCFG_RS232_PORT_ADD("rs232trm", default_rs232_devices, "terminal")
232		MCFG_RS232_RXD_HANDLER(DEVWRITELINE("aciaterm", acia6850_device, write_rxd))
233		MCFG_RS232_CTS_HANDLER(DEVWRITELINE("aciaterm", acia6850_device, write_cts))
234
235		MCFG_DEVICE_ADD("aciaterm_clock", CLOCK, ACIA_CLOCK)
236		MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(force68k_state, write_aciaterm_clock))
237
238		/* P5/Remote Port config */
239		MCFG_DEVICE_ADD("aciaremt", ACIA6850, 0)
240
241		#define PRINTER 0
242		#if PRINTER
243		MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("rs232rmt", rs232_port_device, write_txd))
244		MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("rs232rmt", rs232_port_device, write_rts))
245
246		MCFG_RS232_PORT_ADD("rs232rmt", default_rs232_devices, "printer")
247		MCFG_RS232_RXD_HANDLER(DEVWRITELINE("aciaremt", acia6850_device, write_rxd))
248		MCFG_RS232_CTS_HANDLER(DEVWRITELINE("aciaremt", acia6850_device, write_cts))
249		#endif
250
251		MCFG_DEVICE_ADD("aciaremt_clock", CLOCK, ACIA_CLOCK)
252		MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(force68k_state, write_aciaterm_clock))
253
254		/* RTC Real Time Clock device */
255		MCFG_DEVICE_ADD("rtc", MM58167, XTAL_32_768kHz)
256
257		/* PIT Parallel Interface and Timer device, assuming strapped for on board clock */
258		MCFG_DEVICE_ADD("pit", PIT68230, XTAL_16MHz / 2)
259
260		MACHINE_CONFIG_END
261
262		#if 0
263
264		static MACHINE_CONFIG_START( fccpu6, force68k_state )
265		MCFG_CPU_ADD("maincpu", M68000, XTAL_8MHz) /* Jumper B10 Mode B */
266		MCFG_CPU_PROGRAM_MAP(force68k_mem)
267		MACHINE_CONFIG_END
268
269		static MACHINE_CONFIG_START( fccpu6a, force68k_state )
270		MCFG_CPU_ADD("maincpu", M68000, XTAL_12_5MHz) /* Jumper B10 Mode A */
271		MCFG_CPU_PROGRAM_MAP(force68k_mem)
272		MACHINE_CONFIG_END
273
274		static MACHINE_CONFIG_START( fccpu6v, force68k_state )
275		MCFG_CPU_ADD("maincpu", M68010, XTAL_8MHz) /* Jumper B10 Mode B */
276		MCFG_CPU_PROGRAM_MAP(force68k_mem)
277		MACHINE_CONFIG_END
278
279		static MACHINE_CONFIG_START( fccpu6va, force68k_state )
280		MCFG_CPU_ADD("maincpu", M68010, XTAL_12_5MHz) /* Jumper B10 Mode A */
281		MCFG_CPU_PROGRAM_MAP(force68k_mem)
282		MACHINE_CONFIG_END
283
284		static MACHINE_CONFIG_START( fccpu6vb, force68k_state )
285		MCFG_CPU_ADD("maincpu", M68010, XTAL_12_5MHz) /* Jumper B10 Mode A */
286		MCFG_CPU_PROGRAM_MAP(force68k_mem)
287		MACHINE_CONFIG_END
288		#endif
289
290		/* ROM definitions */
291		ROM_START( fccpu1 )
292		ROM_REGION(0x1000000, "maincpu", 0)
293
294		ROM_LOAD16_BYTE( "fccpu1V1.0L.j8.bin", 0x080001, 0x2000, CRC(3ac6f08f) SHA1(502f6547b508d8732bd68bbbb2402d8c30fefc3b) )
295		ROM_LOAD16_BYTE( "fccpu1V1.0L.j9.bin", 0x080000, 0x2000, CRC(035315fb) SHA1(90dc44d9c25d28428233e6846da6edce2d69e440) )
296		/* COMMAND SUMMARY DESCRIPTION (From CPU-1B datasheet, ROMs were dumped
297		from a CPU-1 board so some features might be missing or different)
298		---------------------------------------------------------------------------
299		BF <address1> <address2> <data> <CR> Block Fill memory - from addr1 through addr2 with data
300		BM <address1> <address2> <address 3> <CR> Block Move - move from addr1 through addr2to addr3
301		BR [<address> [; <count>] ... ] <CR> Set/display Breakpoint
302		BS <address1> <address2> <data> <CR> Block Search - search addr1 through addr2 for data
303		BT <address1> <address2> <CR> Block Test of memory
304		DC <expression> <CR> Data Conversion
305		DF <CR> Display Formatted registers
306		DU [n] <address1> <address2>[<string>] <CR> Dump memory to object file
307		GO [<address] <CR> Execute program
308		GD [<address] <CR> Go Direct
309		GT <address> <CR> Exec prog: temporary breakpoint
310		HE<CR> Help; display monitor commands
311		LO [n] [;<options] <CR> Load Object file
312		MD <address> [<count» <CR> Memory Display
313		MM <address> [<data» [;<options» <CR> Memory Modify
314		MS <address> <data1 > <data2> < ... <CR> Memory Set - starting at addr with data 1. data 2 ...
315		NOBR [<address> ... ] <CR> Remove Breakpoint
316		NOPA <CR> Printer Detach (Centronics on PIT/P2)
317		OF <CR> Offset
318		PA <CR> Printer Attach (Centronics on PIT/P2)
319		PF[n] <CR> Set/display Port Format
320		RM <CR> Register Modify
321		TM [<exit character» <CR> Transparent Mode
322		TR [<count] <CR> Trace
323		TT <address> <CR> Trace: temporary breakpoint
324		VE [n] [<string] <CR> Verify memory/object file
325		----------------------------------------------------------------------------
326		.AO - .A7 [<expression] <CR> Display/set address register
327		.00 - .07 [<expression] <CR> Display/set data register
328		.RO - .R6 [<expression] <CR> Display/set offset register
329		.PC [<expression] <CR> Display/set program counter
330		.SR [<expression] <CR> Display/set status register
331		.SS [<expression] <CR> Display/set supervisor stack
332		.US [<expression] <CR> Display/set user stack
333		----------------------------------------------------------------------------
334		MD <address> [<count>]; D1 <CR> Disassemble memory location
335		MM <address>; DI <CR> Disassemble/Assemble memory location
336		----------------------------------------------------------------------------
337		*/
338		ROM_END
339
340		#if 0
341		ROM_START( fccpu6 )
342		ROM_REGION(0x1000000, "maincpu", 0)
343		ROM_END
344
345		ROM_START( fccpu6a )
346		ROM_REGION(0x1000000, "maincpu", 0)
347		ROM_END
348
349		ROM_START( fccpu6v )
350		ROM_REGION(0x1000000, "maincpu", 0)
351		ROM_END
352
353		ROM_START( fccpu6va )
354		ROM_REGION(0x1000000, "maincpu", 0)
355		ROM_END
356
357		ROM_START( fccpu6vb )
358		ROM_REGION(0x1000000, "maincpu", 0)
359		ROM_END
360		#endif
361
362		/* Driver */
363		/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
364		COMP( 1983, fccpu1, 0, 0, fccpu1, force68k, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-1", GAME_NO_SOUND_HW \| GAME_TYPE_COMPUTER )
365		//COMP( 1989, fccpu6, 0, 0, fccpu6, force68k, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-6", GAME_IS_SKELETON )
366		//COMP( 1989, fccpu6a, 0, 0, fccpu6a, force68k, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-6a", GAME_IS_SKELETON )
367		//COMP( 1989, fccpu6v, 0, 0, fccpu6v, force68k, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-6v", GAME_IS_SKELETON )
368		//COMP( 1989, fccpu6va, 0, 0, fccpu6va, force68k, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-6va", GAME_IS_SKELETON )
369		//COMP( 1989, fccpu6vb, 0, 0, fccpu6vb, force68k, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-6vb", GAME_IS_SKELETON )

trunk/src/mess/drivers/hh_hmcs40.c
r248389	r248390
1580	1580	{
1581	1581	// 2-player switch directly enables plate 14
1582	1582	m_plate = (m_plate & 0x3fff) \| (newval ? 0 : 0x4000);
1583		prepare_display();
1584	1583	}
1585	1584
1586	1585

trunk/src/mess/drivers/hh_tms1k.c
r248389	r248390
40	40	MP3403 TMS1100 1978, Marx Electronic Bowling -> elecbowl.c
41	41	@MP3404 TMS1100 1978, Parker Brothers Merlin
42	42	@MP3405 TMS1100 1979, Coleco Amaze-A-Tron
43		*MP3415 TMS1100 1978, Coleco Electronic Quarterback
44	43	@MP3438A TMS1100 1979, Kenner Star Wars Electronic Battle Command
45	44	MP3450A TMS1100 1979, MicroVision cartridge: Blockbuster
46	45	MP3454 TMS1100 1979, MicroVision cartridge: Star Trek Phaser Strike

trunk/src/mess/drivers/hh_ucom4.c
r248389	r248390
47	47	*060 uPD650C 1979, Mattel Computer Gin
48	48	*085 uPD650C 1980, Roland TR-808
49	49	*127 uPD650C 198?, Sony OA-S1100 Typecorder (subcpu, have dump)
50		*128 uPD650C 1981, Roland TR-606
	50	*128 uPD650C 1982, Roland TR-606
51	51	133 uPD650C 1982, Roland TB-303 -> tb303.c
52	52
53	53	(* denotes not yet emulated by MESS, @ denotes it's in this driver)
54	54
55	55	***************************************************************************/
56	56
57		#include "includes/hh_ucom4.h"
	57	#include "emu.h"
	58	#include "cpu/ucom4/ucom4.h"
	59	#include "sound/speaker.h"
58	60
59	61	// internal artwork
60	62	#include "efball.lh"
r248389	r248390
63	65	#include "hh_ucom4_test.lh" // common test-layout - use external artwork
64	66
65	67
	68	class hh_ucom4_state : public driver_device
	69	{
	70	public:
	71	hh_ucom4_state(const machine_config &mconfig, device_type type, const char *tag)
	72	: driver_device(mconfig, type, tag),
	73	m_maincpu(*this, "maincpu"),
	74	m_inp_matrix(*this, "IN"),
	75	m_speaker(*this, "speaker"),
	76	m_display_wait(33),
	77	m_display_maxy(1),
	78	m_display_maxx(0)
	79	{ }
	80
	81	// devices
	82	required_device<cpu_device> m_maincpu;
	83	optional_ioport_array<5> m_inp_matrix; // max 5
	84	optional_device<speaker_sound_device> m_speaker;
	85
	86	// misc common
	87	UINT8 m_port[9]; // MCU port A-I write data (optional)
	88	UINT16 m_inp_mux; // multiplexed inputs mask
	89
	90	UINT8 read_inputs(int columns);
	91
	92	// display common
	93	int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
	94	int m_display_maxy; // display matrix number of rows
	95	int m_display_maxx; // display matrix number of columns (max 31 for now)
	96
	97	UINT32 m_grid; // VFD current row data
	98	UINT32 m_plate; // VFD current column data
	99
	100	UINT32 m_display_state[0x20]; // display matrix rows data (last bit is used for always-on)
	101	UINT16 m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments
	102	UINT32 m_display_cache[0x20]; // (internal use)
	103	UINT8 m_display_decay[0x20][0x20]; // (internal use)
	104
	105	TIMER_DEVICE_CALLBACK_MEMBER(display_decay_tick);
	106	void display_update();
	107	void set_display_size(int maxx, int maxy);
	108	void display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety);
	109
	110	protected:
	111	virtual void machine_start();
	112	virtual void machine_reset();
	113	};
	114
	115
66	116	// machine start/reset
67	117
68	118	void hh_ucom4_state::machine_start()

trunk/src/mess/drivers/monty.c
r248389	r248390
19	19	by adding chips and wires to the inside of the game.
20	20
21	21	TODO:
22		- ~~Need i~~nstructions
	22	- Input from the keyboard
23	23	- Proper SED1503F emulation (it's simulated in-driver for now)
24		- After each keypress it hits a HALT instruction. I guess the controller's
25		sync pin is involved somehow.
26		- When it wants tiles, put 64 into FD1B (monty), 7D1B (mmonty) and press
27		Enter.
28	24
29	25	****************************************************************************/
30	26
31	27	#include "emu.h"
32	28	#include "cpu/z80/z80.h"
33	29	#include "video/sed1520.h"
34		#include "sound/speaker.h"
35	30
36	31
37	32	class monty_state : public driver_device
r248389	r248390
40	35	monty_state(const machine_config &mconfig, device_type type, const char *tag)
41	36	: driver_device(mconfig, type, tag)
42	37	, m_maincpu(*this, "maincpu")
43		, m_speaker(*this, "speaker")
44	38	, m_sed0(*this, "sed1520_0")
45	39	, m_writeUpper(false)
46	40	{
r248389	r248390
48	42	m_pixels[i] = 0xff000000;
49	43	}
50	44
51		DECLARE_WRITE8_MEMBER(sound_w);
52		DECLARE_WRITE8_MEMBER(ioDisplayWrite_w);
53		DECLARE_WRITE8_MEMBER(ioCommandWrite0_w);
54		DECLARE_WRITE8_MEMBER(ioCommandWrite1_w);
	45	DECLARE_READ8_MEMBER(ioInputRead);
55	46
	47	DECLARE_WRITE8_MEMBER(ioDisplayWrite);
	48	DECLARE_WRITE8_MEMBER(ioCommandWrite0);
	49	DECLARE_WRITE8_MEMBER(ioCommandWrite1);
	50
56	51	// screen updates
57	52	UINT32 lcd_update(screen_device& screen, bitmap_rgb32& bitmap, const rectangle& cliprect);
58	53
59	54	private:
60	55	required_device<cpu_device> m_maincpu;
61		required_device<speaker_sound_device> m_speaker;
62	56	required_device<sed1520_device> m_sed0; // TODO: This isn't actually a SED1520, it's a SED1503F
63	57	//required_device<sed1520_device> m_sed1; // TODO: Also, there are 2 SED1503Fs on the board - one is flipped upside down
64	58
65	59	// Test
66	60	UINT8 m_writeUpper;
67	61	UINT32 m_pixels[42*32];
68		bool m_sound_sw;
69		bool m_dirty;
70	62	};
71	63
72	64
73		static ADDRESS_MAP_START( monty_mem, AS_PROGRAM, 8, monty_state )
74		AM_RANGE(0x0000, 0xbfff) AM_ROM
	65	static ADDRESS_MAP_START(monty_mem, AS_PROGRAM, 8, monty_state)
	66	AM_RANGE(0x0000, 0x3fff) AM_ROM
75	67	//AM_RANGE(0x4000, 0x4000) // The main rom checks to see if another program is here on startup
76	68	AM_RANGE(0xf800, 0xffff) AM_RAM
77	69	ADDRESS_MAP_END
78	70
79		static ADDRESS_MAP_START( mmonty_mem, AS_PROGRAM, 8, monty_state )
80		AM_RANGE(0x0000, 0x3fff) AM_ROM
81		//AM_RANGE(0xc000, 0xc000) // The main rom checks to see if another program is here on startup
82		AM_RANGE(0x8000, 0xffff) AM_ROM
83		AM_RANGE(0x7800, 0x7fff) AM_RAM
84		ADDRESS_MAP_END
85	71
86
87		static ADDRESS_MAP_START( monty_io, AS_IO, 8, monty_state )
	72	static ADDRESS_MAP_START(monty_io, AS_IO, 8, monty_state)
88	73	ADDRESS_MAP_GLOBAL_MASK(0xff)
89		AM_RANGE(0x00, 0x00) AM_WRITE(ioCommandWrite0_w)
90		AM_RANGE(0x01, 0x01) AM_WRITE(sound_w)
91		AM_RANGE(0x02, 0x02) AM_WRITE(ioCommandWrite1_w)
92		AM_RANGE(0x80, 0xff) AM_WRITE(ioDisplayWrite_w)
	74	AM_RANGE(0x00, 0x00) AM_WRITE(ioCommandWrite0)
	75	AM_RANGE(0x02, 0x02) AM_WRITE(ioCommandWrite1)
	76	AM_RANGE(0x80, 0xff) AM_WRITE(ioDisplayWrite)
93	77
94	78	// 7 reads from a bit shifted IO port
95		AM_RANGE(0x01, 0x01) AM_READ_PORT("X1")
96		AM_RANGE(0x02, 0x02) AM_READ_PORT("X2")
97		AM_RANGE(0x04, 0x04) AM_READ_PORT("X3")
98		AM_RANGE(0x08, 0x08) AM_READ_PORT("X4")
99		AM_RANGE(0x10, 0x10) AM_READ_PORT("X5")
100		AM_RANGE(0x20, 0x20) AM_READ_PORT("X6")
101		AM_RANGE(0x40, 0x40) AM_READ_PORT("X7")
	79	AM_RANGE(0x01, 0x01) AM_READ(ioInputRead)
	80	AM_RANGE(0x02, 0x02) AM_READ(ioInputRead)
	81	AM_RANGE(0x04, 0x04) AM_READ(ioInputRead)
	82	AM_RANGE(0x08, 0x08) AM_READ(ioInputRead)
	83	AM_RANGE(0x10, 0x10) AM_READ(ioInputRead)
	84	AM_RANGE(0x20, 0x20) AM_READ(ioInputRead)
	85	AM_RANGE(0x40, 0x40) AM_READ(ioInputRead)
102	86	ADDRESS_MAP_END
103	87
104	88
105	89	// Input ports
106	90	static INPUT_PORTS_START( monty )
107		PORT_START("X1")
108		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
109		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
110		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
111		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("-") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-')
112		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) PORT_CHAR('Z')
113		PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED )
114
115		PORT_START("X2")
116		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) PORT_CHAR('Y')
117		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('X')
118		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("W") PORT_CODE(KEYCODE_W) PORT_CHAR('W')
119		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("V") PORT_CODE(KEYCODE_V) PORT_CHAR('V')
120		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("U") PORT_CODE(KEYCODE_U) PORT_CHAR('U')
121		PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED )
122
123		PORT_START("X3")
124		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("T") PORT_CODE(KEYCODE_T) PORT_CHAR('T')
125		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("S") PORT_CODE(KEYCODE_S) PORT_CHAR('S')
126		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('R')
127		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Q") PORT_CODE(KEYCODE_Q) PORT_CHAR('Q')
128		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_CHAR('P')
129		PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED )
130
131		PORT_START("X4")
132		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("O") PORT_CODE(KEYCODE_O) PORT_CHAR('O')
133		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("N") PORT_CODE(KEYCODE_N) PORT_CHAR('N')
134		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("M") PORT_CODE(KEYCODE_M) PORT_CHAR('M')
135		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("L") PORT_CODE(KEYCODE_L) PORT_CHAR('L')
136		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("K") PORT_CODE(KEYCODE_K) PORT_CHAR('K')
137		PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED )
138
139		PORT_START("X5")
140		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("J") PORT_CODE(KEYCODE_J) PORT_CHAR('J')
141		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("I") PORT_CODE(KEYCODE_I) PORT_CHAR('I')
142		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("H") PORT_CODE(KEYCODE_H) PORT_CHAR('H')
143		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("G") PORT_CODE(KEYCODE_G) PORT_CHAR('G')
144		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
145		PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED )
146
147		PORT_START("X6")
148		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E')
149		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
150		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C')
151		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B')
152		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
153		PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED )
154
155		PORT_START("X7")
156		PORT_BIT( 0xFF, IP_ACTIVE_LOW, IPT_UNUSED )
157	91	INPUT_PORTS_END
158	92
159	93
160		WRITE8_MEMBER( monty_state::sound_w )
	94	READ8_MEMBER( monty_state::ioInputRead )
161	95	{
162		m_sound_sw ^= 1;
163		m_speaker->level_w(m_sound_sw);
	96	//UINT8 foo; // = machine().rand() & 0xff;
	97	//if (m_maincpu->pc() == 0x135f)
	98	// foo = 0x14;
	99	//if (m_maincpu->pc() == 0x1371)
	100	// foo = 0x1f;
	101
	102	UINT8 foo = (machine().rand() & 0xff) \| 0x14;
	103
	104	//printf("(%04x) %02x %02x\n", m_maincpu->pc(), foo, (foo & 0x14));
	105	return foo;
164	106	}
165	107
166	108
167		WRITE8_MEMBER( monty_state::ioCommandWrite0_w )
	109	WRITE8_MEMBER( monty_state::ioCommandWrite0 )
168	110	{
169	111	//printf("(%04x) Command Port 0 write : %02x\n", m_maincpu->pc(), data);
170	112	m_writeUpper = false;
171	113	}
172	114
173	115
174		WRITE8_MEMBER( monty_state::ioCommandWrite1_w )
	116	WRITE8_MEMBER( monty_state::ioCommandWrite1 )
175	117	{
176	118	//if (data == 0xfe)
177	119	// printf("---\n");
r248389	r248390
181	123	}
182	124
183	125
184		WRITE8_MEMBER( monty_state::ioDisplayWrite_w )
	126	WRITE8_MEMBER( monty_state::ioDisplayWrite )
185	127	{
186		m_dirty = true;
187	128	// Offset directly corresponds to sed1503, DD RAM address (offset 0x7f may be special?)
188	129	//printf("(%04x) %02x %02x\n", m_maincpu->pc(), offset, data);
189	130
190		UINT8 x = offset & 0x3f;
191		UINT8 y = (BIT(offset, 6) + (m_writeUpper ? 2 : 0)) << 3;
	131	const UINT8 localUpper = (offset & 0x40) >> 6;
	132	const UINT8 seg = offset & 0x3f;
	133	const UINT8 com = data;
192	134
193	135	// Skip the controller and write straight to the LCD (pc=134f)
194	136	for (int i = 0; i < 8; i++)
195	137	{
	138	// Pixel location
	139	const int upperSedOffset = m_writeUpper ? 8*2 : 0;
	140
	141	const size_t x = seg;
	142	const size_t y = i + (localUpper*8) + upperSedOffset;
	143
196	144	// Pixel color
	145	const bool on = (com >> i) & 0x01;
197	146	if (x < 42)
198		m_pixels[(y*42) + x] = BIT(data, i) ? 0xffffffff : 0xff000000;
199
200		y++;
	147	m_pixels[(y*42) + x] = on ? 0xffffffff : 0xff000000;
201	148	}
202	149	}
203	150
204	151
205	152	UINT32 monty_state::lcd_update(screen_device& screen, bitmap_rgb32& bitmap, const rectangle& cliprect)
206	153	{
207		if (!m_dirty)
208		return 1;
209
210		UINT8 x,y,z;
211		m_dirty = false;
212		for (y = 0; y < 32; y++)
	154	for (int y = 0; y < 32; y++)
213	155	{
214		for (z = 0; z < 8; z++)
	156	for (int x = 0; x < 42; x++)
215	157	{
216		for (x = 0; x < 5; x++)
217		{
218		bitmap.pix32(y, x+z6) = m_pixels[y42 + z*5 + x];
219		}
220		bitmap.pix32(y, 5+z*6) = 0; // space between letters
	158	bitmap.pix32(y, x) = m_pixels[(y*42) + x];
221	159	}
222		bitmap.pix32(y, 48) = m_pixels[y*42 + 40];
223		bitmap.pix32(y, 49) = m_pixels[y*42 + 41];
224	160	}
225	161
226		return 0;
	162	return 0x00;
227	163	}
228	164
229	165
r248389	r248390
245	181	MCFG_SCREEN_ADD("screen", LCD)
246	182	MCFG_SCREEN_REFRESH_RATE(50)
247	183	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // Not accurate
248		MCFG_SCREEN_SIZE(50, 32) // Two SED1503s (42x16 pixels) control the top and bottom halves
249		MCFG_SCREEN_VISIBLE_AREA(0, 50-1, 0, 32-1)
	184	MCFG_SCREEN_SIZE(42, 32) // Two SED1503s (42x16 pixels) control the top and bottom halves
	185	MCFG_SCREEN_VISIBLE_AREA(0, 42-1, 0, 32-1)
250	186	MCFG_SCREEN_UPDATE_DRIVER(monty_state, lcd_update)
251	187
252		/* sound hardware */
253		MCFG_SPEAKER_STANDARD_MONO("mono")
254		MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
255		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
256
257	188	// LCD controller interfaces
258	189	MCFG_SED1520_ADD("sed1520_0", monty_screen_update)
259	190	MACHINE_CONFIG_END
260	191
261		static MACHINE_CONFIG_DERIVED( mmonty, monty )
262		MCFG_CPU_MODIFY( "maincpu" )
263		MCFG_CPU_PROGRAM_MAP(mmonty_mem)
264		MACHINE_CONFIG_END
265	192
266
267	193	// ROM definitions
268	194	ROM_START( monty )
269	195	ROM_REGION(0xc000, "maincpu", 0)
270	196	ROM_LOAD( "monty_main.bin", 0x0000, 0x4000, CRC(720b4f55) SHA1(0106eb88d3fbbf25a745b9b6ee785ba13689d095) ) // 27128
271	197	ROM_LOAD( "monty_module1.bin", 0x4000, 0x4000, CRC(2725d8c3) SHA1(8273b9779c0915f9c7c43ea4fb460f43ce036358) ) // 27128
272	198	ROM_LOAD( "monty_module2.bin", 0x8000, 0x4000, CRC(db672e47) SHA1(bb14fe86df06cfa4b19625ba417d1a5bc8eae155) ) // 27128
273		ROM_FILL(0x1193,1,0) // patch out HALT so we can type in our names
274	199	ROM_END
275	200
276	201	ROM_START( mmonty )
r248389	r248390
278	203	ROM_LOAD( "master_monty_main.bin", 0x0000, 0x8000, CRC(bb5ef4d4) SHA1(ba2c759e429f8740df419f9abb60832eddfba8ab) ) // 27C256
279	204	ROM_LOAD( "monty_module1.bin", 0x8000, 0x4000, CRC(2725d8c3) SHA1(8273b9779c0915f9c7c43ea4fb460f43ce036358) ) // 27128
280	205	ROM_LOAD( "monty_module2.bin", 0xc000, 0x4000, CRC(db672e47) SHA1(bb14fe86df06cfa4b19625ba417d1a5bc8eae155) ) // 27128
281		ROM_FILL(0x1487,1,0) // patch out HALT so we can type in our names
282	206	ROM_END
283	207
284	208
285	209	// Drivers
286	210	// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS
287		COMP( 1980, monty, 0, 0, monty, monty, driver_device, 0, "Ritam", "Monty Plays Scrabble", GAME_NOT_WORKING )
288		COMP( 1982, mmonty, 0, 0, mmonty, monty, driver_device, 0, "Ritam", "Master Monty", GAME_NOT_WORKING )
	211	COMP( 1980, monty, 0, 0, monty, monty, driver_device, 0, "Ritam", "Monty Plays Scrabble", GAME_IS_SKELETON )
	212	COMP( 1980, mmonty, 0, 0, monty, monty, driver_device, 0, "Ritam", "Master Monty", GAME_IS_SKELETON )

trunk/src/mess/drivers/msx.c
r248389	r248390
23	23	**
24	24	** Todo/known issues:
25	25	** - piopx7/piopx7uk/piopxv60: Laserdisc integration doesn't exist
26		** - piopx7: Is this a pal or an ntsc machine?
27	26	** - spc800: Haven't been able to test operation of the han rom yet
28	27	** - svi728: Expansion slot not emulated
29	28	** - svi738: v9938 not emulated
r248389	r248390
80	79	** - cpg120: Remove ports
81	80	** - cpg120: Add V9958
82	81	**
83		** TODO:
84		** - Add T6950 support. T6950 is selectable between pal and ntsc by a pin.
85		**
86		** Possibly missing machines:
87		** - Sanyo MPC-1 (T6950)
88		** - Toshibo HX-51i (T7937)
89		** - Sony HB-101 (TMS9118)
90	82	************************************************************************
91	83
92	84	This following list is probably incomplete. Corrections are welcome.
r248389	r248390
635	627	PORT_DIPNAME( 0x40, 0, "Swap game port 1 and 2")
636	628	PORT_DIPSETTING( 0, DEF_STR( No ) )
637	629	PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
	630	PORT_DIPNAME ( 0x03, 0, "Render resolution")
	631	PORT_DIPSETTING( 0, DEF_STR( High ))
	632	PORT_DIPSETTING( 1, DEF_STR( Low ))
	633	PORT_DIPSETTING( 2, "Auto" )
638	634
639	635	PORT_START("MOUSE0")
640	636	PORT_BIT( 0xff00, 0x00, IPT_TRACKBALL_X) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_PLAYER(1)
r248389	r248390
1399	1395	MACHINE_CONFIG_END
1400	1396
1401	1397
1402		static MACHINE_CONFIG_DERIVED( msx_tms9118, msx )
1403		/* Video hardware */
1404		MCFG_DEVICE_ADD( "tms9928a", TMS9118, XTAL_10_738635MHz / 2 )
1405		MCFG_TMS9928A_VRAM_SIZE(0x4000)
1406		MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(msx_state,msx_irq_source0))
1407		MCFG_TMS9928A_SCREEN_ADD_NTSC( "screen" )
1408		MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update)
1409		MACHINE_CONFIG_END
1410
1411
1412		static MACHINE_CONFIG_DERIVED( msx_tms9128, msx )
1413		/* Video hardware */
1414		MCFG_DEVICE_ADD( "tms9928a", TMS9128, XTAL_10_738635MHz / 2 )
1415		MCFG_TMS9928A_VRAM_SIZE(0x4000)
1416		MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(msx_state,msx_irq_source0))
1417		MCFG_TMS9928A_SCREEN_ADD_NTSC( "screen" )
1418		MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update)
1419		MACHINE_CONFIG_END
1420
1421
1422		static MACHINE_CONFIG_DERIVED( msx_tms9918, msx )
1423		/* Video hardware */
1424		MCFG_DEVICE_ADD( "tms9928a", TMS9918, XTAL_10_738635MHz / 2 )
1425		MCFG_TMS9928A_VRAM_SIZE(0x4000)
1426		MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(msx_state,msx_irq_source0))
1427		MCFG_TMS9928A_SCREEN_ADD_NTSC( "screen" )
1428		MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update)
1429		MACHINE_CONFIG_END
1430
1431
1432		static MACHINE_CONFIG_DERIVED( msx_tms9918a, msx )
1433		/* Video hardware */
1434		MCFG_DEVICE_ADD( "tms9928a", TMS9918A, XTAL_10_738635MHz / 2 )
1435		MCFG_TMS9928A_VRAM_SIZE(0x4000)
1436		MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(msx_state,msx_irq_source0))
1437		MCFG_TMS9928A_SCREEN_ADD_NTSC( "screen" )
1438		MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update)
1439		MACHINE_CONFIG_END
1440
1441
1442		static MACHINE_CONFIG_DERIVED( msx_tms9928, msx )
1443		/* Video hardware */
1444		MCFG_DEVICE_ADD( "tms9928a", TMS9928A, XTAL_10_738635MHz / 2 )
1445		MCFG_TMS9928A_VRAM_SIZE(0x4000)
1446		MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(msx_state,msx_irq_source0))
1447		MCFG_TMS9928A_SCREEN_ADD_NTSC( "screen" )
1448		MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update)
1449		MACHINE_CONFIG_END
1450
1451
1452	1398	static MACHINE_CONFIG_DERIVED( msx_pal, msx )
1453	1399	/* Video hardware */
1454	1400	MCFG_DEVICE_ADD( "tms9928a", TMS9929A, XTAL_10_738635MHz / 2 )
r248389	r248390
1459	1405	MACHINE_CONFIG_END
1460	1406
1461	1407
1462		static MACHINE_CONFIG_DERIVED( msx_tms9129, msx )
1463		/* Video hardware */
1464		MCFG_DEVICE_ADD( "tms9928a", TMS9129, XTAL_10_738635MHz / 2 )
1465		MCFG_TMS9928A_VRAM_SIZE(0x4000)
1466		MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(msx_state,msx_irq_source0))
1467		MCFG_TMS9928A_SCREEN_ADD_PAL( "screen" )
1468		MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update)
1469		MACHINE_CONFIG_END
1470
1471
1472		static MACHINE_CONFIG_DERIVED( msx_tms9929, msx )
1473		/* Video hardware */
1474		MCFG_DEVICE_ADD( "tms9928a", TMS9929A, XTAL_10_738635MHz / 2 )
1475		MCFG_TMS9928A_VRAM_SIZE(0x4000)
1476		MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(msx_state,msx_irq_source0))
1477		MCFG_TMS9928A_SCREEN_ADD_PAL( "screen" )
1478		MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update)
1479		MACHINE_CONFIG_END
1480
1481
1482	1408	#define MSX2_XBORDER_PIXELS 16
1483	1409	#define MSX2_YBORDER_PIXELS 28
1484	1410	#define MSX2_TOTAL_XRES_PIXELS 256 * 2 + (MSX2_XBORDER_PIXELS * 2)
r248389	r248390
1666	1592	// AY8910/YM2149?
1667	1593	// FDC: None, 0 drives
1668	1594	// 2 Cartridge slots
1669		// T7937 (in ax170mk2)
1670	1595
1671	1596	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
1672	1597	MCFG_MSX_LAYOUT_ROM("arab", 1, 0, 1, 2, "maincpu", 0x8000)
r248389	r248390
1725	1650	ROM_LOAD ("v20bios.rom", 0x0000, 0x8000, CRC(e9ccd789) SHA1(8963fc041975f31dc2ab1019cfdd4967999de53e))
1726	1651	ROM_END
1727	1652
1728		static MACHINE_CONFIG_DERIVED( canonv20, msx_~~tms9929~~ )
	1653	static MACHINE_CONFIG_DERIVED( canonv20, msx_pal )
1729	1654	// YM2149
1730	1655	// FDC: None, 0 drives
1731	1656	// 2 Cartridge slots
r248389	r248390
1773	1698	ROM_LOAD( "mx10bios.rom", 0x0000, 0x8000, CRC(ee229390) SHA1(302afb5d8be26c758309ca3df611ae69cced2821))
1774	1699	ROM_END
1775	1700
1776		static MACHINE_CONFIG_DERIVED( mx10, msx_tms~~9118~~ )
	1701	static MACHINE_CONFIG_DERIVED( mx10, msx_ntsc )
1777	1702	// FDC: None, 0 drives
1778	1703	// 2? Cartridge slots
1779		// Z80: uPD780C-1
1780	1704
1781	1705	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
1782	1706	MCFG_MSX_LAYOUT_RAM("ram", 0, 0, 3, 1) // 16KB RAM
r248389	r248390
1796	1720	static MACHINE_CONFIG_DERIVED( mx15, msx_ntsc )
1797	1721	// FDC: None, 0 drives
1798	1722	// 3 Cartridge slots
1799		// T6950
1800	1723
1801	1724	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
1802	1725	MCFG_MSX_LAYOUT_RAM("ram", 0, 0, 3, 1) // 16KB RAM
r248389	r248390
1833	1756	ROM_LOAD("pv7bios.rom", 0x0000, 0x8000, CRC(ee229390) SHA1(302afb5d8be26c758309ca3df611ae69cced2821))
1834	1757	ROM_END
1835	1758
1836		static MACHINE_CONFIG_DERIVED( pv7, msx_tms~~9118~~ )
	1759	static MACHINE_CONFIG_DERIVED( pv7, msx_ntsc )
1837	1760	// AY8910?
1838	1761	// FDC: None, 0 drives
1839	1762	// 1 Cartridge slot + expansion slot, or 2 cartridge slots?
1840	1763	// By adding a Casio KB-7 2 additional cartridge slots become available and 8KB extra RAM?
1841	1764	// No cassette port
1842	1765	// No printer port
1843		// Z80: uPD780C-1
1844	1766
1845	1767	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
1846	1768	MCFG_MSX_LAYOUT_RAM("ram", 0, 0, 3, 1) /* 8KB RAM */
r248389	r248390
1858	1780	ROM_LOAD("pv16.rom", 0x0000, 0x8000, CRC(ee229390) SHA1(302afb5d8be26c758309ca3df611ae69cced2821))
1859	1781	ROM_END
1860	1782
1861		static MACHINE_CONFIG_DERIVED( pv16, msx_tms~~9118~~ )
	1783	static MACHINE_CONFIG_DERIVED( pv16, msx_ntsc )
1862	1784	// AY8910
1863	1785	// FDC: None, 0 drives
1864	1786	// 1 Cartridge slot
r248389	r248390
1946	1868	ROM_LOAD ("200han.rom", 0x8000, 0x4000, CRC(97478efb) SHA1(4421fa2504cbce18f7c84b5ea97f04e017007f07))
1947	1869	ROM_END
1948	1870
1949		static MACHINE_CONFIG_DERIVED( dpc200, msx_tms~~9918~~ )
	1871	static MACHINE_CONFIG_DERIVED( dpc200, msx_ntsc )
1950	1872	// AY8910/YM2149?
1951	1873	// FDC: None, 0 drives
1952	1874	// 2 Cartridge slots
r248389	r248390
1987	1909	ROM_LOAD ("50abios.rom", 0x0000, 0x8000, CRC(c3a868ef) SHA1(a08a940aa87313509e00bc5ac7494d53d8e03492))
1988	1910	ROM_END
1989	1911
1990		static MACHINE_CONFIG_DERIVED( cpc50a, msx_tms~~9918~~ )
	1912	static MACHINE_CONFIG_DERIVED( cpc50a, msx_ntsc )
1991	1913	// AY8910/YM2149?
1992	1914	// FDC: None, 0 drives
1993	1915	// 1? Cartridge slot
r248389	r248390
2010	1932	ROM_LOAD ("50bbios.rom", 0x0000, 0x8000, CRC(c3a868ef) SHA1(a08a940aa87313509e00bc5ac7494d53d8e03492))
2011	1933	ROM_END
2012	1934
2013		static MACHINE_CONFIG_DERIVED( cpc50b, msx_tms~~9118~~ )
	1935	static MACHINE_CONFIG_DERIVED( cpc50b, msx_ntsc )
2014	1936	// AY8910/YM2149?
2015	1937	// FDC: None, 0 drives
2016	1938	// 1? Cartridge slot
r248389	r248390
2032	1954	ROM_LOAD ("51bios.rom", 0x0000, 0x8000, CRC(c3a868ef) SHA1(a08a940aa87313509e00bc5ac7494d53d8e03492))
2033	1955	ROM_END
2034	1956
2035		static MACHINE_CONFIG_DERIVED( cpc51, msx_tms~~9118~~ )
	1957	static MACHINE_CONFIG_DERIVED( cpc51, msx_ntsc )
2036	1958	// AY8910/YM2149?
2037	1959	// FDC: None, 0 drives
2038	1960	// 1 Cartridge slot
r248389	r248390
2094	2016	ROM_LOAD ("spc800bios.rom", 0x0000, 0x8000, CRC(8205795e) SHA1(829c00c3114f25b3dae5157c0a238b52a3ac37db))
2095	2017	ROM_END
2096	2018
2097		static MACHINE_CONFIG_DERIVED( fspc800, msx_~~tms9929~~ )
	2019	static MACHINE_CONFIG_DERIVED( fspc800, msx_pal )
2098	2020	// AY8910?
2099	2021	// FDC: None, 0 drives
2100	2022	// 2 Cartridge slots
2101		// Z80: GSS Z8400APS
2102	2023
2103	2024	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
2104	2025	MCFG_MSX_LAYOUT_RAM("ram", 1, 0, 0, 4) /* 64KB RAM */
r248389	r248390
2180	2101	ROM_LOAD ("fc200bios.rom.u5b", 0x4000, 0x4000, CRC(1a99b1a1) SHA1(e18f72271b64693a2a2bc226e1b9ebd0448e07c0))
2181	2102	ROM_END
2182	2103
2183		static MACHINE_CONFIG_DERIVED( gsfc200, msx_~~tms9129~~ )
	2104	static MACHINE_CONFIG_DERIVED( gsfc200, msx_pal )
2184	2105	// AY8910/YM2149?
2185	2106	// FDC: None, 0 drives
2186	2107	// 2 Cartridge slots
r248389	r248390
2244	2165	ROM_LOAD ("expbios.rom", 0x0000, 0x8000, CRC(07610d77) SHA1(ef3e010eb57e4476700a3bbff9d2119ab3acdf62))
2245	2166	ROM_END
2246	2167
2247		static MACHINE_CONFIG_DERIVED( expert10, msx_tms~~9128~~ )
	2168	static MACHINE_CONFIG_DERIVED( expert10, msx_ntsc )
2248	2169	// AY8910/YM2149?
2249	2170	// FDC: None, 0 drives
2250	2171	// 2 Cartridge slots
r248389	r248390
2263	2184	ROM_LOAD ("expbios11.rom", 0x0000, 0x8000, CRC(efb4b972) SHA1(d6720845928ee848cfa88a86accb067397685f02))
2264	2185	ROM_END
2265	2186
2266		static MACHINE_CONFIG_DERIVED( expert11, msx_tms~~9128~~ )
	2187	static MACHINE_CONFIG_DERIVED( expert11, msx_ntsc )
2267	2188	// AY8910/YM2149?
2268	2189	// FDC: None, 0 drives
2269	2190	// 2 Cartridge slots
r248389	r248390
2306	2227	// AY8910/YM2149?
2307	2228	// FDC: mb8877a, 1 3.5" DSDD drive
2308	2229	// 2 Cartridge slots
2309		// MSX Engine T7937A ~~(also VDP)~~
	2230	// MSX Engine T7937A
2310	2231
2311	2232	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
2312	2233	MCFG_MSX_LAYOUT_CARTRIDGE("cartslot1", 1, 0)
r248389	r248390
2398	2319	// AY8910/YM2149?
2399	2320	// FDC: None, 0 drives
2400	2321	// 2 Cartridge slots
2401		// T6950
2402	2322
2403	2323	MCFG_MSX_LAYOUT_ROM("rom", 0, 0, 0, 2, "maincpu", 0x0000)
2404	2324	MCFG_MSX_LAYOUT_CARTRIDGE("cartslot1", 1, 0)
r248389	r248390
2537	2457	ROM_LOAD ("1200bios.rom", 0x0000, 0x8000, CRC(5ad03407) SHA1(c7a2c5baee6a9f0e1c6ee7d76944c0ab1886796c))
2538	2458	ROM_END
2539	2459
2540		static MACHINE_CONFIG_DERIVED( cf1200, msx_tms~~9918a~~ )
	2460	static MACHINE_CONFIG_DERIVED( cf1200, msx_ntsc )
2541	2461	// AY8910
2542	2462	// FDC: None, 0 drives
2543	2463	// 2 Cartridge slots
r248389	r248390
2666	2586	ROM_LOAD ("4000kfn.rom", 0, 0x20000, CRC(956dc96d) SHA1(9ed3ab6d893632b9246e91b412cd5db519e7586b))
2667	2587	ROM_END
2668	2588
2669		static MACHINE_CONFIG_DERIVED( fs4000, msx_tms~~9128~~ )
	2589	static MACHINE_CONFIG_DERIVED( fs4000, msx_ntsc )
2670	2590	// AY8910/YM2149?
2671	2591	// FDC: None, 0 drives
2672	2592	// 2 Cartridge slots
r248389	r248390
2693	2613	ROM_LOAD ("4000kfn.rom", 0, 0x20000, CRC(956dc96d) SHA1(9ed3ab6d893632b9246e91b412cd5db519e7586b))
2694	2614	ROM_END
2695	2615
2696		static MACHINE_CONFIG_DERIVED( fs4000a, msx_tms~~9128~~ )
	2616	static MACHINE_CONFIG_DERIVED( fs4000a, msx_ntsc )
2697	2617	// AY8910/YM2149?
2698	2618	// FDC: None, 0 drives
2699	2619	// 2 Cartridge slots
r248389	r248390
2755	2675	ROM_LOAD ("cf2700g.rom", 0x0000, 0x8000, CRC(4aa194f4) SHA1(69bf27b610e11437dad1f7a1c37a63179a293d12))
2756	2676	ROM_END
2757	2677
2758		static MACHINE_CONFIG_DERIVED( cf2700g, msx_~~tms9929~~ )
	2678	static MACHINE_CONFIG_DERIVED( cf2700g, msx_pal )
2759	2679	// AY8910
2760	2680	// FDC: None, 0 drives
2761	2681	// 2 Cartridge slots
r248389	r248390
2814	2734	ROM_LOAD ("8000bios.rom", 0x0000, 0x8000, CRC(efd970b0) SHA1(42252cf87deeb58181a7bfec7c874190a1351779))
2815	2735	ROM_END
2816	2736
2817		static MACHINE_CONFIG_DERIVED( vg8000, msx_~~tms9129~~ )
	2737	static MACHINE_CONFIG_DERIVED( vg8000, msx_pal )
2818	2738	// AY8910
2819	2739	// FDC: None, 0 drives
2820	2740	// 2 Cartridge slots
r248389	r248390
2835	2755	ROM_LOAD ("8010bios.rom", 0x0000, 0x8000, CRC(efd970b0) SHA1(42252cf87deeb58181a7bfec7c874190a1351779))
2836	2756	ROM_END
2837	2757
2838		static MACHINE_CONFIG_DERIVED( vg8010, msx_~~tms9129~~ )
	2758	static MACHINE_CONFIG_DERIVED( vg8010, msx_pal )
2839	2759	// AY8910
2840	2760	// FDC: None, 0 drives
2841	2761	// 2 Cartridge slots
r248389	r248390
2856	2776	ROM_LOAD ("8010fbios.rom", 0x0000, 0x8000, CRC(df57c9ca) SHA1(898630ad1497dc9a329580c682ee55c4bcb9c30c))
2857	2777	ROM_END
2858	2778
2859		static MACHINE_CONFIG_DERIVED( vg8010f, msx_~~tms9129~~ )
	2779	static MACHINE_CONFIG_DERIVED( vg8010f, msx_pal )
2860	2780	// AY8910/YM2149?
2861	2781	// FDC: None, 0 drives
2862	2782	// 2 Cartridge slots
r248389	r248390
2877	2797	ROM_LOAD ("8020-00bios.rom", 0x0000, 0x8000, CRC(8205795e) SHA1(829c00c3114f25b3dae5157c0a238b52a3ac37db))
2878	2798	ROM_END
2879	2799
2880		static MACHINE_CONFIG_DERIVED( vg802000, msx_~~tms9929~~ )
	2800	static MACHINE_CONFIG_DERIVED( vg802000, msx_pal )
2881	2801	// YM2149
2882	2802	// FDC: None, 0 drives
2883	2803	// 2 Cartridge slots
r248389	r248390
2897	2817	ROM_LOAD ("8020-20bios.rom", 0x0000, 0x8000, CRC(a317e6b4) SHA1(e998f0c441f4f1800ef44e42cd1659150206cf79))
2898	2818	ROM_END
2899	2819
2900		static MACHINE_CONFIG_DERIVED( vg802020, msx_~~tms9129~~ )
	2820	static MACHINE_CONFIG_DERIVED( vg802020, msx_pal )
2901	2821	// YM2149 (in S-3527 MSX Engine)
2902	2822	// FDC: None, 0 drives
2903	2823	// 2 Cartridge slots
r248389	r248390
2945	2865	// AY8910/YM2149?
2946	2866	// FDC: None, 0 drives
2947	2867	// 2 Cartridge slots
2948		// TMS9928 is this were an ntsc machine
2949	2868
2950	2869	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
2951	2870	MCFG_MSX_LAYOUT_RAM("ram", 0, 0, 2, 2) /* 32KB RAM */
r248389	r248390
2966	2885	ROM_LOAD ("videoart.rom", 0xc000, 0x8000, CRC(0ba148dc) SHA1(b7b4e4cd40a856bb071976e6cf0f5e546fc86a78))
2967	2886	ROM_END
2968	2887
2969		static MACHINE_CONFIG_DERIVED( piopx7uk, msx_~~tms9129~~ )
	2888	static MACHINE_CONFIG_DERIVED( piopx7uk, msx_pal )
2970	2889	// AY8910/YM2149?
2971	2890	// FDC: None, 0 drives
2972	2891	// 2 Cartridge slots
r248389	r248390
2989	2908	ROM_FILL( 0xa000, 0x2000, 0x6E )
2990	2909	ROM_END
2991	2910
2992		static MACHINE_CONFIG_DERIVED( piopxv60, msx_tms~~9128~~ )
	2911	static MACHINE_CONFIG_DERIVED( piopxv60, msx_ntsc )
2993	2912	// AY8910/YM2149?
2994	2913	// FDC: None, 0 drives
2995	2914	// 2 Cartridge slots
r248389	r248390
3076	2995	// AY8910/YM2149?
3077	2996	// FDC: None, 0 drives
3078	2997	// 2? Cartridge slots
3079		// T6950
3080		// T7775 MSX Engine
3081	2998
3082	2999	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
3083	3000	MCFG_MSX_LAYOUT_CARTRIDGE("cartslot1", 1, 0)
r248389	r248390
3114	3031	ROM_LOAD ("28lbios.rom", 0x0000, 0x8000, CRC(d2110d66) SHA1(d3af963e2529662eae63f04a2530454685a1989f))
3115	3032	ROM_END
3116	3033
3117		static MACHINE_CONFIG_DERIVED( phc28l, msx_~~tms9929~~ )
	3034	static MACHINE_CONFIG_DERIVED( phc28l, msx_pal )
3118	3035	// YM2149
3119	3036	// FDC: None, 0 drives
3120	3037	// 2 Cartridge slots
r248389	r248390
3134	3051	ROM_LOAD ("28sbios.rom", 0x0000, 0x8000, CRC(e5cf6b3c) SHA1(b1cce60ef61c058f5e42ef7ac635018d1a431168))
3135	3052	ROM_END
3136	3053
3137		static MACHINE_CONFIG_DERIVED( phc28s, msx_~~tms9929~~ )
	3054	static MACHINE_CONFIG_DERIVED( phc28s, msx_pal )
3138	3055	// AY8910/YM2149?
3139	3056	// FDC: None, 0 drives
3140	3057	// 2 Cartridge slots?
r248389	r248390
3174	3091	ROM_LOAD ("hotbit11.rom", 0x0000, 0x8000, CRC(b6942694) SHA1(663f8c512d04d213fa616b0db5eefe3774012a4b))
3175	3092	ROM_END
3176	3093
3177		static MACHINE_CONFIG_DERIVED( hotbit11, msx_tms~~9128~~ )
	3094	static MACHINE_CONFIG_DERIVED( hotbit11, msx_ntsc )
3178	3095	// AY8910/YM2149?
3179	3096	// FDC: None, 0 drives
3180	3097	// 2 Cartridge slots
r248389	r248390
3194	3111	ROM_LOAD ("hotbit12.rom", 0x0000, 0x8000, CRC(f59a4a0c) SHA1(9425815446d468058705bae545ffa13646744a87))
3195	3112	ROM_END
3196	3113
3197		static MACHINE_CONFIG_DERIVED( hotbit12, msx_tms~~9128~~ )
	3114	static MACHINE_CONFIG_DERIVED( hotbit12, msx_ntsc )
3198	3115	// AY8910/YM2149?
3199	3116	// FDC: None, 0 drives
3200	3117	// 2 Cartridge slots
r248389	r248390
3281	3198	// AY8910/YM2149?
3282	3199	// FDC: None, 0 drives
3283	3200	// 2 Cartridge slots
3284		// T6950
3285	3201
3286	3202	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
3287	3203	MCFG_MSX_LAYOUT_CARTRIDGE("cartslot1", 1, 0)
r248389	r248390
3302	3218	// AY8910/YM2149?
3303	3219	// FDC: None, 0 drives
3304	3220	// 2 Cartridge slots
3305		// T6950
3306	3221
3307	3222	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
3308	3223	MCFG_MSX_LAYOUT_CARTRIDGE("cartslot1", 1, 0)
r248389	r248390
3475	3390	ROM_LOAD ("75pnote.ic44", 0x8000, 0x4000, CRC(492b12f8) SHA1(b262aedc71b445303f84efe5e865cbb71fd7d952))
3476	3391	ROM_END
3477	3392
3478		static MACHINE_CONFIG_DERIVED( hb75p, msx_~~tms9929~~ )
	3393	static MACHINE_CONFIG_DERIVED( hb75p, msx_pal )
3479	3394	// AY8910
3480	3395	// FDC: None, 0 drives
3481	3396	// 2 Cartridge slots?
r248389	r248390
3519	3434	ROM_LOAD ("hb701fddisk.rom", 0x8000, 0x4000, CRC(71961d9d) SHA1(2144036d6573d666143e890e5413956bfe8f66c5))
3520	3435	ROM_END
3521	3436
3522		static MACHINE_CONFIG_DERIVED( hb701fd, msx_tms~~9928~~ )
	3437	static MACHINE_CONFIG_DERIVED( hb701fd, msx_ntsc )
3523	3438	// YM2149 (in S-1985)
3524	3439	// FDC: WD2793?, 1 3.5" SSDD drive
3525	3440	// 2 Cartridge slots
r248389	r248390
3546	3461	// ROM_LOAD ("707disk.rom", 0x8000, 0x4000, CRC(f9978853) SHA1(6aa856cc56eb98863c9da7a566571605682b5c6b))
3547	3462	ROM_END
3548	3463
3549		static MACHINE_CONFIG_DERIVED( svi728, msx_~~tms9129~~ )
	3464	static MACHINE_CONFIG_DERIVED( svi728, msx_pal )
3550	3465	// AY8910
3551	3466	// FDC: None, 0 drives
3552	3467	// 1 Cartridge slots, 1 Expansion slot (eg for SVI-707)
r248389	r248390
3755	3670	ROM_LOAD ("dpc200bios.rom", 0x0000, 0x8000, CRC(8205795e) SHA1(829c00c3114f25b3dae5157c0a238b52a3ac37db))
3756	3671	ROM_END
3757	3672
3758		static MACHINE_CONFIG_DERIVED( tadpc200, msx_~~tms9129~~ )
	3673	static MACHINE_CONFIG_DERIVED( tadpc200, msx_pal )
3759	3674	// AY8910
3760	3675	// FDC: None, 0 drives
3761	3676	// 2 Cartridge slots
r248389	r248390
3937	3852	ROM_LOAD ("hx20word.rom", 0x8000, 0x8000, CRC(39b3e1c0) SHA1(9f7cfa932bd7dfd0d9ecaadc51655fb557c2e125))
3938	3853	ROM_END
3939	3854
3940		static MACHINE_CONFIG_DERIVED( hx20, msx_~~tms9129~~ )
	3855	static MACHINE_CONFIG_DERIVED( hx20, msx_pal )
3941	3856	// AY8910/YM2149?
3942	3857	// FDC: None, 0 drives
3943	3858	// 2 Cartridge slots
3944		// T6950
	3859	// T6950 VDP instead of TMS9928A
3945	3860
3946	3861	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
3947	3862	MCFG_MSX_LAYOUT_RAM("ram1", 0, 0, 2, 2) /* 32KB RAM */
r248389	r248390
3961	3876	ROM_LOAD ("hx20iword.rom", 0x8000, 0x8000, CRC(39b3e1c0) SHA1(9f7cfa932bd7dfd0d9ecaadc51655fb557c2e125))
3962	3877	ROM_END
3963	3878
3964		static MACHINE_CONFIG_DERIVED( hx20i, msx_~~tms9129~~ )
	3879	static MACHINE_CONFIG_DERIVED( hx20i, msx_pal )
3965	3880	// AY8910/YM2149?
3966	3881	// FDC: None, 0 drives
3967	3882	// 2 Cartridge slots
r248389	r248390
3988	3903	ROM_LOAD ("hx21kfn.rom", 0x0000, 0x20000, CRC(d23d4d2d) SHA1(db03211b7db46899df41db2b1dfbec972109a967))
3989	3904	ROM_END
3990	3905
3991		static MACHINE_CONFIG_DERIVED( hx21, msx_tms~~9928~~ )
	3906	static MACHINE_CONFIG_DERIVED( hx21, msx_ntsc )
3992	3907	// AY8910/YM2149?
3993	3908	// FDC: None, 0 drives
3994	3909	// 2 Cartridge slots
r248389	r248390
4059	3974	ROM_LOAD ("hx22iword.rom", 0x8000, 0x8000, CRC(f9e29c66) SHA1(3289336b2c12161fd926a7e5ce865770ae7038af))
4060	3975	ROM_END
4061	3976
4062		static MACHINE_CONFIG_DERIVED( hx22i, msx_~~tms9929~~ )
	3977	static MACHINE_CONFIG_DERIVED( hx22i, msx_pal )
4063	3978	// AY8910/YM2149?
4064	3979	// FDC: None, 0 drives
4065	3980	// 2 Cartridge slots
4066	3981	// RS232C builtin?
4067		// Z80: LH0080A
4068	3982
4069	3983	MCFG_MSX_LAYOUT_ROM("bios", 0, 0, 0, 2, "maincpu", 0x0000)
4070	3984	MCFG_MSX_LAYOUT_RAM("ram1", 0, 0, 2, 2) /* 32KB RAM */
r248389	r248390
4187	4101	ROM_LOAD ("cx5mbios.rom", 0x0000, 0x8000, CRC(e2242b53) SHA1(706dd67036baeec7127e4ccd8c8db8f6ce7d0e4c))
4188	4102	ROM_END
4189	4103
4190		static MACHINE_CONFIG_DERIVED( cx5m, msx_~~tms9929~~ )
	4104	static MACHINE_CONFIG_DERIVED( cx5m, msx_pal )
4191	4105	// YM2149
4192	4106	// FDC: None, 0 drives
4193	4107	// 2 Cartridge slots

trunk/src/mess/drivers/sdk80.c
r248389	r248390
1		// license:BSD-3-Clause
2		// copyright-holders:Nigel Barnes,Ryan Holtz
3		/***************************************************************************
4
5		Intel SDK-80
6
7		This is an evaluation kit for the 8080 cpu.
8
9		There is no speaker or storage facility in the standard kit.
10
11		Download the User Manual to get the operating procedures.
12
13		Monitor Commands:
14		D Display memory contents
15		G Go to address (execute program at address)
16		I Insert hex code
17		M Move blocks of memory
18		S Substitute memory locations
19		X Examine registers
20
21		Please note this rom set boots into BASIC, not monitor.
22
23		****************************************************************************/
24
25		#include "emu.h"
26		#include "cpu/i8085/i8085.h"
27		#include "machine/i8251.h"
28		#include "machine/clock.h"
29		#include "bus/rs232/rs232.h"
30		//#include "machine/ay31015.h"
31
32		#define I8251A_TAG "usart"
33		#define I8251A_BAUD_TAG "usart_baud"
34		#define RS232_TAG "rs232"
35
36		class sdk80_state : public driver_device
37		{
38		public:
39		sdk80_state(const machine_config &mconfig, device_type type, const char *tag)
40		: driver_device(mconfig, type, tag)
41		, m_maincpu(*this, "maincpu")
42		, m_usart(*this, I8251A_TAG)
43		, m_rs232(*this, RS232_TAG)
44		, m_usart_baud_rate(*this, I8251A_BAUD_TAG)
45		, m_usart_divide_counter(0)
46		, m_usart_clock_state(0)
47		{ }
48
49		UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
50
51		DECLARE_WRITE_LINE_MEMBER( usart_clock_tick );
52
53		private:
54		required_device<cpu_device> m_maincpu;
55		required_device<i8251_device> m_usart;
56		required_device<rs232_port_device> m_rs232;
57		required_ioport m_usart_baud_rate;
58
59		UINT8 m_usart_divide_counter;
60		UINT8 m_usart_clock_state;
61		};
62
63		static ADDRESS_MAP_START(sdk80_mem, AS_PROGRAM, 8, sdk80_state)
64		ADDRESS_MAP_UNMAP_HIGH
65		AM_RANGE(0x0000, 0x0fff) AM_ROM
66		AM_RANGE(0x3c00, 0x3fff) AM_RAM
67		ADDRESS_MAP_END
68
69		static ADDRESS_MAP_START(sdk80_io, AS_IO, 8, sdk80_state)
70		ADDRESS_MAP_UNMAP_HIGH
71		ADDRESS_MAP_GLOBAL_MASK(0xff)
72		AM_RANGE(0xec, 0xec) AM_DEVREADWRITE(I8251A_TAG, i8251_device, data_r, data_w)
73		AM_RANGE(0xed, 0xed) AM_DEVREADWRITE(I8251A_TAG, i8251_device, status_r, control_w)
74		ADDRESS_MAP_END
75
76		static INPUT_PORTS_START( sdk80 )
77		PORT_START(I8251A_BAUD_TAG)
78		PORT_DIPNAME( 0x3f, 0x01, "i8251 Baud Rate" )
79		PORT_DIPSETTING( 0x01, "4800")
80		PORT_DIPSETTING( 0x02, "2400")
81		PORT_DIPSETTING( 0x04, "1200")
82		PORT_DIPSETTING( 0x08, "600")
83		PORT_DIPSETTING( 0x10, "300")
84		PORT_DIPSETTING( 0x20, "150")
85		PORT_DIPSETTING( 0x40, "75")
86		INPUT_PORTS_END
87
88		#if 0
89		/* Graphics Output */
90		const gfx_layout sdk80_charlayout =
91		{
92		7, 8, /* character cell is 7 pixels wide by 8 pixels high */
93		64, /* 64 characters in 2513 character generator ROM */
94		1, /* 1 bitplane */
95		{ 0 },
96		/* 5 visible pixels per row, starting at bit 3, with MSB being 0: */
97		{ 3, 4, 5, 6, 7 },
98		/* pixel rows stored from top to bottom: */
99		{ 08, 18, 28, 38, 48, 58, 68, 78 },
100		8 * 8 /* 8 8-bit pixel rows per character */
101		};
102
103		static GFXDECODE_START( sdk80 )
104		GFXDECODE_ENTRY( "gfx1", 0x0000, sdk80_charlayout, 0, 1 )
105		GFXDECODE_END
106		#endif
107
108		UINT32 sdk80_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
109		{
110		return 0;
111		}
112
113		WRITE_LINE_MEMBER( sdk80_state::usart_clock_tick )
114		{
115		UINT8 old_counter = m_usart_divide_counter;
116		m_usart_divide_counter++;
117
118		UINT8 transition = (old_counter ^ m_usart_divide_counter) & m_usart_baud_rate->read();
119		if (transition)
120		{
121		m_usart->write_txc(m_usart_clock_state);
122		m_usart->write_rxc(m_usart_clock_state);
123		m_usart_clock_state ^= 1;
124		}
125		}
126
127		static MACHINE_CONFIG_START( sdk80, sdk80_state )
128		/* basic machine hardware */
129		MCFG_CPU_ADD("maincpu", I8080A, XTAL_18_432MHz/9)
130		MCFG_CPU_PROGRAM_MAP(sdk80_mem)
131		MCFG_CPU_IO_MAP(sdk80_io)
132
133		MCFG_DEVICE_ADD(I8251A_TAG, I8251, 0)
134		MCFG_I8251_TXD_HANDLER(DEVWRITELINE(RS232_TAG, rs232_port_device, write_txd))
135		MCFG_I8251_DTR_HANDLER(DEVWRITELINE(RS232_TAG, rs232_port_device, write_dtr))
136		MCFG_I8251_RTS_HANDLER(DEVWRITELINE(RS232_TAG, rs232_port_device, write_rts))
137
138		MCFG_RS232_PORT_ADD(RS232_TAG, default_rs232_devices, "null_modem")
139		MCFG_RS232_RXD_HANDLER(DEVWRITELINE(I8251A_TAG, i8251_device, write_rxd))
140		MCFG_RS232_DSR_HANDLER(DEVWRITELINE(I8251A_TAG, i8251_device, write_dsr))
141
142		MCFG_DEVICE_ADD("usart_clock", CLOCK, XTAL_18_432MHz/60)
143		MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(sdk80_state, usart_clock_tick))
144
145		/* video hardware */
146		// 96364 crt controller
147
148		// MCFG_SCREEN_ADD("screen", RASTER)
149		// MCFG_SCREEN_REFRESH_RATE(60)
150		/* Video is blanked for 70 out of 262 scanlines per refresh cycle.
151		Each scanline is composed of 65 character times, 40 of which
152		are visible, and each character time is 7 dot times; a dot time
153		is 2 cycles of the fundamental 14.31818 MHz oscillator. The
154		total blanking time is about 4450 microseconds. */
155		// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC((int) (70 * 65 * 7 * 2 / 14.31818)))
156		/* It would be nice if we could implement some sort of display
157		overscan here. */
158		// MCFG_SCREEN_SIZE(40 * 7, 24 * 8)
159		// MCFG_SCREEN_VISIBLE_AREA(0, 40 * 7 - 1, 0, 24 * 8 - 1)
160		// MCFG_SCREEN_UPDATE_DRIVER(sdk80_state, screen_update)
161		// MCFG_SCREEN_PALETTE("palette")
162
163		// MCFG_GFXDECODE_ADD("gfxdecode", "palette", sdk80)
164
165		// MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
166
167		// Video board UART
168		// MCFG_DEVICE_ADD( "hd6402", AY31015, 0 )
169		// MCFG_AY31015_TX_CLOCK(( XTAL_16MHz / 16 ) / 256)
170		// MCFG_AY31015_RX_CLOCK(( XTAL_16MHz / 16 ) / 256)
171		// MCFG_AY51013_READ_SI_CB(READ8(sdk80_state, nascom1_hd6402_si))
172		// MCFG_AY51013_WRITE_SO_CB(WRITE8(sdk80_state, nascom1_hd6402_so))
173
174		/* Devices */
175		// MCFG_DEVICE_ADD("i8279", I8279, 3100000) // based on divider
176		// MCFG_I8279_OUT_IRQ_CB(INPUTLINE("maincpu", I8085_RST55_LINE)) // irq
177		// MCFG_I8279_OUT_SL_CB(WRITE8(sdk80_state, scanlines_w)) // scan SL lines
178		// MCFG_I8279_OUT_DISP_CB(WRITE8(sdk80_state, digit_w)) // display A&B
179		// MCFG_I8279_IN_RL_CB(READ8(sdk80_state, kbd_r)) // kbd RL lines
180		// MCFG_I8279_IN_SHIFT_CB(VCC) // Shift key
181		// MCFG_I8279_IN_CTRL_CB(VCC)
182
183		//MCFG_DEVICE_ADD("terminal", GENERIC_TERMINAL, 0)
184		//MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(sdk80_state, kbd_put))
185		MACHINE_CONFIG_END
186
187		/* ROM definition */
188		ROM_START( sdk80 )
189		ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
190		ROM_LOAD( "basic_blc_1.a14", 0x0000, 0x0400, CRC(b5e75aee) SHA1(6bd1eb9586d72544e8afb4ae43ecedcefa14da33))
191		ROM_LOAD( "basic_blc_2.a15", 0x0400, 0x0400, CRC(0a9ad1ed) SHA1(92c47eadcf8b18eeedcccaa3deb9f1518aaceeae))
192		ROM_LOAD( "basic_blc_3.a16", 0x0800, 0x0400, CRC(bc898e4b) SHA1(adc000534db0f736a75fbceed360dc220e02c30d))
193		ROM_LOAD( "basic_blc_4.a17", 0x0c00, 0x0400, CRC(568e8b6d) SHA1(22960193d3b0ae1b5d876d8c3b3f3b40db01358c))
194
195		/* 512-byte Signetics 2513 character generator ROM at location D2-D3 */
196		ROM_REGION(0x0200, "gfx1",0)
197		ROM_LOAD("s2513.d2", 0x0000, 0x0200, CRC(a7e567fc) SHA1(b18aae0a2d4f92f5a7e22640719bbc4652f3f4ee))
198
199		/* 256x4 PROM located on the video board, schematic location P7, to be moved into separate device later */
200		ROM_REGION( 0x0120, "proms", 0 )
201		ROM_LOAD( "6300__d7.p7", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )
202		ROM_END
203
204		/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
205		COMP( 1975, sdk80, 0, 0, sdk80, sdk80, driver_device, 0, "Intel", "SDK-80", GAME_NO_SOUND_HW \| GAME_NOT_WORKING )

trunk/src/mess/drivers/smc777.c
r248389	r248390
56	56	m_fdc(*this, "fdc"),
57	57	m_floppy0(*this, "fdc:0"),
58	58	m_floppy1(*this, "fdc:1"),
	59	m_sn(*this, "sn1"),
59	60	m_beeper(*this, "beeper"),
60	61	m_gfxdecode(*this, "gfxdecode"),
61	62	m_palette(*this, "palette")
62	63	{ }
63	64
64		DECLARE_WRITE8_MEMBER(mc6845_w);
65		DECLARE_READ8_MEMBER(vram_r);
66		DECLARE_READ8_MEMBER(attr_r);
67		DECLARE_READ8_MEMBER(pcg_r);
68		DECLARE_WRITE8_MEMBER(vram_w);
69		DECLARE_WRITE8_MEMBER(attr_w);
70		DECLARE_WRITE8_MEMBER(pcg_w);
71		DECLARE_READ8_MEMBER(fbuf_r);
72		DECLARE_WRITE8_MEMBER(fbuf_w);
73		DECLARE_READ8_MEMBER(key_r);
74		DECLARE_WRITE8_MEMBER(key_w);
75		DECLARE_WRITE8_MEMBER(border_col_w);
76		DECLARE_READ8_MEMBER(system_input_r);
77		DECLARE_WRITE8_MEMBER(system_output_w);
78		DECLARE_WRITE8_MEMBER(color_mode_w);
79		DECLARE_WRITE8_MEMBER(ramdac_w);
80		DECLARE_READ8_MEMBER(display_reg_r);
81		DECLARE_WRITE8_MEMBER(display_reg_w);
82		DECLARE_READ8_MEMBER(smc777_mem_r);
83		DECLARE_WRITE8_MEMBER(smc777_mem_w);
84		DECLARE_READ8_MEMBER(irq_mask_r);
85		DECLARE_WRITE8_MEMBER(irq_mask_w);
86		DECLARE_PALETTE_INIT(smc777);
87		UINT32 screen_update_smc777(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
88		INTERRUPT_GEN_MEMBER(vblank_irq);
89		TIMER_DEVICE_CALLBACK_MEMBER(keyboard_callback);
90
91		DECLARE_READ8_MEMBER(fdc_r);
92		DECLARE_WRITE8_MEMBER(fdc_w);
93		DECLARE_READ8_MEMBER(fdc_request_r);
94		DECLARE_WRITE8_MEMBER(floppy_select_w);
95		DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w);
96		DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
97
98		protected:
99		virtual void machine_start();
100		virtual void machine_reset();
101		virtual void video_start();
102
103		private:
104	65	required_device<cpu_device> m_maincpu;
105	66	required_device<mc6845_device> m_crtc;
106	67	required_device<mb8876_t> m_fdc;
107	68	required_device<floppy_connector> m_floppy0;
108	69	required_device<floppy_connector> m_floppy1;
	70	optional_device<sn76489a_device> m_sn;
109	71	required_device<beep_device> m_beeper;
110		required_device<gfxdecode_device> m_gfxdecode;
111		required_device<palette_device> m_palette;
112	72
113	73	UINT8 *m_ipl_rom;
114	74	UINT8 *m_work_ram;
r248389	r248390
129	89	UINT8 m_raminh,m_raminh_pending_change; //bankswitch
130	90	UINT8 m_raminh_prefetch;
131	91	UINT8 m_irq_mask;
	92	UINT8 m_keyb_direct;
132	93	UINT8 m_pal_mode;
133	94	UINT8 m_keyb_cmd;
134	95	UINT8 m_crtc_vreg[0x20];
135	96	UINT8 m_crtc_addr;
	97	DECLARE_WRITE8_MEMBER(smc777_6845_w);
	98	DECLARE_READ8_MEMBER(smc777_vram_r);
	99	DECLARE_READ8_MEMBER(smc777_attr_r);
	100	DECLARE_READ8_MEMBER(smc777_pcg_r);
	101	DECLARE_WRITE8_MEMBER(smc777_vram_w);
	102	DECLARE_WRITE8_MEMBER(smc777_attr_w);
	103	DECLARE_WRITE8_MEMBER(smc777_pcg_w);
	104	DECLARE_READ8_MEMBER(smc777_fbuf_r);
	105	DECLARE_WRITE8_MEMBER(smc777_fbuf_w);
	106	DECLARE_READ8_MEMBER(key_r);
	107	DECLARE_WRITE8_MEMBER(key_w);
	108	DECLARE_WRITE8_MEMBER(border_col_w);
	109	DECLARE_READ8_MEMBER(system_input_r);
	110	DECLARE_WRITE8_MEMBER(system_output_w);
	111	DECLARE_READ8_MEMBER(smc777_joystick_r);
	112	DECLARE_WRITE8_MEMBER(smc777_color_mode_w);
	113	DECLARE_WRITE8_MEMBER(smc777_ramdac_w);
	114	DECLARE_READ8_MEMBER(display_reg_r);
	115	DECLARE_WRITE8_MEMBER(display_reg_w);
	116	DECLARE_READ8_MEMBER(smc777_mem_r);
	117	DECLARE_WRITE8_MEMBER(smc777_mem_w);
	118	DECLARE_READ8_MEMBER(smc777_irq_mask_r);
	119	DECLARE_WRITE8_MEMBER(smc777_irq_mask_w);
	120	DECLARE_READ8_MEMBER(smc777_io_r);
	121	DECLARE_WRITE8_MEMBER(smc777_io_w);
	122	virtual void machine_start();
	123	virtual void machine_reset();
	124	virtual void video_start();
	125	DECLARE_PALETTE_INIT(smc777);
	126	UINT32 screen_update_smc777(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	127	INTERRUPT_GEN_MEMBER(smc777_vblank_irq);
	128	TIMER_DEVICE_CALLBACK_MEMBER(keyboard_callback);
	129
	130	DECLARE_READ8_MEMBER(fdc_r);
	131	DECLARE_WRITE8_MEMBER(fdc_w);
	132	DECLARE_READ8_MEMBER(fdc_request_r);
	133	DECLARE_WRITE8_MEMBER(floppy_select_w);
	134	DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w);
	135	DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
	136
	137	required_device<gfxdecode_device> m_gfxdecode;
	138	required_device<palette_device> m_palette;
136	139	};
137	140
138	141
r248389	r248390
287	290	return 0;
288	291	}
289	292
290		WRITE8_MEMBER(smc777_state::mc6845_w)
	293	WRITE8_MEMBER(smc777_state::smc777_6845_w)
291	294	{
292	295	if(offset == 0)
293	296	{
r248389	r248390
301	304	}
302	305	}
303	306
304		READ8_MEMBER(smc777_state::vram_r)
	307	READ8_MEMBER(smc777_state::smc777_vram_r)
305	308	{
306	309	UINT16 vram_index;
307	310
r248389	r248390
311	314	return m_vram[vram_index];
312	315	}
313	316
314		READ8_MEMBER(smc777_state::attr_r)
	317	READ8_MEMBER(smc777_state::smc777_attr_r)
315	318	{
316	319	UINT16 vram_index;
317	320
r248389	r248390
321	324	return m_attr[vram_index];
322	325	}
323	326
324		READ8_MEMBER(smc777_state::pcg_r)
	327	READ8_MEMBER(smc777_state::smc777_pcg_r)
325	328	{
326	329	UINT16 vram_index;
327	330
r248389	r248390
331	334	return m_pcg[vram_index];
332	335	}
333	336
334		WRITE8_MEMBER(smc777_state::vram_w)
	337	WRITE8_MEMBER(smc777_state::smc777_vram_w)
335	338	{
336	339	UINT16 vram_index;
337	340
r248389	r248390
341	344	m_vram[vram_index] = data;
342	345	}
343	346
344		WRITE8_MEMBER(smc777_state::attr_w)
	347	WRITE8_MEMBER(smc777_state::smc777_attr_w)
345	348	{
346	349	UINT16 vram_index;
347	350
r248389	r248390
351	354	m_attr[vram_index] = data;
352	355	}
353	356
354		WRITE8_MEMBER(smc777_state::pcg_w)
	357	WRITE8_MEMBER(smc777_state::smc777_pcg_w)
355	358	{
356	359	UINT16 vram_index;
357	360
r248389	r248390
363	366	m_gfxdecode->gfx(0)->mark_dirty(vram_index >> 3);
364	367	}
365	368
366		READ8_MEMBER(smc777_state::fbuf_r)
	369	READ8_MEMBER(smc777_state::smc777_fbuf_r)
367	370	{
368	371	UINT16 vram_index;
369	372
r248389	r248390
373	376	return m_gvram[vram_index];
374	377	}
375	378
376		WRITE8_MEMBER(smc777_state::fbuf_w)
	379	WRITE8_MEMBER(smc777_state::smc777_fbuf_w)
377	380	{
378	381	UINT16 vram_index;
379	382
r248389	r248390
519	522	}
520	523	}
521	524
522		WRITE8_MEMBER(smc777_state::color_mode_w)
	525	/* presumably SMC-777 specific */
	526	READ8_MEMBER(smc777_state::smc777_joystick_r)
523	527	{
	528	return ioport("JOY_1P")->read();
	529	}
	530
	531	WRITE8_MEMBER(smc777_state::smc777_color_mode_w)
	532	{
524	533	switch(data & 0x0f)
525	534	{
526	535	case 0x06: m_pal_mode = (data & 0x10) ^ 0x10; break;
r248389	r248390
528	537	}
529	538	}
530	539
531		WRITE8_MEMBER(smc777_state::ramdac_w)
	540	WRITE8_MEMBER(smc777_state::smc777_ramdac_w)
532	541	{
533	542	UINT8 pal_index;
534	543	pal_index = (offset & 0xf00) >> 8;
r248389	r248390
587	596	m_work_ram[offset] = data;
588	597	}
589	598
590		READ8_MEMBER(smc777_state::irq_mask_r)
	599	READ8_MEMBER(smc777_state::smc777_irq_mask_r)
591	600	{
592	601	return m_irq_mask;
593	602	}
594	603
595		WRITE8_MEMBER(smc777_state::irq_mask_w)
	604	WRITE8_MEMBER(smc777_state::smc777_irq_mask_w)
596	605	{
597	606	if(data & 0xfe)
598	607	printf("Irq mask = %02x\n",data & 0xfe);
r248389	r248390
600	609	m_irq_mask = data & 1;
601	610	}
602	611
603		static ADDRESS_MAP_START( smc777_mem, AS_PROGRAM, 8, smc777_state )
	612	static ADDRESS_MAP_START(smc777_mem, AS_PROGRAM, 8, smc777_state )
604	613	ADDRESS_MAP_UNMAP_HIGH
605		AM_RANGE(0x0000, 0xffff) AM_READWRITE(smc777_mem_r, smc777_mem_w)
	614	AM_RANGE(0x0000, 0xffff) AM_READWRITE(smc777_mem_r,smc777_mem_w)
606	615	ADDRESS_MAP_END
607	616
608		static ADDRESS_MAP_START( smc777_io, AS_IO, 8, smc777_state )
	617	READ8_MEMBER(smc777_state::smc777_io_r)
	618	{
	619	UINT8 low_offs;
	620
	621	low_offs = offset & 0xff;
	622
	623	if(low_offs <= 0x07) { return smc777_vram_r(space,offset & 0xff07); }
	624	else if(low_offs >= 0x08 && low_offs <= 0x0f) { return smc777_attr_r(space,offset & 0xff07); }
	625	else if(low_offs >= 0x10 && low_offs <= 0x17) { return smc777_pcg_r(space,offset & 0xff07); }
	626	else if(low_offs >= 0x18 && low_offs <= 0x19) { logerror("6845 read %02x",low_offs & 1); }
	627	else if(low_offs >= 0x1a && low_offs <= 0x1b) { return key_r(space,low_offs & 1); }
	628	else if(low_offs == 0x1c) { return system_input_r(space,0); }
	629	else if(low_offs == 0x1d) { logerror("System and control data R PC=%04x\n",space.device().safe_pc()); return 0xff; }
	630	else if(low_offs == 0x20) { return display_reg_r(space,0); }
	631	else if(low_offs == 0x21) { return smc777_irq_mask_r(space,0); }
	632	else if(low_offs == 0x25) { logerror("RTC read PC=%04x\n",space.device().safe_pc()); return 0xff; }
	633	else if(low_offs == 0x26) { logerror("RS-232c RX %04x\n",space.device().safe_pc()); return 0xff; }
	634	else if(low_offs >= 0x28 && low_offs <= 0x2c) { logerror("FDC 2 read %02x\n",low_offs & 7); return 0xff; }
	635	else if(low_offs >= 0x2d && low_offs <= 0x2f) { logerror("RS-232c no. 2 read %02x\n",low_offs & 3); return 0xff; }
	636	else if(low_offs >= 0x30 && low_offs <= 0x33) { return fdc_r(space, low_offs & 3); }
	637	else if(low_offs >= 0x34 && low_offs <= 0x34) { return fdc_request_r(space, 0); }
	638	else if(low_offs >= 0x35 && low_offs <= 0x37) { logerror("RS-232c no. 3 read %02x\n",low_offs & 3); return 0xff; }
	639	else if(low_offs >= 0x38 && low_offs <= 0x3b) { logerror("Cache disk unit read %02x\n",low_offs & 7); return 0xff; }
	640	else if(low_offs >= 0x3c && low_offs <= 0x3d) { logerror("RGB superimposer read %02x\n",low_offs & 1); return 0xff; }
	641	else if(low_offs >= 0x40 && low_offs <= 0x47) { logerror("IEEE-488 interface unit read %02x\n",low_offs & 7); return 0xff; }
	642	else if(low_offs >= 0x48 && low_offs <= 0x4f) { logerror("HDD (Winchester) read %02x\n",low_offs & 1); return 0xff; } //might be 0x48 - 0x50
	643	else if(low_offs == 0x51) { return smc777_joystick_r(space,0); }
	644	else if(low_offs >= 0x54 && low_offs <= 0x59) { logerror("VTR Controller read %02x\n",low_offs & 7); return 0xff; }
	645	else if(low_offs == 0x5a \|\| low_offs == 0x5b) { logerror("RAM Banking %02x\n",low_offs & 1); }
	646	else if(low_offs == 0x70) { logerror("Auto-start ROM read\n"); }
	647	else if(low_offs == 0x74) { logerror("IEEE-488 ROM read\n"); }
	648	else if(low_offs == 0x75) { logerror("VTR Controller ROM read\n"); }
	649	else if(low_offs == 0x7e \|\| low_offs == 0x7f) { logerror("Kanji ROM read %02x\n",low_offs & 1); }
	650	else if(low_offs >= 0x80) { return smc777_fbuf_r(space,offset & 0xff7f); }
	651
	652	logerror("Undefined read at %04x offset = %02x\n",space.device().safe_pc(),low_offs);
	653	return 0xff;
	654	}
	655
	656	WRITE8_MEMBER(smc777_state::smc777_io_w)
	657	{
	658	UINT8 low_offs;
	659
	660	low_offs = offset & 0xff;
	661
	662	if(low_offs <= 0x07) { smc777_vram_w(space,offset & 0xff07,data); }
	663	else if(low_offs >= 0x08 && low_offs <= 0x0f) { smc777_attr_w(space,offset & 0xff07,data); }
	664	else if(low_offs >= 0x10 && low_offs <= 0x17) { smc777_pcg_w(space,offset & 0xff07,data); }
	665	else if(low_offs >= 0x18 && low_offs <= 0x19) { smc777_6845_w(space,low_offs & 1,data); }
	666	else if(low_offs == 0x1a \|\| low_offs == 0x1b) { key_w(space,low_offs & 1,data); }
	667	else if(low_offs == 0x1c) { system_output_w(space,0,data); }
	668	else if(low_offs == 0x1d) { logerror("Printer status / strobe write %02x\n",data); }
	669	else if(low_offs == 0x1e \|\| low_offs == 0x1f) { logerror("RS-232C irq control [%02x] %02x\n",low_offs & 1,data); }
	670	else if(low_offs == 0x20) { display_reg_w(space,0,data); }
	671	else if(low_offs == 0x21) { smc777_irq_mask_w(space,0,data); }
	672	else if(low_offs == 0x22) { logerror("Printer output data %02x\n",data); }
	673	else if(low_offs == 0x23) { border_col_w(space,0,data); }
	674	else if(low_offs == 0x24) { logerror("RTC write / specify address %02x\n",data); }
	675	else if(low_offs == 0x26) { logerror("RS-232c TX %02x\n",data); }
	676	else if(low_offs >= 0x28 && low_offs <= 0x2c) { logerror("FDC 2 write %02x %02x\n",low_offs & 7,data); }
	677	else if(low_offs >= 0x2d && low_offs <= 0x2f) { logerror("RS-232c no. 2 write %02x %02x\n",low_offs & 3,data); }
	678	else if(low_offs >= 0x30 && low_offs <= 0x33) { fdc_w(space, low_offs & 3, data); }
	679	else if(low_offs >= 0x34 && low_offs <= 0x34) { floppy_select_w(space, 0, data); }
	680	else if(low_offs >= 0x35 && low_offs <= 0x37) { logerror("RS-232c no. 3 write %02x %02x\n",low_offs & 3,data); }
	681	else if(low_offs >= 0x38 && low_offs <= 0x3b) { logerror("Cache disk unit write %02x %02x\n",low_offs & 7,data); }
	682	else if(low_offs >= 0x3c && low_offs <= 0x3d) { logerror("RGB superimposer write %02x %02x\n",low_offs & 1,data); }
	683	else if(low_offs >= 0x40 && low_offs <= 0x47) { logerror("IEEE-488 interface unit write %02x %02x\n",low_offs & 7,data); }
	684	else if(low_offs >= 0x48 && low_offs <= 0x4f) { logerror("HDD (Winchester) write %02x %02x\n",low_offs & 1,data); } //might be 0x48 - 0x50
	685	else if(low_offs == 0x51) { smc777_color_mode_w(space,0,data); }
	686	else if(low_offs == 0x52) { smc777_ramdac_w(space,offset & 0xff00,data); }
	687	else if(low_offs == 0x53) { m_sn->write(space,0,data); }
	688	else if(low_offs >= 0x54 && low_offs <= 0x59) { logerror("VTR Controller write [%02x] %02x\n",low_offs & 7,data); }
	689	else if(low_offs == 0x5a \|\| low_offs == 0x5b) { logerror("RAM Banking write [%02x] %02x\n",low_offs & 1,data); }
	690	else if(low_offs == 0x70) { logerror("Auto-start ROM write %02x\n",data); }
	691	else if(low_offs == 0x74) { logerror("IEEE-488 ROM write %02x\n",data); }
	692	else if(low_offs == 0x75) { logerror("VTR Controller ROM write %02x\n",data); }
	693	else if(low_offs == 0x7e \|\| low_offs == 0x7f) { logerror("Kanji ROM write [%02x] %02x\n",low_offs & 1,data); }
	694	else if(low_offs >= 0x80) { smc777_fbuf_w(space,offset & 0xff7f,data); }
	695	else { logerror("Undefined write at %04x offset = %02x data = %02x\n",space.device().safe_pc(),low_offs,data); }
	696	}
	697
	698	static ADDRESS_MAP_START( smc777_io , AS_IO, 8, smc777_state )
609	699	ADDRESS_MAP_UNMAP_HIGH
610		AM_RANGE(0x00, 0x07) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(vram_r, vram_w)
611		AM_RANGE(0x08, 0x0f) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(attr_r, attr_w)
612		AM_RANGE(0x10, 0x17) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(pcg_r, pcg_w)
613		AM_RANGE(0x18, 0x19) AM_MIRROR(0xff00) AM_WRITE(mc6845_w)
614		AM_RANGE(0x1a, 0x1b) AM_MIRROR(0xff00) AM_READWRITE(key_r, key_w)
615		AM_RANGE(0x1c, 0x1c) AM_MIRROR(0xff00) AM_READWRITE(system_input_r, system_output_w)
616		// AM_RANGE(0x1d, 0x1d) system and control read, printer strobe write
617		// AM_RANGE(0x1e, 0x1f) rs232 irq control
618		AM_RANGE(0x20, 0x20) AM_MIRROR(0xff00) AM_READWRITE(display_reg_r, display_reg_w)
619		AM_RANGE(0x21, 0x21) AM_MIRROR(0xff00) AM_READWRITE(irq_mask_r, irq_mask_w)
620		// AM_RANGE(0x22, 0x22) printer output data
621		AM_RANGE(0x23, 0x23) AM_MIRROR(0xff00) AM_WRITE(border_col_w)
622		// AM_RANGE(0x24, 0x24) rtc write address
623		// AM_RANGE(0x25, 0x25) rtc read
624		// AM_RANGE(0x26, 0x26) rs232 #1
625		// AM_RANGE(0x28, 0x2c) fdc #2
626		// AM_RANGE(0x2d, 0x2f) rs232 #2
627		AM_RANGE(0x30, 0x33) AM_MIRROR(0xff00) AM_READWRITE(fdc_r, fdc_w)
628		AM_RANGE(0x34, 0x34) AM_MIRROR(0xff00) AM_READWRITE(fdc_request_r, floppy_select_w)
629		// AM_RANGE(0x35, 0x37) rs232 #3
630		// AM_RANGE(0x38, 0x3b) cache disk unit
631		// AM_RANGE(0x3c, 0x3d) rgb superimposer
632		// AM_RANGE(0x40, 0x47) ieee-488
633		// AM_RANGE(0x48, 0x4f) hdd (winchester)
634		AM_RANGE(0x51, 0x51) AM_MIRROR(0xff00) AM_READ_PORT("JOY_1P") AM_WRITE(color_mode_w)
635		AM_RANGE(0x52, 0x52) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_WRITE(ramdac_w)
636		AM_RANGE(0x53, 0x53) AM_MIRROR(0xff00) AM_DEVWRITE("sn1", sn76489a_device, write)
637		// AM_RANGE(0x54, 0x59) vrt controller
638		// AM_RANGE(0x5a, 0x5b) ram banking
639		// AM_RANGE(0x70, 0x70) auto-start rom
640		// AM_RANGE(0x74, 0x74) ieee-488 rom
641		// AM_RANGE(0x75, 0x75) vrt controller rom
642		// AM_RANGE(0x7e, 0x7f) kanji rom
643		AM_RANGE(0x80, 0xff) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(fbuf_r, fbuf_w)
	700	AM_RANGE(0x0000, 0xffff) AM_READWRITE(smc777_io_r,smc777_io_w)
644	701	ADDRESS_MAP_END
645	702
646	703	/* Input ports */
r248389	r248390
948	1005	}
949	1006
950	1007
951		INTERRUPT_GEN_MEMBER(smc777_state::vblank_irq)
	1008	INTERRUPT_GEN_MEMBER(smc777_state::smc777_vblank_irq)
952	1009	{
953	1010	if(m_irq_mask)
954	1011	device.execute().set_input_line(0,HOLD_LINE);
r248389	r248390
965	1022	MCFG_CPU_ADD("maincpu",Z80, MASTER_CLOCK)
966	1023	MCFG_CPU_PROGRAM_MAP(smc777_mem)
967	1024	MCFG_CPU_IO_MAP(smc777_io)
968		MCFG_CPU_VBLANK_INT_DRIVER("screen", smc777_state, vblank_irq)
	1025	MCFG_CPU_VBLANK_INT_DRIVER("screen", smc777_state, smc777_vblank_irq)
969	1026
970	1027	/* video hardware */
971	1028	MCFG_SCREEN_ADD("screen", RASTER)

trunk/src/mess/drivers/tb303.c
r248389	r248390
2	2	// copyright-holders:hap
3	3	/***************************************************************************
4	4
5		subclass of hh_ucom4_state (includes/hh_ucom4.h, drivers/hh_ucom4.c)
6
7	5	Roland TB-303 Bass Line, 1982, designed by Tadao Kikumoto
8	6	* NEC uCOM-43 MCU, labeled D650C 133
9	7	* 3*uPD444C 1024x4 Static CMOS SRAM
10	8	* board is packed with discrete components
11	9
12		TODO:
13		- still too much to list here
	10	x
14	11
15	12	***************************************************************************/
16	13
17		#include "includes/hh_ucom4.h"
	14	#include "emu.h"
	15	#include "cpu/ucom4/ucom4.h"
18	16
19	17	#include "tb303.lh"
20	18
21	19
22		class tb303_state : public hh_uc~~om4_stat~~e
	20	class tb303_state : public driver_device
23	21	{
24	22	public:
25	23	tb303_state(const machine_config &mconfig, device_type type, const char *tag)
26		: hh_ucom4_state(mconfig, type, tag),
	24	: driver_device(mconfig, type, tag),
	25	m_maincpu(*this, "maincpu"),
27	26	m_t3_off_timer(*this, "t3_off")
28	27	{ }
29	28
	29	required_device<cpu_device> m_maincpu;
30	30	required_device<timer_device> m_t3_off_timer;
31
32		UINT8 m_ram[0xc00];
33		UINT16 m_ram_address;
34		bool m_ram_ce;
35		bool m_ram_we;
36	31
37		DECLARE_WRITE8_MEMBER(ram_w);
38		DECLARE_READ8_MEMBER(ram_r);
39		DECLARE_WRITE8_MEMBER(strobe_w);
40		void refresh_ram();
41
42		DECLARE_WRITE8_MEMBER(switch_w);
43		DECLARE_READ8_MEMBER(input_r);
44		void update_leds();
45
46	32	TIMER_DEVICE_CALLBACK_MEMBER(t3_clock);
47	33	TIMER_DEVICE_CALLBACK_MEMBER(t3_off);
48	34
r248389	r248390
50	36	};
51	37
52	38
53		/***************************************************************************
54
55		Timer/Interrupt
56
57		***************************************************************************/
58
59	39	// T2 to MCU CLK: LC circuit, stable sine wave, 2.2us interval
60	40	#define TB303_T2_CLOCK_HZ 454545 /* in hz */
61	41
r248389	r248390
76	56
77	57
78	58
79		/***************************************************************************
80	59
81		I/O
82
83		***************************************************************************/
84
85		// external ram
86
87		void tb303_state::refresh_ram()
88		{
89		// MCU E2,E3 goes through a 4556 IC(pin 14,13) to one of uPD444 _CE:
90		// _Q0: N/C, _Q1: IC-5, _Q2: IC-3, _Q3: IC-4
91		m_ram_ce = true;
92		UINT8 hi = 0;
93		switch (m_port[NEC_UCOM4_PORTE] >> 2 & 3)
94		{
95		case 0: m_ram_ce = false; break;
96		case 1: hi = 0; break;
97		case 2: hi = 1; break;
98		case 3: hi = 2; break;
99		}
100
101		if (m_ram_ce)
102		{
103		// _WE must be high(read mode) for address transitions
104		if (!m_ram_we)
105		m_ram_address = hi << 10 \| (m_port[NEC_UCOM4_PORTE] << 8 & 0x300) \| m_port[NEC_UCOM4_PORTF] << 4 \| m_port[NEC_UCOM4_PORTD];
106		else
107		m_ram[m_ram_address] = m_port[NEC_UCOM4_PORTC];
108		}
109		}
110
111		WRITE8_MEMBER(tb303_state::ram_w)
112		{
113		// MCU C: RAM data
114		// MCU D,F,E: RAM address
115		m_port[offset] = data;
116		refresh_ram();
117
118		// MCU D,F01: pitch data
119		//..
120		}
121
122		READ8_MEMBER(tb303_state::ram_r)
123		{
124		// MCU C: RAM data
125		if (m_ram_ce && !m_ram_we)
126		return m_ram[m_ram_address];
127		else
128		return 0;
129		}
130
131		WRITE8_MEMBER(tb303_state::strobe_w)
132		{
133		// MCU I0: RAM _WE
134		m_ram_we = (data & 1) ? false : true;
135		refresh_ram();
136
137		// MCU I1: pitch data latch strobe
138		// MCU I2: gate signal
139
140		m_port[offset] = data;
141		}
142
143
144		// switch board
145
146		void tb303_state::update_leds()
147		{
148		// 4*4 LED matrix from port G/H:
149		/*
150		0.0 D204 1.0 D211 2.0 D217 3.0 D205
151		0.1 D206 1.1 D213 2.1 D218 3.1 D207
152		0.2 D208 1.2 D215 2.2 D220 3.2 D210
153		0.3 D209 1.3 D216 2.3 D221 3.3 D212
154		*/
155		display_matrix(4, 4, m_port[NEC_UCOM4_PORTG], m_port[NEC_UCOM4_PORTH]);
156
157		// todo: battery led
158		// todo: 4 more leds(see top-left part)
159		}
160
161		WRITE8_MEMBER(tb303_state::switch_w)
162		{
163		// MCU G: leds state
164		// MCU H: input/led mux
165		if (offset == NEC_UCOM4_PORTH)
166		m_inp_mux = data = data ^ 0xf;
167
168		m_port[offset] = data;
169		update_leds();
170		}
171
172		READ8_MEMBER(tb303_state::input_r)
173		{
174		// MCU A,B: multiplexed inputs
175		// if input mux(port H) is 0, port A status buffer & gate is selected (via Q5 NAND)
176		if (offset == NEC_UCOM4_PORTA && m_inp_mux == 0)
177		{
178		// todo..
179		return m_inp_matrix[4]->read();
180		}
181		else
182		return read_inputs(4) >> (offset*4) & 0xf;
183		}
184
185
186
187		/***************************************************************************
188
189		Inputs
190
191		***************************************************************************/
192
193	60	static INPUT_PORTS_START( tb303 )
194		PORT_START("IN.0") // H0 port A/B
195		PORT_CONFNAME( 0x03, 0x03, "Mode" )
196		PORT_CONFSETTING( 0x03, "Track Write" )
197		PORT_CONFSETTING( 0x02, "Track Play" )
198		PORT_CONFSETTING( 0x00, "Pattern Play" )
199		PORT_CONFSETTING( 0x01, "Pattern Write" )
200		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Q) PORT_NAME("DEL C#")
201		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_W) PORT_NAME("INS D#")
202		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) PORT_NAME("1 C")
203		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) PORT_NAME("2 D")
204		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_NAME("3 E")
205		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) PORT_NAME("4 F")
206
207		PORT_START("IN.1") // H1 port A/B
208		PORT_CONFNAME( 0x07, 0x00, "Track / Patt.Group" )
209		PORT_CONFSETTING( 0x00, "1 / I" )
210		PORT_CONFSETTING( 0x01, "2 / I" )
211		PORT_CONFSETTING( 0x02, "3 / II" )
212		PORT_CONFSETTING( 0x03, "4 / II" )
213		PORT_CONFSETTING( 0x04, "5 / III" )
214		PORT_CONFSETTING( 0x05, "6 / III" )
215		PORT_CONFSETTING( 0x06, "7 / IV" )
216		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
217		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) PORT_NAME("5 G")
218		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_NAME("6 A")
219		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) PORT_NAME("7 B")
220		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) PORT_NAME("8 C")
221
222		PORT_START("IN.2") // H2 port A/B
223		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_D) PORT_NAME("Pattern Clear")
224		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_F) PORT_NAME("Function")
225		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_A) PORT_NAME("Pitch Mode")
226		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_S) PORT_NAME("Time Mode")
227		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_NAME("9 Step")
228		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_0) PORT_NAME("0 3n")
229		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_MINUS) PORT_NAME("100 A")
230		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_EQUALS) PORT_NAME("200 B")
231
232		PORT_START("IN.3") // H3 port B
233		PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
234		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_R) PORT_NAME("F#")
235		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_T) PORT_NAME("G#")
236		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Y) PORT_NAME("A#")
237		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_BACKSPACE) PORT_NAME("Back")
238
239		PORT_START("IN.4") // H=0 port A
240		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_ENTER) PORT_NAME("Run/Stop")
241		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_SPACE) PORT_NAME("Tap")
242		PORT_BIT( 0xfc, IP_ACTIVE_HIGH, IPT_UNUSED )
243	61	INPUT_PORTS_END
244	62
245	63
r248389	r248390
252	70
253	71	void tb303_state::machine_start()
254	72	{
255		hh_ucom4_state::machine_start();
256
257		// zerofill
258		memset(m_ram, 0, sizeof(m_ram));
259		m_ram_address = 0;
260		m_ram_ce = false;
261		m_ram_we = false;
262
263		// register for savestates
264		save_item(NAME(m_ram));
265		save_item(NAME(m_ram_address));
266		save_item(NAME(m_ram_ce));
267		save_item(NAME(m_ram_we));
268	73	}
269	74
	75
270	76	static MACHINE_CONFIG_START( tb303, tb303_state )
271	77
272	78	/* basic machine hardware */
273	79	MCFG_CPU_ADD("maincpu", NEC_D650, TB303_T2_CLOCK_HZ)
274		MCFG_UCOM4_READ_A_CB(READ8(tb303_state, input_r))
275		MCFG_UCOM4_READ_B_CB(READ8(tb303_state, input_r))
276		MCFG_UCOM4_READ_C_CB(READ8(tb303_state, ram_r))
277		MCFG_UCOM4_WRITE_C_CB(WRITE8(tb303_state, ram_w))
278		MCFG_UCOM4_WRITE_D_CB(WRITE8(tb303_state, ram_w))
279		MCFG_UCOM4_WRITE_E_CB(WRITE8(tb303_state, ram_w))
280		MCFG_UCOM4_WRITE_F_CB(WRITE8(tb303_state, ram_w))
281		MCFG_UCOM4_WRITE_G_CB(WRITE8(tb303_state, switch_w))
282		MCFG_UCOM4_WRITE_H_CB(WRITE8(tb303_state, switch_w))
283		MCFG_UCOM4_WRITE_I_CB(WRITE8(tb303_state, strobe_w))
284	80
285	81	MCFG_TIMER_DRIVER_ADD_PERIODIC("t3_clock", tb303_state, t3_clock, TB303_T3_CLOCK)
286	82	MCFG_TIMER_START_DELAY(TB303_T3_CLOCK)
287	83	MCFG_TIMER_DRIVER_ADD("t3_off", tb303_state, t3_off)
288	84
289		MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_ucom4_state, display_decay_tick, attotime::from_msec(1))
290	85	MCFG_DEFAULT_LAYOUT(layout_tb303)
291	86
292	87	/* no video! */
r248389	r248390
305	100
306	101	ROM_START( tb303 )
307	102	ROM_REGION( 0x0800, "maincpu", 0 )
308		ROM_LOAD( "d650c-133.ic8", 0x0000, 0x0800, CRC(268a~~8d8b~~) SHA1(7~~a42~~36b2bc9a5cd4c80c63~~ca1a19~~3e03b~~ecfcb4c~~) )
	103	ROM_LOAD( "d650c-133.ic8", 0x0000, 0x0800, CRC(dd2f26ae) SHA1(7f5e37f38d970219dc9e5d49a20dc5335a5c0b30) )
309	104	ROM_END
310	105
311	106

trunk/src/mess/drivers/vk100.c
r248389	r248390
37	37
38	38	Tony DiCenzo, now the director of standards and architecture at Oracle, was on the team that developed the VK100
39	39	see http://startup.nmnaturalhistory.org/visitorstories/view.php?ii=79
40		Robert "Bob" C. Quinn was definitely lead engineer on the VT125
41		Robert "Bob" T. Collins was the lead engineer on the VK100
42		Pedro Ortiz (https://www.linkedin.com/pub/pedro-ortiz/16/68b/196) did the drafting for the enclosure and case
	40	Robert "Bob" C. Quinn was definitely lead engineer on the VT125 and may have been lead engineer on the VK100 as well
43	41
44	42	The prototype name for the VK100 was 'SMAKY' (Smart Keyboard)
45	43
r248389	r248390
222	220	UINT8 m_VG_MODE; // 2 bits, latched on EXEC
223	221	UINT8 m_vgGO; // activated on next SYNC pulse after EXEC
224	222	UINT8 m_ACTS;
225		UINT8 m_ADSR;
226	223	ioport_port* m_col_array[16];
227	224
228	225	DECLARE_WRITE8_MEMBER(vgLD_X);
r248389	r248390
247	244	DECLARE_WRITE_LINE_MEMBER(i8251_txrdy_int);
248	245	DECLARE_WRITE_LINE_MEMBER(i8251_rts);
249	246	UINT8 vram_read();
250		UINT8 vram_attr_read();
251	247	MC6845_UPDATE_ROW(crtc_update_row);
252	248	void vram_write(UINT8 data);
253	249
r248389	r248390
290	286	return (block>>(4*nybbleNum))&0xF;
291	287	}
292	288
293		// returns the attribute nybble for the current pixel based on X and Y regs
294		UINT8 vk100_state::vram_attr_read()
295		{
296		// XFinal is (X'&0x3FC)\|(X&0x3)
297		UINT16 XFinal = m_trans[(m_vgX&0x3FC)>>2]<<2\|(m_vgX&0x3); // appears correct
298		// EA is the effective ram address for a 16-bit block
299		UINT16 EA = ((m_vgY&0x1FE)<<5)\|(XFinal>>4); // appears correct
300		// block is the 16 bit block directly (note EA has to be <<1 to correctly index a byte)
301		UINT16 block = m_vram[(EA<<1)+1] \| (m_vram[(EA<<1)]<<8);
302		// nybbleNum is the attribute nybble, which in this case is always 3
303		UINT8 nybbleNum = 3;
304		return (block>>(4*nybbleNum))&0xF;
305		}
306
307		// writes one nybble to vram array based on X and Y regs, and updates the attrib ram if needed
308	289	void vk100_state::vram_write(UINT8 data)
309	290	{
310	291	// XFinal is (X'&0x3FC)\|(X&0x3)
r248389	r248390
449	430	}
450	431
451	432	/* port 0x45: "SOPS" screen options
452		* (handled by 74LS273 @ E55, schematic sheet 10, all signals called 'VVG1 BDx' where x is 7 to 0)
453		* Blink --Background color-- Blink Serial Serial Reverse
454		* Enable Green Red Blue Control SL1 SL0 BG/FG
455		* d7 d6 d5 d4 d3 d2 d1 d0
456		* apparently, SLx: 00 = rs232/eia(J6), 01 = 20ma(J1), 10 = hardcopy(J7), 11 = test/loopback
457		* Serial Select (SLx) routing controls are rather complex, shown on schematic
458		* page 9:
459		* VDC2 \| I8251 pins \| SYSTAT_B bits
460		* SL1 SL0 \| 8251RXD 8251RTS 8251TXD 8251/DTR 8251/DSR 8251CTS \| SYSTATB_ACTS SYSTATB_ADSR
461		* 0 0 J6 /RXD J6 /RTS J6 TXD J6 /DTR J7 URTS GND J6 /CTS J6 /DSR
462		* 0 1 J1 +-R ACTS(loop) J1 +-T J6 /DTR J7 URTS GND 8251RTS(loop) J6 /DSR
463		* 1 0 J7 DRXD J7 DRTS* J7 DTXD J6 /DTR J7 URTS GND J7 /DCTS J6 /DSR
464		* 1 1 8251TXD ACTS(loop) 8251RXD J6 /DTR J7 URTS GND 8251RTS(loop) J6 /DSR
465		* * and UCTS, the pin drives both pins on J7
	433	* Blink --Background color-- Blink Serial Select Reverse
	434	* Enable Green Red Blue Control BG/FG
	435	* d7 d6 d5 d4 d3 d2 d1 d0
	436	* apparently, 00 = rs232/eia, 01 = 20ma, 10 = hardcopy, 11 = test/loopback
466	437	*/
467	438	WRITE8_MEMBER(vk100_state::vgSOPS)
468	439	{
r248389	r248390
615	586	}
616	587
617	588	/* port 0x40-0x47: "SYSTAT A"; various status bits, poorly documented in the tech manual
618		* /GO VDM1 VDM1 VDM1 VDM1 Dip RST7.5 GND***
619		* BIT3 BIT2 BIT1 BIT0 Switch VSYNC
	589	* /GO BIT3 BIT2 BIT1 BIT0 Dip RST7.5 GND
	590	* Switch VSYNC
620	591	* d7 d6 d5 d4 d3 d2 d1 d0
621	592	bit3, 2, 1, 0 are the 4 bits output from the VRAM 12->4 multiplexer
622	593	which are also inputs to the pattern rom; they are constantly updated
r248389	r248390
626	597	d6,5,4,3 are from the 74ls298 at ic4 (right edge of pcb)
627	598	d2 is where the dipswitch values are read from, based on the offset
628	599	d1 is connected to 8085 rst7.5 (pin 7) and crtc pin 40 (VSYNC) [verified via tracing]
629		d0 is tied to GND [verified via tracing] but the schematics both tie it to GND
630		and call it LP FLAG, may be a leftover from development.
	600	d0 is tied to GND [verified via tracing]
631	601
632	602	31D reads and checks d7 in a loop
633	603	205 reads, xors with 0x55 (from reg D), ANDS result with 0x78 and branches if it is not zero (checking for bit pattern 1010?)
r248389	r248390
653	623	* after this it does something and waits for an rxrdy interrupt
654	624
655	625	shows the results of:
656		* ACTS (/CTS) ADSR (/DSR) GND GND ATTR3 ATTR2 ATTR1 ATTR0
657		* d7 d6 d5 d4 d3 d2 d1 d0
	626	* ACTS (/CTS) ? ? ? ? ? ? ?
	627	* d7 d6 d5 d4 d3 d2 d1 d0
658	628	* the ACTS (inverse of DCTS) signal lives in one of these bits (see 5-62)
659	629	* it XORs the read of systat_b with the E register (which holds 0x6)
660	630	* and checks the result
661		* The 4 attribute ram bits for the cell being pointed at by the X and Y regs are readable as the low nybble.
662		* The DSR pin is readable as bit 6.
663	631	*/
664	632	READ8_MEMBER(vk100_state::SYSTAT_B)
665	633	{
666	634	#ifdef SYSTAT_B_VERBOSE
667	635	logerror("0x%04X: SYSTAT_B Read!\n", m_maincpu->pc());
668	636	#endif
669		return (m_ACTS<<7)\|~~(m_ADSR<<6)\|vram_attr_read()~~;
	637	return (m_ACTS<<7)\|0x7F;
670	638	}
671	639
672	640	READ8_MEMBER(vk100_state::vk100_keyboard_column_r)
r248389	r248390
945	913	m_VG_MODE = 0;
946	914	m_vgGO = 0;
947	915	m_ACTS = 1;
948		m_ADSR = 1;
949	916	char kbdcol[8];
950	917	// look up all 16 tags 'the slow way' but only once on reset
951	918	for (int i = 0; i < 16; i++)
r248389	r248390
1106	1073	* Complement: M=A^(P^N)
1107	1074	* Erase: M=N
1108	1075	*/
1109		ROM_LOAD( "wb8201_656f1.m1-7643-5.pr4.ic14", 0x0000, 0x0400, CRC(e8ecf59f) SHA1(49e9d109dad3d203d45471a3f4ca4985d556161f)) // label verified from nigwil's board
	1076	ROM_LOAD( "wb8201_656f1.m1-7643-5.pr4.ic17", 0x0000, 0x0400, CRC(e8ecf59f) SHA1(49e9d109dad3d203d45471a3f4ca4985d556161f)) // label verified from nigwil's board
1110	1077
1111	1078	ROM_REGION(0x100, "trans", ROMREGION_ERASEFF )
1112	1079	/* this is the "TRANSLATOR ROM" described in figure 5-17 on page 5-27 (256*8, 82s135)
r248389	r248390
1120	1087	* \\\\\\\\- X'9 thru X'2
1121	1088	* The VT125 prom @ E60 is literally identical to this, the same exact part: 23-060B1
1122	1089	*/
1123		ROM_LOAD( "wb---0_060b1.mmi6309.pr2.ic82", 0x0000, 0x0100, CRC(198317fc) SHA1(00e97104952b3fbe03a4f18d800d608b837d10ae)) // label verified from nigwil's board
	1090	ROM_LOAD( "wb---0_060b1.mmi6309.pr2.ic77", 0x0000, 0x0100, CRC(198317fc) SHA1(00e97104952b3fbe03a4f18d800d608b837d10ae)) // label verified from nigwil's board
1124	1091
1125	1092	ROM_REGION(0x100, "dir", ROMREGION_ERASEFF )
1126	1093	/* this is the "DIRECTION ROM" == mb6309 (256x8, 82s135)
r248389	r248390
1147	1114	* \--------- UNUSED, always 0
1148	1115	* The VT125 prom @ E41 is literally identical to this, the same exact part: 23-059B1
1149	1116	*/
1150		ROM_LOAD( "wb8141_059b1.tbp18s22.pr5.ic111", 0x0000, 0x0100, CRC(4b63857a) SHA1(3217247d983521f0b0499b5c4ef6b5de9844c465)) // label verified from andy's board
	1117	ROM_LOAD( "wb8141_059b1.tbp18s22.pr5.ic108", 0x0000, 0x0100, CRC(4b63857a) SHA1(3217247d983521f0b0499b5c4ef6b5de9844c465)) // label verified from andy's board
1151	1118
1152	1119	ROM_REGION( 0x100, "ras_erase", ROMREGION_ERASEFF )
1153	1120	/* this is the "RAS/ERASE ROM" involved with driving the RAS lines and erasing VRAM dram (256*4, 82s129)
r248389	r248390
1165	1132	* \|\-------- Y11 (D out of ls191 left of hd46505) [verified via tracing]
1166	1133	* \--------- ERASE L/d5 on the vector rom [verified via tracing]
1167	1134	* data bits: 3210
1168		* \|\|\|\-- /WE for VRAM Attribute bits
1169		* \|\|\--- /WE for VRAM bits 0-3 (leftmost bits, first to be shifted out)
1170		* \|\---- /WE for VRAM bits 4-7
1171		* \----- /WE for VRAM bits 8-11 (rightmost bits, last to be shifted out)
	1135	* \|\|\|\-- ? wr_1?
	1136	* \|\|\--- ? wr_2?
	1137	* \|\---- ? wr_3?
	1138	* \----- ? wr_4?
1172	1139	* The VT125 prom E93 is mostly equivalent to the ras/erase prom; On the vt125 version, the inputs are:
1173	1140	* (X'10 NOR X'11)
1174	1141	* (Y9 NOR Y10)
r248389	r248390
1188	1155	X'2 inputs lend credence to this.
1189	1156	*
1190	1157	*/
1191		ROM_LOAD( "wb8151_573a2.mmi6301.pr3.ic41", 0x0000, 0x0100, CRC(75885a9f) SHA1(c721dad6a69c291dd86dad102ed3a8ddd620ecc4)) // label verified from nigwil's and andy's board
	1158	ROM_LOAD( "wb8151_573a2.mmi6301.pr3.ic44", 0x0000, 0x0100, CRC(75885a9f) SHA1(c721dad6a69c291dd86dad102ed3a8ddd620ecc4)) // label verified from nigwil's and andy's board
1192	1159
1193	1160	ROM_REGION( 0x100, "vector", ROMREGION_ERASEFF )
1194	1161	// WARNING: it is possible that the first two bytes of this prom are bad!
1195		// The PROM on andy's board appears to be damaged, this will need to be redumped from another board.
1196	1162	/* this is the "VECTOR ROM" (256*8, 82s135) which runs the vector generator state machine
1197	1163	* the vector rom bits are complex and are unfortunately poorly documented
1198	1164	* in the tech manual. see figure 5-23.
r248389	r248390
1228	1194	*
1229	1195	* The VT125 prom E71 and its latch E70 is mostly equivalent to the vector prom, but the address order is different
1230	1196	*/
1231		ROM_LOAD( "wb8146_058b1.mmi6309.pr1.ic99", 0x0000, 0x0100, ~~BAD_DUMP~~ CRC(71b01864) SHA1(e552f5b0bc3f443299282b1da7e9dbfec60e12bf)) // label verified from nigwil's and andy's board
	1197	ROM_LOAD( "wb8146_058b1.mmi6309.pr1.ic99", 0x0000, 0x0100, CRC(71b01864) SHA1(e552f5b0bc3f443299282b1da7e9dbfec60e12bf)) // label verified from nigwil's and andy's board
1232	1198
1233	1199	ROM_REGION( 0x20, "sync", ROMREGION_ERASEFF )
1234	1200	/* this is the "SYNC ROM" == mb6331 (32x8, 82s123)

trunk/src/mess/includes/hh_ucom4.h
r248389	r248390
1		// license:BSD-3-Clause
2		// copyright-holders:hap, Kevin Horton
3		/*
4
5		NEC uCOM4 MCU tabletops/handhelds or other simple devices,
6
7		*/
8
9		#ifndef _HH_UCOM4_H_
10		#define _HH_UCOM4_H_
11
12
13		#include "emu.h"
14		#include "cpu/ucom4/ucom4.h"
15		#include "sound/speaker.h"
16
17
18		class hh_ucom4_state : public driver_device
19		{
20		public:
21		hh_ucom4_state(const machine_config &mconfig, device_type type, const char *tag)
22		: driver_device(mconfig, type, tag),
23		m_maincpu(*this, "maincpu"),
24		m_inp_matrix(*this, "IN"),
25		m_speaker(*this, "speaker"),
26		m_display_wait(33),
27		m_display_maxy(1),
28		m_display_maxx(0)
29		{ }
30
31		// devices
32		required_device<cpu_device> m_maincpu;
33		optional_ioport_array<5> m_inp_matrix; // max 5
34		optional_device<speaker_sound_device> m_speaker;
35
36		// misc common
37		UINT8 m_port[9]; // MCU port A-I write data (optional)
38		UINT16 m_inp_mux; // multiplexed inputs mask
39
40		UINT8 read_inputs(int columns);
41
42		// display common
43		int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
44		int m_display_maxy; // display matrix number of rows
45		int m_display_maxx; // display matrix number of columns (max 31 for now)
46
47		UINT32 m_grid; // VFD current row data
48		UINT32 m_plate; // VFD current column data
49
50		UINT32 m_display_state[0x20]; // display matrix rows data (last bit is used for always-on)
51		UINT16 m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments
52		UINT32 m_display_cache[0x20]; // (internal use)
53		UINT8 m_display_decay[0x20][0x20]; // (internal use)
54
55		TIMER_DEVICE_CALLBACK_MEMBER(display_decay_tick);
56		void display_update();
57		void set_display_size(int maxx, int maxy);
58		void display_matrix(int maxx, int maxy, UINT32 setx, UINT32 sety);
59
60		protected:
61		virtual void machine_start();
62		virtual void machine_reset();
63		};
64
65
66		#endif /* _HH_UCOM4_H_ */

trunk/src/mess/layout/tb303.lay
r248389	r248390
4	4	<!-- define elements -->
5	5
6	6	<element name="led" defstate="0">
7		<disk state="0"><color red="0.2" green="0.04" blue="0.046" /></disk>
8		<disk state="1"><color red="1.0" green="0.2" blue="0.23" /></disk>
	7	<disk state="0"><color red="0.15" green="0.03" blue="0.03" /></disk>
	8	<disk state="1"><color red="1.0" green="0.3" blue="0.3" /></disk>
9	9	</element>
10	10
11	11
	12
12	13	<!-- build screen -->
13	14
14	15	<view name="Internal Layout">
15	16	<bounds left="0" right="100" top="0" bottom="100" />
16	17
17		<!-- 21 LEDs: D201-D221 -->
18
19		<bezel name="x.0" element="led"><bounds x="1" y="10" width="1" height="1" /></bezel> <!-- d201 -->
20	18
21		<bezel name="x.0" element="led"><bounds x="10" y="2" width="1" height="1" /></bezel> <!-- d202 -->
22		<bezel name="x.0" element="led"><bounds x="14" y="10" width="1" height="1" /></bezel> <!-- d203 -->
23
24		<bezel name="0.0" element="led"><bounds x="20" y="10" width="1" height="1" /></bezel>
25		<bezel name="3.0" element="led"><bounds x="23" y="2" width="1" height="1" /></bezel>
26		<bezel name="0.1" element="led"><bounds x="26" y="10" width="1" height="1" /></bezel>
27		<bezel name="3.1" element="led"><bounds x="29" y="2" width="1" height="1" /></bezel>
28		<bezel name="0.2" element="led"><bounds x="32" y="10" width="1" height="1" /></bezel>
29		<bezel name="0.3" element="led"><bounds x="38" y="10" width="1" height="1" /></bezel>
30		<bezel name="3.2" element="led"><bounds x="41" y="2" width="1" height="1" /></bezel>
31		<bezel name="1.0" element="led"><bounds x="44" y="10" width="1" height="1" /></bezel>
32		<bezel name="3.3" element="led"><bounds x="47" y="2" width="1" height="1" /></bezel>
33		<bezel name="1.1" element="led"><bounds x="50" y="10" width="1" height="1" /></bezel>
34		<bezel name="x.0" element="led"><bounds x="53" y="2" width="1" height="1" /></bezel> <!-- d214 -->
35		<bezel name="1.2" element="led"><bounds x="56" y="10" width="1" height="1" /></bezel>
36		<bezel name="1.3" element="led"><bounds x="62" y="10" width="1" height="1" /></bezel>
37
38		<bezel name="2.0" element="led"><bounds x="68" y="10" width="1" height="1" /></bezel>
39		<bezel name="2.1" element="led"><bounds x="74" y="10" width="1" height="1" /></bezel>
40		<bezel name="x.0" element="led"><bounds x="77" y="2" width="1" height="1" /></bezel> <!-- d219 -->
41		<bezel name="2.2" element="led"><bounds x="80" y="10" width="1" height="1" /></bezel>
42		<bezel name="2.3" element="led"><bounds x="86" y="10" width="1" height="1" /></bezel>
43
44	19	</view>
45	20	</mamelayout>

trunk/src/mess/machine/msx.c
r248389	r248390
214	214
215	215	TIMER_DEVICE_CALLBACK_MEMBER(msx_state::msx2_interrupt)
216	216	{
	217	m_v9938->set_resolution(m_io_dsw->read() & 0x03);
217	218	m_v9938->interrupt();
218	219	}
219	220
220	221	TIMER_DEVICE_CALLBACK_MEMBER(msx_state::msx2p_interrupt)
221	222	{
	223	m_v9958->set_resolution(m_io_dsw->read() & 0x03);
222	224	m_v9958->interrupt();
223	225	}
224	226

trunk/src/osd/modules/render/drawogl.c
r248389	r248390
447	447	// Textures
448	448	//============================================================
449	449
450		/* ogl_texture_info holds information about a texture */
451		class ogl_texture_info
	450	/* texture_info holds information about a texture */
	451	class texture_info
452	452	{
453	453	public:
454		~~ogl_~~texture_info()
	454	texture_info()
455	455	: hash(0), flags(0), rawwidth(0), rawheight(0),
456	456	rawwidth_create(0), rawheight_create(0),
457	457	type(0), format(0), borderpix(0), xprescale(0), yprescale(0), nocopy(0),
r248389	r248390
567	567	void loadGLExtensions();
568	568	void initialize_gl();
569	569	void set_blendmode(int blendmode);
570		void texture_compute_type_subroutine(const render_texinfo texsource, ogl_texture_info texture, UINT32 flags);
571		void texture_compute_size_subroutine(ogl_texture_info *texture, UINT32 flags,
	570	void texture_compute_type_subroutine(const render_texinfo texsource, texture_info texture, UINT32 flags);
	571	void texture_compute_size_subroutine(texture_info *texture, UINT32 flags,
572	572	UINT32 width, UINT32 height,
573	573	int* p_width, int* p_height, int* p_width_create, int* p_height_create);
574		void texture_compute_size_type(const render_texinfo texsource, ogl_texture_info texture, UINT32 flags);
575		ogl_texture_info texture_create(const render_texinfo texsource, UINT32 flags);
576		int texture_shader_create(const render_texinfo texsource, ogl_texture_info texture, UINT32 flags);
577		ogl_texture_info texture_find(const render_primitive prim);
578		void texture_coord_update(ogl_texture_info texture, const render_primitive prim, int shaderIdx);
579		void texture_mpass_flip(ogl_texture_info *texture, int shaderIdx);
580		void texture_shader_update(ogl_texture_info texture, render_container container, int shaderIdx);
581		ogl_texture_info * texture_update(const render_primitive *prim, int shaderIdx);
582		void texture_disable(ogl_texture_info * texture);
	574	void texture_compute_size_type(const render_texinfo texsource, texture_info texture, UINT32 flags);
	575	texture_info texture_create(const render_texinfo texsource, UINT32 flags);
	576	int texture_shader_create(const render_texinfo texsource, texture_info texture, UINT32 flags);
	577	texture_info texture_find(const render_primitive prim);
	578	void texture_coord_update(texture_info texture, const render_primitive prim, int shaderIdx);
	579	void texture_mpass_flip(texture_info *texture, int shaderIdx);
	580	void texture_shader_update(texture_info texture, render_container container, int shaderIdx);
	581	texture_info * texture_update(const render_primitive *prim, int shaderIdx);
	582	void texture_disable(texture_info * texture);
583	583	void texture_all_disable();
584	584
585	585	INT32 m_blittimer;
r248389	r248390
591	591
592	592	int m_initialized; // is everything well initialized, i.e. all GL stuff etc.
593	593	// 3D info (GL mode only)
594		~~ogl_~~texture_info * m_texhash[HASH_SIZE + OVERFLOW_SIZE];
	594	texture_info * m_texhash[HASH_SIZE + OVERFLOW_SIZE];
595	595	int m_last_blendmode; // previous blendmode
596	596	INT32 m_texture_max_width; // texture maximum width
597	597	INT32 m_texture_max_height; // texture maximum height
r248389	r248390
734	734	// Textures
735	735	//============================================================
736	736
737		static void texture_set_data(~~ogl_~~texture_info texture, const render_texinfo texsource, UINT32 flags);
	737	static void texture_set_data(texture_info texture, const render_texinfo texsource, UINT32 flags);
738	738
739	739	//============================================================
740	740	// Static Variables
r248389	r248390
1106	1106
1107	1107	void sdl_info_ogl::destroy_all_textures()
1108	1108	{
1109		~~ogl_~~texture_info *texture = NULL;
	1109	texture_info *texture = NULL;
1110	1110	int lock=FALSE;
1111	1111	int i;
1112	1112
r248389	r248390
1499	1499	int sdl_info_ogl::draw(const int update)
1500	1500	{
1501	1501	render_primitive *prim;
1502		~~ogl_~~texture_info *texture=NULL;
	1502	texture_info *texture=NULL;
1503	1503	float vofs, hofs;
1504	1504	int pendingPrimitive=GL_NO_PRIMITIVE, curPrimitive=GL_NO_PRIMITIVE;
1505	1505
r248389	r248390
1946	1946	// we also don't want to use PBO's in the case of nocopy==TRUE,
1947	1947	// since we now might have GLSL shaders - this decision simplifies out life ;-)
1948	1948	//
1949		void sdl_info_ogl::texture_compute_type_subroutine(const render_texinfo texsource, ~~ogl_~~texture_info texture, UINT32 flags)
	1949	void sdl_info_ogl::texture_compute_type_subroutine(const render_texinfo texsource, texture_info texture, UINT32 flags)
1950	1950	{
1951	1951	texture->type = TEXTURE_TYPE_NONE;
1952	1952	texture->nocopy = FALSE;
r248389	r248390
2000	2000	return (needPow2)?gl_round_to_pow2(v):v;
2001	2001	}
2002	2002
2003		void sdl_info_ogl::texture_compute_size_subroutine(~~ogl_~~texture_info *texture, UINT32 flags,
	2003	void sdl_info_ogl::texture_compute_size_subroutine(texture_info *texture, UINT32 flags,
2004	2004	UINT32 width, UINT32 height,
2005	2005	int* p_width, int* p_height, int* p_width_create, int* p_height_create)
2006	2006	{
r248389	r248390
2051	2051	*p_height_create=height_create;
2052	2052	}
2053	2053
2054		void sdl_info_ogl::texture_compute_size_type(const render_texinfo texsource, ~~ogl_~~texture_info texture, UINT32 flags)
	2054	void sdl_info_ogl::texture_compute_size_type(const render_texinfo texsource, texture_info texture, UINT32 flags)
2055	2055	{
2056	2056	int finalheight, finalwidth;
2057	2057	int finalheight_create, finalwidth_create;
r248389	r248390
2204	2204	return 0;
2205	2205	}
2206	2206
2207		int sdl_info_ogl::texture_shader_create(const render_texinfo texsource, ~~ogl_~~texture_info texture, UINT32 flags)
	2207	int sdl_info_ogl::texture_shader_create(const render_texinfo texsource, texture_info texture, UINT32 flags)
2208	2208	{
2209	2209	int uniform_location;
2210	2210	int i;
r248389	r248390
2377	2377	return 0;
2378	2378	}
2379	2379
2380		~~ogl_~~texture_info sdl_info_ogl::texture_create(const render_texinfo texsource, UINT32 flags)
	2380	texture_info sdl_info_ogl::texture_create(const render_texinfo texsource, UINT32 flags)
2381	2381	{
2382		~~ogl_~~texture_info *texture;
	2382	texture_info *texture;
2383	2383
2384	2384	// allocate a new texture
2385		texture = global_alloc(~~ogl_~~texture_info);
	2385	texture = global_alloc(texture_info);
2386	2386
2387	2387	// fill in the core data
2388	2388	texture->hash = texture_compute_hash(texsource, flags);
r248389	r248390
2832	2832	// texture_set_data
2833	2833	//============================================================
2834	2834
2835		static void texture_set_data(~~ogl_~~texture_info texture, const render_texinfo texsource, UINT32 flags)
	2835	static void texture_set_data(texture_info texture, const render_texinfo texsource, UINT32 flags)
2836	2836	{
2837	2837	if ( texture->type == TEXTURE_TYPE_DYNAMIC )
2838	2838	{
r248389	r248390
2955	2955	// texture_find
2956	2956	//============================================================
2957	2957
2958		static int compare_texture_primitive(const ~~ogl_~~texture_info texture, const render_primitive prim)
	2958	static int compare_texture_primitive(const texture_info texture, const render_primitive prim)
2959	2959	{
2960	2960	if (texture->texinfo.base == prim->texture.base &&
2961	2961	texture->texinfo.width == prim->texture.width &&
r248389	r248390
2968	2968	return 0;
2969	2969	}
2970	2970
2971		~~ogl_~~texture_info sdl_info_ogl::texture_find(const render_primitive prim)
	2971	texture_info sdl_info_ogl::texture_find(const render_primitive prim)
2972	2972	{
2973	2973	HashT texhash = texture_compute_hash(&prim->texture, prim->flags);
2974		~~ogl_~~texture_info *texture;
	2974	texture_info *texture;
2975	2975
2976	2976	texture = m_texhash[texhash];
2977	2977	if (texture != NULL)
r248389	r248390
2993	2993	// texture_update
2994	2994	//============================================================
2995	2995
2996		void sdl_info_ogl::texture_coord_update(~~ogl_~~texture_info texture, const render_primitive prim, int shaderIdx)
	2996	void sdl_info_ogl::texture_coord_update(texture_info texture, const render_primitive prim, int shaderIdx)
2997	2997	{
2998	2998	float ustart = 0.0f, ustop = 0.0f; // beginning/ending U coordinates
2999	2999	float vstart = 0.0f, vstop = 0.0f; // beginning/ending V coordinates
r248389	r248390
3070	3070	}
3071	3071	}
3072	3072
3073		void sdl_info_ogl::texture_mpass_flip(~~ogl_~~texture_info *texture, int shaderIdx)
	3073	void sdl_info_ogl::texture_mpass_flip(texture_info *texture, int shaderIdx)
3074	3074	{
3075	3075	UINT32 mpass_src_idx = texture->mpass_dest_idx;
3076	3076
r248389	r248390
3141	3141	}
3142	3142	}
3143	3143
3144		void sdl_info_ogl::texture_shader_update(~~ogl_~~texture_info texture, render_container container, int shaderIdx)
	3144	void sdl_info_ogl::texture_shader_update(texture_info texture, render_container container, int shaderIdx)
3145	3145	{
3146	3146	int uniform_location;
3147	3147	GLfloat vid_attributes[4];
r248389	r248390
3166	3166	}
3167	3167	}
3168	3168
3169		~~ogl_~~texture_info * sdl_info_ogl::texture_update(const render_primitive *prim, int shaderIdx)
	3169	texture_info * sdl_info_ogl::texture_update(const render_primitive *prim, int shaderIdx)
3170	3170	{
3171		~~ogl_~~texture_info *texture = texture_find(prim);
	3171	texture_info *texture = texture_find(prim);
3172	3172	int texBound = 0;
3173	3173
3174	3174	// if we didn't find one, create a new texture
r248389	r248390
3239	3239	return texture;
3240	3240	}
3241	3241
3242		void sdl_info_ogl::texture_disable(~~ogl_~~texture_info * texture)
	3242	void sdl_info_ogl::texture_disable(texture_info * texture)
3243	3243	{
3244	3244	if ( texture->type == TEXTURE_TYPE_SHADER )
3245	3245	{

trunk/src/osd/osdmini/minifile.c
r248389	r248390
102	102
103	103
104	104	//============================================================
	105	// osd_truncate
	106	//============================================================
	107
	108	file_error osd_truncate(osd_file *file, UINT64 offset)
	109	{
	110	UINT32 result;
	111
	112	if (!file)
	113	return FILERR_FAILURE;
	114
	115	result = ftruncate(fileno((FILE *)file), offset);
	116	if (!result)
	117	return FILERR_FAILURE;
	118
	119	return FILERR_NONE;
	120	}
	121
	122
	123	//============================================================
105	124	// osd_rmfile
106	125	//============================================================
107	126

trunk/src/osd/sdl/sdlfile.c
r248389	r248390
375	375	{
376	376	case SDLFILE_FILE:
377	377	result = ftruncate(file->handle, offset);
378		if (result)
	378	if (!result)
379	379	return error_to_file_error(errno);
380	380	return FILERR_NONE;
381	381

trunk/src/tools/nltool.c
r248389	r248390
105	105	opt_type("y", "type", "spice", "spice:eagle", "type of file to be converted: spice,eagle", this),
106	106	opt_cmd ("c", "cmd", "run", "run\|convert\|listdevices", this),
107	107	opt_verb("v", "verbose", "be verbose - this produces lots of output", this),
108		opt_quiet("q", "quiet", "be quiet - no warnings", this),
109	108	opt_help("h", "help", "display help", this)
110	109	{}
111	110
r248389	r248390
116	115	poption_str_limit opt_type;
117	116	poption_str opt_cmd;
118	117	poption_bool opt_verb;
119		poption_bool opt_quiet;
120	118	poption_bool opt_help;
121	119	};
122	120
r248389	r248390
173	171	public:
174	172
175	173	netlist_tool_t()
176		: netlist::netlist_t(), m_opts(~~NULL~~), m_setup(NULL)
	174	: netlist::netlist_t(), m_logs(""), m_verbose(false), m_setup(NULL)
177	175	{
178	176	}
179	177
r248389	r248390
208	206	void log_setup()
209	207	{
210	208	NL_VERBOSE_OUT(("Creating dynamic logs ...\n"));
211		pstring_list_t ll(m_~~opts ? m_opts->opt_~~logs~~() : ""~~ , ":");
	209	pstring_list_t ll(m_logs, ":");
212	210	for (int i=0; i < ll.size(); i++)
213	211	{
214	212	pstring name = "log_" + ll[i];
215		/netlist_device_t nc = */ m_setup->register_dev("~~LOG~~", name);
	213	/netlist_device_t nc = */ m_setup->register_dev("nld_log", name);
216	214	m_setup->register_link(name + ".I", ll[i]);
217	215	}
218	216	}
219	217
220		~~tool_o~~ption~~s_t~~ *m_opts;
	218	pstring m_logs;
221	219
	220	bool m_verbose;
	221
222	222	protected:
223	223
224	224	void verror(const loglevel_e level, const char *format, va_list ap) const
r248389	r248390
226	226	switch (level)
227	227	{
228	228	case NL_LOG:
229		if (m_~~opts ? m_opts->opt_~~verb~~() : fal~~se)
	229	if (m_verbose)
230	230	{
231	231	vprintf(format, ap);
232	232	printf("\n");
233	233	}
234	234	break;
235	235	case NL_WARNING:
236		if (!(m_opts ? m_opts->opt_quiet() : false))
237		{
238		vprintf(format, ap);
239		printf("\n");
240		}
	236	vprintf(format, ap);
	237	printf("\n");
241	238	break;
242	239	case NL_ERROR:
243	240	vprintf(format, ap);
r248389	r248390
268	265	netlist_tool_t nt;
269	266	osd_ticks_t t = osd_ticks();
270	267
271		nt.m_opts = &opts;
272	268	nt.init();
	269	nt.m_logs = opts.opt_logs();
	270	nt.m_verbose = opts.opt_verb();
273	271	nt.read_netlist(filetobuf(opts.opt_file()), opts.opt_name());
274	272	double ttr = opts.opt_ttr();
275	273
r248389	r248390
292	290	{
293	291	netlist_tool_t nt;
294	292	nt.init();
295		const netlist::factory_list_t &list = nt.setup().factory();
	293	const netlist::factory_list_t::list_t &list = nt.setup().factory().list();
296	294
297	295	nt.setup().register_source(palloc(netlist::source_proc_t("dummy", &netlist_dummy)));
298	296	nt.setup().include("dummy");
r248389	r248390
302	300
303	301	for (int i=0; i < list.size(); i++)
304	302	{
305		netlist::base_factory_t *f = list.value_at(i);
306		pstring out = pstring::sprintf("%-20s %s(<id>", f->classname().cstr(),
307		f->name().cstr() );
	303	pstring out = pstring::sprintf("%-20s %s(<id>", list[i]->classname().cstr(),
	304	list[i]->name().cstr() );
308	305	pstring terms("");
309	306
	307	netlist::base_factory_t *f = list[i];
310	308	netlist::device_t *d = f->Create();
311	309	d->init(nt, pstring::sprintf("dummy%d", i));
312	310	d->start_dev();
r248389	r248390
320	318	terms += "," + inp;
321	319	}
322	320
323		if (f->param_desc().startsWith("+"))
	321	if (list[i]->param_desc().startsWith("+"))
324	322	{
325		out += "," + f->param_desc().substr(1);
	323	out += "," + list[i]->param_desc().substr(1);
326	324	terms = "";
327	325	}
328		else if (f->param_desc() == "-")
	326	else if (list[i]->param_desc() == "-")
329	327	{
330	328	/* no params at all */
331	329	}
332	330	else
333	331	{
334		out += "," + f->param_desc();
	332	out += "," + list[i]->param_desc();
335	333	}
336	334	out += ")";
337	335	printf("%s\n", out.cstr());

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