trunk/src/mame/drivers/ttchamp.c
| r248388 | r248389 | |
| 31 | 31 | _| 74LS244 74LS14N 74HC74 16MHz |D70116C-10 | | |
| 32 | 32 | |__________________________________________________| |
| 33 | 33 | |
| 34 | | The PCB is Spanish and manufacured by Gamart. |
| 34 | The PCB is Spanish and manufactured by Gamart. |
| 35 | 35 | |
| 36 | 36 | |
| 37 | 37 | Table tennis Championships by Gamart 1995 |
| r248388 | r248389 | |
| 46 | 46 | ttennis2/3 main program |
| 47 | 47 | ttennis1 adpcm data |
| 48 | 48 | ttennis4/5 graphics |
| 49 | | *there is a pic16c84 that i cannot dump because my programmer doesn't support it. |
| 49 | *there is a pic16c84 that I cannot dump because my programmer doesn't support it. |
| 50 | 50 | |
| 51 | 51 | Dumped by tirino73 |
| 52 | 52 | |
| r248388 | r248389 | |
| 59 | 59 | - A bunch of spurious RAM writes to ROM area (genuine bug? left-overs?) |
| 60 | 60 | |
| 61 | 61 | Notes |
| 62 | | I think the PIC is used to interface with battry backed RAM instead of an EEPROM, |
| 62 | I think the PIC is used to interface with battery backed RAM instead of an EEPROM, |
| 63 | 63 | we currently simulate this as the PIC is read protected. |
| 64 | 64 | |
| 65 | 65 | |
| r248388 | r248389 | |
| 71 | 71 | #include "sound/okim6295.h" |
| 72 | 72 | #include "machine/nvram.h" |
| 73 | 73 | |
| 74 | |
| 74 | 75 | class ttchamp_state : public driver_device |
| 75 | 76 | { |
| 76 | 77 | public: |
| r248388 | r248389 | |
| 79 | 80 | m_maincpu(*this, "maincpu"), |
| 80 | 81 | m_palette(*this, "palette") { } |
| 81 | 82 | |
| 82 | | UINT16* m_peno_mainram; |
| 83 | | |
| 83 | required_device<cpu_device> m_maincpu; |
| 84 | required_device<palette_device> m_palette; |
| 85 | |
| 84 | 86 | UINT16 m_paloff; |
| 85 | | DECLARE_WRITE16_MEMBER(paloff_w); |
| 86 | | DECLARE_WRITE16_MEMBER(pcup_prgbank_w); |
| 87 | | DECLARE_WRITE16_MEMBER(paldat_w); |
| 88 | | |
| 89 | | DECLARE_WRITE16_MEMBER(port10_w); |
| 90 | | |
| 91 | | DECLARE_WRITE16_MEMBER(port20_w); |
| 92 | | DECLARE_WRITE16_MEMBER(port62_w); |
| 93 | | |
| 94 | | DECLARE_READ16_MEMBER(port1e_r); |
| 95 | | |
| 96 | | DECLARE_READ16_MEMBER(ttchamp_pic_r); |
| 97 | | DECLARE_WRITE16_MEMBER(ttchamp_pic_w); |
| 98 | | |
| 99 | 87 | UINT16 m_port10; |
| 100 | 88 | UINT8 m_rombank; |
| 101 | | |
| 102 | | DECLARE_DRIVER_INIT(ttchamp); |
| 103 | | |
| 104 | | DECLARE_READ16_MEMBER(ttchamp_blit_start_r); |
| 105 | | |
| 106 | | DECLARE_READ16_MEMBER(ttchamp_mem_r); |
| 107 | | DECLARE_WRITE16_MEMBER(ttchamp_mem_w); |
| 108 | | |
| 109 | 89 | UINT16 m_videoram0[0x10000 / 2]; |
| 110 | 90 | UINT16 m_videoram2[0x10000 / 2]; |
| 111 | 91 | |
| 112 | | |
| 113 | 92 | enum picmode |
| 114 | 93 | { |
| 115 | 94 | PIC_IDLE = 0, |
| r248388 | r248389 | |
| 118 | 97 | PIC_SET_WRITELATCH = 3, |
| 119 | 98 | PIC_SET_READLATCH = 4 |
| 120 | 99 | |
| 121 | | } picmodex; |
| 100 | }; |
| 122 | 101 | |
| 102 | picmode m_picmodex; |
| 123 | 103 | |
| 124 | 104 | int m_pic_readaddr; |
| 125 | 105 | int m_pic_writeaddr; |
| r248388 | r248389 | |
| 133 | 113 | int m_spritesinit; |
| 134 | 114 | int m_spriteswidth; |
| 135 | 115 | int m_spritesaddr; |
| 136 | | |
| 137 | | virtual void machine_start(); |
| 138 | 116 | UINT16* m_rom16; |
| 139 | 117 | UINT8* m_rom8; |
| 140 | 118 | |
| 119 | DECLARE_WRITE16_MEMBER(paloff_w); |
| 120 | DECLARE_WRITE16_MEMBER(pcup_prgbank_w); |
| 121 | DECLARE_WRITE16_MEMBER(paldat_w); |
| 122 | |
| 123 | DECLARE_WRITE16_MEMBER(port10_w); |
| 124 | |
| 125 | DECLARE_WRITE16_MEMBER(port20_w); |
| 126 | DECLARE_WRITE16_MEMBER(port62_w); |
| 127 | |
| 128 | DECLARE_READ16_MEMBER(port1e_r); |
| 129 | |
| 130 | DECLARE_READ16_MEMBER(pic_r); |
| 131 | DECLARE_WRITE16_MEMBER(pic_w); |
| 132 | |
| 133 | DECLARE_READ16_MEMBER(blit_start_r); |
| 134 | |
| 135 | DECLARE_READ16_MEMBER(mem_r); |
| 136 | DECLARE_WRITE16_MEMBER(mem_w); |
| 137 | |
| 138 | virtual void machine_start(); |
| 141 | 139 | virtual void video_start(); |
| 142 | | UINT32 screen_update_ttchamp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 143 | | INTERRUPT_GEN_MEMBER(ttchamp_irq); |
| 144 | | required_device<cpu_device> m_maincpu; |
| 145 | | required_device<palette_device> m_palette; |
| 140 | |
| 141 | UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 142 | |
| 143 | INTERRUPT_GEN_MEMBER(irq); |
| 146 | 144 | }; |
| 147 | 145 | |
| 146 | ALLOW_SAVE_TYPE(ttchamp_state::picmode); |
| 147 | |
| 148 | |
| 148 | 149 | void ttchamp_state::machine_start() |
| 149 | 150 | { |
| 150 | 151 | m_rom16 = (UINT16*)memregion("maincpu")->base(); |
| 151 | 152 | m_rom8 = memregion("maincpu")->base(); |
| 152 | 153 | |
| 153 | | picmodex = PIC_IDLE; |
| 154 | m_picmodex = PIC_IDLE; |
| 154 | 155 | |
| 155 | 156 | m_bakram = auto_alloc_array(machine(), UINT8, 0x100); |
| 156 | 157 | machine().device<nvram_device>("backram")->set_base(m_bakram, 0x100); |
| 158 | |
| 159 | save_item(NAME(m_paloff)); |
| 160 | save_item(NAME(m_port10)); |
| 161 | save_item(NAME(m_rombank)); |
| 162 | save_item(NAME(m_videoram0)); |
| 163 | save_item(NAME(m_videoram2)); |
| 164 | save_item(NAME(m_picmodex)); |
| 165 | save_item(NAME(m_pic_readaddr)); |
| 166 | save_item(NAME(m_pic_writeaddr)); |
| 167 | save_item(NAME(m_pic_latched)); |
| 168 | save_item(NAME(m_pic_writelatched)); |
| 169 | save_item(NAME(m_mainram)); |
| 170 | save_item(NAME(m_spritesinit)); |
| 171 | save_item(NAME(m_spriteswidth)); |
| 172 | save_item(NAME(m_spritesaddr)); |
| 157 | 173 | |
| 158 | 174 | } |
| 159 | 175 | |
| r248388 | r248389 | |
| 161 | 177 | { |
| 162 | 178 | } |
| 163 | 179 | |
| 164 | | UINT32 ttchamp_state::screen_update_ttchamp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 180 | UINT32 ttchamp_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 165 | 181 | { |
| 166 | 182 | logerror("update\n"); |
| 167 | 183 | int y,x,count; |
| r248388 | r248389 | |
| 261 | 277 | m_palette->set_pen_color(m_paloff & 0x3ff,pal5bit(data>>0),pal5bit(data>>5),pal5bit(data>>10)); |
| 262 | 278 | } |
| 263 | 279 | |
| 264 | | READ16_MEMBER(ttchamp_state::ttchamp_pic_r) |
| 280 | READ16_MEMBER(ttchamp_state::pic_r) |
| 265 | 281 | { |
| 266 | 282 | // printf("%06x: read from PIC (%04x)\n", space.device().safe_pc(),mem_mask); |
| 267 | | if (picmodex == PIC_SET_READLATCH) |
| 283 | if (m_picmodex == PIC_SET_READLATCH) |
| 268 | 284 | { |
| 269 | 285 | // printf("read data %02x from %02x\n", m_pic_latched, m_pic_readaddr); |
| 270 | | picmodex = PIC_IDLE; |
| 286 | m_picmodex = PIC_IDLE; |
| 271 | 287 | |
| 272 | 288 | return m_pic_latched << 8; |
| 273 | 289 | |
| r248388 | r248389 | |
| 276 | 292 | |
| 277 | 293 | } |
| 278 | 294 | |
| 279 | | WRITE16_MEMBER(ttchamp_state::ttchamp_pic_w) |
| 295 | WRITE16_MEMBER(ttchamp_state::pic_w) |
| 280 | 296 | { |
| 281 | | // printf("%06x: write to PIC %04x (%04x) (%d)\n", space.device().safe_pc(),data,mem_mask, picmodex); |
| 282 | | if (picmodex == PIC_IDLE) |
| 297 | // printf("%06x: write to PIC %04x (%04x) (%d)\n", space.device().safe_pc(),data,mem_mask, m_picmodex); |
| 298 | if (m_picmodex == PIC_IDLE) |
| 283 | 299 | { |
| 284 | 300 | if (data == 0x11) |
| 285 | 301 | { |
| 286 | | picmodex = PIC_SET_READADDRESS; |
| 302 | m_picmodex = PIC_SET_READADDRESS; |
| 287 | 303 | // printf("state = SET_READADDRESS\n"); |
| 288 | 304 | } |
| 289 | 305 | else if (data == 0x12) |
| 290 | 306 | { |
| 291 | | picmodex = PIC_SET_WRITELATCH; |
| 307 | m_picmodex = PIC_SET_WRITELATCH; |
| 292 | 308 | // printf("latch write data.. \n" ); |
| 293 | 309 | } |
| 294 | 310 | else if (data == 0x20) |
| 295 | 311 | { |
| 296 | | picmodex = PIC_SET_WRITEADDRESS; |
| 312 | m_picmodex = PIC_SET_WRITEADDRESS; |
| 297 | 313 | // printf("state = PIC_SET_WRITEADDRESS\n"); |
| 298 | 314 | } |
| 299 | 315 | else if (data == 0x21) // write latched data |
| 300 | 316 | { |
| 301 | | picmodex = PIC_IDLE; |
| 317 | m_picmodex = PIC_IDLE; |
| 302 | 318 | m_bakram[m_pic_writeaddr] = m_pic_writelatched; |
| 303 | 319 | // printf("wrote %02x to %02x\n", m_pic_writelatched, m_pic_writeaddr); |
| 304 | 320 | } |
| r248388 | r248389 | |
| 309 | 325 | m_pic_latched = m_bakram[m_pic_readaddr>>1]; |
| 310 | 326 | |
| 311 | 327 | // printf("latch read data %02x from %02x\n",m_pic_latched, m_pic_readaddr ); |
| 312 | | picmodex = PIC_SET_READLATCH; // waiting to read... |
| 328 | m_picmodex = PIC_SET_READLATCH; // waiting to read... |
| 313 | 329 | } |
| 314 | 330 | else |
| 315 | 331 | { |
| 316 | 332 | // printf("unknown\n"); |
| 317 | 333 | } |
| 318 | 334 | } |
| 319 | | else if (picmodex == PIC_SET_READADDRESS) |
| 335 | else if (m_picmodex == PIC_SET_READADDRESS) |
| 320 | 336 | { |
| 321 | 337 | m_pic_readaddr = data; |
| 322 | | picmodex = PIC_IDLE; |
| 338 | m_picmodex = PIC_IDLE; |
| 323 | 339 | } |
| 324 | | else if (picmodex == PIC_SET_WRITEADDRESS) |
| 340 | else if (m_picmodex == PIC_SET_WRITEADDRESS) |
| 325 | 341 | { |
| 326 | 342 | m_pic_writeaddr = data; |
| 327 | | picmodex = PIC_IDLE; |
| 343 | m_picmodex = PIC_IDLE; |
| 328 | 344 | } |
| 329 | | else if (picmodex == PIC_SET_WRITELATCH) |
| 345 | else if (m_picmodex == PIC_SET_WRITELATCH) |
| 330 | 346 | { |
| 331 | 347 | m_pic_writelatched = data; |
| 332 | | picmodex = PIC_IDLE; |
| 348 | m_picmodex = PIC_IDLE; |
| 333 | 349 | } |
| 334 | 350 | |
| 335 | 351 | } |
| 336 | 352 | |
| 337 | 353 | |
| 338 | | READ16_MEMBER(ttchamp_state::ttchamp_mem_r) |
| 354 | READ16_MEMBER(ttchamp_state::mem_r) |
| 339 | 355 | { |
| 340 | 356 | // bits 0xf0 are used too, so this is likely wrong. |
| 341 | 357 | |
| r248388 | r248389 | |
| 367 | 383 | } |
| 368 | 384 | } |
| 369 | 385 | |
| 370 | | WRITE16_MEMBER(ttchamp_state::ttchamp_mem_w) |
| 386 | WRITE16_MEMBER(ttchamp_state::mem_w) |
| 371 | 387 | { |
| 372 | 388 | // this is very strange, we use the offset (address bits) not data bits to set values.. |
| 373 | 389 | // I get the impression this might actually overlay the entire address range, including RAM and regular VRAM? |
| r248388 | r248389 | |
| 484 | 500 | |
| 485 | 501 | |
| 486 | 502 | static ADDRESS_MAP_START( ttchamp_map, AS_PROGRAM, 16, ttchamp_state ) |
| 487 | | AM_RANGE(0x00000, 0xfffff) AM_READWRITE(ttchamp_mem_r, ttchamp_mem_w) |
| 503 | AM_RANGE(0x00000, 0xfffff) AM_READWRITE(mem_r, mem_w) |
| 488 | 504 | ADDRESS_MAP_END |
| 489 | 505 | |
| 490 | 506 | /* Re-use same parameters as before (one-shot) */ |
| r248388 | r248389 | |
| 494 | 510 | return 0xff; |
| 495 | 511 | } |
| 496 | 512 | |
| 497 | | READ16_MEMBER(ttchamp_state::ttchamp_blit_start_r) |
| 513 | READ16_MEMBER(ttchamp_state::blit_start_r) |
| 498 | 514 | { |
| 499 | 515 | m_spritesinit = 1; |
| 500 | 516 | return 0xff; |
| r248388 | r248389 | |
| 533 | 549 | |
| 534 | 550 | AM_RANGE(0x0006, 0x0007) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) |
| 535 | 551 | |
| 536 | | AM_RANGE(0x0018, 0x0019) AM_READ(ttchamp_blit_start_r) // read before using bus write offset as blit parameters |
| 552 | AM_RANGE(0x0018, 0x0019) AM_READ(blit_start_r) // read before using bus write offset as blit parameters |
| 537 | 553 | AM_RANGE(0x001e, 0x001f) AM_READ(port1e_r) // read before some blit operations (but not all) |
| 538 | 554 | |
| 539 | 555 | AM_RANGE(0x0008, 0x0009) AM_WRITE(paldat_w) |
| r248388 | r248389 | |
| 543 | 559 | |
| 544 | 560 | AM_RANGE(0x0020, 0x0021) AM_WRITE(port20_w) |
| 545 | 561 | |
| 546 | | AM_RANGE(0x0034, 0x0035) AM_READWRITE(ttchamp_pic_r, ttchamp_pic_w) |
| 562 | AM_RANGE(0x0034, 0x0035) AM_READWRITE(pic_r, pic_w) |
| 547 | 563 | |
| 548 | 564 | AM_RANGE(0x0062, 0x0063) AM_WRITE(port62_w) |
| 549 | 565 | |
| r248388 | r248389 | |
| 616 | 632 | INPUT_PORTS_END |
| 617 | 633 | |
| 618 | 634 | |
| 619 | | INTERRUPT_GEN_MEMBER(ttchamp_state::ttchamp_irq)/* right? */ |
| 635 | INTERRUPT_GEN_MEMBER(ttchamp_state::irq)/* right? */ |
| 620 | 636 | { |
| 621 | 637 | device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE); |
| 622 | 638 | } |
| r248388 | r248389 | |
| 626 | 642 | MCFG_CPU_ADD("maincpu", V30, 8000000) |
| 627 | 643 | MCFG_CPU_PROGRAM_MAP(ttchamp_map) |
| 628 | 644 | MCFG_CPU_IO_MAP(ttchamp_io) |
| 629 | | MCFG_CPU_VBLANK_INT_DRIVER("screen", ttchamp_state, ttchamp_irq) |
| 645 | MCFG_CPU_VBLANK_INT_DRIVER("screen", ttchamp_state, irq) |
| 630 | 646 | |
| 631 | 647 | /* video hardware */ |
| 632 | 648 | MCFG_SCREEN_ADD("screen", RASTER) |
| r248388 | r248389 | |
| 634 | 650 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) |
| 635 | 651 | MCFG_SCREEN_SIZE(1024,1024) |
| 636 | 652 | MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 200-1) |
| 637 | | MCFG_SCREEN_UPDATE_DRIVER(ttchamp_state, screen_update_ttchamp) |
| 653 | MCFG_SCREEN_UPDATE_DRIVER(ttchamp_state, screen_update) |
| 638 | 654 | MCFG_SCREEN_PALETTE("palette") |
| 639 | 655 | |
| 640 | 656 | MCFG_PALETTE_ADD("palette", 0x400) |
| r248388 | r248389 | |
| 676 | 692 | ROM_LOAD( "27c020.1", 0x000000, 0x040000, CRC(e2c4fe95) SHA1(da349035cc348db220a1e12b4c2a6021e2168425) ) |
| 677 | 693 | ROM_END |
| 678 | 694 | |
| 679 | | DRIVER_INIT_MEMBER(ttchamp_state,ttchamp) |
| 680 | | { |
| 681 | | } |
| 682 | 695 | |
| 683 | 696 | // only the graphics differ between the two sets, code section is the same |
| 684 | | GAME( 1995, ttchamp, 0, ttchamp, ttchamp, ttchamp_state, ttchamp, ROT0, "Gamart", "Table Tennis Champions", 0 ) // this has various advertising boards, including 'Electronic Devices' and 'Deniam' |
| 685 | | GAME( 1995, ttchampa,ttchamp, ttchamp, ttchamp, ttchamp_state, ttchamp, ROT0, "Gamart (Palencia Elektronik license)", "Table Tennis Champions (Palencia Elektronik license)", 0 ) // this only has Palencia Elektronik advertising boards |
| 697 | GAME( 1995, ttchamp, 0, ttchamp, ttchamp, driver_device, 0, ROT0, "Gamart", "Table Tennis Champions", GAME_SUPPORTS_SAVE ) // this has various advertising boards, including 'Electronic Devices' and 'Deniam' |
| 698 | GAME( 1995, ttchampa,ttchamp, ttchamp, ttchamp, driver_device, 0, ROT0, "Gamart (Palencia Elektronik license)", "Table Tennis Champions (Palencia Elektronik license)", GAME_SUPPORTS_SAVE ) // this only has Palencia Elektronik advertising boards |