MAME SVN History

199869 Revisions

r36368 Tuesday 10th March, 2015 at 20:39:39 UTC by Samuele Zannoli
i386.c: add sse opcodes of the form 66 0f xx and f2 0f xx (nw)

[src/emu/cpu/i386]

i386.h i386ops.h pentops.inc

trunk/src/emu/cpu/i386/i386.h
r244879	r244880
1025	1025	void mmx_punpckhdq_r64_rm64();
1026	1026	void mmx_packssdw_r64_rm64();
1027	1027	void sse_group_0fae();
	1028	void sse_group_660f71();
	1029	void sse_group_660f72();
1028	1030	void sse_group_660f73();
1029	1031	void sse_cvttps2dq_r128_rm128();
1030	1032	void sse_cvtss2sd_r128_r128m32();
r244879	r244880
1112	1114	void sse_psadbw_r64_rm64();
1113	1115	void sse_psubq_r64_rm64();
1114	1116	void sse_pshufhw_r128_rm128_i8();
	1117	void sse_packsswb_r128_rm128();
	1118	void sse_packssdw_r128_rm128();
	1119	void sse_pcmpgtb_r128_rm128();
	1120	void sse_pcmpgtw_r128_rm128();
	1121	void sse_pcmpgtd_r128_rm128();
	1122	void sse_packuswb_r128_rm128();
	1123	void sse_punpckhbw_r128_rm128();
	1124	void sse_punpckhwd_r128_rm128();
	1125	void sse_unpckhdq_r128_rm128();
	1126	void sse_punpckhqdq_r128_rm128();
	1127	void sse_pcmpeqb_r128_rm128();
	1128	void sse_pcmpeqw_r128_rm128();
	1129	void sse_pcmpeqd_r128_rm128();
	1130	void sse_paddq_r128_rm128();
	1131	void sse_pmullw_r128_rm128();
	1132	void sse_pmuludq_r128_rm128();
	1133	void sse_psubq_r128_rm128();
	1134	void sse_paddb_r128_rm128();
	1135	void sse_paddw_r128_rm128();
	1136	void sse_paddd_r128_rm128();
	1137	void sse_psubusb_r128_rm128();
	1138	void sse_psubusw_r128_rm128();
	1139	void sse_pminub_r128_rm128();
	1140	void sse_pand_r128_rm128();
	1141	void sse_pandn_r128_rm128();
	1142	void sse_paddusb_r128_rm128();
	1143	void sse_paddusw_r128_rm128();
	1144	void sse_pmaxub_r128_rm128();
	1145	void sse_pmulhuw_r128_rm128();
	1146	void sse_pmulhw_r128_rm128();
	1147	void sse_psubsw_r128_rm128();
	1148	void sse_psubsb_r128_rm128();
	1149	void sse_pminsw_r128_rm128();
	1150	void sse_pmaxsw_r128_rm128();
	1151	void sse_paddsb_r128_rm128();
	1152	void sse_paddsw_r128_rm128();
	1153	void sse_por_r128_rm128();
	1154	void sse_pxor_r128_rm128();
	1155	void sse_pmaddwd_r128_rm128();
	1156	void sse_psubb_r128_rm128();
	1157	void sse_psubw_r128_rm128();
	1158	void sse_psubd_r128_rm128();
	1159	void sse_psadbw_r128_rm128();
	1160	void sse_pavgb_r128_rm128();
	1161	void sse_pavgw_r128_rm128();
	1162	void sse_pmovmskb_r32_r128();
	1163	void sse_maskmovdqu_r128_r128();
	1164	void sse_andpd_r128_rm128();
	1165	void sse_andnpd_r128_rm128();
	1166	void sse_orpd_r128_rm128();
	1167	void sse_xorpd_r128_rm128();
	1168	void sse_unpcklpd_r128_rm128();
	1169	void sse_unpckhpd_r128_rm128();
	1170	void sse_shufpd_r128_rm128_i8();
	1171	void sse_pshufd_r128_rm128_i8();
	1172	void sse_pshuflw_r128_rm128_i8();
	1173	void sse_movmskpd_r32_r128();
	1174	void sse_ucomisd_r128_r128m64();
	1175	void sse_comisd_r128_r128m64();
	1176	void sse_psrlw_r128_rm128();
	1177	void sse_psrld_r128_rm128();
	1178	void sse_psrlq_r128_rm128();
	1179	void sse_psllw_r128_rm128();
	1180	void sse_pslld_r128_rm128();
	1181	void sse_psllq_r128_rm128();
	1182	void sse_psraw_r128_rm128();
	1183	void sse_psrad_r128_rm128();
	1184	void sse_movntdq_m128_r128();
	1185	void sse_cvttpd2dq_r128_rm128();
	1186	void sse_movq_r128m64_r128();
	1187	void sse_addsubpd_r128_rm128();
	1188	void sse_cmppd_r128_rm128_i8();
	1189	void sse_haddpd_r128_rm128();
	1190	void sse_hsubpd_r128_rm128();
	1191	void sse_sqrtpd_r128_rm128();
	1192	void sse_cvtpi2pd_r128_rm64();
	1193	void sse_cvttpd2pi_r64_rm128();
	1194	void sse_cvtpd2pi_r64_rm128();
	1195	void sse_cvtpd2ps_r128_rm128();
	1196	void sse_cvtps2dq_r128_rm128();
	1197	void sse_addpd_r128_rm128();
	1198	void sse_mulpd_r128_rm128();
	1199	void sse_subpd_r128_rm128();
	1200	void sse_minpd_r128_rm128();
	1201	void sse_divpd_r128_rm128();
	1202	void sse_maxpd_r128_rm128();
	1203	void sse_movntpd_m128_r128();
	1204	void sse_movapd_r128_rm128();
	1205	void sse_movapd_rm128_r128();
	1206	void sse_movhpd_r128_m64();
	1207	void sse_movhpd_m64_r128();
	1208	void sse_movupd_r128_rm128();
	1209	void sse_movupd_rm128_r128();
	1210	void sse_movlpd_r128_m64();
	1211	void sse_movlpd_m64_r128();
	1212	void sse_movsd_r128_r128m64();
	1213	void sse_movsd_r128m64_r128();
	1214	void sse_movddup_r128_r128m64();
	1215	void sse_cvtsi2sd_r128_rm32();
	1216	void sse_cvttsd2si_r32_r128m64();
	1217	void sse_cvtsd2si_r32_r128m64();
	1218	void sse_sqrtsd_r128_r128m64();
	1219	void sse_addsd_r128_r128m64();
	1220	void sse_mulsd_r128_r128m64();
	1221	void sse_cvtsd2ss_r128_r128m64();
	1222	void sse_subsd_r128_r128m64();
	1223	void sse_minsd_r128_r128m64();
	1224	void sse_divsd_r128_r128m64();
	1225	void sse_maxsd_r128_r128m64();
	1226	void sse_haddps_r128_rm128();
	1227	void sse_hsubps_r128_rm128();
	1228	void sse_cmpsd_r128_r128m64_i8();
	1229	void sse_addsubps_r128_rm128();
	1230	void sse_movdq2q_r64_r128();
	1231	void sse_cvtpd2dq_r128_rm128();
	1232	void sse_lddqu_r128_m128();
1115	1233	inline void sse_predicate_compare_single(UINT8 imm8, XMM_REG d, XMM_REG s);
	1234	inline void sse_predicate_compare_double(UINT8 imm8, XMM_REG d, XMM_REG s);
1116	1235	inline void sse_predicate_compare_single_scalar(UINT8 imm8, XMM_REG d, XMM_REG s);
	1236	inline void sse_predicate_compare_double_scalar(UINT8 imm8, XMM_REG d, XMM_REG s);
1117	1237	inline floatx80 READ80(UINT32 ea);
1118	1238	inline void WRITE80(UINT32 ea, floatx80 t);
1119	1239	inline void x87_set_stack_top(int top);

trunk/src/emu/cpu/i386/i386ops.h
r244879	r244880
329	329	{ 0x32, OP_2BYTE\|OP_PENTIUM, &i386_device::pentium_rdmsr, &i386_device::pentium_rdmsr, false},
330	330	{ 0x38, OP_2BYTE\|OP_PENTIUM, &i386_device::i386_decode_three_byte38, &i386_device::i386_decode_three_byte38,false},
331	331	{ 0x3A, OP_2BYTE\|OP_PENTIUM, &i386_device::i386_decode_three_byte3a, &i386_device::i386_decode_three_byte3a,false},
332		{ 0x40, OP_2BYTE\|OP_PENTIUM, &i386_device::pentium_cmovo_r16_rm16, &i386_device::pentium_cmovo_r32_rm32, false},
	332	{ 0x40, OP_2BYTE\|OP_PENTIUM, &i386_device::pentium_cmovo_r16_rm16, &i386_device::pentium_cmovo_r32_rm32, false},
333	333	{ 0x41, OP_2BYTE\|OP_PENTIUM, &i386_device::pentium_cmovno_r16_rm16, &i386_device::pentium_cmovno_r32_rm32, false},
334	334	{ 0x42, OP_2BYTE\|OP_PENTIUM, &i386_device::pentium_cmovb_r16_rm16, &i386_device::pentium_cmovb_r32_rm32, false},
335	335	{ 0x43, OP_2BYTE\|OP_PENTIUM, &i386_device::pentium_cmovae_r16_rm16, &i386_device::pentium_cmovae_r32_rm32, false},
r244879	r244880
536	536	{ 0xD6, OP_3BYTEF3\|OP_SSE, &i386_device::sse_movq2dq_r128_r64, &i386_device::sse_movq2dq_r128_r64, false},
537	537	{ 0xE6, OP_3BYTEF3\|OP_SSE, &i386_device::sse_cvtdq2pd_r128_r128m64, &i386_device::sse_cvtdq2pd_r128_r128m64,false},
538	538	/* F2 0F ?? */
539		{ 0x10, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
540		{ 0x11, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
541		{ 0x12, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
542		{ 0x2A, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
543		{ 0x2C, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
544		{ 0x2D, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
545		{ 0x51, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
546		{ 0x58, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
547		{ 0x59, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
548		{ 0x5A, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
549		{ 0x5C, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
550		{ 0x5D, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
551		{ 0x5E, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
552		{ 0x5F, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
553		{ 0x70, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
554		{ 0x7C, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
555		{ 0x7D, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
556		{ 0xC2, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
557		{ 0xD0, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
558		{ 0xD6, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
559		{ 0xE6, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
560		{ 0xF0, OP_3BYTEF2\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
	539	{ 0x10, OP_3BYTEF2\|OP_SSE, &i386_device::sse_movsd_r128_r128m64, &i386_device::sse_movsd_r128_r128m64, false},
	540	{ 0x11, OP_3BYTEF2\|OP_SSE, &i386_device::sse_movsd_r128m64_r128, &i386_device::sse_movsd_r128m64_r128, false},
	541	{ 0x12, OP_3BYTEF2\|OP_SSE, &i386_device::sse_movddup_r128_r128m64, &i386_device::sse_movddup_r128_r128m64,false},
	542	{ 0x2A, OP_3BYTEF2\|OP_SSE, &i386_device::sse_cvtsi2sd_r128_rm32, &i386_device::sse_cvtsi2sd_r128_rm32, false},
	543	{ 0x2C, OP_3BYTEF2\|OP_SSE, &i386_device::sse_cvttsd2si_r32_r128m64, &i386_device::sse_cvttsd2si_r32_r128m64,false},
	544	{ 0x2D, OP_3BYTEF2\|OP_SSE, &i386_device::sse_cvtsd2si_r32_r128m64, &i386_device::sse_cvtsd2si_r32_r128m64,false},
	545	{ 0x51, OP_3BYTEF2\|OP_SSE, &i386_device::sse_sqrtsd_r128_r128m64, &i386_device::sse_sqrtsd_r128_r128m64, false},
	546	{ 0x58, OP_3BYTEF2\|OP_SSE, &i386_device::sse_addsd_r128_r128m64, &i386_device::sse_addsd_r128_r128m64, false},
	547	{ 0x59, OP_3BYTEF2\|OP_SSE, &i386_device::sse_mulsd_r128_r128m64, &i386_device::sse_mulsd_r128_r128m64, false},
	548	{ 0x5A, OP_3BYTEF2\|OP_SSE, &i386_device::sse_cvtsd2ss_r128_r128m64, &i386_device::sse_cvtsd2ss_r128_r128m64,false},
	549	{ 0x5C, OP_3BYTEF2\|OP_SSE, &i386_device::sse_subsd_r128_r128m64, &i386_device::sse_subsd_r128_r128m64, false},
	550	{ 0x5D, OP_3BYTEF2\|OP_SSE, &i386_device::sse_minsd_r128_r128m64, &i386_device::sse_minsd_r128_r128m64, false},
	551	{ 0x5E, OP_3BYTEF2\|OP_SSE, &i386_device::sse_divsd_r128_r128m64, &i386_device::sse_divsd_r128_r128m64, false},
	552	{ 0x5F, OP_3BYTEF2\|OP_SSE, &i386_device::sse_maxsd_r128_r128m64, &i386_device::sse_maxsd_r128_r128m64, false},
	553	{ 0x70, OP_3BYTEF2\|OP_SSE, &i386_device::sse_pshuflw_r128_rm128_i8, &i386_device::sse_pshuflw_r128_rm128_i8,false},
	554	{ 0x7C, OP_3BYTEF2\|OP_SSE, &i386_device::sse_haddps_r128_rm128, &i386_device::sse_haddps_r128_rm128, false},
	555	{ 0x7D, OP_3BYTEF2\|OP_SSE, &i386_device::sse_hsubps_r128_rm128, &i386_device::sse_hsubps_r128_rm128, false},
	556	{ 0xC2, OP_3BYTEF2\|OP_SSE, &i386_device::sse_cmpsd_r128_r128m64_i8, &i386_device::sse_cmpsd_r128_r128m64_i8,false},
	557	{ 0xD0, OP_3BYTEF2\|OP_SSE, &i386_device::sse_addsubps_r128_rm128, &i386_device::sse_addsubps_r128_rm128, false},
	558	{ 0xD6, OP_3BYTEF2\|OP_SSE, &i386_device::sse_movdq2q_r64_r128, &i386_device::sse_movdq2q_r64_r128, false},
	559	{ 0xE6, OP_3BYTEF2\|OP_SSE, &i386_device::sse_cvtpd2dq_r128_rm128, &i386_device::sse_cvtpd2dq_r128_rm128, false},
	560	{ 0xF0, OP_3BYTEF2\|OP_SSE, &i386_device::sse_lddqu_r128_m128, &i386_device::sse_lddqu_r128_m128, false},
561	561	/* 66 0F ?? */
562		{ 0x10, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
563		{ 0x11, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
564		{ 0x12, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
565		{ 0x13, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
566		{ 0x14, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
567		{ 0x15, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
568		{ 0x16, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
569		{ 0x17, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
570		{ 0x28, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
571		{ 0x29, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
572		{ 0x2A, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
573		{ 0x2B, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
574		{ 0x2C, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
575		{ 0x2D, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
576		{ 0x2E, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
577		{ 0x2F, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
578		{ 0x50, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
579		{ 0x51, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
580		{ 0x54, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
581		{ 0x55, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
582		{ 0x56, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
583		{ 0x57, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
584		{ 0x58, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
585		{ 0x59, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
586		{ 0x5A, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
587		{ 0x5B, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
588		{ 0x5C, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
589		{ 0x5D, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
590		{ 0x5E, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
591		{ 0x5F, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
	562	{ 0x10, OP_3BYTE66\|OP_SSE, &i386_device::sse_movupd_r128_rm128, &i386_device::sse_movupd_r128_rm128, false},
	563	{ 0x11, OP_3BYTE66\|OP_SSE, &i386_device::sse_movupd_rm128_r128, &i386_device::sse_movupd_rm128_r128, false},
	564	{ 0x12, OP_3BYTE66\|OP_SSE, &i386_device::sse_movlpd_r128_m64, &i386_device::sse_movlpd_r128_m64, false},
	565	{ 0x13, OP_3BYTE66\|OP_SSE, &i386_device::sse_movlpd_m64_r128, &i386_device::sse_movlpd_m64_r128, false},
	566	{ 0x14, OP_3BYTE66\|OP_SSE, &i386_device::sse_unpcklpd_r128_rm128, &i386_device::sse_unpcklpd_r128_rm128, false},
	567	{ 0x15, OP_3BYTE66\|OP_SSE, &i386_device::sse_unpckhpd_r128_rm128, &i386_device::sse_unpckhpd_r128_rm128, false},
	568	{ 0x16, OP_3BYTE66\|OP_SSE, &i386_device::sse_movhpd_r128_m64, &i386_device::sse_movhpd_r128_m64, false},
	569	{ 0x17, OP_3BYTE66\|OP_SSE, &i386_device::sse_movhpd_m64_r128, &i386_device::sse_movhpd_m64_r128, false},
	570	{ 0x28, OP_3BYTE66\|OP_SSE, &i386_device::sse_movapd_r128_rm128, &i386_device::sse_movapd_r128_rm128, false},
	571	{ 0x29, OP_3BYTE66\|OP_SSE, &i386_device::sse_movapd_rm128_r128, &i386_device::sse_movapd_rm128_r128, false},
	572	{ 0x2A, OP_3BYTE66\|OP_SSE, &i386_device::sse_cvtpi2pd_r128_rm64, &i386_device::sse_cvtpi2pd_r128_rm64, false},
	573	{ 0x2B, OP_3BYTE66\|OP_SSE, &i386_device::sse_movntpd_m128_r128, &i386_device::sse_movntpd_m128_r128, false},
	574	{ 0x2C, OP_3BYTE66\|OP_SSE, &i386_device::sse_cvttpd2pi_r64_rm128, &i386_device::sse_cvttpd2pi_r64_rm128, false},
	575	{ 0x2D, OP_3BYTE66\|OP_SSE, &i386_device::sse_cvtpd2pi_r64_rm128, &i386_device::sse_cvtpd2pi_r64_rm128, false},
	576	{ 0x2E, OP_3BYTE66\|OP_SSE, &i386_device::sse_ucomisd_r128_r128m64, &i386_device::sse_ucomisd_r128_r128m64,false},
	577	{ 0x2F, OP_3BYTE66\|OP_SSE, &i386_device::sse_comisd_r128_r128m64, &i386_device::sse_comisd_r128_r128m64, false},
	578	{ 0x50, OP_3BYTE66\|OP_SSE, &i386_device::sse_movmskpd_r32_r128, &i386_device::sse_movmskpd_r32_r128, false},
	579	{ 0x51, OP_3BYTE66\|OP_SSE, &i386_device::sse_sqrtpd_r128_rm128, &i386_device::sse_sqrtpd_r128_rm128, false},
	580	{ 0x54, OP_3BYTE66\|OP_SSE, &i386_device::sse_andpd_r128_rm128, &i386_device::sse_andpd_r128_rm128, false},
	581	{ 0x55, OP_3BYTE66\|OP_SSE, &i386_device::sse_andnpd_r128_rm128, &i386_device::sse_andnpd_r128_rm128, false},
	582	{ 0x56, OP_3BYTE66\|OP_SSE, &i386_device::sse_orpd_r128_rm128, &i386_device::sse_orpd_r128_rm128, false},
	583	{ 0x57, OP_3BYTE66\|OP_SSE, &i386_device::sse_xorpd_r128_rm128, &i386_device::sse_xorpd_r128_rm128, false},
	584	{ 0x58, OP_3BYTE66\|OP_SSE, &i386_device::sse_addpd_r128_rm128, &i386_device::sse_addpd_r128_rm128, false},
	585	{ 0x59, OP_3BYTE66\|OP_SSE, &i386_device::sse_mulpd_r128_rm128, &i386_device::sse_mulpd_r128_rm128, false},
	586	{ 0x5A, OP_3BYTE66\|OP_SSE, &i386_device::sse_cvtpd2ps_r128_rm128, &i386_device::sse_cvtpd2ps_r128_rm128, false},
	587	{ 0x5B, OP_3BYTE66\|OP_SSE, &i386_device::sse_cvtps2dq_r128_rm128, &i386_device::sse_cvtps2dq_r128_rm128, false},
	588	{ 0x5C, OP_3BYTE66\|OP_SSE, &i386_device::sse_subpd_r128_rm128, &i386_device::sse_subpd_r128_rm128, false},
	589	{ 0x5D, OP_3BYTE66\|OP_SSE, &i386_device::sse_minpd_r128_rm128, &i386_device::sse_minpd_r128_rm128, false},
	590	{ 0x5E, OP_3BYTE66\|OP_SSE, &i386_device::sse_divpd_r128_rm128, &i386_device::sse_divpd_r128_rm128, false},
	591	{ 0x5F, OP_3BYTE66\|OP_SSE, &i386_device::sse_maxpd_r128_rm128, &i386_device::sse_maxpd_r128_rm128, false},
592	592	{ 0x60, OP_3BYTE66\|OP_SSE, &i386_device::sse_punpcklbw_r128_rm128, &i386_device::sse_punpcklbw_r128_rm128,false},
593	593	{ 0x61, OP_3BYTE66\|OP_SSE, &i386_device::sse_punpcklwd_r128_rm128, &i386_device::sse_punpcklwd_r128_rm128,false},
594	594	{ 0x62, OP_3BYTE66\|OP_SSE, &i386_device::sse_punpckldq_r128_rm128, &i386_device::sse_punpckldq_r128_rm128,false},
595		{ 0x63, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
596		{ 0x64, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
597		{ 0x65, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
598		{ 0x66, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
599		{ 0x67, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
600		{ 0x68, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
601		{ 0x69, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
602		{ 0x6A, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
603		{ 0x6B, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
	595	{ 0x63, OP_3BYTE66\|OP_SSE, &i386_device::sse_packsswb_r128_rm128, &i386_device::sse_packsswb_r128_rm128, false},
	596	{ 0x64, OP_3BYTE66\|OP_SSE, &i386_device::sse_pcmpgtb_r128_rm128, &i386_device::sse_pcmpgtb_r128_rm128, false},
	597	{ 0x65, OP_3BYTE66\|OP_SSE, &i386_device::sse_pcmpgtw_r128_rm128, &i386_device::sse_pcmpgtw_r128_rm128, false},
	598	{ 0x66, OP_3BYTE66\|OP_SSE, &i386_device::sse_pcmpgtd_r128_rm128, &i386_device::sse_pcmpgtd_r128_rm128, false},
	599	{ 0x67, OP_3BYTE66\|OP_SSE, &i386_device::sse_packuswb_r128_rm128, &i386_device::sse_packuswb_r128_rm128, false},
	600	{ 0x68, OP_3BYTE66\|OP_SSE, &i386_device::sse_punpckhbw_r128_rm128, &i386_device::sse_punpckhbw_r128_rm128,false},
	601	{ 0x69, OP_3BYTE66\|OP_SSE, &i386_device::sse_punpckhwd_r128_rm128, &i386_device::sse_punpckhwd_r128_rm128,false},
	602	{ 0x6A, OP_3BYTE66\|OP_SSE, &i386_device::sse_unpckhdq_r128_rm128, &i386_device::sse_unpckhdq_r128_rm128, false},
	603	{ 0x6B, OP_3BYTE66\|OP_SSE, &i386_device::sse_packssdw_r128_rm128, &i386_device::sse_packssdw_r128_rm128, false},
604	604	{ 0x6C, OP_3BYTE66\|OP_SSE, &i386_device::sse_punpcklqdq_r128_rm128, &i386_device::sse_punpcklqdq_r128_rm128,false},
605		{ 0x6D, OP_3BYTE66\|OP_SSE, &i386_device::~~i386~~_in~~vali~~d, &i386_device::~~i386~~_in~~vali~~d, false},
	605	{ 0x6D, OP_3BYTE66\|OP_SSE, &i386_device::sse_punpckhqdq_r128_rm128, &i386_device::sse_punpckhqdq_r128_rm128,false},
606	606	{ 0x6E, OP_3BYTE66\|OP_SSE, &i386_device::sse_movd_m128_rm32, &i386_device::sse_movd_m128_rm32, false},
607	607	{ 0x6F, OP_3BYTE66\|OP_SSE, &i386_device::sse_movdqa_m128_rm128, &i386_device::sse_movdqa_m128_rm128, false},
608		{ 0x70, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
609		{ 0x71, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
610		{ 0x72, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
	608	{ 0x70, OP_3BYTE66\|OP_SSE, &i386_device::sse_pshufd_r128_rm128_i8, &i386_device::sse_pshufd_r128_rm128_i8,false},
	609	{ 0x71, OP_3BYTE66\|OP_SSE, &i386_device::sse_group_660f71, &i386_device::sse_group_660f71, false},
	610	{ 0x72, OP_3BYTE66\|OP_SSE, &i386_device::sse_group_660f72, &i386_device::sse_group_660f72, false},
611	611	{ 0x73, OP_3BYTE66\|OP_SSE, &i386_device::sse_group_660f73, &i386_device::sse_group_660f73, false},
612		{ 0x74, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
613		{ 0x76, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
614		{ 0x7C, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
615		{ 0x7D, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
	612	{ 0x74, OP_3BYTE66\|OP_SSE, &i386_device::sse_pcmpeqb_r128_rm128, &i386_device::sse_pcmpeqb_r128_rm128, false},
	613	{ 0x75, OP_3BYTE66\|OP_SSE, &i386_device::sse_pcmpeqw_r128_rm128, &i386_device::sse_pcmpeqw_r128_rm128, false},
	614	{ 0x76, OP_3BYTE66\|OP_SSE, &i386_device::sse_pcmpeqd_r128_rm128, &i386_device::sse_pcmpeqd_r128_rm128, false},
	615	{ 0x7C, OP_3BYTE66\|OP_SSE, &i386_device::sse_haddpd_r128_rm128, &i386_device::sse_haddpd_r128_rm128, false},
	616	{ 0x7D, OP_3BYTE66\|OP_SSE, &i386_device::sse_hsubpd_r128_rm128, &i386_device::sse_hsubpd_r128_rm128, false},
616	617	{ 0x7E, OP_3BYTE66\|OP_SSE, &i386_device::sse_movd_rm32_r128, &i386_device::sse_movd_rm32_r128, false},
617	618	{ 0x7F, OP_3BYTE66\|OP_SSE, &i386_device::sse_movdqa_rm128_r128, &i386_device::sse_movdqa_rm128_r128, false},
618		{ 0xC2, OP_3BYTE66\|OP_SSE, &i386_device::i386_i~~nvalid~~, &i386_device::i386_i~~nvalid~~, false},
	619	{ 0xC2, OP_3BYTE66\|OP_SSE, &i386_device::sse_cmppd_r128_rm128_i8, &i386_device::sse_cmppd_r128_rm128_i8, false},
619	620	{ 0xC4, OP_3BYTE66\|OP_SSE, &i386_device::sse_pinsrw_r128_r32m16_i8, &i386_device::sse_pinsrw_r128_r32m16_i8,false},
620	621	{ 0xC5, OP_3BYTE66\|OP_SSE, &i386_device::sse_pextrw_reg_r128_i8, &i386_device::sse_pextrw_reg_r128_i8, false},
621		{ 0xC6, OP_3BYTE66\|OP_SSE, &i386_device::i386_i~~nvalid~~, &i386_device::i386_i~~nvalid~~, false},
	622	{ 0xC6, OP_3BYTE66\|OP_SSE, &i386_device::sse_shufpd_r128_rm128_i8, &i386_device::sse_shufpd_r128_rm128_i8,false},
622	623	{ 0xC7, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
623		{ 0xD0, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
624		{ 0xD1, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
625		{ 0xD2, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
626		{ 0xD3, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
627		{ 0xD4, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
628		{ 0xD5, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
629		{ 0xD6, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
630		{ 0xD7, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
631		{ 0xD8, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
632		{ 0xD9, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
633		{ 0xDA, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
634		{ 0xDB, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
635		{ 0xDC, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
636		{ 0xDD, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
637		{ 0xDE, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
638		{ 0xDF, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
639		{ 0xE0, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
640		{ 0xE1, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
641		{ 0xE2, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
642		{ 0xE3, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
643		{ 0xE4, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
644		{ 0xE5, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
645		{ 0xE6, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
646		{ 0xE7, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
647		{ 0xE8, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
648		{ 0xE9, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
649		{ 0xEA, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
650		{ 0xEB, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
651		{ 0xEC, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
652		{ 0xED, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
653		{ 0xEE, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
654		{ 0xEF, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
655		{ 0xF1, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
656		{ 0xF2, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
657		{ 0xF3, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
658		{ 0xF4, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
659		{ 0xF5, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
660		{ 0xF6, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
661		{ 0xF7, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
662		{ 0xF8, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
663		{ 0xF9, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
664		{ 0xFA, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
665		{ 0xFB, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
666		{ 0xFC, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
667		{ 0xFD, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
668		{ 0xFE, OP_3BYTE66\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
	624	{ 0xD0, OP_3BYTE66\|OP_SSE, &i386_device::sse_addsubpd_r128_rm128, &i386_device::sse_addsubpd_r128_rm128, false},
	625	{ 0xD1, OP_3BYTE66\|OP_SSE, &i386_device::sse_psrlw_r128_rm128, &i386_device::sse_psrlw_r128_rm128, false},
	626	{ 0xD2, OP_3BYTE66\|OP_SSE, &i386_device::sse_psrld_r128_rm128, &i386_device::sse_psrld_r128_rm128, false},
	627	{ 0xD3, OP_3BYTE66\|OP_SSE, &i386_device::sse_psrlq_r128_rm128, &i386_device::sse_psrlq_r128_rm128, false},
	628	{ 0xD4, OP_3BYTE66\|OP_SSE, &i386_device::sse_paddq_r128_rm128, &i386_device::sse_paddq_r128_rm128, false},
	629	{ 0xD5, OP_3BYTE66\|OP_SSE, &i386_device::sse_pmullw_r128_rm128, &i386_device::sse_pmullw_r128_rm128, false},
	630	{ 0xD6, OP_3BYTE66\|OP_SSE, &i386_device::sse_movq_r128m64_r128, &i386_device::sse_movq_r128m64_r128, false},
	631	{ 0xD7, OP_3BYTE66\|OP_SSE, &i386_device::sse_pmovmskb_r32_r128, &i386_device::sse_pmovmskb_r32_r128, false},
	632	{ 0xD8, OP_3BYTE66\|OP_SSE, &i386_device::sse_psubusb_r128_rm128, &i386_device::sse_psubusb_r128_rm128, false},
	633	{ 0xD9, OP_3BYTE66\|OP_SSE, &i386_device::sse_psubusw_r128_rm128, &i386_device::sse_psubusw_r128_rm128, false},
	634	{ 0xDA, OP_3BYTE66\|OP_SSE, &i386_device::sse_pminub_r128_rm128, &i386_device::sse_pminub_r128_rm128, false},
	635	{ 0xDB, OP_3BYTE66\|OP_SSE, &i386_device::sse_pand_r128_rm128, &i386_device::sse_pand_r128_rm128, false},
	636	{ 0xDC, OP_3BYTE66\|OP_SSE, &i386_device::sse_paddusb_r128_rm128, &i386_device::sse_paddusb_r128_rm128, false},
	637	{ 0xDD, OP_3BYTE66\|OP_SSE, &i386_device::sse_paddusw_r128_rm128, &i386_device::sse_paddusw_r128_rm128, false},
	638	{ 0xDE, OP_3BYTE66\|OP_SSE, &i386_device::sse_pmaxub_r128_rm128, &i386_device::sse_pmaxub_r128_rm128, false},
	639	{ 0xDF, OP_3BYTE66\|OP_SSE, &i386_device::sse_pandn_r128_rm128, &i386_device::sse_pandn_r128_rm128, false},
	640	{ 0xE0, OP_3BYTE66\|OP_SSE, &i386_device::sse_pavgb_r128_rm128, &i386_device::sse_pavgb_r128_rm128, false},
	641	{ 0xE1, OP_3BYTE66\|OP_SSE, &i386_device::sse_psraw_r128_rm128, &i386_device::sse_psraw_r128_rm128, false},
	642	{ 0xE2, OP_3BYTE66\|OP_SSE, &i386_device::sse_psrad_r128_rm128, &i386_device::sse_psrad_r128_rm128, false},
	643	{ 0xE3, OP_3BYTE66\|OP_SSE, &i386_device::sse_pavgw_r128_rm128, &i386_device::sse_pavgw_r128_rm128, false},
	644	{ 0xE4, OP_3BYTE66\|OP_SSE, &i386_device::sse_pmulhuw_r128_rm128, &i386_device::sse_pmulhuw_r128_rm128, false},
	645	{ 0xE5, OP_3BYTE66\|OP_SSE, &i386_device::sse_pmulhw_r128_rm128, &i386_device::sse_pmulhw_r128_rm128, false},
	646	{ 0xE6, OP_3BYTE66\|OP_SSE, &i386_device::sse_cvttpd2dq_r128_rm128, &i386_device::sse_cvttpd2dq_r128_rm128,false},
	647	{ 0xE7, OP_3BYTE66\|OP_SSE, &i386_device::sse_movntdq_m128_r128, &i386_device::sse_movntdq_m128_r128, false},
	648	{ 0xE8, OP_3BYTE66\|OP_SSE, &i386_device::sse_psubsb_r128_rm128, &i386_device::sse_psubsb_r128_rm128, false},
	649	{ 0xE9, OP_3BYTE66\|OP_SSE, &i386_device::sse_psubsw_r128_rm128, &i386_device::sse_psubsw_r128_rm128, false},
	650	{ 0xEA, OP_3BYTE66\|OP_SSE, &i386_device::sse_pminsw_r128_rm128, &i386_device::sse_pminsw_r128_rm128, false},
	651	{ 0xEB, OP_3BYTE66\|OP_SSE, &i386_device::sse_por_r128_rm128, &i386_device::sse_por_r128_rm128, false},
	652	{ 0xEC, OP_3BYTE66\|OP_SSE, &i386_device::sse_paddsb_r128_rm128, &i386_device::sse_paddsb_r128_rm128, false},
	653	{ 0xED, OP_3BYTE66\|OP_SSE, &i386_device::sse_paddsw_r128_rm128, &i386_device::sse_paddsw_r128_rm128, false},
	654	{ 0xEE, OP_3BYTE66\|OP_SSE, &i386_device::sse_pmaxsw_r128_rm128, &i386_device::sse_pmaxsw_r128_rm128, false},
	655	{ 0xEF, OP_3BYTE66\|OP_SSE, &i386_device::sse_pxor_r128_rm128, &i386_device::sse_pxor_r128_rm128, false},
	656	{ 0xF1, OP_3BYTE66\|OP_SSE, &i386_device::sse_psllw_r128_rm128, &i386_device::sse_psllw_r128_rm128, false},
	657	{ 0xF2, OP_3BYTE66\|OP_SSE, &i386_device::sse_pslld_r128_rm128, &i386_device::sse_pslld_r128_rm128, false},
	658	{ 0xF3, OP_3BYTE66\|OP_SSE, &i386_device::sse_psllq_r128_rm128, &i386_device::sse_psllq_r128_rm128, false},
	659	{ 0xF4, OP_3BYTE66\|OP_SSE, &i386_device::sse_pmuludq_r128_rm128, &i386_device::sse_pmuludq_r128_rm128, false},
	660	{ 0xF5, OP_3BYTE66\|OP_SSE, &i386_device::sse_pmaddwd_r128_rm128, &i386_device::sse_pmaddwd_r128_rm128, false},
	661	{ 0xF6, OP_3BYTE66\|OP_SSE, &i386_device::sse_psadbw_r128_rm128, &i386_device::sse_psadbw_r128_rm128, false},
	662	{ 0xF7, OP_3BYTE66\|OP_SSE, &i386_device::sse_maskmovdqu_r128_r128, &i386_device::sse_maskmovdqu_r128_r128,false},
	663	{ 0xF8, OP_3BYTE66\|OP_SSE, &i386_device::sse_psubb_r128_rm128, &i386_device::sse_psubb_r128_rm128, false},
	664	{ 0xF9, OP_3BYTE66\|OP_SSE, &i386_device::sse_psubw_r128_rm128, &i386_device::sse_psubw_r128_rm128, false},
	665	{ 0xFA, OP_3BYTE66\|OP_SSE, &i386_device::sse_psubd_r128_rm128, &i386_device::sse_psubd_r128_rm128, false},
	666	{ 0xFB, OP_3BYTE66\|OP_SSE, &i386_device::sse_psubq_r128_rm128, &i386_device::sse_psubq_r128_rm128, false},
	667	{ 0xFC, OP_3BYTE66\|OP_SSE, &i386_device::sse_paddb_r128_rm128, &i386_device::sse_paddb_r128_rm128, false},
	668	{ 0xFD, OP_3BYTE66\|OP_SSE, &i386_device::sse_paddw_r128_rm128, &i386_device::sse_paddw_r128_rm128, false},
	669	{ 0xFE, OP_3BYTE66\|OP_SSE, &i386_device::sse_paddd_r128_rm128, &i386_device::sse_paddd_r128_rm128, false},
669	670	/* 0F 38 ?? */
670	671	{ 0x00, OP_3BYTE38\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},
671	672	{ 0x01, OP_3BYTE38\|OP_SSE, &i386_device::i386_invalid, &i386_device::i386_invalid, false},

trunk/src/emu/cpu/i386/pentops.inc
r244879	r244880
3	3	// Pentium+ specific opcodes
4	4
5	5	extern flag float32_is_nan( float32 a ); // since its not defined in softfloat.h
	6	extern flag float64_is_nan( float64 a ); // since its not defined in softfloat.h
6	7
7	8	void i386_device::MMXPROLOG()
8	9	{
r244879	r244880
1119	1120	WRITE8(ea+n, MMX(s).b[n]);
1120	1121	}
1121	1122
	1123	void i386_device::sse_maskmovdqu_r128_r128() // Opcode 66 0f f7
	1124	{
	1125	int s,m,n;
	1126	UINT8 modm = FETCH();
	1127	UINT32 ea = GetEA(7, 0); // ds:di/edi/rdi register
	1128	s=(modm >> 3) & 7;
	1129	m=modm & 7;
	1130	for (n=0;n < 16;n++)
	1131	if (XMM(m).b[n] & 127)
	1132	WRITE8(ea+n, XMM(s).b[n]);
	1133	}
	1134
1122	1135	void i386_device::pentium_popcnt_r16_rm16() // Opcode f3 0f b8
1123	1136	{
1124	1137	UINT16 src;
r244879	r244880
1202	1215	return (INT16)dword;
1203	1216	}
1204	1217
	1218	INLINE UINT16 SaturatedSignedDwordToUnsignedWord(INT32 dword)
	1219	{
	1220	if (dword > 65535)
	1221	return 65535;
	1222	if (dword < 0)
	1223	return 0;
	1224	return (UINT16)dword;
	1225	}
	1226
1205	1227	void i386_device::mmx_group_0f71() // Opcode 0f 71
1206	1228	{
1207	1229	UINT8 modm = FETCH();
r244879	r244880
1234	1256	}
1235	1257	}
1236	1258
	1259	void i386_device::sse_group_660f71() // Opcode 66 0f 71
	1260	{
	1261	UINT8 modm = FETCH();
	1262	UINT8 imm8 = FETCH();
	1263	if (modm >= 0xc0) {
	1264	switch ((modm & 0x38) >> 3)
	1265	{
	1266	case 2: // psrlw
	1267	for (int n = 0; n < 8;n++)
	1268	XMM(modm & 7).w[n] = XMM(modm & 7).w[n] >> imm8;
	1269	break;
	1270	case 4: // psraw
	1271	for (int n = 0; n < 8;n++)
	1272	XMM(modm & 7).s[n] = XMM(modm & 7).s[n] >> imm8;
	1273	break;
	1274	case 6: // psllw
	1275	for (int n = 0; n < 8;n++)
	1276	XMM(modm & 7).w[n] = XMM(modm & 7).w[n] << imm8;
	1277	break;
	1278	default:
	1279	report_invalid_modrm("mmx_group660f71", modm);
	1280	}
	1281	}
	1282	}
	1283
1237	1284	void i386_device::mmx_group_0f72() // Opcode 0f 72
1238	1285	{
1239	1286	UINT8 modm = FETCH();
r244879	r244880
1260	1307	}
1261	1308	}
1262	1309
	1310	void i386_device::sse_group_660f72() // Opcode 66 0f 72
	1311	{
	1312	UINT8 modm = FETCH();
	1313	UINT8 imm8 = FETCH();
	1314	if (modm >= 0xc0) {
	1315	switch ((modm & 0x38) >> 3)
	1316	{
	1317	case 2: // psrld
	1318	for (int n = 0; n < 4;n++)
	1319	XMM(modm & 7).d[n] = XMM(modm & 7).d[n] >> imm8;
	1320	break;
	1321	case 4: // psrad
	1322	for (int n = 0; n < 4;n++)
	1323	XMM(modm & 7).i[n] = XMM(modm & 7).i[n] >> imm8;
	1324	break;
	1325	case 6: // pslld
	1326	for (int n = 0; n < 4;n++)
	1327	XMM(modm & 7).d[n] = XMM(modm & 7).d[n] << imm8;
	1328	break;
	1329	default:
	1330	report_invalid_modrm("mmx_group660f72", modm);
	1331	}
	1332	}
	1333	}
	1334
1263	1335	void i386_device::mmx_group_0f73() // Opcode 0f 73
1264	1336	{
1265	1337	UINT8 modm = FETCH();
r244879	r244880
2623	2695	UINT8 modrm = FETCH();
2624	2696	MMXPROLOG();
2625	2697	if( modrm >= 0xc0 ) {
2626		XMM((modrm >> 3) & 0x7).f[0] = MMX(modrm & 0x7).i[0];
2627		XMM((modrm >> 3) & 0x7).f[1] = MMX(modrm & 0x7).i[1];
	2698	XMM((modrm >> 3) & 0x7).f[0] = (float)MMX(modrm & 0x7).i[0];
	2699	XMM((modrm >> 3) & 0x7).f[1] = (float)MMX(modrm & 0x7).i[1];
2628	2700	} else {
2629	2701	MMX_REG r;
2630	2702	UINT32 ea = GetEA(modrm, 0);
2631	2703	READMMX(ea, r);
2632		XMM((modrm >> 3) & 0x7).f[0] = r.i[0];
2633		XMM((modrm >> 3) & 0x7).f[1] = r.i[1];
	2704	XMM((modrm >> 3) & 0x7).f[0] = (float)r.i[0];
	2705	XMM((modrm >> 3) & 0x7).f[1] = (float)r.i[1];
2634	2706	}
2635	2707	CYCLES(1); // TODO: correct cycle count
2636	2708	}
r244879	r244880
2821	2893	CYCLES(1); // TODO: correct cycle count
2822	2894	}
2823	2895
	2896	void i386_device::sse_movupd_r128_rm128() // Opcode 66 0f 10
	2897	{
	2898	UINT8 modrm = FETCH();
	2899	if( modrm >= 0xc0 ) {
	2900	XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
	2901	} else {
	2902	UINT32 ea = GetEA(modrm, 0);
	2903	READXMM(ea, XMM((modrm >> 3) & 0x7)); // address does not need to be 16-byte aligned
	2904	}
	2905	CYCLES(1); // TODO: correct cycle count
	2906	}
	2907
2824	2908	void i386_device::sse_movups_rm128_r128() // Opcode 0f 11
2825	2909	{
2826	2910	UINT8 modrm = FETCH();
r244879	r244880
2833	2917	CYCLES(1); // TODO: correct cycle count
2834	2918	}
2835	2919
	2920	void i386_device::sse_movupd_rm128_r128() // Opcode 66 0f 11
	2921	{
	2922	UINT8 modrm = FETCH();
	2923	if( modrm >= 0xc0 ) {
	2924	XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
	2925	} else {
	2926	UINT32 ea = GetEA(modrm, 0);
	2927	WRITEXMM(ea, XMM((modrm >> 3) & 0x7)); // address does not need to be 16-byte aligned
	2928	}
	2929	CYCLES(1); // TODO: correct cycle count
	2930	}
	2931
2836	2932	void i386_device::sse_movlps_r128_m64() // Opcode 0f 12
2837	2933	{
2838	2934	UINT8 modrm = FETCH();
r244879	r244880
2848	2944	}
2849	2945	}
2850	2946
	2947	void i386_device::sse_movlpd_r128_m64() // Opcode 66 0f 12
	2948	{
	2949	UINT8 modrm = FETCH();
	2950	if( modrm >= 0xc0 ) {
	2951	CYCLES(1); // TODO: correct cycle count
	2952	} else {
	2953	// MOVLPS opcode
	2954	UINT32 ea = GetEA(modrm, 0);
	2955	READXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
	2956	CYCLES(1); // TODO: correct cycle count
	2957	}
	2958	}
	2959
2851	2960	void i386_device::sse_movlps_m64_r128() // Opcode 0f 13
2852	2961	{
2853	2962	UINT8 modrm = FETCH();
r244879	r244880
2861	2970	}
2862	2971	}
2863	2972
	2973	void i386_device::sse_movlpd_m64_r128() // Opcode 66 0f 13
	2974	{
	2975	UINT8 modrm = FETCH();
	2976	if( modrm >= 0xc0 ) {
	2977	// unsupported by cpu
	2978	CYCLES(1); // TODO: correct cycle count
	2979	} else {
	2980	UINT32 ea = GetEA(modrm, 0);
	2981	WRITEXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
	2982	CYCLES(1); // TODO: correct cycle count
	2983	}
	2984	}
	2985
2864	2986	void i386_device::sse_movhps_r128_m64() // Opcode 0f 16
2865	2987	{
2866	2988	UINT8 modrm = FETCH();
r244879	r244880
2876	2998	}
2877	2999	}
2878	3000
	3001	void i386_device::sse_movhpd_r128_m64() // Opcode 66 0f 16
	3002	{
	3003	UINT8 modrm = FETCH();
	3004	if( modrm >= 0xc0 ) {
	3005	// unsupported by cpu
	3006	CYCLES(1); // TODO: correct cycle count
	3007	} else {
	3008	// MOVHPS opcode
	3009	UINT32 ea = GetEA(modrm, 0);
	3010	READXMM_HI64(ea, XMM((modrm >> 3) & 0x7));
	3011	CYCLES(1); // TODO: correct cycle count
	3012	}
	3013	}
	3014
2879	3015	void i386_device::sse_movhps_m64_r128() // Opcode 0f 17
2880	3016	{
2881	3017	UINT8 modrm = FETCH();
r244879	r244880
2889	3025	}
2890	3026	}
2891	3027
	3028	void i386_device::sse_movhpd_m64_r128() // Opcode 66 0f 17
	3029	{
	3030	UINT8 modrm = FETCH();
	3031	if( modrm >= 0xc0 ) {
	3032	// unsupported by cpu
	3033	CYCLES(1); // TODO: correct cycle count
	3034	} else {
	3035	UINT32 ea = GetEA(modrm, 0);
	3036	WRITEXMM_HI64(ea, XMM((modrm >> 3) & 0x7));
	3037	CYCLES(1); // TODO: correct cycle count
	3038	}
	3039	}
	3040
2892	3041	void i386_device::sse_movntps_m128_r128() // Opcode 0f 2b
2893	3042	{
2894	3043	UINT8 modrm = FETCH();
r244879	r244880
2931	3080	CYCLES(1); // TODO: correct cycle count
2932	3081	}
2933	3082
	3083	void i386_device::sse_movmskpd_r32_r128() // Opcode 66 0f 50
	3084	{
	3085	UINT8 modrm = FETCH();
	3086	if( modrm >= 0xc0 ) {
	3087	int b;
	3088	b=(XMM(modrm & 0x7).q[0] >> 63) & 1;
	3089	b=b \| ((XMM(modrm & 0x7).q[1] >> 62) & 2);
	3090	STORE_REG32(modrm, b);
	3091	}
	3092	CYCLES(1); // TODO: correct cycle count
	3093	}
	3094
2934	3095	void i386_device::sse_movq2dq_r128_r64() // Opcode f3 0f d6
2935	3096	{
2936	3097	MMXPROLOG();
r244879	r244880
3079	3240	CYCLES(1); // TODO: correct cycle count
3080	3241	}
3081	3242
	3243	void i386_device::sse_pmovmskb_r32_r128() // Opcode 66 0f d7
	3244	{
	3245	UINT8 modrm = FETCH();
	3246	if( modrm >= 0xc0 ) {
	3247	UINT32 b;
	3248	b=(XMM(modrm & 0x7).b[0] >> 7) & 1;
	3249	b=b \| ((XMM(modrm & 0x7).b[1] >> 6) & 2);
	3250	b=b \| ((XMM(modrm & 0x7).b[2] >> 5) & 4);
	3251	b=b \| ((XMM(modrm & 0x7).b[3] >> 4) & 8);
	3252	b=b \| ((XMM(modrm & 0x7).b[4] >> 3) & 16);
	3253	b=b \| ((XMM(modrm & 0x7).b[5] >> 2) & 32);
	3254	b=b \| ((XMM(modrm & 0x7).b[6] >> 1) & 64);
	3255	b=b \| ((XMM(modrm & 0x7).b[7] >> 0) & 128);
	3256	b=b \| ((XMM(modrm & 0x7).b[8] << 1) & 256);
	3257	b=b \| ((XMM(modrm & 0x7).b[9] << 2) & 512);
	3258	b=b \| ((XMM(modrm & 0x7).b[10] << 3) & 1024);
	3259	b=b \| ((XMM(modrm & 0x7).b[11] << 4) & 2048);
	3260	b=b \| ((XMM(modrm & 0x7).b[12] << 5) & 4096);
	3261	b=b \| ((XMM(modrm & 0x7).b[13] << 6) & 8192);
	3262	b=b \| ((XMM(modrm & 0x7).b[14] << 7) & 16384);
	3263	b=b \| ((XMM(modrm & 0x7).b[15] << 8) & 32768);
	3264	STORE_REG32(modrm, b);
	3265	}
	3266	CYCLES(1); // TODO: correct cycle count
	3267	}
	3268
3082	3269	void i386_device::sse_xorps() // Opcode 0f 57
3083	3270	{
3084	3271	UINT8 modrm = FETCH();
r244879	r244880
3099	3286	CYCLES(1); // TODO: correct cycle count
3100	3287	}
3101	3288
	3289	void i386_device::sse_xorpd_r128_rm128() // Opcode 66 0f 57
	3290	{
	3291	UINT8 modrm = FETCH();
	3292	if( modrm >= 0xc0 ) {
	3293	XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] ^ XMM(modrm & 0x7).q[0];
	3294	XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] ^ XMM(modrm & 0x7).q[1];
	3295	} else {
	3296	XMM_REG src;
	3297	UINT32 ea = GetEA(modrm, 0);
	3298	READXMM(ea, src);
	3299	XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] ^ src.q[0];
	3300	XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] ^ src.q[1];
	3301	}
	3302	CYCLES(1); // TODO: correct cycle count
	3303	}
	3304
3102	3305	void i386_device::sse_addps() // Opcode 0f 58
3103	3306	{
3104	3307	UINT8 modrm = FETCH();
r244879	r244880
3195	3398	CYCLES(1); // TODO: correct cycle count
3196	3399	}
3197	3400
	3401	void i386_device::sse_andpd_r128_rm128() // Opcode 66 0f 54
	3402	{
	3403	UINT8 modrm = FETCH();
	3404	if( modrm >= 0xc0 ) {
	3405	XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] & XMM(modrm & 0x7).q[0];
	3406	XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] & XMM(modrm & 0x7).q[1];
	3407	} else {
	3408	XMM_REG src;
	3409	UINT32 ea = GetEA(modrm, 0);
	3410	READXMM(ea, src);
	3411	XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] & src.q[0];
	3412	XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] & src.q[1];
	3413	}
	3414	CYCLES(1); // TODO: correct cycle count
	3415	}
	3416
3198	3417	void i386_device::sse_andnps_r128_rm128() // Opcode 0f 55
3199	3418	{
3200	3419	UINT8 modrm = FETCH();
r244879	r244880
3211	3430	CYCLES(1); // TODO: correct cycle count
3212	3431	}
3213	3432
	3433	void i386_device::sse_andnpd_r128_rm128() // Opcode 66 0f 55
	3434	{
	3435	UINT8 modrm = FETCH();
	3436	if( modrm >= 0xc0 ) {
	3437	XMM((modrm >> 3) & 0x7).q[0] = ~(XMM((modrm >> 3) & 0x7).q[0]) & XMM(modrm & 0x7).q[0];
	3438	XMM((modrm >> 3) & 0x7).q[1] = ~(XMM((modrm >> 3) & 0x7).q[1]) & XMM(modrm & 0x7).q[1];
	3439	} else {
	3440	XMM_REG src;
	3441	UINT32 ea = GetEA(modrm, 0);
	3442	READXMM(ea, src);
	3443	XMM((modrm >> 3) & 0x7).q[0] = ~(XMM((modrm >> 3) & 0x7).q[0]) & src.q[0];
	3444	XMM((modrm >> 3) & 0x7).q[1] = ~(XMM((modrm >> 3) & 0x7).q[1]) & src.q[1];
	3445	}
	3446	CYCLES(1); // TODO: correct cycle count
	3447	}
	3448
3214	3449	void i386_device::sse_orps_r128_rm128() // Opcode 0f 56
3215	3450	{
3216	3451	UINT8 modrm = FETCH();
r244879	r244880
3227	3462	CYCLES(1); // TODO: correct cycle count
3228	3463	}
3229	3464
	3465	void i386_device::sse_orpd_r128_rm128() // Opcode 66 0f 56
	3466	{
	3467	UINT8 modrm = FETCH();
	3468	if( modrm >= 0xc0 ) {
	3469	XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] \| XMM(modrm & 0x7).q[0];
	3470	XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] \| XMM(modrm & 0x7).q[1];
	3471	} else {
	3472	XMM_REG src;
	3473	UINT32 ea = GetEA(modrm, 0);
	3474	READXMM(ea, src);
	3475	XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] \| src.q[0];
	3476	XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] \| src.q[1];
	3477	}
	3478	CYCLES(1); // TODO: correct cycle count
	3479	}
	3480
3230	3481	void i386_device::sse_mulps() // Opcode 0f 59 ????
3231	3482	{
3232	3483	UINT8 modrm = FETCH();
r244879	r244880
3280	3531	return src2;
3281	3532	}
3282	3533
	3534	INLINE double sse_min_double(double src1, double src2)
	3535	{
	3536	/*if ((src1 == 0) && (src2 == 0))
	3537	return src2;
	3538	if (src1 = SNaN)
	3539	return src2;
	3540	if (src2 = SNaN)
	3541	return src2;*/
	3542	if (src1 < src2)
	3543	return src1;
	3544	return src2;
	3545	}
	3546
3283	3547	void i386_device::sse_minps() // Opcode 0f 5d
3284	3548	{
3285	3549	UINT8 modrm = FETCH();
r244879	r244880
3333	3597	return src2;
3334	3598	}
3335	3599
	3600	INLINE double sse_max_double(double src1, double src2)
	3601	{
	3602	/*if ((src1 == 0) && (src2 == 0))
	3603	return src2;
	3604	if (src1 = SNaN)
	3605	return src2;
	3606	if (src2 = SNaN)
	3607	return src2;*/
	3608	if (src1 > src2)
	3609	return src1;
	3610	return src2;
	3611	}
	3612
3336	3613	void i386_device::sse_maxps() // Opcode 0f 5f
3337	3614	{
3338	3615	UINT8 modrm = FETCH();
r244879	r244880
3516	3793	CYCLES(1); // TODO: correct cycle count
3517	3794	}
3518	3795
	3796	void i386_device::sse_comisd_r128_r128m64() // Opcode 66 0f 2f
	3797	{
	3798	float64 a,b;
	3799	UINT8 modrm = FETCH();
	3800	if( modrm >= 0xc0 ) {
	3801	a = XMM((modrm >> 3) & 0x7).q[0];
	3802	b = XMM(modrm & 0x7).q[0];
	3803	} else {
	3804	XMM_REG src;
	3805	UINT32 ea = GetEA(modrm, 0);
	3806	READXMM(ea, src);
	3807	a = XMM((modrm >> 3) & 0x7).q[0];
	3808	b = src.q[0];
	3809	}
	3810	m_OF=0;
	3811	m_SF=0;
	3812	m_AF=0;
	3813	if (float64_is_nan(a) \|\| float64_is_nan(b))
	3814	{
	3815	m_ZF = 1;
	3816	m_PF = 1;
	3817	m_CF = 1;
	3818	}
	3819	else
	3820	{
	3821	m_ZF = 0;
	3822	m_PF = 0;
	3823	m_CF = 0;
	3824	if (float64_eq(a, b))
	3825	m_ZF = 1;
	3826	if (float64_lt(a, b))
	3827	m_CF = 1;
	3828	}
	3829	// should generate exception when at least one of the operands is either QNaN or SNaN
	3830	CYCLES(1); // TODO: correct cycle count
	3831	}
	3832
3519	3833	void i386_device::sse_ucomiss_r128_r128m32() // Opcode 0f 2e
3520	3834	{
3521	3835	float32 a,b;
r244879	r244880
3553	3867	CYCLES(1); // TODO: correct cycle count
3554	3868	}
3555	3869
	3870	void i386_device::sse_ucomisd_r128_r128m64() // Opcode 66 0f 2e
	3871	{
	3872	float64 a,b;
	3873	UINT8 modrm = FETCH();
	3874	if( modrm >= 0xc0 ) {
	3875	a = XMM((modrm >> 3) & 0x7).q[0];
	3876	b = XMM(modrm & 0x7).q[0];
	3877	} else {
	3878	XMM_REG src;
	3879	UINT32 ea = GetEA(modrm, 0);
	3880	READXMM(ea, src);
	3881	a = XMM((modrm >> 3) & 0x7).q[0];
	3882	b = src.q[0];
	3883	}
	3884	m_OF=0;
	3885	m_SF=0;
	3886	m_AF=0;
	3887	if (float64_is_nan(a) \|\| float64_is_nan(b))
	3888	{
	3889	m_ZF = 1;
	3890	m_PF = 1;
	3891	m_CF = 1;
	3892	}
	3893	else
	3894	{
	3895	m_ZF = 0;
	3896	m_PF = 0;
	3897	m_CF = 0;
	3898	if (float64_eq(a, b))
	3899	m_ZF = 1;
	3900	if (float64_lt(a, b))
	3901	m_CF = 1;
	3902	}
	3903	// should generate exception when at least one of the operands is SNaN
	3904	CYCLES(1); // TODO: correct cycle count
	3905	}
	3906
3556	3907	void i386_device::sse_shufps() // Opcode 0f c6
3557	3908	{
3558	3909	UINT8 modrm = FETCH();
r244879	r244880
3590	3941	CYCLES(1); // TODO: correct cycle count
3591	3942	}
3592	3943
	3944	void i386_device::sse_shufpd_r128_rm128_i8() // Opcode 66 0f c6
	3945	{
	3946	UINT8 modrm = FETCH();
	3947	UINT8 sel = FETCH();
	3948	int m1,m2;
	3949	int s,d;
	3950	m1=sel & 1;
	3951	m2=(sel >> 1) & 1;
	3952	s=modrm & 0x7;
	3953	d=(modrm >> 3) & 0x7;
	3954	if( modrm >= 0xc0 ) {
	3955	UINT64 t1,t2;
	3956	t1=XMM(d).q[m1];
	3957	t2=XMM(s).q[m2];
	3958	XMM(d).q[0]=t1;
	3959	XMM(d).q[1]=t2;
	3960	} else {
	3961	UINT64 t1;
	3962	XMM_REG src;
	3963	UINT32 ea = GetEA(modrm, 0);
	3964	READXMM(ea, src);
	3965	t1=XMM(d).q[m1];
	3966	XMM(d).q[0]=t1;
	3967	XMM(d).q[1]=src.q[m2];
	3968	}
	3969	CYCLES(1); // TODO: correct cycle count
	3970	}
	3971
3593	3972	void i386_device::sse_unpcklps_r128_rm128() // Opcode 0f 14
3594	3973	{
3595	3974	UINT8 modrm = FETCH();
r244879	r244880
3618	3997	CYCLES(1); // TODO: correct cycle count
3619	3998	}
3620	3999
	4000	void i386_device::sse_unpcklpd_r128_rm128() // Opcode 66 0f 14
	4001	{
	4002	UINT8 modrm = FETCH();
	4003	int s,d;
	4004	s=modrm & 0x7;
	4005	d=(modrm >> 3) & 0x7;
	4006	if( modrm >= 0xc0 ) {
	4007	XMM(d).q[1]=XMM(s).q[0];
	4008	XMM(d).q[0]=XMM(d).q[0];
	4009	} else {
	4010	XMM_REG src;
	4011	UINT32 ea = GetEA(modrm, 0);
	4012	READXMM(ea, src);
	4013	XMM(d).q[1]=src.q[0];
	4014	XMM(d).q[0]=XMM(d).q[0];
	4015	}
	4016	CYCLES(1); // TODO: correct cycle count
	4017	}
	4018
3621	4019	void i386_device::sse_unpckhps_r128_rm128() // Opcode 0f 15
3622	4020	{
3623	4021	UINT8 modrm = FETCH();
r244879	r244880
3648	4046	CYCLES(1); // TODO: correct cycle count
3649	4047	}
3650	4048
	4049	void i386_device::sse_unpckhpd_r128_rm128() // Opcode 66 0f 15
	4050	{
	4051	UINT8 modrm = FETCH();
	4052	int s,d;
	4053	s=modrm & 0x7;
	4054	d=(modrm >> 3) & 0x7;
	4055	if( modrm >= 0xc0 ) {
	4056	XMM(d).q[0]=XMM(d).q[1];
	4057	XMM(d).q[1]=XMM(s).q[1];
	4058	} else {
	4059	XMM_REG src;
	4060	UINT32 ea = GetEA(modrm, 0);
	4061	READXMM(ea, src);
	4062	XMM(d).q[0]=XMM(d).q[1];
	4063	XMM(d).q[1]=src.q[1];
	4064	}
	4065	CYCLES(1); // TODO: correct cycle count
	4066	}
	4067
3651	4068	INLINE bool sse_issingleordered(float op1, float op2)
3652	4069	{
3653	4070	// TODO: true when at least one of the two source operands being compared is a NaN
r244879	r244880
3660	4077	return !((op1 != op1) \|\| (op1 != op2));
3661	4078	}
3662	4079
	4080	INLINE bool sse_isdoubleordered(double op1, double op2)
	4081	{
	4082	// TODO: true when at least one of the two source operands being compared is a NaN
	4083	return (op1 != op1) \|\| (op1 != op2);
	4084	}
	4085
	4086	INLINE bool sse_isdoubleunordered(double op1, double op2)
	4087	{
	4088	// TODO: true when neither source operand is a NaN
	4089	return !((op1 != op1) \|\| (op1 != op2));
	4090	}
	4091
3663	4092	void i386_device::sse_predicate_compare_single(UINT8 imm8, XMM_REG d, XMM_REG s)
3664	4093	{
3665	4094	switch (imm8 & 7)
3666	4095	{
3667	4096	case 0:
3668		s.d[0]=s.f[0] == s.f[0] ? 0xffffffff : 0;
	4097	d.d[0]=d.f[0] == s.f[0] ? 0xffffffff : 0;
3669	4098	d.d[1]=d.f[1] == s.f[1] ? 0xffffffff : 0;
3670	4099	d.d[2]=d.f[2] == s.f[2] ? 0xffffffff : 0;
3671	4100	d.d[3]=d.f[3] == s.f[3] ? 0xffffffff : 0;
r244879	r244880
3715	4144	}
3716	4145	}
3717	4146
	4147	void i386_device::sse_predicate_compare_double(UINT8 imm8, XMM_REG d, XMM_REG s)
	4148	{
	4149	switch (imm8 & 7)
	4150	{
	4151	case 0:
	4152	d.q[0]=d.f64[0] == s.f64[0] ? 0xffffffffffffffff : 0;
	4153	d.q[1]=d.f64[1] == s.f64[1] ? 0xffffffffffffffff : 0;
	4154	break;
	4155	case 1:
	4156	d.q[0]=d.f64[0] < s.f64[0] ? 0xffffffffffffffff : 0;
	4157	d.q[1]=d.f64[1] < s.f64[1] ? 0xffffffffffffffff : 0;
	4158	break;
	4159	case 2:
	4160	d.q[0]=d.f64[0] <= s.f64[0] ? 0xffffffffffffffff : 0;
	4161	d.q[1]=d.f64[1] <= s.f64[1] ? 0xffffffffffffffff : 0;
	4162	break;
	4163	case 3:
	4164	d.q[0]=sse_isdoubleunordered(d.f64[0], s.f64[0]) ? 0xffffffffffffffff : 0;
	4165	d.q[1]=sse_isdoubleunordered(d.f64[1], s.f64[1]) ? 0xffffffffffffffff : 0;
	4166	break;
	4167	case 4:
	4168	d.q[0]=d.f64[0] != s.f64[0] ? 0xffffffffffffffff : 0;
	4169	d.q[1]=d.f64[1] != s.f64[1] ? 0xffffffffffffffff : 0;
	4170	break;
	4171	case 5:
	4172	d.q[0]=d.f64[0] < s.f64[0] ? 0 : 0xffffffffffffffff;
	4173	d.q[1]=d.f64[1] < s.f64[1] ? 0 : 0xffffffffffffffff;
	4174	break;
	4175	case 6:
	4176	d.q[0]=d.f64[0] <= s.f64[0] ? 0 : 0xffffffffffffffff;
	4177	d.q[1]=d.f64[1] <= s.f64[1] ? 0 : 0xffffffffffffffff;
	4178	break;
	4179	case 7:
	4180	d.q[0]=sse_isdoubleordered(d.f64[0], s.f64[0]) ? 0xffffffffffffffff : 0;
	4181	d.q[1]=sse_isdoubleordered(d.f64[1], s.f64[1]) ? 0xffffffffffffffff : 0;
	4182	break;
	4183	}
	4184	}
	4185
3718	4186	void i386_device::sse_predicate_compare_single_scalar(UINT8 imm8, XMM_REG d, XMM_REG s)
3719	4187	{
3720	4188	switch (imm8 & 7)
3721	4189	{
3722	4190	case 0:
3723		s.d[0]=s.f[0] == s.f[0] ? 0xffffffff : 0;
	4191	d.d[0]=d.f[0] == s.f[0] ? 0xffffffff : 0;
3724	4192	break;
3725	4193	case 1:
3726	4194	d.d[0]=d.f[0] < s.f[0] ? 0xffffffff : 0;
r244879	r244880
3746	4214	}
3747	4215	}
3748	4216
	4217	void i386_device::sse_predicate_compare_double_scalar(UINT8 imm8, XMM_REG d, XMM_REG s)
	4218	{
	4219	switch (imm8 & 7)
	4220	{
	4221	case 0:
	4222	d.q[0]=d.f64[0] == s.f64[0] ? 0xffffffffffffffff : 0;
	4223	break;
	4224	case 1:
	4225	d.q[0]=d.f64[0] < s.f64[0] ? 0xffffffffffffffff : 0;
	4226	break;
	4227	case 2:
	4228	d.q[0]=d.f64[0] <= s.f64[0] ? 0xffffffffffffffff : 0;
	4229	break;
	4230	case 3:
	4231	d.q[0]=sse_isdoubleunordered(d.f64[0], s.f64[0]) ? 0xffffffffffffffff : 0;
	4232	break;
	4233	case 4:
	4234	d.q[0]=d.f64[0] != s.f64[0] ? 0xffffffffffffffff : 0;
	4235	break;
	4236	case 5:
	4237	d.q[0]=d.f64[0] < s.f64[0] ? 0 : 0xffffffffffffffff;
	4238	break;
	4239	case 6:
	4240	d.q[0]=d.f64[0] <= s.f64[0] ? 0 : 0xffffffffffffffff;
	4241	break;
	4242	case 7:
	4243	d.q[0]=sse_isdoubleordered(d.f64[0], s.f64[0]) ? 0xffffffffffffffff : 0;
	4244	break;
	4245	}
	4246	}
	4247
3749	4248	void i386_device::sse_cmpps_r128_rm128_i8() // Opcode 0f c2
3750	4249	{
3751	4250	UINT8 modrm = FETCH();
r244879	r244880
3767	4266	CYCLES(1); // TODO: correct cycle count
3768	4267	}
3769	4268
	4269	void i386_device::sse_cmppd_r128_rm128_i8() // Opcode 66 0f c2
	4270	{
	4271	UINT8 modrm = FETCH();
	4272	if( modrm >= 0xc0 ) {
	4273	int s,d;
	4274	UINT8 imm8 = FETCH();
	4275	s=modrm & 0x7;
	4276	d=(modrm >> 3) & 0x7;
	4277	sse_predicate_compare_double(imm8, XMM(d), XMM(s));
	4278	} else {
	4279	int d;
	4280	XMM_REG s;
	4281	UINT32 ea = GetEA(modrm, 0);
	4282	UINT8 imm8 = FETCH();
	4283	READXMM(ea, s);
	4284	d=(modrm >> 3) & 0x7;
	4285	sse_predicate_compare_double(imm8, XMM(d), s);
	4286	}
	4287	CYCLES(1); // TODO: correct cycle count
	4288	}
	4289
3770	4290	void i386_device::sse_cmpss_r128_r128m32_i8() // Opcode f3 0f c2
3771	4291	{
3772	4292	UINT8 modrm = FETCH();
r244879	r244880
3908	4428	CYCLES(1); // TODO: correct cycle count
3909	4429	}
3910	4430
	4431	void i386_device::sse_pminub_r128_rm128() // Opcode 66 0f da
	4432	{
	4433	UINT8 modrm = FETCH();
	4434	if( modrm >= 0xc0 ) {
	4435	for (int n=0;n < 16;n++)
	4436	XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] < XMM(modrm & 0x7).b[n] ? XMM((modrm >> 3) & 0x7).b[n] : XMM(modrm & 0x7).b[n];
	4437	} else {
	4438	XMM_REG s;
	4439	UINT32 ea = GetEA(modrm, 0);
	4440	READXMM(ea, s);
	4441	for (int n=0;n < 16;n++)
	4442	XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] < s.b[n] ? XMM((modrm >> 3) & 0x7).b[n] : s.b[n];
	4443	}
	4444	CYCLES(1); // TODO: correct cycle count
	4445	}
	4446
3911	4447	void i386_device::sse_pmaxub_r64_rm64() // Opcode 0f de
3912	4448	{
3913	4449	int n;
r244879	r244880
4034	4570	CYCLES(1); // TODO: correct cycle count
4035	4571	}
4036	4572
	4573	void i386_device::sse_pmuludq_r128_rm128() // Opcode 66 0f f4
	4574	{
	4575	UINT8 modrm = FETCH();
	4576	if( modrm >= 0xc0 ) {
	4577	XMM((modrm >> 3) & 0x7).q[0] = (UINT64)XMM((modrm >> 3) & 0x7).d[0] * (UINT64)XMM(modrm & 0x7).d[0];
	4578	XMM((modrm >> 3) & 0x7).q[1] = (UINT64)XMM((modrm >> 3) & 0x7).d[2] * (UINT64)XMM(modrm & 0x7).d[2];
	4579	} else {
	4580	XMM_REG s;
	4581	UINT32 ea = GetEA(modrm, 0);
	4582	READXMM(ea, s);
	4583	XMM((modrm >> 3) & 0x7).q[0] = (UINT64)XMM((modrm >> 3) & 0x7).d[0] * (UINT64)s.d[0];
	4584	XMM((modrm >> 3) & 0x7).q[1] = (UINT64)XMM((modrm >> 3) & 0x7).d[2] * (UINT64)s.d[2];
	4585	}
	4586	CYCLES(1); // TODO: correct cycle count
	4587	}
	4588
4037	4589	void i386_device::sse_psadbw_r64_rm64() // Opcode 0f f6
4038	4590	{
4039	4591	int n;
r244879	r244880
4072	4624	CYCLES(1); // TODO: correct cycle count
4073	4625	}
4074	4626
	4627	void i386_device::sse_psubq_r128_rm128() // Opcode 66 0f fb
	4628	{
	4629	UINT8 modrm = FETCH();
	4630	if( modrm >= 0xc0 ) {
	4631	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] - XMM(modrm & 7).q[0];
	4632	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] - XMM(modrm & 7).q[1];
	4633	} else {
	4634	XMM_REG s;
	4635	UINT32 ea = GetEA(modrm, 0);
	4636	READXMM(ea, s);
	4637	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] - s.q[0];
	4638	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] - s.q[1];
	4639	}
	4640	CYCLES(1); // TODO: correct cycle count
	4641	}
	4642
	4643	void i386_device::sse_pshufd_r128_rm128_i8() // Opcode 66 0f 70
	4644	{
	4645	UINT8 modrm = FETCH();
	4646	if( modrm >= 0xc0 ) {
	4647	XMM_REG t;
	4648	int s,d;
	4649	UINT8 imm8 = FETCH();
	4650	s=modrm & 0x7;
	4651	d=(modrm >> 3) & 0x7;
	4652	t.q[0]=XMM(s).q[0];
	4653	t.q[1]=XMM(s).q[1];
	4654	XMM(d).d[0]=t.d[imm8 & 3];
	4655	XMM(d).d[1]=t.d[(imm8 >> 2) & 3];
	4656	XMM(d).d[2]=t.d[(imm8 >> 4) & 3];
	4657	XMM(d).d[3]=t.d[(imm8 >> 6) & 3];
	4658	} else {
	4659	XMM_REG s;
	4660	int d=(modrm >> 3) & 0x7;
	4661	UINT32 ea = GetEA(modrm, 0);
	4662	UINT8 imm8 = FETCH();
	4663	READXMM(ea, s);
	4664	XMM(d).d[0]=s.d[(imm8 & 3)];
	4665	XMM(d).d[1]=s.d[((imm8 >> 2) & 3)];
	4666	XMM(d).d[2]=s.d[((imm8 >> 4) & 3)];
	4667	XMM(d).d[3]=s.d[((imm8 >> 6) & 3)];
	4668	}
	4669	CYCLES(1); // TODO: correct cycle count
	4670	}
	4671
	4672	void i386_device::sse_pshuflw_r128_rm128_i8() // Opcode f2 0f 70
	4673	{
	4674	UINT8 modrm = FETCH();
	4675	if( modrm >= 0xc0 ) {
	4676	XMM_REG t;
	4677	int s,d;
	4678	UINT8 imm8 = FETCH();
	4679	s=modrm & 0x7;
	4680	d=(modrm >> 3) & 0x7;
	4681	t.q[0]=XMM(s).q[0];
	4682	XMM(d).q[1]=XMM(s).q[1];
	4683	XMM(d).w[0]=t.w[imm8 & 3];
	4684	XMM(d).w[1]=t.w[(imm8 >> 2) & 3];
	4685	XMM(d).w[2]=t.w[(imm8 >> 4) & 3];
	4686	XMM(d).w[3]=t.w[(imm8 >> 6) & 3];
	4687	} else {
	4688	XMM_REG s;
	4689	int d=(modrm >> 3) & 0x7;
	4690	UINT32 ea = GetEA(modrm, 0);
	4691	UINT8 imm8 = FETCH();
	4692	READXMM(ea, s);
	4693	XMM(d).q[1]=s.q[1];
	4694	XMM(d).w[0]=s.w[imm8 & 3];
	4695	XMM(d).w[1]=s.w[(imm8 >> 2) & 3];
	4696	XMM(d).w[2]=s.w[(imm8 >> 4) & 3];
	4697	XMM(d).w[3]=s.w[(imm8 >> 6) & 3];
	4698	}
	4699	CYCLES(1); // TODO: correct cycle count
	4700	}
	4701
4075	4702	void i386_device::sse_pshufhw_r128_rm128_i8() // Opcode f3 0f 70
4076	4703	{
4077	4704	UINT8 modrm = FETCH();
r244879	r244880
4101	4728	}
4102	4729	CYCLES(1); // TODO: correct cycle count
4103	4730	}
	4731
	4732	void i386_device::sse_packsswb_r128_rm128() // Opcode 66 0f 63
	4733	{
	4734	UINT8 modrm = FETCH();
	4735	if (modrm >= 0xc0) {
	4736	XMM_REG t;
	4737	int s, d;
	4738	s = modrm & 0x7;
	4739	d = (modrm >> 3) & 0x7;
	4740	t.q[0] = XMM(s).q[0];
	4741	t.q[1] = XMM(s).q[1];
	4742	for (int n = 0; n < 8; n++)
	4743	XMM(d).c[n] = SaturatedSignedWordToSignedByte(XMM(d).s[n]);
	4744	for (int n = 0; n < 8; n++)
	4745	XMM(d).c[n+8] = SaturatedSignedWordToSignedByte(t.s[n]);
	4746	}
	4747	else {
	4748	XMM_REG s;
	4749	int d = (modrm >> 3) & 0x7;
	4750	UINT32 ea = GetEA(modrm, 0);
	4751	READXMM(ea, s);
	4752	for (int n = 0; n < 8; n++)
	4753	XMM(d).c[n] = SaturatedSignedWordToSignedByte(XMM(d).s[n]);
	4754	for (int n = 0; n < 8; n++)
	4755	XMM(d).c[n + 8] = SaturatedSignedWordToSignedByte(s.s[n]);
	4756	}
	4757	CYCLES(1); // TODO: correct cycle count
	4758	}
	4759
	4760	void i386_device::sse_packssdw_r128_rm128() // Opcode 66 0f 6b
	4761	{
	4762	UINT8 modrm = FETCH();
	4763	if (modrm >= 0xc0) {
	4764	XMM_REG t;
	4765	int s, d;
	4766	s = modrm & 0x7;
	4767	d = (modrm >> 3) & 0x7;
	4768	t.q[0] = XMM(s).q[0];
	4769	t.q[1] = XMM(s).q[1];
	4770	XMM(d).s[0] = SaturatedSignedDwordToSignedWord(XMM(d).i[0]);
	4771	XMM(d).s[1] = SaturatedSignedDwordToSignedWord(XMM(d).i[1]);
	4772	XMM(d).s[2] = SaturatedSignedDwordToSignedWord(XMM(d).i[2]);
	4773	XMM(d).s[3] = SaturatedSignedDwordToSignedWord(XMM(d).i[3]);
	4774	XMM(d).s[4] = SaturatedSignedDwordToSignedWord(t.i[0]);
	4775	XMM(d).s[5] = SaturatedSignedDwordToSignedWord(t.i[1]);
	4776	XMM(d).s[6] = SaturatedSignedDwordToSignedWord(t.i[2]);
	4777	XMM(d).s[7] = SaturatedSignedDwordToSignedWord(t.i[3]);
	4778	}
	4779	else {
	4780	XMM_REG s;
	4781	int d = (modrm >> 3) & 0x7;
	4782	UINT32 ea = GetEA(modrm, 0);
	4783	READXMM(ea, s);
	4784	XMM(d).s[0] = SaturatedSignedDwordToSignedWord(XMM(d).i[0]);
	4785	XMM(d).s[1] = SaturatedSignedDwordToSignedWord(XMM(d).i[1]);
	4786	XMM(d).s[2] = SaturatedSignedDwordToSignedWord(XMM(d).i[2]);
	4787	XMM(d).s[3] = SaturatedSignedDwordToSignedWord(XMM(d).i[3]);
	4788	XMM(d).s[4] = SaturatedSignedDwordToSignedWord(s.i[0]);
	4789	XMM(d).s[5] = SaturatedSignedDwordToSignedWord(s.i[1]);
	4790	XMM(d).s[6] = SaturatedSignedDwordToSignedWord(s.i[2]);
	4791	XMM(d).s[7] = SaturatedSignedDwordToSignedWord(s.i[3]);
	4792	}
	4793	CYCLES(1); // TODO: correct cycle count
	4794	}
	4795
	4796	void i386_device::sse_pcmpgtb_r128_rm128() // Opcode 66 0f 64
	4797	{
	4798	UINT8 modrm = FETCH();
	4799	if( modrm >= 0xc0 ) {
	4800	int s,d;
	4801	s=modrm & 0x7;
	4802	d=(modrm >> 3) & 0x7;
	4803	for (int c=0;c <= 15;c++)
	4804	XMM(d).b[c]=(XMM(d).c[c] > XMM(s).c[c]) ? 0xff : 0;
	4805	} else {
	4806	XMM_REG s;
	4807	int d=(modrm >> 3) & 0x7;
	4808	UINT32 ea = GetEA(modrm, 0);
	4809	READXMM(ea, s);
	4810	for (int c=0;c <= 15;c++)
	4811	XMM(d).b[c]=(XMM(d).c[c] > s.c[c]) ? 0xff : 0;
	4812	}
	4813	CYCLES(1); // TODO: correct cycle count
	4814	}
	4815
	4816	void i386_device::sse_pcmpgtw_r128_rm128() // Opcode 66 0f 65
	4817	{
	4818	UINT8 modrm = FETCH();
	4819	if( modrm >= 0xc0 ) {
	4820	int s,d;
	4821	s=modrm & 0x7;
	4822	d=(modrm >> 3) & 0x7;
	4823	for (int c=0;c <= 7;c++)
	4824	XMM(d).w[c]=(XMM(d).s[c] > XMM(s).s[c]) ? 0xffff : 0;
	4825	} else {
	4826	XMM_REG s;
	4827	int d=(modrm >> 3) & 0x7;
	4828	UINT32 ea = GetEA(modrm, 0);
	4829	READXMM(ea, s);
	4830	for (int c=0;c <= 7;c++)
	4831	XMM(d).w[c]=(XMM(d).s[c] > s.s[c]) ? 0xffff : 0;
	4832	}
	4833	CYCLES(1); // TODO: correct cycle count
	4834	}
	4835
	4836	void i386_device::sse_pcmpgtd_r128_rm128() // Opcode 66 0f 66
	4837	{
	4838	UINT8 modrm = FETCH();
	4839	if( modrm >= 0xc0 ) {
	4840	int s,d;
	4841	s=modrm & 0x7;
	4842	d=(modrm >> 3) & 0x7;
	4843	for (int c=0;c <= 3;c++)
	4844	XMM(d).d[c]=(XMM(d).i[c] > XMM(s).i[c]) ? 0xffffffff : 0;
	4845	} else {
	4846	XMM_REG s;
	4847	int d=(modrm >> 3) & 0x7;
	4848	UINT32 ea = GetEA(modrm, 0);
	4849	READXMM(ea, s);
	4850	for (int c=0;c <= 3;c++)
	4851	XMM(d).d[c]=(XMM(d).i[c] > s.i[c]) ? 0xffffffff : 0;
	4852	}
	4853	CYCLES(1); // TODO: correct cycle count
	4854	}
	4855
	4856	void i386_device::sse_packuswb_r128_rm128() // Opcode 66 0f 67
	4857	{
	4858	UINT8 modrm = FETCH();
	4859	if( modrm >= 0xc0 ) {
	4860	XMM_REG t;
	4861	int s,d;
	4862	s=modrm & 0x7;
	4863	d=(modrm >> 3) & 0x7;
	4864	t.q[0] = XMM(s).q[0];
	4865	t.q[1] = XMM(s).q[1];
	4866	for (int n = 0; n < 8;n++)
	4867	XMM(d).b[n]=SaturatedSignedWordToUnsignedByte(XMM(d).s[n]);
	4868	for (int n = 0; n < 8;n++)
	4869	XMM(d).b[n+8]=SaturatedSignedWordToUnsignedByte(t.s[n]);
	4870	} else {
	4871	XMM_REG s;
	4872	int d=(modrm >> 3) & 0x7;
	4873	UINT32 ea = GetEA(modrm, 0);
	4874	READXMM(ea, s);
	4875	for (int n = 0; n < 8;n++)
	4876	XMM(d).b[n]=SaturatedSignedWordToUnsignedByte(XMM(d).s[n]);
	4877	for (int n = 0; n < 8;n++)
	4878	XMM(d).b[n+8]=SaturatedSignedWordToUnsignedByte(s.s[n]);
	4879	}
	4880	CYCLES(1); // TODO: correct cycle count
	4881	}
	4882
	4883	void i386_device::sse_punpckhbw_r128_rm128() // Opcode 66 0f 68
	4884	{
	4885	UINT8 modrm = FETCH();
	4886	if( modrm >= 0xc0 ) {
	4887	XMM_REG t;
	4888	int s,d;
	4889	s=modrm & 0x7;
	4890	d=(modrm >> 3) & 0x7;
	4891	t.q[1] = XMM(s).q[1];
	4892	for (int n = 0; n < 16; n += 2) {
	4893	XMM(d).b[n]=XMM(d).b[8+(n >> 1)];
	4894	XMM(d).b[n+1]=t.b[8+(n >> 1)];
	4895	}
	4896	} else {
	4897	XMM_REG s;
	4898	int d=(modrm >> 3) & 0x7;
	4899	UINT32 ea = GetEA(modrm, 0);
	4900	READXMM(ea, s);
	4901	for (int n = 0; n < 16; n += 2) {
	4902	XMM(d).b[n]=XMM(d).b[8+(n >> 1)];
	4903	XMM(d).b[n+1]=s.b[8+(n >> 1)];
	4904	}
	4905	}
	4906	CYCLES(1); // TODO: correct cycle count
	4907	}
	4908
	4909	void i386_device::sse_punpckhwd_r128_rm128() // Opcode 66 0f 69
	4910	{
	4911	UINT8 modrm = FETCH();
	4912	if( modrm >= 0xc0 ) {
	4913	XMM_REG t;
	4914	int s,d;
	4915	s=modrm & 0x7;
	4916	d=(modrm >> 3) & 0x7;
	4917	t.q[1] = XMM(s).q[1];
	4918	for (int n = 0; n < 8; n += 2) {
	4919	XMM(d).w[n]=XMM(d).w[4+(n >> 1)];
	4920	XMM(d).w[n+1]=t.w[4+(n >> 1)];
	4921	}
	4922	} else {
	4923	XMM_REG s;
	4924	int d=(modrm >> 3) & 0x7;
	4925	UINT32 ea = GetEA(modrm, 0);
	4926	READXMM(ea, s);
	4927	for (int n = 0; n < 8; n += 2) {
	4928	XMM(d).w[n]=XMM(d).w[4+(n >> 1)];
	4929	XMM(d).w[n+1]=s.w[4+(n >> 1)];
	4930	}
	4931	}
	4932	CYCLES(1); // TODO: correct cycle count
	4933	}
	4934
	4935	void i386_device::sse_unpckhdq_r128_rm128() // Opcode 66 0f 6a
	4936	{
	4937	UINT8 modrm = FETCH();
	4938	if( modrm >= 0xc0 ) {
	4939	XMM_REG t;
	4940	int s,d;
	4941	s=modrm & 0x7;
	4942	d=(modrm >> 3) & 0x7;
	4943	t.q[1] = XMM(s).q[1];
	4944	XMM(d).d[0]=XMM(d).d[2];
	4945	XMM(d).d[1]=t.d[2];
	4946	XMM(d).d[2]=XMM(d).d[3];
	4947	XMM(d).d[3]=t.d[3];
	4948	} else {
	4949	XMM_REG s;
	4950	int d=(modrm >> 3) & 0x7;
	4951	UINT32 ea = GetEA(modrm, 0);
	4952	READXMM(ea, s);
	4953	XMM(d).d[0]=XMM(d).d[2];
	4954	XMM(d).d[1]=s.d[2];
	4955	XMM(d).d[2]=XMM(d).d[3];
	4956	XMM(d).d[3]=s.d[3];
	4957	}
	4958	CYCLES(1); // TODO: correct cycle count
	4959	}
	4960
	4961	void i386_device::sse_punpckhqdq_r128_rm128() // Opcode 66 0f 6d
	4962	{
	4963	UINT8 modrm = FETCH();
	4964	if( modrm >= 0xc0 ) {
	4965	XMM_REG t;
	4966	int s,d;
	4967	s=modrm & 0x7;
	4968	d=(modrm >> 3) & 0x7;
	4969	t.q[1] = XMM(s).q[1];
	4970	XMM(d).q[0]=XMM(d).q[1];
	4971	XMM(d).q[1]=t.q[1];
	4972	} else {
	4973	XMM_REG s;
	4974	int d=(modrm >> 3) & 0x7;
	4975	UINT32 ea = GetEA(modrm, 0);
	4976	READXMM(ea, s);
	4977	XMM(d).q[0]=XMM(d).q[1];
	4978	XMM(d).q[1]=s.q[1];
	4979	}
	4980	CYCLES(1); // TODO: correct cycle count
	4981	}
	4982
	4983	void i386_device::sse_pcmpeqb_r128_rm128() // Opcode 66 0f 74
	4984	{
	4985	UINT8 modrm = FETCH();
	4986	if( modrm >= 0xc0 ) {
	4987	int s,d;
	4988	s=modrm & 0x7;
	4989	d=(modrm >> 3) & 0x7;
	4990	for (int c=0;c <= 15;c++)
	4991	XMM(d).b[c]=(XMM(d).c[c] == XMM(s).c[c]) ? 0xff : 0;
	4992	} else {
	4993	XMM_REG s;
	4994	int d=(modrm >> 3) & 0x7;
	4995	UINT32 ea = GetEA(modrm, 0);
	4996	READXMM(ea, s);
	4997	for (int c=0;c <= 15;c++)
	4998	XMM(d).b[c]=(XMM(d).c[c] == s.c[c]) ? 0xff : 0;
	4999	}
	5000	CYCLES(1); // TODO: correct cycle count
	5001	}
	5002
	5003	void i386_device::sse_pcmpeqw_r128_rm128() // Opcode 66 0f 75
	5004	{
	5005	UINT8 modrm = FETCH();
	5006	if( modrm >= 0xc0 ) {
	5007	int s,d;
	5008	s=modrm & 0x7;
	5009	d=(modrm >> 3) & 0x7;
	5010	for (int c=0;c <= 7;c++)
	5011	XMM(d).w[c]=(XMM(d).s[c] == XMM(s).s[c]) ? 0xffff : 0;
	5012	} else {
	5013	XMM_REG s;
	5014	int d=(modrm >> 3) & 0x7;
	5015	UINT32 ea = GetEA(modrm, 0);
	5016	READXMM(ea, s);
	5017	for (int c=0;c <= 7;c++)
	5018	XMM(d).w[c]=(XMM(d).s[c] == s.s[c]) ? 0xffff : 0;
	5019	}
	5020	CYCLES(1); // TODO: correct cycle count
	5021	}
	5022
	5023	void i386_device::sse_pcmpeqd_r128_rm128() // Opcode 66 0f 76
	5024	{
	5025	UINT8 modrm = FETCH();
	5026	if( modrm >= 0xc0 ) {
	5027	int s,d;
	5028	s=modrm & 0x7;
	5029	d=(modrm >> 3) & 0x7;
	5030	for (int c=0;c <= 3;c++)
	5031	XMM(d).d[c]=(XMM(d).i[c] == XMM(s).i[c]) ? 0xffffffff : 0;
	5032	} else {
	5033	XMM_REG s;
	5034	int d=(modrm >> 3) & 0x7;
	5035	UINT32 ea = GetEA(modrm, 0);
	5036	READXMM(ea, s);
	5037	for (int c=0;c <= 3;c++)
	5038	XMM(d).d[c]=(XMM(d).i[c] == s.i[c]) ? 0xffffffff : 0;
	5039	}
	5040	CYCLES(1); // TODO: correct cycle count
	5041	}
	5042
	5043	void i386_device::sse_paddq_r128_rm128() // Opcode 66 0f d4
	5044	{
	5045	UINT8 modrm = FETCH();
	5046	if( modrm >= 0xc0 ) {
	5047	int s,d;
	5048	s=modrm & 0x7;
	5049	d=(modrm >> 3) & 0x7;
	5050	XMM(d).q[0]=XMM(d).q[0]+XMM(s).q[0];
	5051	XMM(d).q[1]=XMM(d).q[1]+XMM(s).q[1];
	5052	} else {
	5053	XMM_REG src;
	5054	int d=(modrm >> 3) & 0x7;
	5055	UINT32 ea = GetEA(modrm, 0);
	5056	READXMM(ea, src);
	5057	XMM(d).q[0]=XMM(d).q[0]+src.q[0];
	5058	XMM(d).q[1]=XMM(d).q[1]+src.q[1];
	5059	}
	5060	CYCLES(1); // TODO: correct cycle count
	5061	}
	5062
	5063	void i386_device::sse_pmullw_r128_rm128() // Opcode 66 0f d5
	5064	{
	5065	UINT8 modrm = FETCH();
	5066	if( modrm >= 0xc0 ) {
	5067	int s,d;
	5068	s=modrm & 0x7;
	5069	d=(modrm >> 3) & 0x7;
	5070	for (int n = 0; n < 8;n++)
	5071	XMM(d).w[n]=(UINT32)((INT32)XMM(d).s[n]*(INT32)XMM(s).s[n]) & 0xffff;
	5072	} else {
	5073	XMM_REG src;
	5074	int d;
	5075	UINT32 ea = GetEA(modrm, 0);
	5076	READXMM(ea, src);
	5077	d=(modrm >> 3) & 0x7;
	5078	for (int n = 0; n < 8;n++)
	5079	XMM(d).w[n]=(UINT32)((INT32)XMM(d).s[n]*(INT32)src.s[n]) & 0xffff;
	5080	}
	5081	CYCLES(1); // TODO: correct cycle count
	5082	}
	5083
	5084	void i386_device::sse_paddb_r128_rm128() // Opcode 66 0f fc
	5085	{
	5086	UINT8 modrm = FETCH();
	5087	if( modrm >= 0xc0 ) {
	5088	for (int n=0;n < 16;n++)
	5089	XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] + XMM(modrm & 7).b[n];
	5090	} else {
	5091	XMM_REG s;
	5092	UINT32 ea = GetEA(modrm, 0);
	5093	READXMM(ea, s);
	5094	for (int n=0;n < 16;n++)
	5095	XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] + s.b[n];
	5096	}
	5097	CYCLES(1); // TODO: correct cycle count
	5098	}
	5099
	5100	void i386_device::sse_paddw_r128_rm128() // Opcode 66 0f fd
	5101	{
	5102	UINT8 modrm = FETCH();
	5103	if( modrm >= 0xc0 ) {
	5104	for (int n=0;n < 8;n++)
	5105	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] + XMM(modrm & 7).w[n];
	5106	} else {
	5107	XMM_REG s;
	5108	UINT32 ea = GetEA(modrm, 0);
	5109	READXMM(ea, s);
	5110	for (int n=0;n < 8;n++)
	5111	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] + s.w[n];
	5112	}
	5113	CYCLES(1); // TODO: correct cycle count
	5114	}
	5115
	5116	void i386_device::sse_paddd_r128_rm128() // Opcode 66 0f fe
	5117	{
	5118	UINT8 modrm = FETCH();
	5119	if( modrm >= 0xc0 ) {
	5120	for (int n=0;n < 4;n++)
	5121	XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] + XMM(modrm & 7).d[n];
	5122	} else {
	5123	XMM_REG s;
	5124	UINT32 ea = GetEA(modrm, 0);
	5125	READXMM(ea, s);
	5126	for (int n=0;n < 4;n++)
	5127	XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] + s.d[n];
	5128	}
	5129	CYCLES(1); // TODO: correct cycle count
	5130	}
	5131
	5132	void i386_device::sse_psubusb_r128_rm128() // Opcode 66 0f d8
	5133	{
	5134	UINT8 modrm = FETCH();
	5135	if( modrm >= 0xc0 ) {
	5136	for (int n=0;n < 16;n++)
	5137	XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] < XMM(modrm & 7).b[n] ? 0 : XMM((modrm >> 3) & 0x7).b[n]-XMM(modrm & 7).b[n];
	5138	} else {
	5139	XMM_REG src;
	5140	UINT32 ea = GetEA(modrm, 0);
	5141	READXMM(ea, src);
	5142	for (int n=0;n < 16;n++)
	5143	XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] < src.b[n] ? 0 : XMM((modrm >> 3) & 0x7).b[n]-src.b[n];
	5144	}
	5145	CYCLES(1); // TODO: correct cycle count
	5146	}
	5147
	5148	void i386_device::sse_psubusw_r128_rm128() // Opcode 66 0f d9
	5149	{
	5150	UINT8 modrm = FETCH();
	5151	if( modrm >= 0xc0 ) {
	5152	for (int n=0;n < 8;n++)
	5153	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] < XMM(modrm & 7).w[n] ? 0 : XMM((modrm >> 3) & 0x7).w[n]-XMM(modrm & 7).w[n];
	5154	} else {
	5155	XMM_REG src;
	5156	UINT32 ea = GetEA(modrm, 0);
	5157	READXMM(ea, src);
	5158	for (int n=0;n < 8;n++)
	5159	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] < src.w[n] ? 0 : XMM((modrm >> 3) & 0x7).w[n]-src.w[n];
	5160	}
	5161	CYCLES(1); // TODO: correct cycle count
	5162	}
	5163
	5164	void i386_device::sse_pand_r128_rm128() // Opcode 66 0f db
	5165	{
	5166	UINT8 modrm = FETCH();
	5167	if( modrm >= 0xc0 ) {
	5168	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] & XMM(modrm & 7).q[0];
	5169	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] & XMM(modrm & 7).q[1];
	5170	} else {
	5171	XMM_REG src;
	5172	UINT32 ea = GetEA(modrm, 0);
	5173	READXMM(ea, src);
	5174	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] & src.q[0];
	5175	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] & src.q[1];
	5176	}
	5177	CYCLES(1); // TODO: correct cycle count
	5178	}
	5179
	5180	void i386_device::sse_pandn_r128_rm128() // Opcode 66 0f df
	5181	{
	5182	UINT8 modrm = FETCH();
	5183	if( modrm >= 0xc0 ) {
	5184	XMM((modrm >> 3) & 0x7).q[0]=(~XMM((modrm >> 3) & 0x7).q[0]) & XMM(modrm & 7).q[0];
	5185	XMM((modrm >> 3) & 0x7).q[1]=(~XMM((modrm >> 3) & 0x7).q[1]) & XMM(modrm & 7).q[1];
	5186	} else {
	5187	XMM_REG src;
	5188	UINT32 ea = GetEA(modrm, 0);
	5189	READXMM(ea, src);
	5190	XMM((modrm >> 3) & 0x7).q[0]=(~XMM((modrm >> 3) & 0x7).q[0]) & src.q[0];
	5191	XMM((modrm >> 3) & 0x7).q[1]=(~XMM((modrm >> 3) & 0x7).q[1]) & src.q[1];
	5192	}
	5193	CYCLES(1); // TODO: correct cycle count
	5194	}
	5195
	5196	void i386_device::sse_paddusb_r128_rm128() // Opcode 66 0f dc
	5197	{
	5198	UINT8 modrm = FETCH();
	5199	if( modrm >= 0xc0 ) {
	5200	for (int n=0;n < 16;n++)
	5201	XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] > (0xff-XMM(modrm & 7).b[n]) ? 0xff : XMM((modrm >> 3) & 0x7).b[n]+XMM(modrm & 7).b[n];
	5202	} else {
	5203	XMM_REG src;
	5204	UINT32 ea = GetEA(modrm, 0);
	5205	READXMM(ea, src);
	5206	for (int n=0;n < 16;n++)
	5207	XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] > (0xff-src.b[n]) ? 0xff : XMM((modrm >> 3) & 0x7).b[n]+src.b[n];
	5208	}
	5209	CYCLES(1); // TODO: correct cycle count
	5210	}
	5211
	5212	void i386_device::sse_paddusw_r128_rm128() // Opcode 66 0f dd
	5213	{
	5214	UINT8 modrm = FETCH();
	5215	if( modrm >= 0xc0 ) {
	5216	for (int n=0;n < 8;n++)
	5217	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] > (0xffff-XMM(modrm & 7).w[n]) ? 0xffff : XMM((modrm >> 3) & 0x7).w[n]+XMM(modrm & 7).w[n];
	5218	} else {
	5219	XMM_REG src;
	5220	UINT32 ea = GetEA(modrm, 0);
	5221	READXMM(ea, src);
	5222	for (int n=0;n < 8;n++)
	5223	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] > (0xffff-src.w[n]) ? 0xffff : XMM((modrm >> 3) & 0x7).w[n]+src.w[n];
	5224	}
	5225	CYCLES(1); // TODO: correct cycle count
	5226	}
	5227
	5228	void i386_device::sse_pmaxub_r128_rm128() // Opcode 66 0f de
	5229	{
	5230	UINT8 modrm = FETCH();
	5231	if( modrm >= 0xc0 ) {
	5232	for (int n=0;n < 16;n++)
	5233	XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] > XMM(modrm & 0x7).b[n] ? XMM((modrm >> 3) & 0x7).b[n] : XMM(modrm & 0x7).b[n];
	5234	} else {
	5235	XMM_REG s;
	5236	UINT32 ea = GetEA(modrm, 0);
	5237	READXMM(ea, s);
	5238	for (int n=0;n < 16;n++)
	5239	XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] > s.b[n] ? XMM((modrm >> 3) & 0x7).b[n] : s.b[n];
	5240	}
	5241	CYCLES(1); // TODO: correct cycle count
	5242	}
	5243
	5244	void i386_device::sse_pmulhuw_r128_rm128() // Opcode 66 0f e4
	5245	{
	5246	UINT8 modrm = FETCH();
	5247	if( modrm >= 0xc0 ) {
	5248	for (int n=0;n < 8;n++)
	5249	XMM((modrm >> 3) & 0x7).w[n]=((UINT32)XMM((modrm >> 3) & 0x7).w[n]*(UINT32)XMM(modrm & 7).w[n]) >> 16;
	5250	} else {
	5251	XMM_REG s;
	5252	UINT32 ea = GetEA(modrm, 0);
	5253	READXMM(ea, s);
	5254	for (int n=0;n < 8;n++)
	5255	XMM((modrm >> 3) & 0x7).w[n]=((UINT32)XMM((modrm >> 3) & 0x7).w[n]*(UINT32)s.w[n]) >> 16;
	5256	}
	5257	CYCLES(1); // TODO: correct cycle count
	5258	}
	5259
	5260	void i386_device::sse_pmulhw_r128_rm128() // Opcode 66 0f e5
	5261	{
	5262	UINT8 modrm = FETCH();
	5263	if( modrm >= 0xc0 ) {
	5264	for (int n=0;n < 8;n++)
	5265	XMM((modrm >> 3) & 0x7).w[n]=(UINT32)((INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)XMM(modrm & 7).s[n]) >> 16;
	5266	} else {
	5267	XMM_REG src;
	5268	UINT32 ea = GetEA(modrm, 0);
	5269	READXMM(ea, src);
	5270	for (int n=0;n < 8;n++)
	5271	XMM((modrm >> 3) & 0x7).w[n]=(UINT32)((INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)src.s[n]) >> 16;
	5272	}
	5273	CYCLES(1); // TODO: correct cycle count
	5274	}
	5275
	5276	void i386_device::sse_psubsb_r128_rm128() // Opcode 66 0f e8
	5277	{
	5278	UINT8 modrm = FETCH();
	5279	if( modrm >= 0xc0 ) {
	5280	for (int n=0;n < 16;n++)
	5281	XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)XMM((modrm >> 3) & 0x7).c[n] - (INT16)XMM(modrm & 7).c[n]);
	5282	} else {
	5283	XMM_REG s;
	5284	UINT32 ea = GetEA(modrm, 0);
	5285	READXMM(ea, s);
	5286	for (int n=0;n < 16;n++)
	5287	XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)XMM((modrm >> 3) & 0x7).c[n] - (INT16)s.c[n]);
	5288	}
	5289	CYCLES(1); // TODO: correct cycle count
	5290	}
	5291
	5292	void i386_device::sse_psubsw_r128_rm128() // Opcode 66 0f e9
	5293	{
	5294	UINT8 modrm = FETCH();
	5295	if( modrm >= 0xc0 ) {
	5296	for (int n=0;n < 8;n++)
	5297	XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)XMM((modrm >> 3) & 0x7).s[n] - (INT32)XMM(modrm & 7).s[n]);
	5298	} else {
	5299	XMM_REG s;
	5300	UINT32 ea = GetEA(modrm, 0);
	5301	READXMM(ea, s);
	5302	for (int n=0;n < 8;n++)
	5303	XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)XMM((modrm >> 3) & 0x7).s[n] - (INT32)s.s[n]);
	5304	}
	5305	CYCLES(1); // TODO: correct cycle count
	5306	}
	5307
	5308	void i386_device::sse_pminsw_r128_rm128() // Opcode 66 0f ea
	5309	{
	5310	UINT8 modrm = FETCH();
	5311	if( modrm >= 0xc0 ) {
	5312	for (int n=0;n < 8;n++)
	5313	XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] < XMM(modrm & 0x7).s[n] ? XMM((modrm >> 3) & 0x7).s[n] : XMM(modrm & 0x7).s[n];
	5314	} else {
	5315	XMM_REG s;
	5316	UINT32 ea = GetEA(modrm, 0);
	5317	READXMM(ea, s);
	5318	for (int n=0;n < 8;n++)
	5319	XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] < s.s[n] ? XMM((modrm >> 3) & 0x7).s[n] : s.s[n];
	5320	}
	5321	CYCLES(1); // TODO: correct cycle count
	5322	}
	5323
	5324	void i386_device::sse_pmaxsw_r128_rm128() // Opcode 66 0f ee
	5325	{
	5326	UINT8 modrm = FETCH();
	5327	if( modrm >= 0xc0 ) {
	5328	for (int n=0;n < 8;n++)
	5329	XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] > XMM(modrm & 0x7).s[n] ? XMM((modrm >> 3) & 0x7).s[n] : XMM(modrm & 0x7).s[n];
	5330	} else {
	5331	XMM_REG s;
	5332	UINT32 ea = GetEA(modrm, 0);
	5333	READXMM(ea, s);
	5334	for (int n=0;n < 8;n++)
	5335	XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] > s.s[n] ? XMM((modrm >> 3) & 0x7).s[n] : s.s[n];
	5336	}
	5337	CYCLES(1); // TODO: correct cycle count
	5338	}
	5339
	5340	void i386_device::sse_paddsb_r128_rm128() // Opcode 66 0f ec
	5341	{
	5342	UINT8 modrm = FETCH();
	5343	if( modrm >= 0xc0 ) {
	5344	for (int n=0;n < 16;n++)
	5345	XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)XMM((modrm >> 3) & 0x7).c[n] + (INT16)XMM(modrm & 7).c[n]);
	5346	} else {
	5347	XMM_REG s;
	5348	UINT32 ea = GetEA(modrm, 0);
	5349	READXMM(ea, s);
	5350	for (int n=0;n < 16;n++)
	5351	XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)XMM((modrm >> 3) & 0x7).c[n] + (INT16)s.c[n]);
	5352	}
	5353	CYCLES(1); // TODO: correct cycle count
	5354	}
	5355
	5356	void i386_device::sse_paddsw_r128_rm128() // Opcode 66 0f ed
	5357	{
	5358	UINT8 modrm = FETCH();
	5359	if( modrm >= 0xc0 ) {
	5360	for (int n=0;n < 8;n++)
	5361	XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)XMM((modrm >> 3) & 0x7).s[n] + (INT32)XMM(modrm & 7).s[n]);
	5362	} else {
	5363	XMM_REG s;
	5364	UINT32 ea = GetEA(modrm, 0);
	5365	READXMM(ea, s);
	5366	for (int n=0;n < 8;n++)
	5367	XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)XMM((modrm >> 3) & 0x7).s[n] + (INT32)s.s[n]);
	5368	}
	5369	CYCLES(1); // TODO: correct cycle count
	5370	}
	5371
	5372	void i386_device::sse_por_r128_rm128() // Opcode 66 0f eb
	5373	{
	5374	UINT8 modrm = FETCH();
	5375	if( modrm >= 0xc0 ) {
	5376	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] \| XMM(modrm & 7).q[0];
	5377	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] \| XMM(modrm & 7).q[1];
	5378	} else {
	5379	XMM_REG s;
	5380	UINT32 ea = GetEA(modrm, 0);
	5381	READXMM(ea, s);
	5382	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] \| s.q[0];
	5383	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] \| s.q[1];
	5384	}
	5385	CYCLES(1); // TODO: correct cycle count
	5386	}
	5387
	5388	void i386_device::sse_pxor_r128_rm128() // Opcode 66 0f ef
	5389	{
	5390	UINT8 modrm = FETCH();
	5391	if( modrm >= 0xc0 ) {
	5392	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] ^ XMM(modrm & 7).q[0];
	5393	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] ^ XMM(modrm & 7).q[1];
	5394	} else {
	5395	XMM_REG s;
	5396	UINT32 ea = GetEA(modrm, 0);
	5397	READXMM(ea, s);
	5398	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] ^ s.q[0];
	5399	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] ^ s.q[1];
	5400	}
	5401	CYCLES(1); // TODO: correct cycle count
	5402	}
	5403
	5404	void i386_device::sse_pmaddwd_r128_rm128() // Opcode 66 0f f5
	5405	{
	5406	UINT8 modrm = FETCH();
	5407	if( modrm >= 0xc0 ) {
	5408	for (int n=0;n < 4;n++)
	5409	XMM((modrm >> 3) & 0x7).i[n]=(INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)XMM(modrm & 7).s[n]+
	5410	(INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)XMM(modrm & 7).s[n];
	5411	} else {
	5412	XMM_REG s;
	5413	UINT32 ea = GetEA(modrm, 0);
	5414	READXMM(ea, s);
	5415	for (int n=0;n < 4;n++)
	5416	XMM((modrm >> 3) & 0x7).i[n]=(INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)s.s[n]+
	5417	(INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)s.s[n];
	5418	}
	5419	CYCLES(1); // TODO: correct cycle count
	5420	}
	5421
	5422	void i386_device::sse_psubb_r128_rm128() // Opcode 66 0f f8
	5423	{
	5424	UINT8 modrm = FETCH();
	5425	if( modrm >= 0xc0 ) {
	5426	for (int n=0;n < 16;n++)
	5427	XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] - XMM(modrm & 7).b[n];
	5428	} else {
	5429	XMM_REG s;
	5430	UINT32 ea = GetEA(modrm, 0);
	5431	READXMM(ea, s);
	5432	for (int n=0;n < 16;n++)
	5433	XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] - s.b[n];
	5434	}
	5435	CYCLES(1); // TODO: correct cycle count
	5436	}
	5437
	5438	void i386_device::sse_psubw_r128_rm128() // Opcode 66 0f f9
	5439	{
	5440	UINT8 modrm = FETCH();
	5441	if( modrm >= 0xc0 ) {
	5442	for (int n=0;n < 8;n++)
	5443	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] - XMM(modrm & 7).w[n];
	5444	} else {
	5445	XMM_REG s;
	5446	UINT32 ea = GetEA(modrm, 0);
	5447	READXMM(ea, s);
	5448	for (int n=0;n < 8;n++)
	5449	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] - s.w[n];
	5450	}
	5451	CYCLES(1); // TODO: correct cycle count
	5452	}
	5453
	5454	void i386_device::sse_psubd_r128_rm128() // Opcode 66 0f fa
	5455	{
	5456	UINT8 modrm = FETCH();
	5457	if( modrm >= 0xc0 ) {
	5458	for (int n=0;n < 4;n++)
	5459	XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] - XMM(modrm & 7).d[n];
	5460	} else {
	5461	XMM_REG s;
	5462	UINT32 ea = GetEA(modrm, 0);
	5463	READXMM(ea, s);
	5464	for (int n=0;n < 4;n++)
	5465	XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] - s.d[n];
	5466	}
	5467	CYCLES(1); // TODO: correct cycle count
	5468	}
	5469
	5470	void i386_device::sse_psadbw_r128_rm128() // Opcode 66 0f f6
	5471	{
	5472	INT32 temp;
	5473	UINT8 modrm = FETCH();
	5474	if( modrm >= 0xc0 ) {
	5475	temp=0;
	5476	for (int n=0;n < 8;n++)
	5477	temp += abs((INT32)XMM((modrm >> 3) & 0x7).b[n] - (INT32)XMM(modrm & 0x7).b[n]);
	5478	XMM((modrm >> 3) & 0x7).l[0]=(UINT64)temp & 0xffff;
	5479	temp=0;
	5480	for (int n=8;n < 16;n++)
	5481	temp += abs((INT32)XMM((modrm >> 3) & 0x7).b[n] - (INT32)XMM(modrm & 0x7).b[n]);
	5482	XMM((modrm >> 3) & 0x7).l[1]=(UINT64)temp & 0xffff;
	5483	} else {
	5484	XMM_REG s;
	5485	UINT32 ea = GetEA(modrm, 0);
	5486	READXMM(ea, s);
	5487	temp=0;
	5488	for (int n=0;n < 8;n++)
	5489	temp += abs((INT32)XMM((modrm >> 3) & 0x7).b[n] - (INT32)s.b[n]);
	5490	XMM((modrm >> 3) & 0x7).l[0]=(UINT64)temp & 0xffff;
	5491	temp=0;
	5492	for (int n=8;n < 16;n++)
	5493	temp += abs((INT32)XMM((modrm >> 3) & 0x7).b[n] - (INT32)s.b[n]);
	5494	XMM((modrm >> 3) & 0x7).l[1]=(UINT64)temp & 0xffff;
	5495	}
	5496	CYCLES(1); // TODO: correct cycle count
	5497	}
	5498
	5499	void i386_device::sse_pavgb_r128_rm128() // Opcode 66 0f e0
	5500	{
	5501	UINT8 modrm = FETCH();
	5502	if( modrm >= 0xc0 ) {
	5503	for (int n=0;n < 16;n++)
	5504	XMM((modrm >> 3) & 0x7).b[n] = ((UINT16)XMM((modrm >> 3) & 0x7).b[n] + (UINT16)XMM(modrm & 0x7).b[n] + 1) >> 1;
	5505	} else {
	5506	XMM_REG s;
	5507	UINT32 ea = GetEA(modrm, 0);
	5508	READXMM(ea, s);
	5509	for (int n=0;n < 16;n++)
	5510	XMM((modrm >> 3) & 0x7).b[n] = ((UINT16)XMM((modrm >> 3) & 0x7).b[n] + (UINT16)s.b[n] + 1) >> 1;
	5511	}
	5512	CYCLES(1); // TODO: correct cycle count
	5513	}
	5514
	5515	void i386_device::sse_pavgw_r128_rm128() // Opcode 66 0f e3
	5516	{
	5517	UINT8 modrm = FETCH();
	5518	if( modrm >= 0xc0 ) {
	5519	for (int n=0;n < 8;n++)
	5520	XMM((modrm >> 3) & 0x7).w[n] = ((UINT32)XMM((modrm >> 3) & 0x7).w[n] + (UINT32)XMM(modrm & 0x7).w[n] + 1) >> 1;
	5521	} else {
	5522	XMM_REG s;
	5523	UINT32 ea = GetEA(modrm, 0);
	5524	READXMM(ea, s);
	5525	for (int n=0;n < 8;n++)
	5526	XMM((modrm >> 3) & 0x7).w[n] = ((UINT32)XMM((modrm >> 3) & 0x7).w[n] + (UINT32)s.w[n] + 1) >> 1;
	5527	}
	5528	CYCLES(1); // TODO: correct cycle count
	5529	}
	5530
	5531	void i386_device::sse_psrlw_r128_rm128() // Opcode 66 0f d1
	5532	{
	5533	UINT8 modrm = FETCH();
	5534	if( modrm >= 0xc0 ) {
	5535	int count=(int)XMM(modrm & 7).q[0];
	5536	for (int n=0; n < 8;n++)
	5537	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] >> count;
	5538	} else {
	5539	XMM_REG src;
	5540	UINT32 ea = GetEA(modrm, 0);
	5541	READXMM(ea, src);
	5542	int count=(int)src.q[0];
	5543	for (int n=0; n < 8;n++)
	5544	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] >> count;
	5545	}
	5546	CYCLES(1); // TODO: correct cycle count
	5547	}
	5548
	5549	void i386_device::sse_psrld_r128_rm128() // Opcode 66 0f d2
	5550	{
	5551	UINT8 modrm = FETCH();
	5552	if( modrm >= 0xc0 ) {
	5553	int count=(int)XMM(modrm & 7).q[0];
	5554	XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] >> count;
	5555	XMM((modrm >> 3) & 0x7).d[1]=XMM((modrm >> 3) & 0x7).d[1] >> count;
	5556	XMM((modrm >> 3) & 0x7).d[2]=XMM((modrm >> 3) & 0x7).d[2] >> count;
	5557	XMM((modrm >> 3) & 0x7).d[3]=XMM((modrm >> 3) & 0x7).d[3] >> count;
	5558	} else {
	5559	XMM_REG src;
	5560	UINT32 ea = GetEA(modrm, 0);
	5561	READXMM(ea, src);
	5562	int count=(int)src.q[0];
	5563	XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] >> count;
	5564	XMM((modrm >> 3) & 0x7).d[1]=XMM((modrm >> 3) & 0x7).d[1] >> count;
	5565	XMM((modrm >> 3) & 0x7).d[2]=XMM((modrm >> 3) & 0x7).d[2] >> count;
	5566	XMM((modrm >> 3) & 0x7).d[3]=XMM((modrm >> 3) & 0x7).d[3] >> count;
	5567	}
	5568	CYCLES(1); // TODO: correct cycle count
	5569	}
	5570
	5571	void i386_device::sse_psrlq_r128_rm128() // Opcode 66 0f d3
	5572	{
	5573	UINT8 modrm = FETCH();
	5574	if( modrm >= 0xc0 ) {
	5575	int count=(int)XMM(modrm & 7).q[0];
	5576	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] >> count;
	5577	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] >> count;
	5578	} else {
	5579	XMM_REG src;
	5580	UINT32 ea = GetEA(modrm, 0);
	5581	READXMM(ea, src);
	5582	int count=(int)src.q[0];
	5583	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] >> count;
	5584	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] >> count;
	5585	}
	5586	CYCLES(1); // TODO: correct cycle count
	5587	}
	5588
	5589	void i386_device::sse_psllw_r128_rm128() // Opcode 66 0f f1
	5590	{
	5591	UINT8 modrm = FETCH();
	5592	if( modrm >= 0xc0 ) {
	5593	int count=(int)XMM(modrm & 7).q[0];
	5594	for (int n=0; n < 8;n++)
	5595	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] << count;
	5596	} else {
	5597	XMM_REG s;
	5598	UINT32 ea = GetEA(modrm, 0);
	5599	READXMM(ea, s);
	5600	int count=(int)s.q[0];
	5601	for (int n=0; n < 8;n++)
	5602	XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] << count;
	5603	}
	5604	CYCLES(1); // TODO: correct cycle count
	5605	}
	5606
	5607	void i386_device::sse_pslld_r128_rm128() // Opcode 66 0f f2
	5608	{
	5609	UINT8 modrm = FETCH();
	5610	if( modrm >= 0xc0 ) {
	5611	int count=(int)XMM(modrm & 7).q[0];
	5612	XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] << count;
	5613	XMM((modrm >> 3) & 0x7).d[1]=XMM((modrm >> 3) & 0x7).d[1] << count;
	5614	XMM((modrm >> 3) & 0x7).d[2]=XMM((modrm >> 3) & 0x7).d[2] << count;
	5615	XMM((modrm >> 3) & 0x7).d[3]=XMM((modrm >> 3) & 0x7).d[3] << count;
	5616	} else {
	5617	XMM_REG s;
	5618	UINT32 ea = GetEA(modrm, 0);
	5619	READXMM(ea, s);
	5620	int count=(int)s.q[0];
	5621	XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] << count;
	5622	XMM((modrm >> 3) & 0x7).d[1]=XMM((modrm >> 3) & 0x7).d[1] << count;
	5623	XMM((modrm >> 3) & 0x7).d[2]=XMM((modrm >> 3) & 0x7).d[2] << count;
	5624	XMM((modrm >> 3) & 0x7).d[3]=XMM((modrm >> 3) & 0x7).d[3] << count;
	5625	}
	5626	CYCLES(1); // TODO: correct cycle count
	5627	}
	5628
	5629	void i386_device::sse_psllq_r128_rm128() // Opcode 66 0f f3
	5630	{
	5631	UINT8 modrm = FETCH();
	5632	if( modrm >= 0xc0 ) {
	5633	int count=(int)XMM(modrm & 7).q[0];
	5634	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] << count;
	5635	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] << count;
	5636	} else {
	5637	XMM_REG s;
	5638	UINT32 ea = GetEA(modrm, 0);
	5639	READXMM(ea, s);
	5640	int count=(int)s.q[0];
	5641	XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] << count;
	5642	XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] << count;
	5643	}
	5644	CYCLES(1); // TODO: correct cycle count
	5645	}
	5646
	5647	void i386_device::sse_psraw_r128_rm128() // Opcode 66 0f e1
	5648	{
	5649	UINT8 modrm = FETCH();
	5650	if( modrm >= 0xc0 ) {
	5651	int count=(int)XMM(modrm & 7).q[0];
	5652	for (int n=0; n < 8;n++)
	5653	XMM((modrm >> 3) & 0x7).s[n]=XMM((modrm >> 3) & 0x7).s[n] >> count;
	5654	} else {
	5655	XMM_REG src;
	5656	UINT32 ea = GetEA(modrm, 0);
	5657	READXMM(ea, src);
	5658	int count=(int)src.q[0];
	5659	for (int n=0; n < 8;n++)
	5660	XMM((modrm >> 3) & 0x7).s[n]=XMM((modrm >> 3) & 0x7).s[n] >> count;
	5661	}
	5662	CYCLES(1); // TODO: correct cycle count
	5663	}
	5664
	5665	void i386_device::sse_psrad_r128_rm128() // Opcode 66 0f e2
	5666	{
	5667	UINT8 modrm = FETCH();
	5668	if( modrm >= 0xc0 ) {
	5669	int count=(int)XMM(modrm & 7).q[0];
	5670	XMM((modrm >> 3) & 0x7).i[0]=XMM((modrm >> 3) & 0x7).i[0] >> count;
	5671	XMM((modrm >> 3) & 0x7).i[1]=XMM((modrm >> 3) & 0x7).i[1] >> count;
	5672	XMM((modrm >> 3) & 0x7).i[2]=XMM((modrm >> 3) & 0x7).i[2] >> count;
	5673	XMM((modrm >> 3) & 0x7).i[3]=XMM((modrm >> 3) & 0x7).i[3] >> count;
	5674	} else {
	5675	XMM_REG src;
	5676	UINT32 ea = GetEA(modrm, 0);
	5677	READXMM(ea, src);
	5678	int count=(int)src.q[0];
	5679	XMM((modrm >> 3) & 0x7).i[0]=XMM((modrm >> 3) & 0x7).i[0] >> count;
	5680	XMM((modrm >> 3) & 0x7).i[1]=XMM((modrm >> 3) & 0x7).i[1] >> count;
	5681	XMM((modrm >> 3) & 0x7).i[2]=XMM((modrm >> 3) & 0x7).i[2] >> count;
	5682	XMM((modrm >> 3) & 0x7).i[3]=XMM((modrm >> 3) & 0x7).i[3] >> count;
	5683	}
	5684	CYCLES(1); // TODO: correct cycle count
	5685	}
	5686
	5687	void i386_device::sse_movntdq_m128_r128() // Opcode 66 0f e7
	5688	{
	5689	UINT8 modrm = FETCH();
	5690	if( modrm >= 0xc0 ) {
	5691	CYCLES(1); // unsupported
	5692	} else {
	5693	// since cache is not implemented
	5694	UINT32 ea = GetEA(modrm, 0);
	5695	WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
	5696	CYCLES(1); // TODO: correct cycle count
	5697	}
	5698	}
	5699
	5700	void i386_device::sse_cvttpd2dq_r128_rm128() // Opcode 66 0f e6
	5701	{
	5702	UINT8 modrm = FETCH();
	5703	if( modrm >= 0xc0 ) {
	5704	XMM((modrm >> 3) & 0x7).i[0]=(INT32)XMM((modrm >> 3) & 0x7).f64[0];
	5705	XMM((modrm >> 3) & 0x7).i[1]=(INT32)XMM((modrm >> 3) & 0x7).f64[1];
	5706	XMM((modrm >> 3) & 0x7).q[1] = 0;
	5707	} else {
	5708	XMM_REG src;
	5709	UINT32 ea = GetEA(modrm, 0);
	5710	READXMM(ea, src);
	5711	XMM((modrm >> 3) & 0x7).i[0]=(INT32)src.f64[0];
	5712	XMM((modrm >> 3) & 0x7).i[1]=(INT32)src.f64[1];
	5713	XMM((modrm >> 3) & 0x7).q[1] = 0;
	5714	}
	5715	CYCLES(1); // TODO: correct cycle count
	5716	}
	5717
	5718	void i386_device::sse_movq_r128m64_r128() // Opcode 66 0f d6
	5719	{
	5720	UINT8 modrm = FETCH();
	5721	if( modrm >= 0xc0 ) {
	5722	XMM(modrm & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0];
	5723	XMM(modrm & 0x7).q[1] = 0;
	5724	} else {
	5725	UINT32 ea = GetEA(modrm, 0);
	5726	WRITE64(ea, XMM((modrm >> 3) & 0x7).q[0]);
	5727	}
	5728	CYCLES(1); // TODO: correct cycle count
	5729	}
	5730
	5731	void i386_device::sse_addsubpd_r128_rm128() // Opcode 66 0f d0
	5732	{
	5733	UINT8 modrm = FETCH();
	5734	if( modrm >= 0xc0 ) {
	5735	int s, d;
	5736	s=modrm & 0x7;
	5737	d=(modrm >> 3) & 0x7;
	5738	XMM(d).f64[0]=XMM(d).f64[0]-XMM(s).f64[0];
	5739	XMM(d).f64[1]=XMM(d).f64[1]+XMM(s).f64[1];
	5740	} else {
	5741	XMM_REG src;
	5742	int d;
	5743	UINT32 ea = GetEA(modrm, 0);
	5744	d=(modrm >> 3) & 0x7;
	5745	READXMM(ea, src);
	5746	XMM(d).f64[0]=XMM(d).f64[0]-src.f64[0];
	5747	XMM(d).f64[1]=XMM(d).f64[1]+src.f64[1];
	5748	}
	5749	CYCLES(1); // TODO: correct cycle count
	5750	}
	5751
	5752	void i386_device::sse_haddpd_r128_rm128() // Opcode 66 0f 7c
	5753	{
	5754	UINT8 modrm = FETCH();
	5755	if( modrm >= 0xc0 ) {
	5756	int s, d;
	5757	s=modrm & 0x7;
	5758	d=(modrm >> 3) & 0x7;
	5759	XMM(d).f64[0]=XMM(d).f64[0]+XMM(d).f64[1];
	5760	XMM(d).f64[1]=XMM(s).f64[0]+XMM(s).f64[1];
	5761	} else {
	5762	XMM_REG src;
	5763	int d;
	5764	UINT32 ea = GetEA(modrm, 0);
	5765	d=(modrm >> 3) & 0x7;
	5766	READXMM(ea, src);
	5767	XMM(d).f64[0]=XMM(d).f64[0]+XMM(d).f64[1];
	5768	XMM(d).f64[1]=src.f64[0]+src.f64[1];
	5769	}
	5770	CYCLES(1); // TODO: correct cycle count
	5771	}
	5772
	5773	void i386_device::sse_hsubpd_r128_rm128() // Opcode 66 0f 7d
	5774	{
	5775	UINT8 modrm = FETCH();
	5776	if( modrm >= 0xc0 ) {
	5777	int s, d;
	5778	s=modrm & 0x7;
	5779	d=(modrm >> 3) & 0x7;
	5780	XMM(d).f64[0]=XMM(d).f64[0]-XMM(d).f64[1];
	5781	XMM(d).f64[1]=XMM(s).f64[0]-XMM(s).f64[1];
	5782	} else {
	5783	XMM_REG src;
	5784	int d;
	5785	UINT32 ea = GetEA(modrm, 0);
	5786	d=(modrm >> 3) & 0x7;
	5787	READXMM(ea, src);
	5788	XMM(d).f64[0]=XMM(d).f64[0]-XMM(d).f64[1];
	5789	XMM(d).f64[1]=src.f64[0]-src.f64[1];
	5790	}
	5791	CYCLES(1); // TODO: correct cycle count
	5792	}
	5793
	5794	void i386_device::sse_sqrtpd_r128_rm128() // Opcode 66 0f 51
	5795	{
	5796	UINT8 modrm = FETCH();
	5797	if( modrm >= 0xc0 ) {
	5798	int s, d;
	5799	s=modrm & 0x7;
	5800	d=(modrm >> 3) & 0x7;
	5801	XMM(d).f64[0]=sqrt(XMM(s).f64[0]);
	5802	XMM(d).f64[1]=sqrt(XMM(s).f64[1]);
	5803	} else {
	5804	XMM_REG src;
	5805	int d;
	5806	UINT32 ea = GetEA(modrm, 0);
	5807	d=(modrm >> 3) & 0x7;
	5808	READXMM(ea, src);
	5809	XMM(d).f64[0]=sqrt(src.f64[0]);
	5810	XMM(d).f64[1]=sqrt(src.f64[1]);
	5811	}
	5812	CYCLES(1); // TODO: correct cycle count
	5813	}
	5814
	5815	void i386_device::sse_cvtpi2pd_r128_rm64() // Opcode 66 0f 2a
	5816	{
	5817	UINT8 modrm = FETCH();
	5818	if( modrm >= 0xc0 ) {
	5819	MMXPROLOG();
	5820	XMM((modrm >> 3) & 0x7).f64[0] = (double)MMX(modrm & 0x7).i[0];
	5821	XMM((modrm >> 3) & 0x7).f64[1] = (double)MMX(modrm & 0x7).i[1];
	5822	} else {
	5823	MMX_REG r;
	5824	UINT32 ea = GetEA(modrm, 0);
	5825	READMMX(ea, r);
	5826	XMM((modrm >> 3) & 0x7).f64[0] = (double)r.i[0];
	5827	XMM((modrm >> 3) & 0x7).f64[1] = (double)r.i[1];
	5828	}
	5829	CYCLES(1); // TODO: correct cycle count
	5830	}
	5831
	5832	void i386_device::sse_cvttpd2pi_r64_rm128() // Opcode 66 0f 2c
	5833	{
	5834	UINT8 modrm = FETCH();
	5835	MMXPROLOG();
	5836	if( modrm >= 0xc0 ) {
	5837	MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f64[0];
	5838	MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f64[1];
	5839	} else {
	5840	XMM_REG r;
	5841	UINT32 ea = GetEA(modrm, 0);
	5842	READXMM(ea, r);
	5843	MMX((modrm >> 3) & 0x7).i[0] = r.f64[0];
	5844	MMX((modrm >> 3) & 0x7).i[1] = r.f64[1];
	5845	}
	5846	CYCLES(1); // TODO: correct cycle count
	5847	}
	5848
	5849	void i386_device::sse_cvtpd2pi_r64_rm128() // Opcode 66 0f 2d
	5850	{
	5851	UINT8 modrm = FETCH();
	5852	MMXPROLOG();
	5853	if( modrm >= 0xc0 ) {
	5854	MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f64[0];
	5855	MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f64[1];
	5856	} else {
	5857	XMM_REG r;
	5858	UINT32 ea = GetEA(modrm, 0);
	5859	READXMM(ea, r);
	5860	MMX((modrm >> 3) & 0x7).i[0] = r.f64[0];
	5861	MMX((modrm >> 3) & 0x7).i[1] = r.f64[1];
	5862	}
	5863	CYCLES(1); // TODO: correct cycle count
	5864	}
	5865
	5866	void i386_device::sse_cvtpd2ps_r128_rm128() // Opcode 66 0f 5a
	5867	{
	5868	UINT8 modrm = FETCH();
	5869	if( modrm >= 0xc0 ) {
	5870	XMM((modrm >> 3) & 0x7).f[0] = (float)XMM(modrm & 0x7).f64[0];
	5871	XMM((modrm >> 3) & 0x7).f[1] = (float)XMM(modrm & 0x7).f64[1];
	5872	XMM((modrm >> 3) & 0x7).q[1] = 0;
	5873	} else {
	5874	XMM_REG r;
	5875	UINT32 ea = GetEA(modrm, 0);
	5876	READXMM(ea, r);
	5877	XMM((modrm >> 3) & 0x7).f[0] = (float)r.f64[0];
	5878	XMM((modrm >> 3) & 0x7).f[1] = (float)r.f64[1];
	5879	XMM((modrm >> 3) & 0x7).q[1] = 0;
	5880	}
	5881	CYCLES(1); // TODO: correct cycle count
	5882	}
	5883
	5884	void i386_device::sse_cvtps2dq_r128_rm128() // Opcode 66 0f 5b
	5885	{
	5886	UINT8 modrm = FETCH();
	5887	if( modrm >= 0xc0 ) {
	5888	XMM((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f[0];
	5889	XMM((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f[1];
	5890	XMM((modrm >> 3) & 0x7).i[2] = XMM(modrm & 0x7).f[2];
	5891	XMM((modrm >> 3) & 0x7).i[3] = XMM(modrm & 0x7).f[3];
	5892	} else {
	5893	XMM_REG r;
	5894	UINT32 ea = GetEA(modrm, 0);
	5895	READXMM(ea, r);
	5896	XMM((modrm >> 3) & 0x7).i[0] = r.f[0];
	5897	XMM((modrm >> 3) & 0x7).i[1] = r.f[1];
	5898	XMM((modrm >> 3) & 0x7).i[2] = r.f[2];
	5899	XMM((modrm >> 3) & 0x7).i[3] = r.f[3];
	5900	}
	5901	CYCLES(1); // TODO: correct cycle count
	5902	}
	5903
	5904	void i386_device::sse_addpd_r128_rm128() // Opcode 66 0f 58
	5905	{
	5906	UINT8 modrm = FETCH();
	5907	if( modrm >= 0xc0 ) {
	5908	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + XMM(modrm & 0x7).f64[0];
	5909	XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] + XMM(modrm & 0x7).f64[1];
	5910	} else {
	5911	XMM_REG src;
	5912	UINT32 ea = GetEA(modrm, 0);
	5913	READXMM(ea, src);
	5914	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + src.f64[0];
	5915	XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] + src.f64[1];
	5916	}
	5917	CYCLES(1); // TODO: correct cycle count
	5918	}
	5919
	5920	void i386_device::sse_mulpd_r128_rm128() // Opcode 66 0f 59
	5921	{
	5922	UINT8 modrm = FETCH();
	5923	if( modrm >= 0xc0 ) {
	5924	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * XMM(modrm & 0x7).f64[0];
	5925	XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] * XMM(modrm & 0x7).f64[1];
	5926	} else {
	5927	XMM_REG src;
	5928	UINT32 ea = GetEA(modrm, 0);
	5929	READXMM(ea, src);
	5930	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * src.f64[0];
	5931	XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] * src.f64[1];
	5932	}
	5933	CYCLES(1); // TODO: correct cycle count
	5934	}
	5935
	5936	void i386_device::sse_subpd_r128_rm128() // Opcode 66 0f 5c
	5937	{
	5938	UINT8 modrm = FETCH();
	5939	if( modrm >= 0xc0 ) {
	5940	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - XMM(modrm & 0x7).f64[0];
	5941	XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] - XMM(modrm & 0x7).f64[1];
	5942	} else {
	5943	XMM_REG src;
	5944	UINT32 ea = GetEA(modrm, 0);
	5945	READXMM(ea, src);
	5946	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - src.f64[0];
	5947	XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] - src.f64[1];
	5948	}
	5949	CYCLES(1); // TODO: correct cycle count
	5950	}
	5951
	5952	void i386_device::sse_minpd_r128_rm128() // Opcode 66 0f 5d
	5953	{
	5954	UINT8 modrm = FETCH();
	5955	if( modrm >= 0xc0 ) {
	5956	XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
	5957	XMM((modrm >> 3) & 0x7).f64[1] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[1], XMM(modrm & 0x7).f64[1]);
	5958	} else {
	5959	XMM_REG src;
	5960	UINT32 ea = GetEA(modrm, 0);
	5961	READXMM(ea, src);
	5962	XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], src.f64[0]);
	5963	XMM((modrm >> 3) & 0x7).f64[1] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[1], src.f64[1]);
	5964	}
	5965	CYCLES(1); // TODO: correct cycle count
	5966	}
	5967
	5968	void i386_device::sse_divpd_r128_rm128() // Opcode 66 0f 5e
	5969	{
	5970	UINT8 modrm = FETCH();
	5971	if( modrm >= 0xc0 ) {
	5972	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / XMM(modrm & 0x7).f64[0];
	5973	XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] / XMM(modrm & 0x7).f64[1];
	5974	} else {
	5975	XMM_REG src;
	5976	UINT32 ea = GetEA(modrm, 0);
	5977	READXMM(ea, src);
	5978	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / src.f64[0];
	5979	XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] / src.f64[1];
	5980	}
	5981	CYCLES(1); // TODO: correct cycle count
	5982	}
	5983
	5984	void i386_device::sse_maxpd_r128_rm128() // Opcode 66 0f 5f
	5985	{
	5986	UINT8 modrm = FETCH();
	5987	if( modrm >= 0xc0 ) {
	5988	XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
	5989	XMM((modrm >> 3) & 0x7).f64[1] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[1], XMM(modrm & 0x7).f64[1]);
	5990	} else {
	5991	XMM_REG src;
	5992	UINT32 ea = GetEA(modrm, 0);
	5993	READXMM(ea, src);
	5994	XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], src.f64[0]);
	5995	XMM((modrm >> 3) & 0x7).f64[1] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[1], src.f64[1]);
	5996	}
	5997	CYCLES(1); // TODO: correct cycle count
	5998	}
	5999
	6000	void i386_device::sse_movntpd_m128_r128() // Opcode 66 0f 2b
	6001	{
	6002	UINT8 modrm = FETCH();
	6003	if( modrm >= 0xc0 ) {
	6004	// unsupported by cpu
	6005	CYCLES(1); // TODO: correct cycle count
	6006	} else {
	6007	// since cache is not implemented
	6008	UINT32 ea = GetEA(modrm, 0);
	6009	WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
	6010	CYCLES(1); // TODO: correct cycle count
	6011	}
	6012	}
	6013
	6014	void i386_device::sse_movapd_r128_rm128() // Opcode 66 0f 28
	6015	{
	6016	UINT8 modrm = FETCH();
	6017	if( modrm >= 0xc0 ) {
	6018	XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
	6019	} else {
	6020	UINT32 ea = GetEA(modrm, 0);
	6021	READXMM(ea, XMM((modrm >> 3) & 0x7));
	6022	}
	6023	CYCLES(1); // TODO: correct cycle count
	6024	}
	6025
	6026	void i386_device::sse_movapd_rm128_r128() // Opcode 66 0f 29
	6027	{
	6028	UINT8 modrm = FETCH();
	6029	if( modrm >= 0xc0 ) {
	6030	XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
	6031	} else {
	6032	UINT32 ea = GetEA(modrm, 0);
	6033	WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
	6034	}
	6035	CYCLES(1); // TODO: correct cycle count
	6036	}
	6037
	6038	void i386_device::sse_movsd_r128_r128m64() // Opcode f2 0f 10
	6039	{
	6040	UINT8 modrm = FETCH();
	6041	if( modrm >= 0xc0 ) {
	6042	XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
	6043	} else {
	6044	UINT32 ea = GetEA(modrm, 0);
	6045	READXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
	6046	XMM((modrm >> 3) & 0x7).q[1] = 0;
	6047	}
	6048	CYCLES(1); // TODO: correct cycle count
	6049	}
	6050
	6051	void i386_device::sse_movsd_r128m64_r128() // Opcode f2 0f 11
	6052	{
	6053	UINT8 modrm = FETCH();
	6054	if( modrm >= 0xc0 ) {
	6055	XMM(modrm & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0];
	6056	} else {
	6057	UINT32 ea = GetEA(modrm, 0);
	6058	WRITEXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
	6059	}
	6060	CYCLES(1); // TODO: correct cycle count
	6061	}
	6062
	6063	void i386_device::sse_movddup_r128_r128m64() // Opcode f2 0f 12
	6064	{
	6065	UINT8 modrm = FETCH();
	6066	if( modrm >= 0xc0 ) {
	6067	XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
	6068	XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[0];
	6069	} else {
	6070	UINT32 ea = GetEA(modrm, 0);
	6071	READXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
	6072	XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[0];
	6073	}
	6074	CYCLES(1); // TODO: correct cycle count
	6075	}
	6076
	6077	void i386_device::sse_cvtsi2sd_r128_rm32() // Opcode f2 0f 2a
	6078	{
	6079	UINT8 modrm = FETCH();
	6080	if( modrm >= 0xc0 ) {
	6081	XMM((modrm >> 3) & 0x7).f64[0] = (INT32)LOAD_RM32(modrm);
	6082	} else {
	6083	UINT32 ea = GetEA(modrm, 0);
	6084	XMM((modrm >> 3) & 0x7).f64[0] = (INT32)READ32(ea);
	6085	}
	6086	CYCLES(1); // TODO: correct cycle count
	6087	}
	6088
	6089	void i386_device::sse_cvttsd2si_r32_r128m64() // Opcode f2 0f 2c
	6090	{
	6091	INT32 src;
	6092	UINT8 modrm = FETCH();
	6093	if( modrm >= 0xc0 ) {
	6094	src = (INT32)XMM(modrm & 0x7).f64[0];
	6095	} else { // otherwise is a memory address
	6096	XMM_REG t;
	6097	UINT32 ea = GetEA(modrm, 0);
	6098	READXMM_LO64(ea, t);
	6099	src = (INT32)t.f64[0];
	6100	}
	6101	STORE_REG32(modrm, (UINT32)src);
	6102	CYCLES(1); // TODO: correct cycle count
	6103	}
	6104
	6105	void i386_device::sse_cvtsd2si_r32_r128m64() // Opcode f2 0f 2d
	6106	{
	6107	INT32 src;
	6108	UINT8 modrm = FETCH();
	6109	if( modrm >= 0xc0 ) {
	6110	src = (INT32)XMM(modrm & 0x7).f64[0];
	6111	} else { // otherwise is a memory address
	6112	XMM_REG t;
	6113	UINT32 ea = GetEA(modrm, 0);
	6114	READXMM_LO64(ea, t);
	6115	src = (INT32)t.f64[0];
	6116	}
	6117	STORE_REG32(modrm, (UINT32)src);
	6118	CYCLES(1); // TODO: correct cycle count
	6119	}
	6120
	6121	void i386_device::sse_sqrtsd_r128_r128m64() // Opcode f2 0f 51
	6122	{
	6123	UINT8 modrm = FETCH();
	6124	if( modrm >= 0xc0 ) {
	6125	int s, d;
	6126	s=modrm & 0x7;
	6127	d=(modrm >> 3) & 0x7;
	6128	XMM(d).f64[0]=sqrt(XMM(s).f64[0]);
	6129	} else {
	6130	XMM_REG src;
	6131	int d;
	6132	UINT32 ea = GetEA(modrm, 0);
	6133	d=(modrm >> 3) & 0x7;
	6134	READXMM(ea, src);
	6135	XMM(d).f64[0]=sqrt(src.f64[0]);
	6136	}
	6137	CYCLES(1); // TODO: correct cycle count
	6138	}
	6139
	6140	void i386_device::sse_addsd_r128_r128m64() // Opcode f2 0f 58
	6141	{
	6142	UINT8 modrm = FETCH();
	6143	if( modrm >= 0xc0 ) {
	6144	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + XMM(modrm & 0x7).f64[0];
	6145	} else {
	6146	XMM_REG src;
	6147	UINT32 ea = GetEA(modrm, 0);
	6148	READXMM(ea, src);
	6149	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + src.f64[0];
	6150	}
	6151	CYCLES(1); // TODO: correct cycle count
	6152	}
	6153
	6154	void i386_device::sse_mulsd_r128_r128m64() // Opcode f2 0f 59
	6155	{
	6156	UINT8 modrm = FETCH();
	6157	if( modrm >= 0xc0 ) {
	6158	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * XMM(modrm & 0x7).f64[0];
	6159	} else {
	6160	XMM_REG src;
	6161	UINT32 ea = GetEA(modrm, 0);
	6162	READXMM(ea, src);
	6163	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * src.f64[0];
	6164	}
	6165	CYCLES(1); // TODO: correct cycle count
	6166	}
	6167
	6168	void i386_device::sse_cvtsd2ss_r128_r128m64() // Opcode f2 0f 5a
	6169	{
	6170	UINT8 modrm = FETCH();
	6171	if( modrm >= 0xc0 ) {
	6172	XMM((modrm >> 3) & 0x7).f[0] = XMM(modrm & 0x7).f64[0];
	6173	} else {
	6174	XMM_REG s;
	6175	UINT32 ea = GetEA(modrm, 0);
	6176	READXMM_LO64(ea, s);
	6177	XMM((modrm >> 3) & 0x7).f[0] = s.f64[0];
	6178	}
	6179	CYCLES(1); // TODO: correct cycle count
	6180	}
	6181
	6182	void i386_device::sse_subsd_r128_r128m64() // Opcode f2 0f 5c
	6183	{
	6184	UINT8 modrm = FETCH();
	6185	if( modrm >= 0xc0 ) {
	6186	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - XMM(modrm & 0x7).f64[0];
	6187	} else {
	6188	XMM_REG src;
	6189	UINT32 ea = GetEA(modrm, 0);
	6190	READXMM(ea, src);
	6191	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - src.f64[0];
	6192	}
	6193	CYCLES(1); // TODO: correct cycle count
	6194	}
	6195
	6196	void i386_device::sse_minsd_r128_r128m64() // Opcode f2 0f 5d
	6197	{
	6198	UINT8 modrm = FETCH();
	6199	if( modrm >= 0xc0 ) {
	6200	XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
	6201	} else {
	6202	XMM_REG src;
	6203	UINT32 ea = GetEA(modrm, 0);
	6204	READXMM(ea, src);
	6205	XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], src.f64[0]);
	6206	}
	6207	CYCLES(1); // TODO: correct cycle count
	6208	}
	6209
	6210	void i386_device::sse_divsd_r128_r128m64() // Opcode f2 0f 5e
	6211	{
	6212	UINT8 modrm = FETCH();
	6213	if( modrm >= 0xc0 ) {
	6214	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / XMM(modrm & 0x7).f64[0];
	6215	} else {
	6216	XMM_REG src;
	6217	UINT32 ea = GetEA(modrm, 0);
	6218	READXMM(ea, src);
	6219	XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / src.f64[0];
	6220	}
	6221	CYCLES(1); // TODO: correct cycle count
	6222	}
	6223
	6224	void i386_device::sse_maxsd_r128_r128m64() // Opcode f2 0f 5f
	6225	{
	6226	UINT8 modrm = FETCH();
	6227	if( modrm >= 0xc0 ) {
	6228	XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
	6229	} else {
	6230	XMM_REG src;
	6231	UINT32 ea = GetEA(modrm, 0);
	6232	READXMM(ea, src);
	6233	XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], src.f64[0]);
	6234	}
	6235	CYCLES(1); // TODO: correct cycle count
	6236	}
	6237
	6238	void i386_device::sse_haddps_r128_rm128() // Opcode f2 0f 7c
	6239	{
	6240	UINT8 modrm = FETCH();
	6241	if( modrm >= 0xc0 ) {
	6242	int s, d;
	6243	float f1, f2, f3, f4;
	6244	s=modrm & 0x7;
	6245	d=(modrm >> 3) & 0x7;
	6246	f1=XMM(d).f[0]+XMM(d).f[1];
	6247	f2=XMM(d).f[2]+XMM(d).f[3];
	6248	f3=XMM(s).f[0]+XMM(s).f[1];
	6249	f4=XMM(s).f[2]+XMM(s).f[3];
	6250	XMM(d).f[0]=f1;
	6251	XMM(d).f[1]=f2;
	6252	XMM(d).f[2]=f3;
	6253	XMM(d).f[3]=f4;
	6254	} else {
	6255	XMM_REG src;
	6256	int d;
	6257	float f1, f2;
	6258	UINT32 ea = GetEA(modrm, 0);
	6259	d=(modrm >> 3) & 0x7;
	6260	READXMM(ea, src);
	6261	f1=XMM(d).f[0]+XMM(d).f[1];
	6262	f2=XMM(d).f[2]+XMM(d).f[3];
	6263	XMM(d).f[0]=f1;
	6264	XMM(d).f[1]=f2;
	6265	XMM(d).f[2]=src.f[0]+src.f[1];
	6266	XMM(d).f[3]=src.f[2]+src.f[3];
	6267	}
	6268	CYCLES(1); // TODO: correct cycle count
	6269	}
	6270
	6271	void i386_device::sse_hsubps_r128_rm128() // Opcode f2 0f 7d
	6272	{
	6273	UINT8 modrm = FETCH();
	6274	if( modrm >= 0xc0 ) {
	6275	int s, d;
	6276	float f1, f2, f3, f4;
	6277	s=modrm & 0x7;
	6278	d=(modrm >> 3) & 0x7;
	6279	f1=XMM(d).f[0]-XMM(d).f[1];
	6280	f2=XMM(d).f[2]-XMM(d).f[3];
	6281	f3=XMM(s).f[0]-XMM(s).f[1];
	6282	f4=XMM(s).f[2]-XMM(s).f[3];
	6283	XMM(d).f[0]=f1;
	6284	XMM(d).f[1]=f2;
	6285	XMM(d).f[2]=f3;
	6286	XMM(d).f[3]=f4;
	6287	} else {
	6288	XMM_REG src;
	6289	int d;
	6290	float f1, f2;
	6291	UINT32 ea = GetEA(modrm, 0);
	6292	d=(modrm >> 3) & 0x7;
	6293	READXMM(ea, src);
	6294	f1=XMM(d).f[0]-XMM(d).f[1];
	6295	f2=XMM(d).f[2]-XMM(d).f[3];
	6296	XMM(d).f[0]=f1;
	6297	XMM(d).f[1]=f2;
	6298	XMM(d).f[2]=src.f[0]-src.f[1];
	6299	XMM(d).f[3]=src.f[2]-src.f[3];
	6300	}
	6301	CYCLES(1); // TODO: correct cycle count
	6302	}
	6303
	6304	void i386_device::sse_cmpsd_r128_r128m64_i8() // Opcode f2 0f c2
	6305	{
	6306	UINT8 modrm = FETCH();
	6307	if( modrm >= 0xc0 ) {
	6308	int s,d;
	6309	UINT8 imm8 = FETCH();
	6310	s=modrm & 0x7;
	6311	d=(modrm >> 3) & 0x7;
	6312	sse_predicate_compare_double_scalar(imm8, XMM(d), XMM(s));
	6313	} else {
	6314	int d;
	6315	XMM_REG s;
	6316	UINT32 ea = GetEA(modrm, 0);
	6317	UINT8 imm8 = FETCH();
	6318	READXMM_LO64(ea, s);
	6319	d=(modrm >> 3) & 0x7;
	6320	sse_predicate_compare_double_scalar(imm8, XMM(d), s);
	6321	}
	6322	CYCLES(1); // TODO: correct cycle count
	6323	}
	6324
	6325	void i386_device::sse_addsubps_r128_rm128() // Opcode f2 0f d0
	6326	{
	6327	UINT8 modrm = FETCH();
	6328	if( modrm >= 0xc0 ) {
	6329	XMM((modrm >> 3) & 0x7).f[0]=XMM((modrm >> 3) & 0x7).f[0] - XMM(modrm & 0x7).f[0];
	6330	XMM((modrm >> 3) & 0x7).f[1]=XMM((modrm >> 3) & 0x7).f[1] + XMM(modrm & 0x7).f[1];
	6331	XMM((modrm >> 3) & 0x7).f[2]=XMM((modrm >> 3) & 0x7).f[2] - XMM(modrm & 0x7).f[2];
	6332	XMM((modrm >> 3) & 0x7).f[3]=XMM((modrm >> 3) & 0x7).f[3] + XMM(modrm & 0x7).f[3];
	6333	} else {
	6334	XMM_REG src;
	6335	UINT32 ea = GetEA(modrm, 0);
	6336	READXMM(ea, src);
	6337	XMM((modrm >> 3) & 0x7).f[0]=XMM((modrm >> 3) & 0x7).f[0] - src.f[0];
	6338	XMM((modrm >> 3) & 0x7).f[1]=XMM((modrm >> 3) & 0x7).f[1] + src.f[1];
	6339	XMM((modrm >> 3) & 0x7).f[2]=XMM((modrm >> 3) & 0x7).f[2] - src.f[2];
	6340	XMM((modrm >> 3) & 0x7).f[3]=XMM((modrm >> 3) & 0x7).f[3] + src.f[3];
	6341	}
	6342	CYCLES(1); // TODO: correct cycle count
	6343	}
	6344
	6345	void i386_device::sse_movdq2q_r64_r128() // Opcode f2 0f d6
	6346	{
	6347	UINT8 modrm = FETCH();
	6348	MMXPROLOG();
	6349	if( modrm >= 0xc0 ) {
	6350	MMX((modrm >> 3) & 0x7).q = XMM(modrm & 0x7).q[0];
	6351	CYCLES(1); // TODO: correct cycle count
	6352	} else {
	6353	// unsupported by cpu
	6354	CYCLES(1); // TODO: correct cycle count
	6355	}
	6356	}
	6357
	6358	void i386_device::sse_cvtpd2dq_r128_rm128() // Opcode f2 0f e6
	6359	{
	6360	UINT8 modrm = FETCH();
	6361	if( modrm >= 0xc0 ) {
	6362	XMM((modrm >> 3) & 0x7).i[0]=(INT32)XMM((modrm >> 3) & 0x7).f64[0];
	6363	XMM((modrm >> 3) & 0x7).i[1]=(INT32)XMM((modrm >> 3) & 0x7).f64[1];
	6364	XMM((modrm >> 3) & 0x7).q[1] = 0;
	6365	} else {
	6366	XMM_REG src;
	6367	UINT32 ea = GetEA(modrm, 0);
	6368	READXMM(ea, src);
	6369	XMM((modrm >> 3) & 0x7).i[0]=(INT32)src.f64[0];
	6370	XMM((modrm >> 3) & 0x7).i[1]=(INT32)src.f64[1];
	6371	XMM((modrm >> 3) & 0x7).q[1] = 0;
	6372	}
	6373	CYCLES(1); // TODO: correct cycle count
	6374	}
	6375
	6376	void i386_device::sse_lddqu_r128_m128() // Opcode f2 0f f0
	6377	{
	6378	UINT8 modrm = FETCH();
	6379	if( modrm >= 0xc0 ) {
	6380	// unsupported by cpu
	6381	CYCLES(1); // TODO: correct cycle count
	6382	} else {
	6383	UINT32 ea = GetEA(modrm, 0);
	6384	READXMM(ea, XMM((modrm >> 3) & 0x7));
	6385	}
	6386	}

https://github.com/mamedev/mame/commit/f337c98333944c5480960733de93da44b26ab98c

199869 Revisions