trunk/src/emu/cpu/nec/v53.c
| r244829 | r244830 | |
| 5 | 5 | // Interrupt Controller is uPD71059 equivalent |
| 6 | 6 | // DMA Controller can operate in modes providing a subset of the uPD71071 or uPD71037 functionality (some modes unavailable / settings ignored) |
| 7 | 7 | // Serial Controller is based on the uPD71051 but with some changes |
| 8 | | // Timer Unit is functionally identical to uPD71054 |
| 8 | // Timer Unit is functionally identical to uPD71054 (which in turn is said to be the same as a pit8253) |
| 9 | 9 | |
| 10 | 10 | #include "emu.h" |
| 11 | 11 | #include "v53.h" |
| 12 | 12 | |
| 13 | #include "machine/pit8253.h" |
| 13 | 14 | const device_type V53 = &device_creator<v53_device>; |
| 14 | 15 | const device_type V53A =&device_creator<v53a_device>; |
| 15 | 16 | |
| r244829 | r244830 | |
| 339 | 340 | |
| 340 | 341 | /*** TCU ***/ |
| 341 | 342 | |
| 342 | | READ8_MEMBER(v53_base_device::tmu_tst0_r) |
| 343 | | { |
| 344 | | printf("v53: tmu_tst0_r\n"); |
| 345 | | return 0; |
| 346 | | } |
| 343 | WRITE8_MEMBER(v53_base_device::tmu_tct0_w) { m_pit->write(space, 0, data); } |
| 344 | WRITE8_MEMBER(v53_base_device::tmu_tct1_w) { m_pit->write(space, 1, data); } |
| 345 | WRITE8_MEMBER(v53_base_device::tmu_tct2_w) { m_pit->write(space, 2, data); } |
| 346 | WRITE8_MEMBER(v53_base_device::tmu_tmd_w) { m_pit->write(space, 3, data); } |
| 347 | 347 | |
| 348 | | WRITE8_MEMBER(v53_base_device::tmu_tct0_w) |
| 349 | | { |
| 350 | | printf("v53: tmu_tct0_w %02x\n", data); |
| 351 | | } |
| 352 | 348 | |
| 353 | | READ8_MEMBER(v53_base_device::tmu_tst1_r) |
| 354 | | { |
| 355 | | printf("v53: tmu_tst1_r\n"); |
| 356 | | return 0; |
| 357 | | } |
| 349 | READ8_MEMBER(v53_base_device::tmu_tst0_r) { return m_pit->read(space, 0); } |
| 350 | READ8_MEMBER(v53_base_device::tmu_tst1_r) { return m_pit->read(space, 1); } |
| 351 | READ8_MEMBER(v53_base_device::tmu_tst2_r) { return m_pit->read(space, 2); } |
| 358 | 352 | |
| 359 | | WRITE8_MEMBER(v53_base_device::tmu_tct1_w) |
| 360 | | { |
| 361 | | printf("v53: tmu_tct1_w %02x\n", data); |
| 362 | | } |
| 363 | 353 | |
| 364 | | READ8_MEMBER(v53_base_device::tmu_tst2_r) |
| 365 | | { |
| 366 | | printf("v53: tmu_tst2_r\n"); |
| 367 | | return 0; |
| 368 | | } |
| 369 | | |
| 370 | | WRITE8_MEMBER(v53_base_device::tmu_tct2_w) |
| 371 | | { |
| 372 | | printf("v53: tmu_tct2_w %02x\n", data); |
| 373 | | } |
| 374 | | |
| 375 | | WRITE8_MEMBER(v53_base_device::tmu_tmd_w) |
| 376 | | { |
| 377 | | printf("v53: tmu_tmd_w %02x\n", data); |
| 378 | | } |
| 379 | | |
| 380 | 354 | /* General stuff */ |
| 381 | 355 | |
| 382 | 356 | static ADDRESS_MAP_START( v53_internal_port_map, AS_IO, 16, v53_base_device ) |
| r244829 | r244830 | |
| 414 | 388 | // AM_RANGE(0xfffe, 0xffff) // (reserved , 0xff00) // 0xffff |
| 415 | 389 | ADDRESS_MAP_END |
| 416 | 390 | |
| 391 | static MACHINE_CONFIG_FRAGMENT( v53 ) |
| 392 | MCFG_DEVICE_ADD("pit", PIT8254, 0) // functionality identical to uPD71054 |
| 393 | MCFG_PIT8253_CLK0(16000000/2/8) |
| 394 | //MCFG_PIT8253_OUT0_HANDLER(WRITELINE(v53_base_device, pit_out0)) |
| 395 | MACHINE_CONFIG_END |
| 396 | |
| 397 | machine_config_constructor v53_base_device::device_mconfig_additions() const |
| 398 | { |
| 399 | return MACHINE_CONFIG_NAME( v53 ); |
| 400 | } |
| 401 | |
| 402 | |
| 417 | 403 | v53_base_device::v53_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, offs_t fetch_xor, UINT8 prefetch_size, UINT8 prefetch_cycles, UINT32 chip_type) |
| 418 | 404 | : nec_common_device(mconfig, type, name, tag, owner, clock, shortname, true, fetch_xor, prefetch_size, prefetch_cycles, chip_type), |
| 419 | | m_io_space_config( "io", ENDIANNESS_LITTLE, 16, 16, 0, ADDRESS_MAP_NAME( v53_internal_port_map ) ) |
| 405 | m_io_space_config( "io", ENDIANNESS_LITTLE, 16, 16, 0, ADDRESS_MAP_NAME( v53_internal_port_map ) ), |
| 406 | m_pit(*this, "pit") |
| 420 | 407 | { |
| 421 | 408 | } |
| 422 | 409 | |