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r34918 Sunday 8th February, 2015 at 00:16:23 UTC by hap
added ucom4 i/o opcodes
[src/emu/cpu/ucom4]ucom4.c ucom4.h ucom4op.inc

trunk/src/emu/cpu/ucom4/ucom4.c
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116116   m_datamask = (1 << m_datawidth) - 1;
117117   m_dph_mask = m_datamask >> 4;
118118
119   m_read_a.resolve_safe(0);
120   m_read_b.resolve_safe(0);
121   m_read_c.resolve_safe(0);
122   m_read_d.resolve_safe(0);
119   m_read_a.resolve_safe(0xf);
120   m_read_b.resolve_safe(0xf);
121   m_read_c.resolve_safe(0xf);
122   m_read_d.resolve_safe(0xf);
123123
124124   m_write_c.resolve_safe();
125125   m_write_d.resolve_safe();
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131131
132132   // zerofill
133133   memset(m_stack, 0, sizeof(m_stack));
134   memset(m_port_out, 0, sizeof(m_port_out));
134135   m_op = 0;
135136   m_prev_op = 0;
136   m_arg = 0;
137137   m_skip = false;
138138   m_pc = 0;
139139   m_acc = 0;
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147147
148148   // register for savestates
149149   save_item(NAME(m_stack));
150   save_item(NAME(m_port_out));
150151   save_item(NAME(m_op));
151152   save_item(NAME(m_prev_op));
152   save_item(NAME(m_arg));
153153   save_item(NAME(m_skip));
154154   save_item(NAME(m_pc));
155155   save_item(NAME(m_acc));
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185185   m_pc = 0;
186186   m_op = 0;
187187   m_skip = false;
188
189   // clear i/o
190   for (int i = NEC_UCOM4_PORTC; i <= NEC_UCOM4_PORTI; i++)
191      output_w(i, 0xf);
188192}
189193
190194
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215219
216220      debugger_instruction_hook(this, m_pc);
217221      m_op = m_program->read_byte(m_pc);
222      m_bitmask = 1 << (m_op & 0x03);
218223      m_pc = (m_pc + 1) & m_prgmask;
219224      fetch_arg();
220225     
trunk/src/emu/cpu/ucom4/ucom4.h
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4545   ucom4_cpu_device::set_write_i_callback(*device, DEVCB_##_devcb);
4646
4747
48enum
49{
50   NEC_UCOM4_PORTA = 0,
51   NEC_UCOM4_PORTB,
52   NEC_UCOM4_PORTC,
53   NEC_UCOM4_PORTD,
54   NEC_UCOM4_PORTE,
55   NEC_UCOM4_PORTF,
56   NEC_UCOM4_PORTG,
57   NEC_UCOM4_PORTH,
58   NEC_UCOM4_PORTI
59};
4860
61
62
4963class ucom4_cpu_device : public cpu_device
5064{
5165public:
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117131   int m_datawidth;
118132   int m_prgmask;
119133   int m_datamask;
120   int m_family;       // MCU family (43/44/45)
121   int m_stack_levels; // number of callstack levels
122   UINT16 m_stack[3+1]; // max 3
134   int m_family;           // MCU family (43/44/45)
135   int m_stack_levels;     // number of callstack levels
136   UINT16 m_stack[3+1];    // max 3
137   UINT8 m_port_out[0x10]; // last value written to output port
123138   UINT8 m_op;
124   UINT8 m_prev_op;    // previous opcode
125   UINT8 m_arg;        // opcode argument for 2-byte opcodes
126   bool m_skip;        // skip next opcode
139   UINT8 m_prev_op;        // previous opcode
140   UINT8 m_arg;            // opcode argument for 2-byte opcodes
141   UINT8 m_bitmask;        // opcode bit argument
142   bool m_skip;            // skip next opcode
127143   int m_icount;
128144   
129   UINT16 m_pc;        // program counter
130   UINT8 m_acc;        // 4-bit accumulator
131   UINT8 m_dpl;        // 4-bit data pointer low (RAM x)
132   UINT8 m_dph;        // 4-bit(?) data pointer high (RAM y)
145   UINT16 m_pc;            // program counter
146   UINT8 m_acc;            // 4-bit accumulator
147   UINT8 m_dpl;            // 4-bit data pointer low (RAM x)
148   UINT8 m_dph;            // 4-bit(?) data pointer high (RAM y)
133149   UINT8 m_dph_mask;
134   UINT8 m_carry_f;    // carry flag
135   UINT8 m_carry_s_f;  // carry save flag
136   UINT8 m_timer_f;    // timer out flag
137   UINT8 m_int_f;      // interrupt flag
138   UINT8 m_inte_f;     // interrupt enable flag
150   UINT8 m_carry_f;        // carry flag
151   UINT8 m_carry_s_f;      // carry save flag
152   UINT8 m_timer_f;        // timer out flag
153   UINT8 m_int_f;          // interrupt flag
154   UINT8 m_inte_f;         // interrupt enable flag
139155
140156   // i/o handlers
141157   devcb_read8 m_read_a;
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156172   void ram_w(UINT8 data);
157173   void pop_stack();
158174   void push_stack();
175   UINT8 input_r(int index);
176   void output_w(int index, UINT8 data);
159177   void op_illegal();
160178   bool check_op_43();
161179
trunk/src/emu/cpu/ucom4/ucom4op.inc
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3131   m_stack[0] = m_pc;
3232}
3333
34UINT8 ucom4_cpu_device::input_r(int index)
35{
36   index &= 0xf;
37   UINT8 inp = 0xf;
38   
39   switch (index)
40   {
41      case NEC_UCOM4_PORTA: inp = m_read_a(index, 0xff) & 0xf; break;
42      case NEC_UCOM4_PORTB: inp = m_read_b(index, 0xff) & 0xf; break;
43      case NEC_UCOM4_PORTC: inp = m_read_c(index, 0xff) & 0xf; break;
44      case NEC_UCOM4_PORTD: inp = m_read_d(index, 0xff) & 0xf; break;
45
46      default:
47         logerror("%s read from unknown port %c at $%03X\n", tag(), 'A' + index, m_pc);
48         break;
49   }
50
51   return inp;
52}
53
54void ucom4_cpu_device::output_w(int index, UINT8 data)
55{
56   index &= 0xf;
57   data &= 0xf;
58
59   switch (index)
60   {
61      case NEC_UCOM4_PORTC: m_write_c(index, data, 0xff); break;
62      case NEC_UCOM4_PORTD: m_write_d(index, data, 0xff); break;
63      case NEC_UCOM4_PORTE: m_write_e(index, data, 0xff); break;
64      case NEC_UCOM4_PORTF: m_write_f(index, data, 0xff); break;
65      case NEC_UCOM4_PORTG: m_write_g(index, data, 0xff); break;
66      case NEC_UCOM4_PORTH: m_write_h(index, data, 0xff); break;
67      case NEC_UCOM4_PORTI: m_write_i(index, data & 7, 0xff); break;
68     
69      default:
70         logerror("%s write to unknown port %c = $%X at $%03X\n", tag(), 'A' + index, data & 0xf, m_pc);
71         break;
72   }
73
74   m_port_out[index] = data;
75}
76
3477void ucom4_cpu_device::op_illegal()
3578{
3679   logerror("%s unknown opcode $%02X at $%03X\n", tag(), m_op, m_pc);
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240283void ucom4_cpu_device::op_rmb()
241284{
242285   // RMB B: Reset a single bit of RAM
243   ram_w(ram_r() & ~(1 << (m_op & 0x03)));
286   ram_w(ram_r() & ~m_bitmask);
244287}
245288
246289void ucom4_cpu_device::op_smb()
247290{
248291   // SMB B: Set a single bit of RAM
249   ram_w(ram_r() | (1 << (m_op & 0x03)));
292   ram_w(ram_r() | m_bitmask);
250293}
251294
252295void ucom4_cpu_device::op_reb()
253296{
254297   // REB B: Reset a single bit of output port E
255298   m_icount--;
256   op_illegal();
299   output_w(NEC_UCOM4_PORTE, m_port_out[NEC_UCOM4_PORTE] & ~m_bitmask);
257300}
258301
259302void ucom4_cpu_device::op_seb()
260303{
261304   // SEB B: Set a single bit of output port E
262305   m_icount--;
263   op_illegal();
306   output_w(NEC_UCOM4_PORTE, m_port_out[NEC_UCOM4_PORTE] | m_bitmask);
264307}
265308
266309void ucom4_cpu_device::op_rpb()
267310{
268311   // RPB B: Reset a single bit of output port (DPl)
269   op_illegal();
312   output_w(m_dpl, m_port_out[m_dpl] & ~m_bitmask);
270313}
271314
272315void ucom4_cpu_device::op_spb()
273316{
274317   // SPB B: Set a single bit of output port (DPl)
275   op_illegal();
318   output_w(m_dpl, m_port_out[m_dpl] | m_bitmask);
276319}
277320
278321
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340383void ucom4_cpu_device::op_cmb()
341384{
342385   // CMB B: skip next on bit(ACC) equals bit(RAM)
343   UINT8 mask = 1 << (m_op & 0x03);
344   m_skip = ((m_acc & mask) == (ram_r() & mask));
386   m_skip = ((m_acc & m_bitmask) == (ram_r() & m_bitmask));
345387}
346388
347389void ucom4_cpu_device::op_tab()
348390{
349391   // TAB B: skip next on bit(ACC)
350   m_skip = ((m_acc & (1 << (m_op & 0x03))) != 0);
392   m_skip = ((m_acc & m_bitmask) != 0);
351393}
352394
353395void ucom4_cpu_device::op_cli()
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362404void ucom4_cpu_device::op_tmb()
363405{
364406   // TMB B: skip next on bit(RAM)
365   m_skip = ((ram_r() & (1 << (m_op & 0x03))) != 0);
407   m_skip = ((ram_r() & m_bitmask) != 0);
366408}
367409
368410void ucom4_cpu_device::op_tpa()
369411{
370412   // TPA B: skip next on bit(input port A)
371   op_illegal();
413   m_skip = ((input_r(NEC_UCOM4_PORTA) & m_bitmask) != 0);
372414}
373415
374416void ucom4_cpu_device::op_tpb()
375417{
376418   // TPB B: skip next on bit(input port (DPl))
377   op_illegal();
419   m_skip = ((input_r(m_dpl) & m_bitmask) != 0);
378420}
379421
380422
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392434void ucom4_cpu_device::op_ia()
393435{
394436   // IA: Input port A to ACC
395   op_illegal();
437   m_acc = input_r(NEC_UCOM4_PORTA);
396438}
397439
398440void ucom4_cpu_device::op_ip()
399441{
400442   // IP: Input port (DPl) to ACC
401   op_illegal();
443   m_acc = input_r(m_dpl);
402444}
403445
404446void ucom4_cpu_device::op_oe()
405447{
406448   // OE: Output ACC to port E
407   m_write_e(0, m_acc, 0xff);
449   output_w(NEC_UCOM4_PORTE, m_acc);
408450}
409451
410452void ucom4_cpu_device::op_op()
411453{
412454   // OP: Output ACC to port (DPl)
413   op_illegal();
455   output_w(m_dpl, m_acc);
414456}
415457
416458void ucom4_cpu_device::op_ocd()
417459{
418460   // OCD X: Output X to ports C and D
419   op_illegal();
461   output_w(NEC_UCOM4_PORTD, m_arg >> 4);
462   output_w(NEC_UCOM4_PORTC, m_arg & 0xf);
420463}
421464
422465

https://github.com/mamedev/mame/commit/8717aeab38f48fe2727b9f5ef8c31322b4f99eff

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