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r34917 Saturday 7th February, 2015 at 22:28:45 UTC by hap
added ucom4 straightforward opcodes
[src/emu/cpu/amis2000]amis2000.h amis2000op.inc
[src/emu/cpu/ucom4]ucom4.c ucom4.h ucom4op.inc

trunk/src/emu/cpu/amis2000/amis2000.h
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7575   UINT8 m_callstack_bits;     // number of program counter bits held in callstack
7676   UINT16 m_callstack_mask;
7777   UINT8 m_callstack_depth;    // callstack levels: 3 on 2000/2150, 5 on 2200/2400
78   UINT16 m_callstack[5];      // max 5
78   UINT16 m_callstack[5+1];    // max 5
7979
8080   UINT16 m_pc;                // 13-bit program counter
8181   UINT8 m_ppr;                // prepared page register (PP 1)
trunk/src/emu/cpu/amis2000/amis2000op.inc
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22
33// internal helpers
44
5UINT8 amis2000_device::ram_r()
5inline UINT8 amis2000_device::ram_r()
66{
77   UINT16 address = m_bu << 4 | m_bl;
88   return m_data->read_byte(address) & 0xf;
99}
1010
11void amis2000_device::ram_w(UINT8 data)
11inline void amis2000_device::ram_w(UINT8 data)
1212{
1313   UINT16 address = m_bu << 4 | m_bl;
1414   m_data->write_byte(address, data & 0xf);
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1717void amis2000_device::pop_callstack()
1818{
1919   m_pc = (m_pc & ~m_callstack_mask) | (m_callstack[0] & m_callstack_mask);
20   for (int i = 0; i < m_callstack_depth-1; i++)
20   for (int i = 0; i < m_callstack_depth; i++)
2121   {
2222      m_callstack[i] = m_callstack[i+1];
2323      m_callstack[i+1] = 0;
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2727void amis2000_device::push_callstack()
2828{
2929   for (int i = m_callstack_depth-1; i >= 1; i--)
30   {
3130      m_callstack[i] = m_callstack[i-1];
32   }
3331   m_callstack[0] = m_pc & m_callstack_mask;
3432}
3533
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407405void amis2000_device::op_tf1()
408406{
409407   // TF1: skip next on flag 1
410   m_skip = (m_f & 0x01) ? true : false;
408   m_skip = ((m_f & 0x01) != 0);
411409}
412410
413411void amis2000_device::op_tf2()
414412{
415413   // TF2: skip next on flag 2
416   m_skip = (m_f & 0x02) ? true : false;
414   m_skip = ((m_f & 0x02) != 0);
417415}
418416
419417
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433431   // ADIS X: add X to ACC, skip next on not carry
434432   UINT8 param = m_op & 0x0f;
435433   m_acc += param;
436   m_skip = !(m_acc >> 4 & 1);
434   m_skip = !(m_acc & 0x10);
437435   m_acc &= 0xf;
438436}
439437
trunk/src/emu/cpu/ucom4/ucom4.c
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114114   m_data = &space(AS_DATA);
115115   m_prgmask = (1 << m_prgwidth) - 1;
116116   m_datamask = (1 << m_datawidth) - 1;
117   m_dph_mask = m_datamask >> 4;
117118
118119   m_read_a.resolve_safe(0);
119120   m_read_b.resolve_safe(0);
trunk/src/emu/cpu/ucom4/ucom4.h
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119119   int m_datamask;
120120   int m_family;       // MCU family (43/44/45)
121121   int m_stack_levels; // number of callstack levels
122   UINT16 m_stack[3]; // max 3
122   UINT16 m_stack[3+1]; // max 3
123123   UINT8 m_op;
124124   UINT8 m_prev_op;    // previous opcode
125125   UINT8 m_arg;        // opcode argument for 2-byte opcodes
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129129   UINT16 m_pc;        // program counter
130130   UINT8 m_acc;        // 4-bit accumulator
131131   UINT8 m_dpl;        // 4-bit data pointer low (RAM x)
132   UINT8 m_dph;        // 1/2/3-bit data pointer high (RAM y)
132   UINT8 m_dph;        // 4-bit(?) data pointer high (RAM y)
133   UINT8 m_dph_mask;
133134   UINT8 m_carry_f;    // carry flag
134135   UINT8 m_carry_s_f;  // carry save flag
135136   UINT8 m_timer_f;    // timer out flag
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151152   devcb_write8 m_write_i;
152153   
153154   // opcode handlers
155   UINT8 ram_r();
156   void ram_w(UINT8 data);
157   void pop_stack();
158   void push_stack();
154159   void op_illegal();
155160   bool check_op_43();
156161
trunk/src/emu/cpu/ucom4/ucom4op.inc
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22
33// internal helpers
44
5inline UINT8 ucom4_cpu_device::ram_r()
6{
7   UINT16 address = m_dph << 4 | m_dpl;
8   return m_data->read_byte(address & m_datamask) & 0xf;
9}
10
11inline void ucom4_cpu_device::ram_w(UINT8 data)
12{
13   UINT16 address = m_dph << 4 | m_dpl;
14   m_data->write_byte(address & m_datamask, data & 0xf);
15}
16
17void ucom4_cpu_device::pop_stack()
18{
19   m_pc = m_stack[0] & m_prgmask;
20   for (int i = 0; i < m_stack_levels; i++)
21   {
22      m_stack[i] = m_stack[i+1];
23      m_stack[i+1] = 0;
24   }
25}
26
27void ucom4_cpu_device::push_stack()
28{
29   for (int i = m_stack_levels-1; i >= 1; i--)
30      m_stack[i] = m_stack[i-1];
31   m_stack[0] = m_pc;
32}
33
534void ucom4_cpu_device::op_illegal()
635{
736   logerror("%s unknown opcode $%02X at $%03X\n", tag(), m_op, m_pc);
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1645void ucom4_cpu_device::op_li()
1746{
1847   // LI X: Load ACC with X
19   // note: only execute the first one in a sequence of LAI
48   // note: only execute the first one in a sequence of LI
2049   if ((m_prev_op & 0xf0) != (m_op & 0xf0))
2150      m_acc = m_op & 0x0f;
2251}
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2453void ucom4_cpu_device::op_lm()
2554{
2655   // LM X: Load ACC with RAM, xor DPh with X
27   op_illegal();
56   m_acc = ram_r();
57   m_dph ^= (m_op & 0x03);
2858}
2959
3060void ucom4_cpu_device::op_ldi()
3161{
3262   // LDI X: Load DP with X
33   op_illegal();
63   m_dph = m_arg >> 4 & 0xf;
64   m_dpl = m_arg & 0x0f;
3465}
3566
3667void ucom4_cpu_device::op_ldz()
3768{
3869   // LDZ X: Load DPh with 0, Load DPl with X
39   op_illegal();
70   m_dph = 0;
71   m_dpl = m_op & 0x0f;
4072}
4173
4274
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4577void ucom4_cpu_device::op_s()
4678{
4779   // S: Store ACC into RAM
48   op_illegal();
80   ram_w(m_acc);
4981}
5082
5183
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5486void ucom4_cpu_device::op_tal()
5587{
5688   // TAL: Transfer ACC to DPl
57   op_illegal();
89   m_dpl = m_acc;
5890}
5991
6092void ucom4_cpu_device::op_tla()
6193{
62   // TLA: Transfer
63   op_illegal();
94   // TLA: Transfer DPl to ACC
95   m_acc = m_dpl;
6496}
6597
6698
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69101void ucom4_cpu_device::op_xm()
70102{
71103   // XM X: Exchange ACC with RAM, xor DPh with X
72   op_illegal();
104   UINT8 old_acc = m_acc;
105   m_acc = ram_r();
106   ram_w(old_acc);
107   m_dph ^= (m_op & 0x03);
73108}
74109
75110void ucom4_cpu_device::op_xmi()
76111{
77112   // XMI X: Exchange ACC with RAM, xor DPh with X, Increment DPl, skip next on carry
78   op_illegal();
113   op_xm();
114   m_dpl = (m_dpl + 1) & 0xf;
115   m_skip = (m_dpl == 0);
79116}
80117
81118void ucom4_cpu_device::op_xmd()
82119{
83120   // XMD X: Exchange ACC with RAM, xor DPh with X, Decrement DPl, skip next on carry
84   op_illegal();
121   op_xm();
122   m_dpl = (m_dpl - 1) & 0xf;
123   m_skip = (m_dpl == 0xf);
85124}
86125
87126
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89128
90129void ucom4_cpu_device::op_ad()
91130{
92   // AD: Add RAM to Acc, skip next on carry
93   op_illegal();
131   // AD: Add RAM to ACC, skip next on carry
132   m_acc += ram_r();
133   m_skip = ((m_acc & 0x10) != 0);
134   m_acc &= 0xf;
94135}
95136
96137void ucom4_cpu_device::op_adc()
97138{
98   // ADC: Add RAM and carry to Acc, store Carry F/F
139   // ADC: Add RAM and carry to ACC, store Carry F/F
99140   op_illegal();
100141}
101142
102143void ucom4_cpu_device::op_ads()
103144{
104   // ADS: Add RAM and carry to Acc, store Carry F/F, skip next on carry
145   // ADS: Add RAM and carry to ACC, store Carry F/F, skip next on carry
105146   op_illegal();
106147}
107148
108149void ucom4_cpu_device::op_daa()
109150{
110151   // DAA: Add 6 to ACC to adjust decimal for BCD Addition
111   op_illegal();
152   m_acc = (m_acc + 6) & 0xf;
112153}
113154
114155void ucom4_cpu_device::op_das()
115156{
116157   // DAS: Add 10 to ACC to adjust decimal for BCD Subtraction
117   op_illegal();
158   m_acc = (m_acc + 10) & 0xf;
118159}
119160
120161
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123164void ucom4_cpu_device::op_exl()
124165{
125166   // EXL: Xor ACC with RAM
126   op_illegal();
167   m_acc ^= ram_r();
127168}
128169
129170
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132173void ucom4_cpu_device::op_cma()
133174{
134175   // CMA: Complement ACC
135   op_illegal();
176   m_acc ^= 0xf;
136177}
137178
138179void ucom4_cpu_device::op_cia()
139180{
140181   // CIA: Complement ACC, Increment ACC
141   op_illegal();
182   m_acc = ((m_acc ^ 0xf) + 1) & 0xf;
142183}
143184
144185
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147188void ucom4_cpu_device::op_clc()
148189{
149190   // CLC: Reset Carry F/F
150   op_illegal();
191   m_carry_f = 0;
151192}
152193
153194void ucom4_cpu_device::op_stc()
154195{
155196   // STC: Set Carry F/F
156   op_illegal();
197   m_carry_f = 1;
157198}
158199
159200void ucom4_cpu_device::op_tc()
160201{
161202   // TC: skip next on Carry F/F
162   op_illegal();
203   m_skip = (m_carry_f != 0);
163204}
164205
165206
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168209void ucom4_cpu_device::op_inc()
169210{
170211   // INC: Increment ACC, skip next on carry
171   op_illegal();
212   m_acc = (m_acc + 1) & 0xf;
213   m_skip = (m_acc == 0);
172214}
173215
174216void ucom4_cpu_device::op_dec()
175217{
176218   // DEC: Decrement ACC, skip next on carry
177   op_illegal();
219   m_acc = (m_acc - 1) & 0xf;
220   m_skip = (m_acc == 0xf);
178221}
179222
180223void ucom4_cpu_device::op_ind()
181224{
182225   // IND: Increment DPl, skip next on carry
183   op_illegal();
226   m_dpl = (m_dpl + 1) & 0xf;
227   m_skip = (m_dpl == 0);
184228}
185229
186230void ucom4_cpu_device::op_ded()
187231{
188232   // DED: Decrement DPl, skip next on carry
189   op_illegal();
233   m_dpl = (m_dpl - 1) & 0xf;
234   m_skip = (m_dpl == 0xf);
190235}
191236
192237
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195240void ucom4_cpu_device::op_rmb()
196241{
197242   // RMB B: Reset a single bit of RAM
198   op_illegal();
243   ram_w(ram_r() & ~(1 << (m_op & 0x03)));
199244}
200245
201246void ucom4_cpu_device::op_smb()
202247{
203248   // SMB B: Set a single bit of RAM
204   op_illegal();
249   ram_w(ram_r() | (1 << (m_op & 0x03)));
205250}
206251
207252void ucom4_cpu_device::op_reb()
208253{
209254   // REB B: Reset a single bit of output port E
255   m_icount--;
210256   op_illegal();
211257}
212258
213259void ucom4_cpu_device::op_seb()
214260{
215261   // SEB B: Set a single bit of output port E
262   m_icount--;
216263   op_illegal();
217264}
218265
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234281void ucom4_cpu_device::op_jmpcal()
235282{
236283   // JMP A: Jump to Address / CAL A: Call Address
237   op_illegal();
284   if (m_op & 0x08)
285      push_stack();
286   m_pc = (m_op & 0x07) << 8 | m_arg;
238287}
239288
240289void ucom4_cpu_device::op_jcp()
241290{
242291   // JCP A: Jump to Address in current page
243   op_illegal();
292   m_pc = (m_pc & ~0x3f) | (m_op & 0x3f);
244293}
245294
246295void ucom4_cpu_device::op_jpa()
247296{
248   // JPA: Jump to (ACC)
249   op_illegal();
297   // JPA: Jump to (ACC) in current page
298   m_pc = (m_pc & ~0x3f) | (m_acc << 2);
250299}
251300
252301void ucom4_cpu_device::op_czp()
253302{
254   // CZP A: Call (Address)
255   op_illegal();
303   // CZP A: Call Address (short)
304   push_stack();
305   m_pc = (m_op & 0x0f) << 2;
256306}
257307
258308void ucom4_cpu_device::op_rt()
259309{
260310   // RT: Return from subroutine
261   op_illegal();
311   m_icount--;
312   pop_stack();
262313}
263314
264315void ucom4_cpu_device::op_rts()
265316{
266317   // RTS: Return from subroutine, skip next
267   op_rt();
318   pop_stack();
268319   m_skip = true;
269320}
270321
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274325void ucom4_cpu_device::op_ci()
275326{
276327   // CI X: skip next on ACC equals X
277   op_illegal();
328   m_skip = (m_acc == (m_arg & 0x0f));
329   
330   if ((m_arg & 0xf0) != 0xc0)
331      logerror("%s CI opcode unexpected upper arg $%02X at $%03X\n", tag(), m_arg & 0xf0, m_pc);
278332}
279333
280334void ucom4_cpu_device::op_cm()
281335{
282336   // CM: skip next on ACC equals RAM
283   op_illegal();
337   m_skip = (m_acc == ram_r());
284338}
285339
286340void ucom4_cpu_device::op_cmb()
287341{
288342   // CMB B: skip next on bit(ACC) equals bit(RAM)
289   op_illegal();
343   UINT8 mask = 1 << (m_op & 0x03);
344   m_skip = ((m_acc & mask) == (ram_r() & mask));
290345}
291346
292347void ucom4_cpu_device::op_tab()
293348{
294349   // TAB B: skip next on bit(ACC)
295   op_illegal();
350   m_skip = ((m_acc & (1 << (m_op & 0x03))) != 0);
296351}
297352
298353void ucom4_cpu_device::op_cli()
299354{
300355   // CLI X: skip next on DPl equals X
301   op_illegal();
356   m_skip = (m_dpl == (m_arg & 0x0f));
357   
358   if ((m_arg & 0xf0) != 0xe0)
359      logerror("%s CLI opcode unexpected upper arg $%02X at $%03X\n", tag(), m_arg & 0xf0, m_pc);
302360}
303361
304362void ucom4_cpu_device::op_tmb()
305363{
306364   // TMB B: skip next on bit(RAM)
307   op_illegal();
365   m_skip = ((ram_r() & (1 << (m_op & 0x03))) != 0);
308366}
309367
310368void ucom4_cpu_device::op_tpa()
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333391
334392void ucom4_cpu_device::op_ia()
335393{
336   // IA: x
394   // IA: Input port A to ACC
337395   op_illegal();
338396}
339397
340398void ucom4_cpu_device::op_ip()
341399{
342   // IP: x
400   // IP: Input port (DPl) to ACC
343401   op_illegal();
344402}
345403
346404void ucom4_cpu_device::op_oe()
347405{
348   // OE: x
349   op_illegal();
406   // OE: Output ACC to port E
407   m_write_e(0, m_acc, 0xff);
350408}
351409
352410void ucom4_cpu_device::op_op()
353411{
354   // OP: x
412   // OP: Output ACC to port (DPl)
355413   op_illegal();
356414}
357415
358416void ucom4_cpu_device::op_ocd()
359417{
360   // OCD X: x
418   // OCD X: Output X to ports C and D
361419   op_illegal();
362420}
363421

https://github.com/mamedev/mame/commit/f80763b734f4e4f45adb245f61663e98c855752b

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