trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c
| r242465 | r242466 | |
| 452 | 452 | u = ((op & 0x007f) >>0); \ |
| 453 | 453 | op &= ~0x007f; \ |
| 454 | 454 | |
| 455 | #define COMMON16_GET_s9 \ |
| 456 | s = ((op & 0x01ff) >>0); \ |
| 457 | op &= ~0x01ff; \ |
| 458 | |
| 455 | 459 | // registers used in 16-bit opcodes hae a limited range |
| 456 | 460 | // and can only address registers r0-r3 and r12-r15 |
| 457 | 461 | |
| r242465 | r242466 | |
| 802 | 806 | else |
| 803 | 807 | { |
| 804 | 808 | if (ignore_dst == 1) { if (A) output += sprintf(output, "unused(%s)", regnames[A]); } |
| 805 | | else { if (A != LIMM_REG) output += sprintf(output, "invalid(%s)", regnames[A]); } // mul operations expect A to be set to LIMM (no output) |
| 809 | else |
| 810 | { |
| 811 | if (A != LIMM_REG) output += sprintf(output, "invalid(%s)", regnames[A]); |
| 812 | else output += sprintf(output, "<mulres>"); |
| 813 | } // mul operations expect A to be set to LIMM (no output) |
| 806 | 814 | } |
| 807 | 815 | } |
| 808 | 816 | else |
| r242465 | r242466 | |
| 816 | 824 | else |
| 817 | 825 | { |
| 818 | 826 | if (ignore_dst == 1) { if (A) output += sprintf(output, "unused(%s)", regnames[A]); } |
| 819 | | else { if (A != LIMM_REG) output += sprintf(output, "invalid(%s)", regnames[A]); } // mul operations expect A to be set to LIMM (no output) |
| 827 | else |
| 828 | { |
| 829 | if (A != LIMM_REG) output += sprintf(output, "invalid(%s)", regnames[A]); |
| 830 | else output += sprintf(output, "<mulres>"); |
| 831 | } // mul operations expect A to be set to LIMM (no output) |
| 820 | 832 | } |
| 821 | 833 | |
| 822 | 834 | } |
| r242465 | r242466 | |
| 836 | 848 | else |
| 837 | 849 | { |
| 838 | 850 | if (ignore_dst == 1) { if (A) output += sprintf(output, "unused(%s)", regnames[A]); } |
| 839 | | else { if (A != LIMM_REG) output += sprintf(output, "invalid(%s)", regnames[A]); } // mul operations expect A to be set to LIMM (no output) |
| 851 | else |
| 852 | { |
| 853 | if (A != LIMM_REG) output += sprintf(output, "invalid(%s)", regnames[A]); |
| 854 | else output += sprintf(output, "<mulres>"); |
| 855 | } // mul operations expect A to be set to LIMM (no output) |
| 840 | 856 | } |
| 841 | 857 | } |
| 842 | 858 | else if (p == 2) |
| r242465 | r242466 | |
| 1739 | 1755 | |
| 1740 | 1756 | |
| 1741 | 1757 | |
| 1742 | | int arcompact_handle0f_0x_helper_dasm(DASM_OPS_16, const char* optext) |
| 1758 | int arcompact_handle0f_0x_helper_dasm(DASM_OPS_16, const char* optext, int nodst) |
| 1743 | 1759 | { |
| 1744 | 1760 | int breg, creg; |
| 1745 | 1761 | |
| r242465 | r242466 | |
| 1749 | 1765 | REG_16BIT_RANGE(breg); |
| 1750 | 1766 | REG_16BIT_RANGE(creg); |
| 1751 | 1767 | |
| 1768 | if (nodst==0) print("%s %s <- %s", optext, regnames[breg], regnames[creg]); |
| 1769 | else if (nodst==1) print("%s <no dst>, %s, %s", optext, regnames[breg], regnames[creg]); |
| 1770 | else if (nodst==2) print("%s <mulres>, %s, %s", optext, regnames[breg], regnames[creg]); |
| 1752 | 1771 | |
| 1753 | | print("%s %s <- %s", optext, regnames[breg], regnames[creg]); |
| 1754 | 1772 | return 2; |
| 1755 | 1773 | } |
| 1756 | 1774 | |
| 1757 | | int arcompact_handle0f_02_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "SUB_S");} |
| 1758 | | int arcompact_handle0f_04_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "AND_S"); } |
| 1759 | | int arcompact_handle0f_05_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "OR_S"); } |
| 1760 | | int arcompact_handle0f_06_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "BIC_S"); } |
| 1761 | | int arcompact_handle0f_07_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "XOR_S"); } |
| 1762 | | int arcompact_handle0f_0b_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "TST_S"); } |
| 1763 | | int arcompact_handle0f_0d_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "SEXB_S"); } |
| 1764 | | int arcompact_handle0f_0e_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "SEXW_S"); } |
| 1765 | | int arcompact_handle0f_0f_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "EXTB_S"); } |
| 1766 | | int arcompact_handle0f_10_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "EXTW_S"); } |
| 1767 | | int arcompact_handle0f_11_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ABS_S"); } |
| 1768 | | int arcompact_handle0f_12_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "NOT_S"); } |
| 1769 | | int arcompact_handle0f_13_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "NEG_S"); } |
| 1770 | | int arcompact_handle0f_14_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ADD1_S"); } |
| 1771 | | int arcompact_handle0f_15_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ADD2_S"); } |
| 1772 | | int arcompact_handle0f_16_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ADD3_S"); } |
| 1773 | | int arcompact_handle0f_18_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ASL_S"); } |
| 1774 | | int arcompact_handle0f_19_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "LSR_S"); } |
| 1775 | | int arcompact_handle0f_1a_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ASR_S"); } |
| 1776 | | int arcompact_handle0f_1b_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ASL1_S"); } |
| 1777 | | int arcompact_handle0f_1c_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ASR1_S"); } |
| 1778 | | int arcompact_handle0f_1d_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "LSR1_S"); } |
| 1775 | int arcompact_handle0f_02_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "SUB_S",0); } |
| 1776 | int arcompact_handle0f_04_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "AND_S",0); } |
| 1777 | int arcompact_handle0f_05_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "OR_S",0); } |
| 1778 | int arcompact_handle0f_06_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "BIC_S",0); } |
| 1779 | int arcompact_handle0f_07_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "XOR_S",0); } |
| 1780 | int arcompact_handle0f_0b_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "TST_S",1); } |
| 1781 | int arcompact_handle0f_0c_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "MUL64_S",2); } // actual destination is special multiply registers |
| 1782 | int arcompact_handle0f_0d_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "SEXB_S",0); } |
| 1783 | int arcompact_handle0f_0e_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "SEXW_S",0); } |
| 1784 | int arcompact_handle0f_0f_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "EXTB_S",0); } |
| 1785 | int arcompact_handle0f_10_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "EXTW_S",0); } |
| 1786 | int arcompact_handle0f_11_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ABS_S",0); } |
| 1787 | int arcompact_handle0f_12_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "NOT_S",0); } |
| 1788 | int arcompact_handle0f_13_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "NEG_S",0); } |
| 1789 | int arcompact_handle0f_14_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ADD1_S",0); } |
| 1790 | int arcompact_handle0f_15_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ADD2_S",0); } |
| 1791 | int arcompact_handle0f_16_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ADD3_S",0); } |
| 1792 | int arcompact_handle0f_18_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ASL_S",0); } |
| 1793 | int arcompact_handle0f_19_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "LSR_S",0); } |
| 1794 | int arcompact_handle0f_1a_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ASR_S",0); } |
| 1795 | int arcompact_handle0f_1b_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ASL1_S",0); } |
| 1796 | int arcompact_handle0f_1c_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "ASR1_S",0); } |
| 1797 | int arcompact_handle0f_1d_dasm(DASM_OPS_16) { return arcompact_handle0f_0x_helper_dasm(DASM_PARAMS, "LSR1_S",0); } |
| 1779 | 1798 | |
| 1780 | | int arcompact_handle0f_0c_dasm(DASM_OPS_16) { print("MUL64_S mulres <- b * c (%08x)", op); return 2;} // special |
| 1781 | | int arcompact_handle0f_1e_dasm(DASM_OPS_16) { print("TRAP_S (%08x)", op); return 2;} // special |
| 1782 | 1799 | |
| 1800 | int arcompact_handle0f_1e_dasm(DASM_OPS_16) // special |
| 1801 | { // 0111 1uuu uuu1 1110 |
| 1802 | int u = (op & 0x07e0)>>5; |
| 1803 | print("TRAP_S %02x",u); |
| 1804 | return 2; |
| 1805 | } |
| 1806 | |
| 1783 | 1807 | int arcompact_handle0f_1f_dasm(DASM_OPS_16) // special |
| 1784 | 1808 | { |
| 1785 | | int bc = (op & 0x07e0)>>5; op &= ~0x07e0; |
| 1809 | int u = (op & 0x07e0)>>5; op &= ~0x07e0; |
| 1786 | 1810 | |
| 1787 | | if (bc == 0x003f) |
| 1811 | if (u == 0x003f) |
| 1788 | 1812 | { |
| 1789 | 1813 | print("BRK_S"); |
| 1790 | 1814 | } |
| 1791 | 1815 | else |
| 1792 | 1816 | { |
| 1793 | | print("<illegal BRK_S>"); |
| 1817 | print("<illegal BRK_S %02x>",u); |
| 1794 | 1818 | } |
| 1795 | 1819 | return 2; |
| 1796 | 1820 | } |
| r242465 | r242466 | |
| 2023 | 2047 | return 2; |
| 2024 | 2048 | } |
| 2025 | 2049 | |
| 2026 | | int arcompact_handle19_00_dasm(DASM_OPS_16) { print("LD_S r0 <- m[GP + s11].long (%04x)", op); return 2;} |
| 2027 | | int arcompact_handle19_01_dasm(DASM_OPS_16) { print("LDB_S r0 <- m[GP + s9].byte (%04x)", op); return 2;} |
| 2028 | | int arcompact_handle19_02_dasm(DASM_OPS_16) { print("LDW_S r0 <- m[GP + s10].word (%04x)", op); return 2;} |
| 2029 | | int arcompact_handle19_03_dasm(DASM_OPS_16) { print("ADD_S r0 <- GP + s11 (%04x)", op); return 2;} |
| 2030 | 2050 | |
| 2051 | int arcompact_handle19_0x_helper_dasm(DASM_OPS_16, const char* optext, int shift, int format) |
| 2052 | { |
| 2053 | int s; |
| 2054 | |
| 2055 | COMMON16_GET_s9; |
| 2056 | // todo, signed |
| 2057 | s <<= shift; |
| 2058 | |
| 2059 | |
| 2060 | output += sprintf( output, "%s %s, ", optext, regnames[0]); |
| 2061 | if (format == 0) |
| 2062 | { |
| 2063 | output += sprintf( output, "[GP, %03x]", s); |
| 2064 | } |
| 2065 | else |
| 2066 | { |
| 2067 | output += sprintf( output, "GP, %03x", s); |
| 2068 | } |
| 2069 | |
| 2070 | return 2; |
| 2071 | } |
| 2072 | |
| 2073 | int arcompact_handle19_00_dasm(DASM_OPS_16) { return arcompact_handle19_0x_helper_dasm(DASM_PARAMS, "LD_S", 2, 0); } |
| 2074 | int arcompact_handle19_01_dasm(DASM_OPS_16) { return arcompact_handle19_0x_helper_dasm(DASM_PARAMS, "LDB_S", 0, 0); } |
| 2075 | int arcompact_handle19_02_dasm(DASM_OPS_16) { return arcompact_handle19_0x_helper_dasm(DASM_PARAMS, "LDW_S", 1, 0); } |
| 2076 | int arcompact_handle19_03_dasm(DASM_OPS_16) { return arcompact_handle19_0x_helper_dasm(DASM_PARAMS, "ADD_S", 2, 1); } |
| 2077 | |
| 2031 | 2078 | int arcompact_handle1a_dasm(DASM_OPS_16) |
| 2032 | 2079 | { |
| 2033 | | print("PCL Instr (%04x)", op); |
| 2080 | int breg, u; |
| 2081 | COMMON16_GET_breg; |
| 2082 | COMMON16_GET_u8; |
| 2083 | REG_16BIT_RANGE(breg); |
| 2084 | |
| 2085 | print("MOV_S %s, [PCL, %03x]", regnames[breg], u*4); |
| 2086 | |
| 2034 | 2087 | return 2; |
| 2035 | 2088 | } |
| 2036 | 2089 | |