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r33910 Monday 15th December, 2014 at 16:45:44 UTC by Ramiro Polla
bellfruit: remove unused m_reel_changed field
[src/build]build.mak
[src/emu/cpu/arcompact]arcompactdasm_dispatch.c arcompactdasm_ops.c
[src/emu/cpu/i86]i186.c
[src/emu/cpu/sh2]sh2comn.c
[src/emu/machine]i82875p.c
[src/mame/drivers]bfm_sc1.c bfm_sc2.c bfm_sc4h.c bfmsys85.c
[src/mame/includes]bfm_sc45.h
[src/mess/drivers]ngen.c

trunk/src/build/build.mak
r242421r242422
6060   $(OBJ)/lib/util/corealloc.o \
6161   $(OBJ)/lib/util/corefile.o \
6262   $(OBJ)/lib/util/unicode.o \
63   $(OBJ)/lib/util/tagmap.o \
6463
6564$(MAKEDEP_TARGET): $(MAKEDEPOBJS) $(LIBOCORE) $(ZLIB)
6665   @echo Linking $@...
r242421r242422
7978   $(OBJ)/lib/util/corefile.o \
8079   $(OBJ)/lib/util/corestr.o \
8180   $(OBJ)/lib/util/unicode.o \
82   $(OBJ)/lib/util/tagmap.o \
8381
8482$(MAKEMAK_TARGET): $(MAKEMAKOBJS) $(LIBOCORE) $(ZLIB)
8583   @echo Linking $@...
r242421r242422
9896   $(OBJ)/lib/util/cstrpool.o \
9997   $(OBJ)/lib/util/corefile.o \
10098   $(OBJ)/lib/util/unicode.o \
101   $(OBJ)/lib/util/tagmap.o \
10299
103100$(MAKELIST_TARGET): $(MAKELISTOBJS) $(LIBOCORE) $(ZLIB)
104101   @echo Linking $@...
trunk/src/emu/cpu/arcompact/arcompactdasm_dispatch.c
r242421r242422
640640{
641641   int size = 2;
642642   UINT8 subinstr2 = (op & 0x0700) >> 8;
643   op &= ~0x0700;
643   op &= ~0x001f;
644644
645645   switch (subinstr2)
646646   {
trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c
r242421r242422
195195
196196
197197
198int arcompact_01_01_00_helper(char *output, offs_t pc, UINT32 op, const UINT8* oprom, const char* optext)
199{
200   int size = 4;
201
202   // Branch on Compare / Bit Test - Register-Register
203   // 00001 bbb sssssss 1 S BBB CCCCCC N 0 iiii
204   INT32 address = (op & 0x00fe0000) >> 17;
205   address |= ((op & 0x00008000) >> 15) << 7;
206   if (address & 0x80) address = -(address & 0x7f);
207
208   int c = (op & 0x00000fc0) >> 6;
209   int b = (op & 0x07000000) >> 24;
210   b |= ((op & 0x00007000) >> 12) << 3;
211   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
212
213   op &= ~0x07007fe0;
214
215   if ((b != LIMM_REG) && (c != LIMM_REG))
216   {
217      print("%s%s (r%d) (r%d) %08x (%08x)", optext, delaybit[n], b, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
218   }
219   else
220   {
221      UINT32 limm;
222      GET_LIMM_32;
223      size = 8;
224
225      if ((b == LIMM_REG) && (c != LIMM_REG))
226      {
227         print("%s%s (%08x) (r%d) %08x (%08x)", optext, delaybit[n], limm, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
228      }
229      else if ((c == LIMM_REG) && (b != LIMM_REG))
230      {
231         print("%s%s (r%d) (%08x) %08x (%08x)", optext, delaybit[n], b, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
232      }
233      else
234      {
235         // b and c are LIMM? invalid??
236         print("%s%s (%08x) (%08x) (illegal?) %08x (%08x)", optext, delaybit[n], limm, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
237
238      }
239   }
240
241   return size;
242}
243
198244#define GET_01_01_01_BRANCH_ADDR \
199245   INT32 address = (op & 0x00fe0000) >> 17; \
200246   address |= ((op & 0x00008000) >> 15) << 7; \
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205251#define GROUP_0e_GET_h \
206252   h =  ((op & 0x0007) << 3); \
207253    h |= ((op & 0x00e0) >> 5); \
208   op &= ~0x00e7; \
209254
210#define COMMON16_GET_breg \
211   breg =  ((op & 0x0700) >>8); \
212   op &= ~0x0700; \
213
214#define COMMON16_GET_creg \
215   creg =  ((op & 0x00e0) >>5); \
216   op &= ~0x00e0; \
217
218#define COMMON16_GET_u5 \
219   u =  ((op & 0x001f) >>0); \
220   op &= ~0x001f; \
221
222#define COMMON16_GET_u8 \
223   u =  ((op & 0x00ff) >>0); \
224   op &= ~0x00ff; \
225
226#define COMMON16_GET_u7 \
227   u =  ((op & 0x007f) >>0); \
228   op &= ~0x007f; \
229
230// registers used in 16-bit opcodes hae a limited range
231// and can only address registers r0-r3 and r12-r15
232
233#define REG_16BIT_RANGE(_reg_) \
234   if (_reg_>3) _reg_+= 8; \
235
236
237255// this is as messed up as the rest of the 16-bit alignment in LE mode...
238256
239257#define GET_LIMM \
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251269{
252270   int size = 4;
253271   // Branch Conditionally
254   // 0000 0sss ssss sss0 SSSS SSSS SSNQ QQQQ
272   // 00000 ssssssssss 0 SSSSSSSSSS N QQQQQ
255273   INT32 address = (op & 0x07fe0000) >> 17;
256274   address |= ((op & 0x0000ffc0) >> 6) << 10;
257275   if (address & 0x800000) address = -(address & 0x7fffff);
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266284{
267285   int size = 4;
268286   // Branch Unconditionally Far
269   // 0000 0sss ssss sss1 SSSS SSSS SSNR TTTT
287   // 00000 ssssssssss 1 SSSSSSSSSS N R TTTT
270288   INT32 address = (op & 0x07fe0000) >> 17;
271289   address |= ((op & 0x0000ffc0) >> 6) << 10;
272290   address |= ((op & 0x0000000f) >> 0) << 20;
r242421r242422
315333   return size;
316334}
317335
336int arcompact_handle01_01_00_00_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BREQ b - c"); }
337int arcompact_handle01_01_00_01_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRNE b - c"); }
338int arcompact_handle01_01_00_02_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRLT b - c"); }
339int arcompact_handle01_01_00_03_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRGE b - c"); }
340int arcompact_handle01_01_00_04_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRLO b - c"); }
341int arcompact_handle01_01_00_05_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRHS b - c"); }
342int arcompact_handle01_01_00_0e_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BBIT0 (b & 1<<c) == 0");  }
343int arcompact_handle01_01_00_0f_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BBIT1 (b & 1<<c) != 0");  }
318344
319345
320int arcompact_01_01_00_helper(char *output, offs_t pc, UINT32 op, const UINT8* oprom, const char* optext)
321{
322   int size = 4;
346int arcompact_handle01_01_01_00_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BREQ b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
347int arcompact_handle01_01_01_01_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRNE b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
348int arcompact_handle01_01_01_02_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRLT b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
349int arcompact_handle01_01_01_03_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRGE b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
350int arcompact_handle01_01_01_04_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRLO b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
351int arcompact_handle01_01_01_05_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRHS b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
323352
324   // Branch on Compare / Bit Test - Register-Register
325   // 00001 bbb sssssss 1 S BBB CCCCCC N 0 iiii
326   GET_01_01_01_BRANCH_ADDR
327353
354int arcompact_handle01_01_01_0e_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BBIT0 (b & 1<<u6) == 0 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
355int arcompact_handle01_01_01_0f_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BBIT1 (b & 1<<u6) != 0 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
328356
329   int c = (op & 0x00000fc0) >> 6;
330   int b = (op & 0x07000000) >> 24;
331   b |= ((op & 0x00007000) >> 12) << 3;
332   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
333357
334   op &= ~0x07007fe0;
335
336   if ((b != LIMM_REG) && (c != LIMM_REG))
337   {
338      print("%s%s %s %s %08x (%08x)", optext, delaybit[n], regnames[b], regnames[c], pc + (address * 2) + 4, op & ~0xf8fe800f);
339   }
340   else
341   {
342      UINT32 limm;
343      GET_LIMM_32;
344      size = 8;
345
346      if ((b == LIMM_REG) && (c != LIMM_REG))
347      {
348         print("%s%s (%08x) %s %08x (%08x)", optext, delaybit[n], limm, regnames[b], pc + (address * 2) + 4, op & ~0xf8fe800f);
349      }
350      else if ((c == LIMM_REG) && (b != LIMM_REG))
351      {
352         print("%s%s %s (%08x) %08x (%08x)", optext, delaybit[n], regnames[b], limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
353      }
354      else
355      {
356         // b and c are LIMM? invalid??
357         print("%s%s (%08x) (%08x) (illegal?) %08x (%08x)", optext, delaybit[n], limm, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
358
359      }
360   }
361
362   return size;
363}
364
365
366// register - register cases
367int arcompact_handle01_01_00_00_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BREQ"); }
368int arcompact_handle01_01_00_01_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRNE"); }
369int arcompact_handle01_01_00_02_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRLT"); }
370int arcompact_handle01_01_00_03_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRGE"); }
371int arcompact_handle01_01_00_04_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRLO"); }
372int arcompact_handle01_01_00_05_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRHS"); }
373int arcompact_handle01_01_00_0e_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BBIT0");}
374int arcompact_handle01_01_00_0f_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BBIT1");}
375
376int arcompact_01_01_01_helper(char *output, offs_t pc, UINT32 op, const UINT8* oprom, const char* optext)
377{
378   int size = 4;
379
380   // using 'b' as limm here makes no sense (comparing a long immediate against a short immediate) so I assume it isn't
381   // valid?
382
383   // Branch on Compare / Bit Test - Register-Immediate
384   // 0000 1bbb ssss sss1 SBBB uuuu uuN1 iiii
385   GET_01_01_01_BRANCH_ADDR
386
387   int u = (op & 0x00000fc0) >> 6;
388   int b = (op & 0x07000000) >> 24;
389   b |= ((op & 0x00007000) >> 12) << 3;
390   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
391
392   op &= ~0x07007fe0;
393
394   print("%s%s %s %02x %08x (%08x)", optext, delaybit[n], regnames[b], u, pc + (address * 2) + 4, op & ~0xf8fe800f);
395   
396   return size;
397}
398
399// register -immediate cases
400int arcompact_handle01_01_01_00_dasm(DASM_OPS_32)  { return arcompact_01_01_01_helper(output, pc, op, oprom, "BREQ"); }
401int arcompact_handle01_01_01_01_dasm(DASM_OPS_32)  { return arcompact_01_01_01_helper(output, pc, op, oprom, "BRNE"); }
402int arcompact_handle01_01_01_02_dasm(DASM_OPS_32)  { return arcompact_01_01_01_helper(output, pc, op, oprom, "BRLT"); }
403int arcompact_handle01_01_01_03_dasm(DASM_OPS_32)  { return arcompact_01_01_01_helper(output, pc, op, oprom, "BRGE"); }
404int arcompact_handle01_01_01_04_dasm(DASM_OPS_32)  { return arcompact_01_01_01_helper(output, pc, op, oprom, "BRLO"); }
405int arcompact_handle01_01_01_05_dasm(DASM_OPS_32)  { return arcompact_01_01_01_helper(output, pc, op, oprom, "BRHS"); }
406int arcompact_handle01_01_01_0e_dasm(DASM_OPS_32)  { return arcompact_01_01_01_helper(output, pc, op, oprom, "BBIT0"); }
407int arcompact_handle01_01_01_0f_dasm(DASM_OPS_32)  { return arcompact_01_01_01_helper(output, pc, op, oprom, "BBIT1"); }
408
409
410358int arcompact_handle02_dasm(DASM_OPS_32)
411359{
412360   // bitpos
r242421r242422
1041989
1042990
1043991
1044int arcompact_handle0e_0x_helper_dasm(char *output, offs_t pc, UINT16 op, const UINT8* oprom, const char* optext, int revop)
992
993
994
995int arcompact_handle0e_00_dasm(DASM_OPS_16)
1045996{
1046   int h,breg;
997   int h;
1047998   int size = 2;
1048999
10491000   GROUP_0e_GET_h;
1050   COMMON16_GET_breg;
1051   REG_16BIT_RANGE(breg);
1052   
1001
10531002   if (h == LIMM_REG)
10541003   {
10551004      UINT32 limm;
10561005      GET_LIMM;
10571006      size = 6;
1058      if (!revop) print("%s %s, (%08x) (%04x)", optext, regnames[breg], limm, op);
1059      else print("%s (%08x), %s (%04x)", optext, limm, regnames[breg], op);
1007      print("ADD_S b <- b + (%08x) (%04x)", limm, op);
10601008   }
10611009   else
10621010   {
1063      if (!revop) print("%s %s, %s (%04x)", optext, regnames[breg], regnames[h], op);
1064      else print("%s %s, %s (%04x)", optext, regnames[h], regnames[breg], op);
10651011
1012      print("ADD_S b <- b + (r%d) (%04x)", h, op);
10661013   }
10671014
10681015   return size;
1069
10701016}
10711017
1072int arcompact_handle0e_00_dasm(DASM_OPS_16)
1073{
1074   return arcompact_handle0e_0x_helper_dasm(output, pc, op, oprom, "ADD_S", 0);
1075}
1076
10771018int arcompact_handle0e_01_dasm(DASM_OPS_16)
10781019{
1079   return arcompact_handle0e_0x_helper_dasm(output, pc, op, oprom, "MOV_S", 0);
1020   int h;
1021   int size = 2;
1022   GROUP_0e_GET_h;
1023
1024   if (h == LIMM_REG)
1025   {
1026      UINT32 limm;
1027      GET_LIMM;
1028      size = 6;
1029      print("MOV_S b <- (%08x)  (%04x)", limm, op);
1030   }
1031   else
1032   {
1033      print("MOV_S b <- (r%d)  (%04x)", h, op);
1034   }
1035   return size;
10801036}
10811037
10821038int arcompact_handle0e_02_dasm(DASM_OPS_16)
10831039{
1084   return arcompact_handle0e_0x_helper_dasm(output, pc, op, oprom, "CMP_S", 0);
1040   int h;
1041   int size = 2;
1042   GROUP_0e_GET_h;
1043
1044   if (h == LIMM_REG)
1045   {
1046      UINT32 limm;
1047      GET_LIMM;
1048      size = 6;
1049      print("CMP_S b - (%08x) (%04x)", limm, op);
1050   }
1051   else
1052   {
1053      print("CMP_S b - (r%d) (%04x)", h, op);
1054   }
1055   return size;
10851056}
10861057
10871058int arcompact_handle0e_03_dasm(DASM_OPS_16)
10881059{
1089   return arcompact_handle0e_0x_helper_dasm(output, pc, op, oprom, "MOV_S", 1);
1060   int h;
1061   int size = 2;
1062   GROUP_0e_GET_h;
1063
1064   if (h == LIMM_REG)
1065   {
1066      UINT32 limm;
1067      GET_LIMM;
1068      size = 6;
1069      print("MOV_S (%08x) <- b (%04x)", limm, op);
1070   }
1071   else
1072   {
1073      print("MOV_S (r%d) <- b (%04x)", h, op);
1074   }
1075
1076   return size;
10901077}
10911078
10921079
r242421r242422
11471134int arcompact_handle0f_1f_dasm(DASM_OPS_16)  { print("BRK_S (%08x)", op); return 2;}
11481135
11491136
1150int arcompact_handle_ld_helper_dasm(char *output, offs_t pc, UINT16 op, const UINT8* oprom, const char* optext, int shift, int swap)
1137int arcompact_handle10_dasm(DASM_OPS_16)
11511138{
1152   int breg, creg, u;
1153
1154   COMMON16_GET_breg;
1155   COMMON16_GET_creg;
1156   COMMON16_GET_u5;
1157
1158   REG_16BIT_RANGE(breg);
1159   REG_16BIT_RANGE(creg);
1160
1161   u <<= shift;
1162
1163   if (!swap) print("%s %s, [%s, 0x%02x] (%04x)", optext, regnames[creg], regnames[breg], u, op);
1164   else  print("%s [%s, 0x%02x], %s (%04x)", optext, regnames[breg], u, regnames[creg], op);
1139   print("LD_S (%04x)",  op);
11651140   return 2;
1166
11671141}
11681142
1169
1170int arcompact_handle10_dasm(DASM_OPS_16)
1171{
1172   return arcompact_handle_ld_helper_dasm(output, pc, op, oprom, "LD_S", 2, 0);
1173}
1174
11751143int arcompact_handle11_dasm(DASM_OPS_16)
11761144{
1177   return arcompact_handle_ld_helper_dasm(output, pc, op, oprom, "LDB_S", 0, 0);
1145   print("LDB_S (%04x)", op);
1146   return 2;
11781147}
11791148
11801149int arcompact_handle12_dasm(DASM_OPS_16)
11811150{
1182   return arcompact_handle_ld_helper_dasm(output, pc, op, oprom, "LDW_S", 1, 0);
1151   print("LDW_S (%04x)", op);
1152   return 2;
11831153}
11841154
11851155int arcompact_handle13_dasm(DASM_OPS_16)
11861156{
1187   return arcompact_handle_ld_helper_dasm(output, pc, op, oprom, "LDW_S.X", 1, 0);
1157   print("LSW_S.X (%04x)", op);
1158   return 2;
11881159}
11891160
11901161int arcompact_handle14_dasm(DASM_OPS_16)
11911162{
1192   return arcompact_handle_ld_helper_dasm(output, pc, op, oprom, "ST_S", 2, 1);
1163   print("ST_S (%04x)", op);
1164   return 2;
11931165}
11941166
11951167int arcompact_handle15_dasm(DASM_OPS_16)
11961168{
1197   return arcompact_handle_ld_helper_dasm(output, pc, op, oprom, "STB_S", 0, 1);
1169   print("STB_S (%04x)", op);
1170   return 2;
11981171}
11991172
12001173int arcompact_handle16_dasm(DASM_OPS_16)
12011174{
1202   return arcompact_handle_ld_helper_dasm(output, pc, op, oprom, "STW_S", 1, 1);
1175   print("STW_S (%04x)",  op);
1176   return 2;
12031177}
12041178
12051179
r242421r242422
13151289// op bits remaining for 0x18_06_xx subgroups 0x0700
13161290int arcompact_handle18_06_01_dasm(DASM_OPS_16)
13171291{
1318   int breg = (op & 0x0700) >> 8;
1292   int b = (op & 0x0700) >> 8;
13191293   op &= ~0x0700; // all bits now used
1320   REG_16BIT_RANGE(breg)
13211294
1322   print("POP_S %s", regnames[breg]);
1295   print("POP_S [%02x]", b);
13231296
13241297   return 2;
13251298}
r242421r242422
13401313// op bits remaining for 0x18_07_xx subgroups 0x0700
13411314int arcompact_handle18_07_01_dasm(DASM_OPS_16)
13421315{
1343   int breg = (op & 0x0700) >> 8;
1316   int b = (op & 0x0700) >> 8;
13441317   op &= ~0x0700; // all bits now used
1345   REG_16BIT_RANGE(breg)
13461318
1347   print("PUSH_S %s", regnames[breg]);
1319   print("PUSH_S [%02x]", b);
13481320
13491321   return 2;
13501322}
r242421r242422
13761348
13771349int arcompact_handle1b_dasm(DASM_OPS_16)
13781350{
1379   int breg, u;
1380   COMMON16_GET_breg;
1381   COMMON16_GET_u8;
1382   REG_16BIT_RANGE(breg);
1383
1384   print("MOV_S %s, %02x", regnames[breg], u);
1351   print("MOV_S (%04x)", op);
13851352   return 2;
13861353}
13871354
1388int arcompact_handle1c_00_dasm(DASM_OPS_16)
1389{
1390   int breg, u;
1391   COMMON16_GET_breg;
1392   COMMON16_GET_u7;
1393   REG_16BIT_RANGE(breg);
1355int arcompact_handle1c_00_dasm(DASM_OPS_16)  { print("ADD_S b <- b + u7 (%04x)",  op); return 2;}
1356int arcompact_handle1c_01_dasm(DASM_OPS_16)  { print("CMP_S b - u7 (%04x)",  op); return 2;}
13941357
1395   print("ADD_S %s, %02x", regnames[breg], u);
1396   return 2;
1397}
13981358
1399int arcompact_handle1c_01_dasm(DASM_OPS_16)
1400{
1401   int breg, u;
1402   COMMON16_GET_breg;
1403   COMMON16_GET_u7;
1404   REG_16BIT_RANGE(breg);
1405
1406   print("CMP_S %s, %02x", regnames[breg], u);
1407   return 2;
1408}
1409
1410
14111359int arcompact_handle1d_00_dasm(DASM_OPS_16)  { print("BREQ_S (%04x)",  op); return 2;}
14121360int arcompact_handle1d_01_dasm(DASM_OPS_16)  { print("BRNE_S (%04x)",  op); return 2;}
14131361
trunk/src/emu/cpu/i86/i186.c
r242421r242422
863863         }
864864      }
865865   }
866   m_intr.pending = 0;
867   set_input_line(0, CLEAR_LINE);
868866   return;
869867
870868generate_int:
trunk/src/emu/cpu/sh2/sh2comn.c
r242421r242422
699699   case 0x00:
700700      break;
701701   case 0x01:
702//      return m_m[1] | 0; // bit31 is TDRE: Trasmit Data Register Empty. Forcing it to be '1' breaks Saturn ...
703      return m_m[1] | (0x84 << 24); // ... but this is actually needed to make EGWord on SS to boot?
702      return m_m[1] | 0; // bit31 is TDRE: Trasmit Data Register Empty. Forcing it to be '1' breaks Saturn ...
703//      return m_m[1] | (0x84 << 24); // ... but this is actually needed to make EGWord on SS to boot?
704704
705705   case 0x04: // TIER, FTCSR, FRC
706706      if ( mem_mask == 0x00ff0000 )
trunk/src/emu/machine/i82875p.c
r242421r242422
238238   return toud;
239239}
240240
241#include "debugger.h"
242
241243WRITE16_MEMBER(i82875p_host_device::toud_w)
242244{
243245   COMBINE_DATA(&toud);
244246   toud &= ~7;
245247   logerror("%s: toud = %08x\n", tag(), toud << 16);
246248   remap_cb();
249   debugger_break(machine());
247250}
248251
249252READ16_MEMBER( i82875p_host_device::mchcfg_r)
trunk/src/mame/drivers/bfm_sc1.c
r242421r242422
123123   int m_acia_status;
124124   int m_locked;
125125   int m_is_timer_enabled;
126   int m_reel_changed;
127126   int m_coin_inhibits;
128127   int m_mux1_outputlatch;
129128   int m_mux1_datalo;
r242421r242422
252251   }
253252   else
254253   {
255      if ( stepper_update(0, (data>>4)&0x0f) ) m_reel_changed |= 0x01;
256      if ( stepper_update(1, data&0x0f   ) ) m_reel_changed |= 0x02;
254      stepper_update(0, (data>>4)&0x0f);
255      stepper_update(1, data&0x0f   );
257256
258257      if ( stepper_optic_state(0) ) m_optic_pattern |=  0x01;
259258      else                          m_optic_pattern &= ~0x01;
r242421r242422
274273   }
275274   else
276275   {
277      if ( stepper_update(2, (data>>4)&0x0f) ) m_reel_changed |= 0x04;
278      if ( stepper_update(3, data&0x0f   ) ) m_reel_changed |= 0x08;
276      stepper_update(2, (data>>4)&0x0f);
277      stepper_update(3, data&0x0f   );
279278
280279      if ( stepper_optic_state(2) ) m_optic_pattern |=  0x04;
281280      else                          m_optic_pattern &= ~0x04;
r242421r242422
290289
291290WRITE8_MEMBER(bfm_sc1_state::reel56_w)
292291{
293   if ( stepper_update(4, (data>>4)&0x0f) ) m_reel_changed |= 0x10;
294   if ( stepper_update(5, data&0x0f   ) ) m_reel_changed |= 0x20;
292   stepper_update(4, (data>>4)&0x0f);
293   stepper_update(5, data&0x0f   );
295294
296295   if ( stepper_optic_state(4) ) m_optic_pattern |=  0x10;
297296   else                          m_optic_pattern &= ~0x10;
trunk/src/mame/drivers/bfm_sc2.c
r242421r242422
204204   int m_data_to_uart1;
205205   int m_data_to_uart2;
206206   int m_is_timer_enabled;
207   int m_reel_changed;
208207   int m_coin_inhibits;
209208   int m_irq_timer_stat;
210209   int m_expansion_latch;
r242421r242422
547546{
548547   m_reel12_latch = data;
549548
550   if ( stepper_update(0, data&0x0f   ) ) m_reel_changed |= 0x01;
551   if ( stepper_update(1, (data>>4))&0x0f ) m_reel_changed |= 0x02;
549   stepper_update(0, data&0x0f   );
550   stepper_update(1, (data>>4)&0x0f );
552551
553552   if ( stepper_optic_state(0) ) m_optic_pattern |=  0x01;
554553   else                          m_optic_pattern &= ~0x01;
r242421r242422
563562{
564563   m_reel34_latch = data;
565564
566   if ( stepper_update(2, data&0x0f ) ) m_reel_changed |= 0x04;
567   if ( stepper_update(3, (data>>4)&0x0f) ) m_reel_changed |= 0x08;
565   stepper_update(2, data&0x0f );
566   stepper_update(3, (data>>4)&0x0f);
568567
569568   if ( stepper_optic_state(2) ) m_optic_pattern |=  0x04;
570569   else                          m_optic_pattern &= ~0x04;
r242421r242422
581580{
582581   m_reel56_latch = data;
583582
584   if ( stepper_update(4, data&0x0f   ) ) m_reel_changed |= 0x10;
585   if ( stepper_update(5, (data>>4)&0x0f) ) m_reel_changed |= 0x20;
583   stepper_update(4, data&0x0f   );
584   stepper_update(5, (data>>4)&0x0f);
586585
587586   if ( stepper_optic_state(4) ) m_optic_pattern |=  0x10;
588587   else                          m_optic_pattern &= ~0x10;
r242421r242422
13991398   save_item(NAME(m_data_to_uart1));
14001399   save_item(NAME(m_data_to_uart2));
14011400   save_item(NAME(m_is_timer_enabled));
1402   save_item(NAME(m_reel_changed));
14031401   save_item(NAME(m_coin_inhibits));
14041402   save_item(NAME(m_irq_timer_stat));
14051403   save_item(NAME(m_expansion_latch));
trunk/src/mame/drivers/bfm_sc4h.c
r242421r242422
517517{
518518   m_reel12_latch = data;
519519
520   if ( stepper_update(0, data&0x0f   ) ) m_reel_changed |= 0x01;
521   if ( stepper_update(1, (data>>4))&0x0f ) m_reel_changed |= 0x02;
520   stepper_update(0, data&0x0f   );
521   stepper_update(1, (data>>4)&0x0f );
522522
523523   if ( stepper_optic_state(0) ) m_optic_pattern |=  0x01;
524524   else                          m_optic_pattern &= ~0x01;
r242421r242422
533533{
534534   m_reel3_latch = data;
535535
536   if ( stepper_update(2, data&0x0f ) ) m_reel_changed |= 0x04;
536   stepper_update(2, data&0x0f );
537537
538538   if ( stepper_optic_state(2) ) m_optic_pattern |=  0x04;
539539   else                          m_optic_pattern &= ~0x04;
r242421r242422
545545{
546546   m_reel4_latch = data;
547547
548   if ( stepper_update(3, data&0x0f ) ) m_reel_changed |= 0x08;
548   stepper_update(3, data&0x0f );
549549
550550   if ( stepper_optic_state(3) ) m_optic_pattern |=  0x08;
551551   else                          m_optic_pattern &= ~0x08;
r242421r242422
663663//  logerror("bfm_sc4_duart_output_w\n");
664664   m_reel56_latch = data;
665665
666   if ( stepper_update(4, data&0x0f   ) ) m_reel_changed |= 0x10;
667   if ( stepper_update(5, (data>>4)&0x0f) ) m_reel_changed |= 0x20;
666   stepper_update(4, data&0x0f   );
667   stepper_update(5, (data>>4)&0x0f);
668668
669669   if ( stepper_optic_state(4) ) m_optic_pattern |=  0x10;
670670   else                          m_optic_pattern &= ~0x10;
trunk/src/mame/drivers/bfmsys85.c
r242421r242422
8686   int m_optic_pattern;
8787   int m_locked;
8888   int m_is_timer_enabled;
89   int m_reel_changed;
9089   int m_coin_inhibits;
9190   int m_mux_output_strobe;
9291   int m_mux_input_strobe;
r242421r242422
205204
206205WRITE8_MEMBER(bfmsys85_state::reel12_w)
207206{
208   if ( stepper_update(0, (data>>4)&0x0f) ) m_reel_changed |= 0x01;
209   if ( stepper_update(1, data&0x0f   ) ) m_reel_changed |= 0x02;
207   stepper_update(0, (data>>4)&0x0f);
208   stepper_update(1, data&0x0f   );
210209
211210   if ( stepper_optic_state(0) ) m_optic_pattern |=  0x01;
212211   else                          m_optic_pattern &= ~0x01;
r242421r242422
220219
221220WRITE8_MEMBER(bfmsys85_state::reel34_w)
222221{
223   if ( stepper_update(2, (data>>4)&0x0f) ) m_reel_changed |= 0x04;
224   if ( stepper_update(3, data&0x0f   ) ) m_reel_changed |= 0x08;
222   stepper_update(2, (data>>4)&0x0f);
223   stepper_update(3, data&0x0f   );
225224
226225   if ( stepper_optic_state(2) ) m_optic_pattern |=  0x04;
227226   else                          m_optic_pattern &= ~0x04;
trunk/src/mame/includes/bfm_sc45.h
r242421r242422
125125
126126
127127   const stepper_interface **m_reel_setup;
128   int m_reel_changed;
129128   int m_reels;
130129   int m_reel12_latch;
131130   int m_reel3_latch;
trunk/src/mess/drivers/ngen.c
r242421r242422
120120   DECLARE_WRITE_LINE_MEMBER(fdc_irq_w);
121121   DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
122122   DECLARE_WRITE8_MEMBER(fdc_control_w);
123   DECLARE_READ8_MEMBER(irq_cb);
124123
125124protected:
126125   virtual void machine_reset();
r242421r242422
245244      if(mem_mask & 0x00ff)
246245         m_dma_offset[offset-0x80] = data & 0xff;
247246      break;
248   case 0x10c:
249      if(mem_mask & 0x00ff)
250         m_pic->write(space,0,data & 0xff);
251      break;
252   case 0x10d:
253      if(mem_mask & 0x00ff)
254         m_pic->write(space,1,data & 0xff);
255      break;
256247   case 0x110:
257248      if(mem_mask & 0x00ff)
258249         m_pit->write(space,0,data & 0x0ff);
r242421r242422
490481   }
491482}
492483
493READ8_MEMBER( ngen_state::irq_cb )
494{
495   return m_pic->acknowledge();
496}
497
498484void ngen_state::machine_reset()
499485{
500486   m_port00 = 0;
r242421r242422
552538   MCFG_CPU_IO_MAP(ngen_io)
553539   MCFG_80186_CHIP_SELECT_CB(WRITE16(ngen_state, cpu_peripheral_cb))
554540   MCFG_80186_TMROUT1_HANDLER(WRITELINE(ngen_state, cpu_timer_w))
555   MCFG_80186_IRQ_SLAVE_ACK(READ8(ngen_state, irq_cb))
556541
557   MCFG_PIC8259_ADD( "pic", DEVWRITELINE("maincpu",i80186_cpu_device,int0_w), VCC, NULL )
542   MCFG_PIC8259_ADD( "pic", INPUTLINE("maincpu", 0), VCC, NULL )
558543
559544   MCFG_DEVICE_ADD("pit", PIT8254, 0)
560545   MCFG_PIT8253_CLK0(78120/4)  // 19.53kHz, /4 of the CPU timer output?
r242421r242422
644629   MCFG_CPU_REPLACE("maincpu", I386, XTAL_50MHz / 2)
645630   MCFG_CPU_PROGRAM_MAP(ngen386_mem)
646631   MCFG_CPU_IO_MAP(ngen386_io)
647   MCFG_DEVICE_REMOVE("pic")
648   MCFG_PIC8259_ADD( "pic", INPUTLINE("maincpu", 0), VCC, NULL )
649632MACHINE_CONFIG_END
650633
651634static MACHINE_CONFIG_DERIVED( 386i, ngen386 )

https://github.com/mamedev/mame/commit/a4bdd8af85cb9c5ad13a5c9d6e7d1b61093e25d5

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