trunk/src/build/build.mak
| r242396 | r242397 | |
| 73 | 73 | |
| 74 | 74 | MAKEDEPOBJS = \ |
| 75 | 75 | $(BUILDOBJ)/makedep.o \ |
| 76 | $(OBJ)/lib/util/astring.o \ |
| 77 | $(OBJ)/lib/util/corealloc.o \ |
| 78 | $(OBJ)/lib/util/corefile.o \ |
| 79 | $(OBJ)/lib/util/unicode.o \ |
| 76 | 80 | |
| 77 | | $(MAKEDEP_TARGET): $(MAKEDEPOBJS) $(LIBUTIL) $(LIBOCORE) $(ZLIB) |
| 81 | $(MAKEDEP_TARGET): $(MAKEDEPOBJS) $(LIBOCORE) $(ZLIB) |
| 78 | 82 | @echo Linking $@... |
| 79 | 83 | $(LD) $(LDFLAGS) $^ $(LIBS) -o $@ |
| 80 | 84 | |
| r242396 | r242397 | |
| 86 | 90 | |
| 87 | 91 | MAKEMAKOBJS = \ |
| 88 | 92 | $(BUILDOBJ)/makemak.o \ |
| 93 | $(OBJ)/lib/util/astring.o \ |
| 94 | $(OBJ)/lib/util/corealloc.o \ |
| 95 | $(OBJ)/lib/util/corefile.o \ |
| 96 | $(OBJ)/lib/util/corestr.o \ |
| 97 | $(OBJ)/lib/util/unicode.o \ |
| 89 | 98 | |
| 90 | | # TODO: 7z and flac - really? |
| 91 | | $(MAKEMAK_TARGET): $(MAKEMAKOBJS) $(LIBUTIL) $(LIBOCORE) $(ZLIB) $(FLAC_LIB) $(7Z_LIB) |
| 99 | $(MAKEMAK_TARGET): $(MAKEMAKOBJS) $(LIBOCORE) $(ZLIB) |
| 92 | 100 | @echo Linking $@... |
| 93 | 101 | $(LD) $(LDFLAGS) $^ $(LIBS) -o $@ |
| 94 | 102 | |
| r242396 | r242397 | |
| 100 | 108 | |
| 101 | 109 | MAKELISTOBJS = \ |
| 102 | 110 | $(BUILDOBJ)/makelist.o \ |
| 111 | $(OBJ)/lib/util/astring.o \ |
| 112 | $(OBJ)/lib/util/corealloc.o \ |
| 113 | $(OBJ)/lib/util/cstrpool.o \ |
| 114 | $(OBJ)/lib/util/corefile.o \ |
| 115 | $(OBJ)/lib/util/unicode.o \ |
| 103 | 116 | |
| 104 | | # TODO: 7z and flac - really? |
| 105 | | $(MAKELIST_TARGET): $(MAKELISTOBJS) $(LIBUTIL) $(LIBOCORE) $(ZLIB) $(FLAC_LIB) $(7Z_LIB) |
| 117 | $(MAKELIST_TARGET): $(MAKELISTOBJS) $(LIBOCORE) $(ZLIB) |
| 106 | 118 | @echo Linking $@... |
| 107 | 119 | $(LD) $(LDFLAGS) $^ $(LIBS) -o $@ |
| 108 | 120 | |
| r242396 | r242397 | |
| 114 | 126 | |
| 115 | 127 | PNG2BDCOBJS = \ |
| 116 | 128 | $(BUILDOBJ)/png2bdc.o \ |
| 129 | $(OBJ)/lib/util/astring.o \ |
| 130 | $(OBJ)/lib/util/corefile.o \ |
| 131 | $(OBJ)/lib/util/corealloc.o \ |
| 132 | $(OBJ)/lib/util/bitmap.o \ |
| 133 | $(OBJ)/lib/util/png.o \ |
| 134 | $(OBJ)/lib/util/palette.o \ |
| 135 | $(OBJ)/lib/util/unicode.o \ |
| 117 | 136 | |
| 118 | | $(PNG2BDC_TARGET): $(PNG2BDCOBJS) $(LIBUTIL) $(LIBOCORE) $(ZLIB) |
| 137 | $(PNG2BDC_TARGET): $(PNG2BDCOBJS) $(LIBOCORE) $(ZLIB) |
| 119 | 138 | @echo Linking $@... |
| 120 | 139 | $(LD) $(LDFLAGS) $^ $(LIBS) -o $@ |
| 121 | 140 | |
trunk/src/emu/machine/i6300esb.c
| r242396 | r242397 | |
| 40 | 40 | AM_RANGE(0x88, 0x8b) AM_READWRITE8 (d31_err_sts_r, d31_err_sts_w, 0x00ff0000) |
| 41 | 41 | AM_RANGE(0x90, 0x93) AM_READWRITE16(pci_dma_cfg_r, pci_dma_cfg_w, 0x0000ffff) |
| 42 | 42 | AM_RANGE(0xa0, 0xa3) AM_READWRITE16(gen_pmcon_1_r, gen_pmcon_1_w, 0x0000ffff) |
| 43 | | AM_RANGE(0xa0, 0xa3) AM_READWRITE8 (gen_pmcon_2_r, gen_pmcon_2_w, 0x00ff0000) |
| 43 | AM_RANGE(0xa0, 0xa3) AM_READWRITE16(gen_pmcon_2_r, gen_pmcon_2_w, 0xffff0000) |
| 44 | 44 | AM_RANGE(0xa4, 0xa7) AM_READWRITE8 (gen_pmcon_3_r, gen_pmcon_3_w, 0x000000ff) |
| 45 | 45 | AM_RANGE(0xac, 0xaf) AM_READWRITE (rst_cnt2_r, rst_cnt2_w) |
| 46 | 46 | AM_RANGE(0xb0, 0xb3) AM_READWRITE8 (apm_cnt_r, apm_cnt_w, 0x00ff0000) |
| r242396 | r242397 | |
| 294 | 294 | logerror("%s: gen_pmcon_1 = %04x\n", tag(), gen_pmcon_1); |
| 295 | 295 | } |
| 296 | 296 | |
| 297 | | READ8_MEMBER (i6300esb_lpc_device::gen_pmcon_2_r) |
| 297 | READ16_MEMBER (i6300esb_lpc_device::gen_pmcon_2_r) |
| 298 | 298 | { |
| 299 | 299 | return gen_pmcon_2; |
| 300 | 300 | } |
| 301 | 301 | |
| 302 | | WRITE8_MEMBER (i6300esb_lpc_device::gen_pmcon_2_w) |
| 302 | WRITE16_MEMBER(i6300esb_lpc_device::gen_pmcon_2_w) |
| 303 | 303 | { |
| 304 | | gen_pmcon_2 = data; |
| 305 | | logerror("%s: gen_pmcon_2 = %02x\n", tag(), gen_pmcon_2); |
| 304 | COMBINE_DATA(&gen_pmcon_2); |
| 305 | logerror("%s: gen_pmcon_2 = %04x\n", tag(), gen_pmcon_2); |
| 306 | 306 | } |
| 307 | 307 | |
| 308 | 308 | READ8_MEMBER (i6300esb_lpc_device::gen_pmcon_3_r) |
trunk/src/emu/machine/i6300esb.h
| r242396 | r242397 | |
| 37 | 37 | DECLARE_ADDRESS_MAP(internal_io_map, 32); |
| 38 | 38 | |
| 39 | 39 | UINT32 pmbase, gpio_base, fwh_sel1, gen_cntl, etr1, rst_cnt2, gpi_rout; |
| 40 | | UINT16 bios_cntl, pci_dma_cfg, gen1_dec, lpc_en, gen2_dec, fwh_sel2, func_dis, gen_pmcon_1; |
| 40 | UINT16 bios_cntl, pci_dma_cfg, gen1_dec, lpc_en, gen2_dec, fwh_sel2, func_dis, gen_pmcon_1, gen_pmcon_2; |
| 41 | 41 | UINT16 mon_trp_rng[4], mon_trp_msk; |
| 42 | 42 | UINT8 pirq_rout[8]; |
| 43 | 43 | UINT8 acpi_cntl, tco_cntl, gpio_cntl, serirq_cntl, d31_err_cfg, d31_err_sts, gen_sta, back_cntl, rtc_conf; |
| 44 | 44 | UINT8 lpc_if_com_range, lpc_if_fdd_lpt_range, lpc_if_sound_range, fwh_dec_en1, fwh_dec_en2, siu_config_port; |
| 45 | | UINT8 gen_pmcon_2, gen_pmcon_3, apm_cnt, apm_sts, mon_fwd_en, nmi_sc; |
| 45 | UINT8 gen_pmcon_3, apm_cnt, apm_sts, mon_fwd_en, nmi_sc; |
| 46 | 46 | int siu_config_state; |
| 47 | 47 | |
| 48 | 48 | DECLARE_WRITE8_MEMBER (nop_w); |
| r242396 | r242397 | |
| 74 | 74 | DECLARE_WRITE16_MEMBER(pci_dma_cfg_w); |
| 75 | 75 | DECLARE_READ16_MEMBER (gen_pmcon_1_r); // a0 |
| 76 | 76 | DECLARE_WRITE16_MEMBER(gen_pmcon_1_w); |
| 77 | | DECLARE_READ8_MEMBER (gen_pmcon_2_r); // a2 |
| 78 | | DECLARE_WRITE8_MEMBER(gen_pmcon_2_w); |
| 77 | DECLARE_READ16_MEMBER (gen_pmcon_2_r); // a2 |
| 78 | DECLARE_WRITE16_MEMBER(gen_pmcon_2_w); |
| 79 | 79 | DECLARE_READ8_MEMBER (gen_pmcon_3_r); // a4 |
| 80 | 80 | DECLARE_WRITE8_MEMBER (gen_pmcon_3_w); |
| 81 | 81 | DECLARE_READ32_MEMBER (rst_cnt2_r); // ac |
trunk/src/emu/machine/i82875p.c
| r242396 | r242397 | |
| 1 | 1 | #include "i82875p.h" |
| 2 | 2 | |
| 3 | | const device_type I82875P_HOST = &device_creator<i82875p_host_device>; |
| 4 | | const device_type I82875P_AGP = &device_creator<i82875p_agp_device>; |
| 5 | | const device_type I82875P_OVERFLOW = &device_creator<i82875p_overflow_device>; |
| 3 | const device_type I82875P_HOST = &device_creator<i82875p_host_device>; |
| 4 | const device_type I82875P_AGP = &device_creator<i82875p_agp_device>; |
| 6 | 5 | |
| 7 | 6 | DEVICE_ADDRESS_MAP_START(agp_translation_map, 32, i82875p_host_device) |
| 8 | 7 | ADDRESS_MAP_END |
| r242396 | r242397 | |
| 238 | 237 | return toud; |
| 239 | 238 | } |
| 240 | 239 | |
| 241 | | #include "debugger.h" |
| 242 | | |
| 243 | 240 | WRITE16_MEMBER(i82875p_host_device::toud_w) |
| 244 | 241 | { |
| 245 | 242 | COMBINE_DATA(&toud); |
| 246 | 243 | toud &= ~7; |
| 247 | 244 | logerror("%s: toud = %08x\n", tag(), toud << 16); |
| 248 | 245 | remap_cb(); |
| 249 | | debugger_break(machine()); |
| 250 | 246 | } |
| 251 | 247 | |
| 252 | 248 | READ16_MEMBER( i82875p_host_device::mchcfg_r) |
| r242396 | r242397 | |
| 348 | 344 | io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map); |
| 349 | 345 | |
| 350 | 346 | UINT32 top = toud << 16; |
| 351 | | if(esmramc & 1) { |
| 352 | | switch((esmramc >> 1) & 3) { |
| 353 | | case 2: top += 512*1024; break; |
| 354 | | case 3: top += 1024*1024; break; |
| 355 | | } |
| 356 | | } |
| 357 | | |
| 358 | 347 | if(top > ram_size) |
| 359 | 348 | top = ram_size; |
| 360 | 349 | |
| r242396 | r242397 | |
| 427 | 416 | } |
| 428 | 417 | |
| 429 | 418 | |
| 419 | |
| 420 | |
| 430 | 421 | i82875p_agp_device::i82875p_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 431 | 422 | : agp_bridge_device(mconfig, I82875P_AGP, "i82875p AGP bridge", tag, owner, clock, "i82875p_agp", __FILE__) |
| 432 | 423 | { |
| r242396 | r242397 | |
| 441 | 432 | { |
| 442 | 433 | agp_bridge_device::device_reset(); |
| 443 | 434 | } |
| 444 | | |
| 445 | | DEVICE_ADDRESS_MAP_START(overflow_map, 32, i82875p_overflow_device) |
| 446 | | AM_RANGE(0x000, 0x007) AM_READWRITE8(dram_row_boundary_r, dram_row_boundary_w, 0xffffffff) |
| 447 | | AM_RANGE(0x010, 0x013) AM_READWRITE8(dram_row_attribute_r, dram_row_attribute_w, 0xffffffff) |
| 448 | | AM_RANGE(0x060, 0x064) AM_READWRITE (dram_timing_r, dram_timing_w) |
| 449 | | AM_RANGE(0x068, 0x06b) AM_READWRITE (dram_controller_mode_r, dram_controller_mode_w) |
| 450 | | ADDRESS_MAP_END |
| 451 | | |
| 452 | | |
| 453 | | i82875p_overflow_device::i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 454 | | : pci_device(mconfig, I82875P_OVERFLOW, "i82875p configuration overflow", tag, owner, clock, "i82875p_overflow", __FILE__) |
| 455 | | { |
| 456 | | } |
| 457 | | |
| 458 | | void i82875p_overflow_device::device_start() |
| 459 | | { |
| 460 | | pci_device::device_start(); |
| 461 | | |
| 462 | | add_map(4*1024, M_MEM, FUNC(i82875p_overflow_device::overflow_map)); |
| 463 | | } |
| 464 | | |
| 465 | | void i82875p_overflow_device::device_reset() |
| 466 | | { |
| 467 | | pci_device::device_reset(); |
| 468 | | memset(dram_row_boundary, 1, sizeof(dram_row_boundary)); |
| 469 | | memset(dram_row_attribute, 0, sizeof(dram_row_attribute)); |
| 470 | | dram_timing = 0; |
| 471 | | dram_controller_mode = 0x00010001; |
| 472 | | } |
| 473 | | |
| 474 | | READ8_MEMBER (i82875p_overflow_device::dram_row_boundary_r) |
| 475 | | { |
| 476 | | return dram_row_boundary[offset]; |
| 477 | | } |
| 478 | | |
| 479 | | WRITE8_MEMBER (i82875p_overflow_device::dram_row_boundary_w) |
| 480 | | { |
| 481 | | dram_row_boundary[offset] = data; |
| 482 | | logerror("%s: dram_row_boundary_w %d, %02x\n", tag(), offset, data); |
| 483 | | } |
| 484 | | |
| 485 | | READ8_MEMBER (i82875p_overflow_device::dram_row_attribute_r) |
| 486 | | { |
| 487 | | return dram_row_attribute[offset]; |
| 488 | | } |
| 489 | | |
| 490 | | WRITE8_MEMBER (i82875p_overflow_device::dram_row_attribute_w) |
| 491 | | { |
| 492 | | dram_row_attribute[offset] = data; |
| 493 | | logerror("%s: dram_row_attribute_w %d, %02x\n", tag(), offset, data); |
| 494 | | } |
| 495 | | |
| 496 | | READ32_MEMBER (i82875p_overflow_device::dram_timing_r) |
| 497 | | { |
| 498 | | return dram_timing; |
| 499 | | } |
| 500 | | |
| 501 | | WRITE32_MEMBER(i82875p_overflow_device::dram_timing_w) |
| 502 | | { |
| 503 | | COMBINE_DATA(&dram_timing); |
| 504 | | logerror("%s: dram_timing_w %08x\n", tag(), dram_timing); |
| 505 | | } |
| 506 | | |
| 507 | | READ32_MEMBER (i82875p_overflow_device::dram_controller_mode_r) |
| 508 | | { |
| 509 | | return dram_controller_mode; |
| 510 | | } |
| 511 | | |
| 512 | | WRITE32_MEMBER(i82875p_overflow_device::dram_controller_mode_w) |
| 513 | | { |
| 514 | | COMBINE_DATA(&dram_controller_mode); |
| 515 | | logerror("%s: dram_controller_mode_w %08x\n", tag(), dram_controller_mode); |
| 516 | | } |
trunk/src/emu/machine/i82875p.h
| r242396 | r242397 | |
| 5 | 5 | |
| 6 | 6 | #include "pci.h" |
| 7 | 7 | |
| 8 | | #define MCFG_I82875P_HOST_ADD(_tag, _subdevice_id, _cpu_tag, _ram_size) \ |
| 8 | #define MCFG_I82875P_HOST_ADD(_tag, _subdevice_id, _cpu_tag, _ram_size) \ |
| 9 | 9 | MCFG_PCI_HOST_ADD(_tag, I82875P_HOST, 0x80862578, 0x02, _subdevice_id) \ |
| 10 | | downcast<i82875p_host_device *>(device)->set_cpu_tag(_cpu_tag); \ |
| 10 | downcast<i82875p_host_device *>(device)->set_cpu_tag(_cpu_tag); \ |
| 11 | 11 | downcast<i82875p_host_device *>(device)->set_ram_size(_ram_size); |
| 12 | 12 | |
| 13 | 13 | #define MCFG_I82875P_AGP_ADD(_tag) \ |
| 14 | 14 | MCFG_AGP_BRIDGE_ADD(_tag, I82875P_AGP, 0x80862579, 0x02) |
| 15 | 15 | |
| 16 | | #define MCFG_I82875P_OVERFLOW_ADD(_tag, _subdevice_id) \ |
| 17 | | MCFG_PCI_DEVICE_ADD(_tag, I82875P_OVERFLOW, 0x8086257e, 0x02, 0x088000, _subdevice_id) |
| 18 | | |
| 19 | 16 | class i82875p_host_device : public pci_host_device { |
| 20 | 17 | public: |
| 21 | 18 | i82875p_host_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| r242396 | r242397 | |
| 103 | 100 | virtual void device_reset(); |
| 104 | 101 | }; |
| 105 | 102 | |
| 106 | | class i82875p_overflow_device : public pci_device { |
| 107 | | public: |
| 108 | | i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 109 | | |
| 110 | | |
| 111 | | DECLARE_READ8_MEMBER (dram_row_boundary_r); |
| 112 | | DECLARE_WRITE8_MEMBER (dram_row_boundary_w); |
| 113 | | DECLARE_READ8_MEMBER (dram_row_attribute_r); |
| 114 | | DECLARE_WRITE8_MEMBER (dram_row_attribute_w); |
| 115 | | DECLARE_READ32_MEMBER (dram_timing_r); |
| 116 | | DECLARE_WRITE32_MEMBER(dram_timing_w); |
| 117 | | DECLARE_READ32_MEMBER (dram_controller_mode_r); |
| 118 | | DECLARE_WRITE32_MEMBER(dram_controller_mode_w); |
| 119 | | |
| 120 | | protected: |
| 121 | | |
| 122 | | virtual void device_start(); |
| 123 | | virtual void device_reset(); |
| 124 | | |
| 125 | | private: |
| 126 | | DECLARE_ADDRESS_MAP(overflow_map, 32); |
| 127 | | |
| 128 | | UINT8 dram_row_boundary[8], dram_row_attribute[4]; |
| 129 | | UINT32 dram_timing, dram_controller_mode; |
| 130 | | }; |
| 131 | | |
| 132 | 103 | extern const device_type I82875P_HOST; |
| 133 | 104 | extern const device_type I82875P_AGP; |
| 134 | | extern const device_type I82875P_OVERFLOW; |
| 135 | 105 | |
| 136 | 106 | |
| 137 | 107 | #endif |
trunk/src/emu/machine/pci.c
| r242396 | r242397 | |
| 459 | 459 | for(int i=0; i != all_devices.count(); i++) |
| 460 | 460 | if(all_devices[i] != this) |
| 461 | 461 | all_devices[i]->reset_all_mappings(); |
| 462 | | |
| 463 | | prefetch_baseu = 0; |
| 464 | | prefetch_limitu = 0; |
| 465 | | memory_base = 0; |
| 466 | | memory_limit = 0; |
| 467 | | prefetch_base = 0; |
| 468 | | prefetch_limit = 0; |
| 469 | | iobaseu = 0; |
| 470 | | iolimitu = 0; |
| 471 | | iobase = 0; |
| 472 | | iolimit = 0; |
| 473 | 462 | } |
| 474 | 463 | |
| 475 | 464 | void pci_bridge_device::map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space, |
| r242396 | r242397 | |
| 606 | 595 | |
| 607 | 596 | READ8_MEMBER (pci_bridge_device::iobase_r) |
| 608 | 597 | { |
| 609 | | return iobase; |
| 598 | logerror("%s: iobase_r\n", tag()); |
| 599 | return 0xff; |
| 610 | 600 | } |
| 611 | 601 | |
| 612 | 602 | WRITE8_MEMBER (pci_bridge_device::iobase_w) |
| 613 | 603 | { |
| 614 | | iobase = data; |
| 615 | 604 | logerror("%s: iobase_w %02x\n", tag(), data); |
| 616 | 605 | } |
| 617 | 606 | |
| 618 | 607 | READ8_MEMBER (pci_bridge_device::iolimit_r) |
| 619 | 608 | { |
| 620 | | return iolimit; |
| 609 | logerror("%s: iolimit_r\n", tag()); |
| 610 | return 0xff; |
| 621 | 611 | } |
| 622 | 612 | |
| 623 | 613 | WRITE8_MEMBER (pci_bridge_device::iolimit_w) |
| 624 | 614 | { |
| 625 | | iolimit = data; |
| 626 | 615 | logerror("%s: iolimit_w %02x\n", tag(), data); |
| 627 | 616 | } |
| 628 | 617 | |
| r242396 | r242397 | |
| 639 | 628 | |
| 640 | 629 | READ16_MEMBER (pci_bridge_device::memory_base_r) |
| 641 | 630 | { |
| 642 | | return memory_base; |
| 631 | logerror("%s: memory_base_r\n", tag()); |
| 632 | return 0xffff; |
| 643 | 633 | } |
| 644 | 634 | |
| 645 | 635 | WRITE16_MEMBER(pci_bridge_device::memory_base_w) |
| 646 | 636 | { |
| 647 | | COMBINE_DATA(&memory_base); |
| 648 | | logerror("%s: memory_base_w %04x\n", tag(), memory_base); |
| 637 | logerror("%s: memory_base_w %04x\n", tag(), data); |
| 649 | 638 | } |
| 650 | 639 | |
| 651 | 640 | READ16_MEMBER (pci_bridge_device::memory_limit_r) |
| 652 | 641 | { |
| 653 | | return memory_limit; |
| 642 | logerror("%s: memory_limit_r\n", tag()); |
| 643 | return 0xffff; |
| 654 | 644 | } |
| 655 | 645 | |
| 656 | 646 | WRITE16_MEMBER(pci_bridge_device::memory_limit_w) |
| 657 | 647 | { |
| 658 | | COMBINE_DATA(&memory_limit); |
| 659 | | logerror("%s: memory_limit_w %04x\n", tag(), memory_limit); |
| 648 | logerror("%s: memory_limit_w %04x\n", tag(), data); |
| 660 | 649 | } |
| 661 | 650 | |
| 662 | 651 | READ16_MEMBER (pci_bridge_device::prefetch_base_r) |
| 663 | 652 | { |
| 664 | | return prefetch_base; |
| 653 | logerror("%s: prefetch_base_r\n", tag()); |
| 654 | return 0xffff; |
| 665 | 655 | } |
| 666 | 656 | |
| 667 | 657 | WRITE16_MEMBER(pci_bridge_device::prefetch_base_w) |
| 668 | 658 | { |
| 669 | | COMBINE_DATA(&prefetch_base); |
| 670 | | logerror("%s: prefetch_base_w %04x\n", tag(), prefetch_base); |
| 659 | logerror("%s: prefetch_base_w %04x\n", tag(), data); |
| 671 | 660 | } |
| 672 | 661 | |
| 673 | 662 | READ16_MEMBER (pci_bridge_device::prefetch_limit_r) |
| 674 | 663 | { |
| 675 | | return prefetch_limit; |
| 664 | logerror("%s: prefetch_limit_r\n", tag()); |
| 665 | return 0xffff; |
| 676 | 666 | } |
| 677 | 667 | |
| 678 | 668 | WRITE16_MEMBER(pci_bridge_device::prefetch_limit_w) |
| 679 | 669 | { |
| 680 | | COMBINE_DATA(&prefetch_limit); |
| 681 | | logerror("%s: prefetch_limit_w %04x\n", tag(), prefetch_limit); |
| 670 | logerror("%s: prefetch_limit_w %04x\n", tag(), data); |
| 682 | 671 | } |
| 683 | 672 | |
| 684 | 673 | READ32_MEMBER (pci_bridge_device::prefetch_baseu_r) |
| 685 | 674 | { |
| 686 | | return prefetch_baseu; |
| 675 | logerror("%s: prefetch_baseu_r\n", tag()); |
| 676 | return 0xffffffff; |
| 687 | 677 | } |
| 688 | 678 | |
| 689 | 679 | WRITE32_MEMBER(pci_bridge_device::prefetch_baseu_w) |
| 690 | 680 | { |
| 691 | | COMBINE_DATA(&prefetch_baseu); |
| 692 | | logerror("%s: prefetch_baseu_w %08x\n", tag(), prefetch_baseu); |
| 681 | logerror("%s: prefetch_baseu_w %08x\n", tag(), data); |
| 693 | 682 | } |
| 694 | 683 | |
| 695 | 684 | READ32_MEMBER (pci_bridge_device::prefetch_limitu_r) |
| 696 | 685 | { |
| 697 | | return prefetch_limitu; |
| 686 | logerror("%s: prefetch_limitu_r\n", tag()); |
| 687 | return 0xffffffff; |
| 698 | 688 | } |
| 699 | 689 | |
| 700 | 690 | WRITE32_MEMBER(pci_bridge_device::prefetch_limitu_w) |
| 701 | 691 | { |
| 702 | | COMBINE_DATA(&prefetch_limitu); |
| 703 | | logerror("%s: prefetch_limitu_w %08x\n", tag(), prefetch_limitu); |
| 692 | logerror("%s: prefetch_limitu_w %08x\n", tag(), data); |
| 704 | 693 | } |
| 705 | 694 | |
| 706 | 695 | READ16_MEMBER (pci_bridge_device::iobaseu_r) |
| 707 | 696 | { |
| 708 | | return iobaseu; |
| 697 | logerror("%s: iobaseu_r\n", tag()); |
| 698 | return 0xffff; |
| 709 | 699 | } |
| 710 | 700 | |
| 711 | 701 | WRITE16_MEMBER(pci_bridge_device::iobaseu_w) |
| 712 | 702 | { |
| 713 | | COMBINE_DATA(&iobaseu); |
| 714 | | logerror("%s: iobaseu_w %04x\n", tag(), iobaseu); |
| 703 | logerror("%s: iobaseu_w %04x\n", tag(), data); |
| 715 | 704 | } |
| 716 | 705 | |
| 717 | 706 | READ16_MEMBER (pci_bridge_device::iolimitu_r) |
| 718 | 707 | { |
| 719 | | return iolimitu; |
| 708 | logerror("%s: iolimitu_r\n", tag()); |
| 709 | return 0xffff; |
| 720 | 710 | } |
| 721 | 711 | |
| 722 | 712 | WRITE16_MEMBER(pci_bridge_device::iolimitu_w) |
| 723 | 713 | { |
| 724 | | COMBINE_DATA(&iolimitu); |
| 725 | | logerror("%s: iolimitu_w %04x\n", tag(), iolimitu); |
| 714 | logerror("%s: iolimitu_w %04x\n", tag(), data); |
| 726 | 715 | } |
| 727 | 716 | |
| 728 | 717 | READ8_MEMBER (pci_bridge_device::interrupt_line_r) |
| r242396 | r242397 | |
| 749 | 738 | |
| 750 | 739 | READ16_MEMBER (pci_bridge_device::bridge_control_r) |
| 751 | 740 | { |
| 741 | logerror("%s: bridge_control_r\n", tag()); |
| 752 | 742 | return bridge_control; |
| 753 | 743 | } |
| 754 | 744 | |