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r33884 Monday 15th December, 2014 at 09:59:46 UTC by Olivier Galibert
i82875p: Add overflow device, high smram [O. Galibert]
pci: Add more pci bridge registers [O. Galibert]
[src/emu/machine]i6300esb.c i6300esb.h i82875p.c i82875p.h pci.c pci.h
[src/mame/drivers]lindbergh.c

trunk/src/emu/machine/i6300esb.c
r242395r242396
4040   AM_RANGE(0x88, 0x8b) AM_READWRITE8 (d31_err_sts_r,          d31_err_sts_w,          0x00ff0000)
4141   AM_RANGE(0x90, 0x93) AM_READWRITE16(pci_dma_cfg_r,          pci_dma_cfg_w,          0x0000ffff)
4242   AM_RANGE(0xa0, 0xa3) AM_READWRITE16(gen_pmcon_1_r,          gen_pmcon_1_w,          0x0000ffff)
43   AM_RANGE(0xa0, 0xa3) AM_READWRITE16(gen_pmcon_2_r,          gen_pmcon_2_w,          0xffff0000)
43   AM_RANGE(0xa0, 0xa3) AM_READWRITE8 (gen_pmcon_2_r,          gen_pmcon_2_w,          0x00ff0000)
4444   AM_RANGE(0xa4, 0xa7) AM_READWRITE8 (gen_pmcon_3_r,          gen_pmcon_3_w,          0x000000ff)
4545   AM_RANGE(0xac, 0xaf) AM_READWRITE  (rst_cnt2_r,             rst_cnt2_w)
4646   AM_RANGE(0xb0, 0xb3) AM_READWRITE8 (apm_cnt_r,              apm_cnt_w,              0x00ff0000)
r242395r242396
294294   logerror("%s: gen_pmcon_1 = %04x\n", tag(), gen_pmcon_1);
295295}
296296
297READ16_MEMBER (i6300esb_lpc_device::gen_pmcon_2_r)
297READ8_MEMBER (i6300esb_lpc_device::gen_pmcon_2_r)
298298{
299299   return gen_pmcon_2;
300300}
301301
302WRITE16_MEMBER(i6300esb_lpc_device::gen_pmcon_2_w)
302WRITE8_MEMBER (i6300esb_lpc_device::gen_pmcon_2_w)
303303{
304   COMBINE_DATA(&gen_pmcon_2);
305   logerror("%s: gen_pmcon_2 = %04x\n", tag(), gen_pmcon_2);
304   gen_pmcon_2 = data;
305   logerror("%s: gen_pmcon_2 = %02x\n", tag(), gen_pmcon_2);
306306}
307307
308308READ8_MEMBER  (i6300esb_lpc_device::gen_pmcon_3_r)
trunk/src/emu/machine/i6300esb.h
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3737   DECLARE_ADDRESS_MAP(internal_io_map, 32);
3838
3939   UINT32 pmbase, gpio_base, fwh_sel1, gen_cntl, etr1, rst_cnt2, gpi_rout;
40   UINT16 bios_cntl, pci_dma_cfg, gen1_dec, lpc_en, gen2_dec, fwh_sel2, func_dis, gen_pmcon_1, gen_pmcon_2;
40   UINT16 bios_cntl, pci_dma_cfg, gen1_dec, lpc_en, gen2_dec, fwh_sel2, func_dis, gen_pmcon_1;
4141   UINT16 mon_trp_rng[4], mon_trp_msk;
4242   UINT8 pirq_rout[8];
4343   UINT8 acpi_cntl, tco_cntl, gpio_cntl, serirq_cntl, d31_err_cfg, d31_err_sts, gen_sta, back_cntl, rtc_conf;
4444   UINT8 lpc_if_com_range, lpc_if_fdd_lpt_range, lpc_if_sound_range, fwh_dec_en1, fwh_dec_en2, siu_config_port;
45   UINT8 gen_pmcon_3, apm_cnt, apm_sts, mon_fwd_en, nmi_sc;
45   UINT8 gen_pmcon_2, gen_pmcon_3, apm_cnt, apm_sts, mon_fwd_en, nmi_sc;
4646   int siu_config_state;
4747
4848   DECLARE_WRITE8_MEMBER (nop_w);
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7474   DECLARE_WRITE16_MEMBER(pci_dma_cfg_w);
7575   DECLARE_READ16_MEMBER (gen_pmcon_1_r);          // a0
7676   DECLARE_WRITE16_MEMBER(gen_pmcon_1_w);
77   DECLARE_READ16_MEMBER (gen_pmcon_2_r);          // a2
78   DECLARE_WRITE16_MEMBER(gen_pmcon_2_w);
77   DECLARE_READ8_MEMBER (gen_pmcon_2_r);           // a2
78   DECLARE_WRITE8_MEMBER(gen_pmcon_2_w);
7979   DECLARE_READ8_MEMBER  (gen_pmcon_3_r);          // a4
8080   DECLARE_WRITE8_MEMBER (gen_pmcon_3_w);
8181   DECLARE_READ32_MEMBER (rst_cnt2_r);             // ac
trunk/src/emu/machine/i82875p.c
r242395r242396
11#include "i82875p.h"
22
3const device_type I82875P_HOST = &device_creator<i82875p_host_device>;
4const device_type I82875P_AGP  = &device_creator<i82875p_agp_device>;
3const device_type I82875P_HOST     = &device_creator<i82875p_host_device>;
4const device_type I82875P_AGP      = &device_creator<i82875p_agp_device>;
5const device_type I82875P_OVERFLOW = &device_creator<i82875p_overflow_device>;
56
67DEVICE_ADDRESS_MAP_START(agp_translation_map, 32, i82875p_host_device)
78ADDRESS_MAP_END
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237238   return toud;
238239}
239240
241#include "debugger.h"
242
240243WRITE16_MEMBER(i82875p_host_device::toud_w)
241244{
242245   COMBINE_DATA(&toud);
243246   toud &= ~7;
244247   logerror("%s: toud = %08x\n", tag(), toud << 16);
245248   remap_cb();
249   debugger_break(machine());
246250}
247251
248252READ16_MEMBER( i82875p_host_device::mchcfg_r)
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344348   io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map);
345349
346350   UINT32 top = toud << 16;
351   if(esmramc & 1) {
352      switch((esmramc >> 1) & 3) {
353      case 2: top += 512*1024; break;
354      case 3: top += 1024*1024; break;
355      }
356   }
357
347358   if(top > ram_size)
348359      top = ram_size;
349360
r242395r242396
416427}
417428
418429
419
420
421430i82875p_agp_device::i82875p_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
422431   : agp_bridge_device(mconfig, I82875P_AGP, "i82875p AGP bridge", tag, owner, clock, "i82875p_agp", __FILE__)
423432{
r242395r242396
432441{
433442   agp_bridge_device::device_reset();
434443}
444
445DEVICE_ADDRESS_MAP_START(overflow_map, 32, i82875p_overflow_device)
446   AM_RANGE(0x000, 0x007) AM_READWRITE8(dram_row_boundary_r,    dram_row_boundary_w,  0xffffffff)
447   AM_RANGE(0x010, 0x013) AM_READWRITE8(dram_row_attribute_r,   dram_row_attribute_w, 0xffffffff)
448   AM_RANGE(0x060, 0x064) AM_READWRITE (dram_timing_r,          dram_timing_w)
449   AM_RANGE(0x068, 0x06b) AM_READWRITE (dram_controller_mode_r, dram_controller_mode_w)
450ADDRESS_MAP_END
451
452
453i82875p_overflow_device::i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
454   : pci_device(mconfig, I82875P_OVERFLOW, "i82875p configuration overflow", tag, owner, clock, "i82875p_overflow", __FILE__)
455{
456}
457
458void i82875p_overflow_device::device_start()
459{
460   pci_device::device_start();
461
462   add_map(4*1024, M_MEM, FUNC(i82875p_overflow_device::overflow_map));
463}
464
465void i82875p_overflow_device::device_reset()
466{
467   pci_device::device_reset();
468   memset(dram_row_boundary, 1, sizeof(dram_row_boundary));
469   memset(dram_row_attribute, 0, sizeof(dram_row_attribute));
470   dram_timing = 0;
471   dram_controller_mode = 0x00010001;
472}
473
474READ8_MEMBER  (i82875p_overflow_device::dram_row_boundary_r)
475{
476   return dram_row_boundary[offset];
477}
478
479WRITE8_MEMBER (i82875p_overflow_device::dram_row_boundary_w)
480{
481   dram_row_boundary[offset] = data;
482   logerror("%s: dram_row_boundary_w %d, %02x\n", tag(), offset, data);
483}
484
485READ8_MEMBER  (i82875p_overflow_device::dram_row_attribute_r)
486{
487   return dram_row_attribute[offset];
488}
489
490WRITE8_MEMBER (i82875p_overflow_device::dram_row_attribute_w)
491{
492   dram_row_attribute[offset] = data;
493   logerror("%s: dram_row_attribute_w %d, %02x\n", tag(), offset, data);
494}
495
496READ32_MEMBER (i82875p_overflow_device::dram_timing_r)
497{
498   return dram_timing;
499}
500
501WRITE32_MEMBER(i82875p_overflow_device::dram_timing_w)
502{
503   COMBINE_DATA(&dram_timing);
504   logerror("%s: dram_timing_w %08x\n", tag(), dram_timing);
505}
506
507READ32_MEMBER (i82875p_overflow_device::dram_controller_mode_r)
508{
509   return dram_controller_mode;
510}
511
512WRITE32_MEMBER(i82875p_overflow_device::dram_controller_mode_w)
513{
514   COMBINE_DATA(&dram_controller_mode);
515   logerror("%s: dram_controller_mode_w %08x\n", tag(), dram_controller_mode);
516}
trunk/src/emu/machine/i82875p.h
r242395r242396
55
66#include "pci.h"
77
8#define MCFG_I82875P_HOST_ADD(_tag, _subdevice_id, _cpu_tag, _ram_size)         \
8#define MCFG_I82875P_HOST_ADD(_tag, _subdevice_id, _cpu_tag, _ram_size)    \
99   MCFG_PCI_HOST_ADD(_tag, I82875P_HOST, 0x80862578, 0x02, _subdevice_id) \
10   downcast<i82875p_host_device *>(device)->set_cpu_tag(_cpu_tag); \
10   downcast<i82875p_host_device *>(device)->set_cpu_tag(_cpu_tag);        \
1111   downcast<i82875p_host_device *>(device)->set_ram_size(_ram_size);
1212
1313#define MCFG_I82875P_AGP_ADD(_tag) \
1414   MCFG_AGP_BRIDGE_ADD(_tag, I82875P_AGP, 0x80862579, 0x02)
1515
16#define MCFG_I82875P_OVERFLOW_ADD(_tag, _subdevice_id)    \
17   MCFG_PCI_DEVICE_ADD(_tag, I82875P_OVERFLOW, 0x8086257e, 0x02, 0x088000, _subdevice_id)
18
1619class i82875p_host_device : public pci_host_device {
1720public:
1821   i82875p_host_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
r242395r242396
100103   virtual void device_reset();
101104};
102105
106class i82875p_overflow_device : public pci_device {
107public:
108   i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
109
110   
111   DECLARE_READ8_MEMBER  (dram_row_boundary_r);
112   DECLARE_WRITE8_MEMBER (dram_row_boundary_w);
113   DECLARE_READ8_MEMBER  (dram_row_attribute_r);
114   DECLARE_WRITE8_MEMBER (dram_row_attribute_w);
115   DECLARE_READ32_MEMBER (dram_timing_r);
116   DECLARE_WRITE32_MEMBER(dram_timing_w);
117   DECLARE_READ32_MEMBER (dram_controller_mode_r);
118   DECLARE_WRITE32_MEMBER(dram_controller_mode_w);
119
120protected:
121
122   virtual void device_start();
123   virtual void device_reset();
124
125private:
126   DECLARE_ADDRESS_MAP(overflow_map, 32);
127
128   UINT8 dram_row_boundary[8], dram_row_attribute[4];
129   UINT32 dram_timing, dram_controller_mode;
130};
131
103132extern const device_type I82875P_HOST;
104133extern const device_type I82875P_AGP;
134extern const device_type I82875P_OVERFLOW;
105135
106136
107137#endif
trunk/src/emu/machine/pci.c
r242395r242396
459459   for(int i=0; i != all_devices.count(); i++)
460460      if(all_devices[i] != this)
461461         all_devices[i]->reset_all_mappings();
462
463   prefetch_baseu = 0;
464   prefetch_limitu = 0;
465   memory_base = 0;
466   memory_limit = 0;
467   prefetch_base = 0;
468   prefetch_limit = 0;
469   iobaseu = 0;
470   iolimitu = 0;
471   iobase = 0;
472   iolimit = 0;
462473}
463474
464475void pci_bridge_device::map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
r242395r242396
595606
596607READ8_MEMBER  (pci_bridge_device::iobase_r)
597608{
598   logerror("%s: iobase_r\n", tag());
599   return 0xff;
609   return iobase;
600610}
601611
602612WRITE8_MEMBER (pci_bridge_device::iobase_w)
603613{
614   iobase = data;
604615   logerror("%s: iobase_w %02x\n", tag(), data);
605616}
606617
607618READ8_MEMBER  (pci_bridge_device::iolimit_r)
608619{
609   logerror("%s: iolimit_r\n", tag());
610   return 0xff;
620   return iolimit;
611621}
612622
613623WRITE8_MEMBER (pci_bridge_device::iolimit_w)
614624{
625   iolimit = data;
615626   logerror("%s: iolimit_w %02x\n", tag(), data);
616627}
617628
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628639
629640READ16_MEMBER (pci_bridge_device::memory_base_r)
630641{
631   logerror("%s: memory_base_r\n", tag());
632   return 0xffff;
642   return memory_base;
633643}
634644
635645WRITE16_MEMBER(pci_bridge_device::memory_base_w)
636646{
637   logerror("%s: memory_base_w %04x\n", tag(), data);
647   COMBINE_DATA(&memory_base);
648   logerror("%s: memory_base_w %04x\n", tag(), memory_base);
638649}
639650
640651READ16_MEMBER (pci_bridge_device::memory_limit_r)
641652{
642   logerror("%s: memory_limit_r\n", tag());
643   return 0xffff;
653   return memory_limit;
644654}
645655
646656WRITE16_MEMBER(pci_bridge_device::memory_limit_w)
647657{
648   logerror("%s: memory_limit_w %04x\n", tag(), data);
658   COMBINE_DATA(&memory_limit);
659   logerror("%s: memory_limit_w %04x\n", tag(), memory_limit);
649660}
650661
651662READ16_MEMBER (pci_bridge_device::prefetch_base_r)
652663{
653   logerror("%s: prefetch_base_r\n", tag());
654   return 0xffff;
664   return prefetch_base;
655665}
656666
657667WRITE16_MEMBER(pci_bridge_device::prefetch_base_w)
658668{
659   logerror("%s: prefetch_base_w %04x\n", tag(), data);
669   COMBINE_DATA(&prefetch_base);
670   logerror("%s: prefetch_base_w %04x\n", tag(), prefetch_base);
660671}
661672
662673READ16_MEMBER (pci_bridge_device::prefetch_limit_r)
663674{
664   logerror("%s: prefetch_limit_r\n", tag());
665   return 0xffff;
675   return prefetch_limit;
666676}
667677
668678WRITE16_MEMBER(pci_bridge_device::prefetch_limit_w)
669679{
670   logerror("%s: prefetch_limit_w %04x\n", tag(), data);
680   COMBINE_DATA(&prefetch_limit);
681   logerror("%s: prefetch_limit_w %04x\n", tag(), prefetch_limit);
671682}
672683
673684READ32_MEMBER (pci_bridge_device::prefetch_baseu_r)
674685{
675   logerror("%s: prefetch_baseu_r\n", tag());
676   return 0xffffffff;
686   return prefetch_baseu;
677687}
678688
679689WRITE32_MEMBER(pci_bridge_device::prefetch_baseu_w)
680690{
681   logerror("%s: prefetch_baseu_w %08x\n", tag(), data);
691   COMBINE_DATA(&prefetch_baseu);
692   logerror("%s: prefetch_baseu_w %08x\n", tag(), prefetch_baseu);
682693}
683694
684695READ32_MEMBER (pci_bridge_device::prefetch_limitu_r)
685696{
686   logerror("%s: prefetch_limitu_r\n", tag());
687   return 0xffffffff;
697   return prefetch_limitu;
688698}
689699
690700WRITE32_MEMBER(pci_bridge_device::prefetch_limitu_w)
691701{
692   logerror("%s: prefetch_limitu_w %08x\n", tag(), data);
702   COMBINE_DATA(&prefetch_limitu);
703   logerror("%s: prefetch_limitu_w %08x\n", tag(), prefetch_limitu);
693704}
694705
695706READ16_MEMBER (pci_bridge_device::iobaseu_r)
696707{
697   logerror("%s: iobaseu_r\n", tag());
698   return 0xffff;
708   return iobaseu;
699709}
700710
701711WRITE16_MEMBER(pci_bridge_device::iobaseu_w)
702712{
703   logerror("%s: iobaseu_w %04x\n", tag(), data);
713   COMBINE_DATA(&iobaseu);
714   logerror("%s: iobaseu_w %04x\n", tag(), iobaseu);
704715}
705716
706717READ16_MEMBER (pci_bridge_device::iolimitu_r)
707718{
708   logerror("%s: iolimitu_r\n", tag());
709   return 0xffff;
719   return iolimitu;
710720}
711721
712722WRITE16_MEMBER(pci_bridge_device::iolimitu_w)
713723{
714   logerror("%s: iolimitu_w %04x\n", tag(), data);
724   COMBINE_DATA(&iolimitu);
725   logerror("%s: iolimitu_w %04x\n", tag(), iolimitu);
715726}
716727
717728READ8_MEMBER  (pci_bridge_device::interrupt_line_r)
r242395r242396
738749
739750READ16_MEMBER (pci_bridge_device::bridge_control_r)
740751{
741   logerror("%s: bridge_control_r\n", tag());
742752   return bridge_control;
743753}
744754
trunk/src/emu/machine/pci.h
r242395r242396
193193   dynamic_array<pci_device *> all_devices;
194194   dynamic_array<pci_bridge_device *> all_bridges;
195195
196   UINT8 primary_bus, secondary_bus, subordinate_bus;
197   UINT16 bridge_control;
196   UINT32 prefetch_baseu, prefetch_limitu;
197   UINT16 bridge_control, memory_base, memory_limit, prefetch_base, prefetch_limit, iobaseu, iolimitu;
198   UINT8 primary_bus, secondary_bus, subordinate_bus, iobase, iolimit;
198199
199200   virtual void device_start();
200201   virtual void device_reset();
trunk/src/mame/drivers/lindbergh.c
r242395r242396
353353   MCFG_I82875P_HOST_ADD(            ":pci:00.0",                        0x103382c0, ":maincpu", 512*1024*1024)
354354   MCFG_I82875P_AGP_ADD(             ":pci:01.0")
355355   MCFG_GEFORCE_7600GS_ADD(          ":pci:01.0:00.0",                   0x10de02e1)
356   MCFG_I82875P_OVERFLOW_ADD(        ":pci:06.0",                        0x103382c0)
356357   MCFG_PCI_BRIDGE_ADD(              ":pci:1c.0",      0x808625ae, 0x02)
357358   MCFG_I82541PI_ADD(                ":pci:1c.0:00.0",                   0x103382c0)
358359   MCFG_USB_UHCI_ADD(                ":pci:1d.0",      0x808625a9, 0x02, 0x103382c0)

https://github.com/mamedev/mame/commit/cde3ed788508e26d1b07d0c11e52e531814f1a78

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