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r33827 Thursday 11th December, 2014 at 14:25:30 UTC by Robbbert
(MESS) excalibur : added banking (nw)
- still checking on the need for some rom banking.
- PCGEN command now works.
[src/mess/drivers]excali64.c

trunk/src/mess/drivers/excali64.c
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33/***************************************************************************
44
55Excalibur 64 kit computer, designed and sold in Australia by BGR Computers.
6The official schematics have a LOT of errors and omissions.
67
78Skeleton driver created on 2014-12-09.
89
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1516- Some keys can be connected to more than one position in the matrix. Need to
1617  determine the correct positions.
1718- The position of the "Line Insert" key is unknown.
18- PCGEN command not working.
1919- Colours are approximate.
2020- Disk controller
21- Banking
21- ROM banking
2222- The schematic shows the audio counter connected to 2MHz, but this produces
2323  sounds that are too high. Connected to 1MHz for now.
2424- Serial
2525- Parallel / Centronics
2626- Need software
27- Pasting can drop a character or two at the start of a line.
27- Pasting can sometimes drop a character.
2828
2929****************************************************************************/
3030
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6161   DECLARE_READ8_MEMBER(port00_r);
6262   DECLARE_READ8_MEMBER(port50_r);
6363   DECLARE_WRITE8_MEMBER(port70_w);
64   DECLARE_WRITE8_MEMBER(video_w);
6564   MC6845_UPDATE_ROW(update_row);
6665   DECLARE_WRITE_LINE_MEMBER(crtc_de);
6766   DECLARE_WRITE_LINE_MEMBER(crtc_vs);
68
67   DECLARE_MACHINE_RESET(excali64);
6968   required_device<palette_device> m_palette;
7069   
7170private:
7271   const UINT8 *m_p_chargen;
7372   UINT8 *m_p_videoram;
73   UINT8 *m_p_hiresram;
7474   UINT8 m_sys_status;
7575   UINT8 m_kbdrow;
7676   bool m_crtc_vs;
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8282};
8383
8484static ADDRESS_MAP_START(excali64_mem, AS_PROGRAM, 8, excali64_state)
85   AM_RANGE(0x0000, 0x1FFF) AM_ROM
86   AM_RANGE(0x2000, 0x3FFF) AM_ROM AM_WRITE(video_w)
87   AM_RANGE(0x4000, 0xFFFF) AM_RAM
85   AM_RANGE(0x0000, 0x1FFF) AM_READ_BANK("bankr1") AM_WRITE_BANK("bankw1")
86   AM_RANGE(0x2000, 0x2FFF) AM_READ_BANK("bankr2") AM_WRITE_BANK("bankw2")
87   AM_RANGE(0x3000, 0x3FFF) AM_READ_BANK("bankr3") AM_WRITE_BANK("bankw3")
88   AM_RANGE(0x4000, 0x4FFF) AM_READ_BANK("bankr4") AM_WRITE_BANK("bankw4")
89   AM_RANGE(0x5000, 0xFFFF) AM_RAM AM_REGION("rambank", 0x5000)
8890ADDRESS_MAP_END
8991
9092static ADDRESS_MAP_START(excali64_io, AS_IO, 8, excali64_state)
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101103ADDRESS_MAP_END
102104
103105
104/* Input ports */
106// Keyboard matrix is not included in schematics, so some guesswork
105107static INPUT_PORTS_START( excali64 )
106108   PORT_START("KEY.0")    /* line 0 */
107109   PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') PORT_CHAR(0x12)
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218220d0 : /rom ; screen
219221d1 : ram on
220222d2 : /low ; high res
221d3 : dispen
223d3 : 2nd colour set (previously, dispen, which is a mistake in hardware and schematic)
222224d4 : vsync
225d5 : rombank
223226*/
224227READ8_MEMBER( excali64_state::port50_r )
225228{
226229   UINT8 data = m_sys_status & 0x2f;
227230   data |= (UINT8)m_crtc_vs << 4;
228   //data |= (UINT8)m_crtc_de << 3; this is a hardware mistake, recommended to disconnect
229231   return data;
230232}
231233
232234/*
233d0,1,2 : same as port50
234d3 : 2nd colour set (schematic wrongly says d7)
235d0,1,2,3,5 : same as port50
236(schematic wrongly says d7 used for 2nd colour set)
235237*/
236238WRITE8_MEMBER( excali64_state::port70_w )
237239{
238240   m_sys_status = data;
239241   m_crtc->set_unscaled_clock(BIT(data, 2) ? 2e6 : 1e6);
242   if BIT(data, 1)
243   {
244   // select 64k ram
245      membank("bankr1")->set_entry(0);
246      membank("bankr2")->set_entry(0);
247      membank("bankr3")->set_entry(0);
248      membank("bankr4")->set_entry(0);
249      membank("bankw1")->set_entry(0);
250      membank("bankw2")->set_entry(0);
251      membank("bankw3")->set_entry(0);
252      membank("bankw4")->set_entry(0);
253   }
254   else
255   if BIT(data, 0)
256   {
257   // select videoram and hiresram for writing, and ROM for reading
258      membank("bankr1")->set_entry(1);
259      membank("bankr2")->set_entry(1);
260      membank("bankr3")->set_entry(1);
261      membank("bankr4")->set_entry(0);
262      membank("bankw1")->set_entry(0);
263      membank("bankw2")->set_entry(2);
264      membank("bankw3")->set_entry(2);
265      membank("bankw4")->set_entry(2);
266   }
267   else
268   {
269   // as above, except 4000-4FFF is main ram
270      membank("bankr1")->set_entry(1);
271      membank("bankr2")->set_entry(1);
272      membank("bankr3")->set_entry(1);
273      membank("bankr4")->set_entry(0);
274      membank("bankw1")->set_entry(0);
275      membank("bankw2")->set_entry(2);
276      membank("bankw3")->set_entry(2);
277      membank("bankw4")->set_entry(0);
278   }
240279}
241280
242WRITE8_MEMBER( excali64_state::video_w )
281MACHINE_RESET_MEMBER( excali64_state, excali64 )
243282{
244   m_p_videoram[offset] = data;
283   membank("bankr1")->set_entry(1); // read from ROM
284   membank("bankr2")->set_entry(1); // read from ROM
285   membank("bankr3")->set_entry(1); // read from ROM
286   membank("bankr4")->set_entry(0); // read from RAM
287   membank("bankw1")->set_entry(0); // write to RAM
288   membank("bankw2")->set_entry(2); // write to videoram
289   membank("bankw3")->set_entry(2); // write to hiresram
290   membank("bankw4")->set_entry(0); // write to RAM
291   m_maincpu->reset();
245292}
246293
247294WRITE_LINE_MEMBER( excali64_state::crtc_de )
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280327   // do this here because driver_init hasn't run yet
281328   m_p_videoram = memregion("videoram")->base();
282329   m_p_chargen = memregion("chargen")->base();
330   m_p_hiresram = memregion("hiresram")->base();
331   UINT8 *main = memregion("roms")->base();
332   UINT8 *ram = memregion("rambank")->base();
283333
334   // main ram (cp/m mode)
335   membank("bankr1")->configure_entry(0, &ram[0x0000]);
336   membank("bankr2")->configure_entry(0, &ram[0x2000]);
337   membank("bankr3")->configure_entry(0, &ram[0x3000]);
338   membank("bankr4")->configure_entry(0, &ram[0x4000]);//boot
339   membank("bankw1")->configure_entry(0, &ram[0x0000]);//boot
340   membank("bankw2")->configure_entry(0, &ram[0x2000]);
341   membank("bankw3")->configure_entry(0, &ram[0x3000]);
342   membank("bankw4")->configure_entry(0, &ram[0x4000]);//boot
343   // rom_1
344   membank("bankr1")->configure_entry(1, &main[0x0000]);//boot
345   // rom_2
346   membank("bankr2")->configure_entry(1, &main[0x4000]);//boot
347   membank("bankr3")->configure_entry(1, &main[0x5000]);//boot
348   // videoram
349   membank("bankw2")->configure_entry(2, &m_p_videoram[0x0000]);//boot
350   // hiresram
351   membank("bankw3")->configure_entry(2, &m_p_hiresram[0x0000]);//boot
352   membank("bankw4")->configure_entry(2, &m_p_hiresram[0x0000]);
353
354   // Set up foreground palettes
284355   UINT8 r,g,b,i,code;
285356   for (i = 0; i < 32; i++)
286357   {
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291362      palette.set_pen_color(i, r, g, b);
292363   }
293364
294
295365   // Background
296366   palette.set_pen_color(32, 0x00, 0x00, 0x00);  //  0 Black
297367   palette.set_pen_color(33, 0xff, 0x00, 0x00);  //  1 Red
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301371   palette.set_pen_color(37, 0xff, 0xff, 0x00);  //  5 Yellow
302372   palette.set_pen_color(38, 0x00, 0xff, 0xff);  //  6 Cyan
303373   palette.set_pen_color(39, 0xff, 0xff, 0xff);  //  7 White
304
305374}
306375
307376MC6845_UPDATE_ROW( excali64_state::update_row )
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321390      bg = 32 + ((col >> 1) & 7);
322391
323392      if (BIT(col, 0) & BIT(chr, 7))
324         gfx = m_p_videoram[0x800 + (chr<<4) + ra]; // hires definition
393         gfx = m_p_hiresram[(chr<<4) | ra]; // hires definition
325394      else
326395         gfx = m_p_chargen[(chr<<4) | ra]; // normal character
327396     
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345414   MCFG_CPU_PROGRAM_MAP(excali64_mem)
346415   MCFG_CPU_IO_MAP(excali64_io)
347416
417   MCFG_MACHINE_RESET_OVERRIDE(excali64_state, excali64)
418
348419   MCFG_DEVICE_ADD("uart", I8251, 0)
349420   //MCFG_I8251_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
350421   //MCFG_I8251_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts))
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398469
399470/* ROM definition */
400471ROM_START( excali64 )
401   ROM_REGION(0x10000, "maincpu", 0)
472   ROM_REGION(0x6000, "roms", 0)
402473   ROM_LOAD( "rom_1.ic17", 0x0000, 0x4000, CRC(e129a305) SHA1(e43ec7d040c2b2e548d22fd6bbc7df8b45a26e5a) )
403   ROM_LOAD( "rom_2.ic24", 0x2000, 0x2000, CRC(916d9f5a) SHA1(91c527cce963481b7bebf077e955ca89578bb553) )
474   ROM_LOAD( "rom_2.ic24", 0x4000, 0x2000, CRC(916d9f5a) SHA1(91c527cce963481b7bebf077e955ca89578bb553) )
404475   // fix a bug that causes screen to be filled with 'p'
405476   ROM_FILL(0x4ee, 1, 0)
406477   ROM_FILL(0x4ef, 1, 8)
407478   ROM_FILL(0x4f6, 1, 0)
408479   ROM_FILL(0x4f7, 1, 8)
409480
410   ROM_REGION(0x2000, "videoram", ROMREGION_ERASE00)
481   ROM_REGION(0x10000, "rambank", ROMREGION_ERASE00)
482   ROM_REGION(0x1000, "videoram", ROMREGION_ERASE00)
483   ROM_REGION(0x1000, "hiresram", ROMREGION_ERASE00)
411484
412485   ROM_REGION(0x1020, "chargen", 0)
413486   ROM_LOAD( "genex_3.ic43", 0x0000, 0x1000, CRC(b91619a9) SHA1(2ced636cb7b94ba9d329868d7ecf79963cefe9d9) )


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