trunk/src/mame/drivers/gts1.c
| r242326 | r242327 | |
|---|
| 93 | 93 | DECLARE_WRITE8_MEMBER(gts1_display_w); |
| 94 | 94 | DECLARE_READ8_MEMBER (gts1_io_r); |
| 95 | 95 | DECLARE_WRITE8_MEMBER(gts1_io_w); |
| 96 | DECLARE_READ8_MEMBER (gts1_lamp_apm_r); |
| 97 | DECLARE_WRITE8_MEMBER(gts1_lamp_apm_w); |
| 96 | 98 | DECLARE_READ8_MEMBER (gts1_nvram_r); |
| 97 | 99 | DECLARE_WRITE8_MEMBER(gts1_nvram_w); |
| 98 | 100 | DECLARE_READ8_MEMBER (gts1_pa_r); |
| r242326 | r242327 | |
|---|
| 104 | 106 | UINT8 m_io[256]; |
| 105 | 107 | UINT8 m_nvram_addr; |
| 106 | 108 | UINT8 m_6351_addr; |
| 109 | UINT16 m_z30_out; |
| 107 | 110 | }; |
| 108 | 111 | |
| 109 | 112 | static ADDRESS_MAP_START( gts1_map, AS_PROGRAM, 8, gts1_state ) |
| r242326 | r242327 | |
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| 115 | 118 | ADDRESS_MAP_END |
| 116 | 119 | |
| 117 | 120 | static ADDRESS_MAP_START( gts1_io, AS_IO, 8, gts1_state ) |
| 118 | | AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE ( "r10696", r10696_device, io_r, io_w ) // NVRAM io chip |
| 119 | | AM_RANGE(0x00d0, 0x00df) AM_DEVREADWRITE ( "r10788", r10788_device, io_r, io_w ) // display chip |
| 121 | AM_RANGE(0x0030, 0x003f) AM_DEVREADWRITE ( "r10696", r10696_device, io_r, io_w ) // (U3) solenoid + dips |
| 122 | AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE ( "r10696", r10696_device, io_r, io_w ) // (U2) NVRAM io chip |
| 123 | AM_RANGE(0x00d0, 0x00df) AM_DEVREADWRITE ( "r10788", r10788_device, io_r, io_w ) // (U6) display chip |
| 120 | 124 | AM_RANGE(0x0000, 0x00ff) AM_READ ( gts1_io_r ) AM_WRITE( gts1_io_w ) // connects to all the other chips |
| 121 | | |
| 122 | 125 | AM_RANGE(0x0100, 0x0100) AM_READ ( gts1_pa_r ) AM_WRITE( gts1_pa_w ) |
| 123 | 126 | AM_RANGE(0x0101, 0x0101) AM_WRITE(gts1_pb_w) |
| 124 | 127 | ADDRESS_MAP_END |
| r242326 | r242327 | |
|---|
| 207 | 210 | { |
| 208 | 211 | m_nvram_addr = 0; |
| 209 | 212 | m_6351_addr = 0; |
| 213 | m_z30_out = 0; |
| 210 | 214 | } |
| 211 | 215 | |
| 212 | 216 | DRIVER_INIT_MEMBER(gts1_state,gts1) |
| r242326 | r242327 | |
|---|
| 280 | 284 | #undef _h |
| 281 | 285 | } |
| 282 | 286 | |
| 287 | /** |
| 288 | * @brief read input groups A, B, C of NVRAM io chip (U2) |
| 289 | * @param offset 0 ... 2 = group |
| 290 | * @return 4-bit value read from the group |
| 291 | */ |
| 283 | 292 | READ8_MEMBER (gts1_state::gts1_nvram_r) |
| 284 | 293 | { |
| 285 | 294 | UINT8 data = 0x0f; |
| r242326 | r242327 | |
|---|
| 296 | 305 | return data; |
| 297 | 306 | } |
| 298 | 307 | |
| 308 | /** |
| 309 | * @brief write output groups A, B, C of NVRAM io chip (U2) |
| 310 | * @param offset 0 ... 2 = group |
| 311 | * @param data 4 bit value to write |
| 312 | */ |
| 299 | 313 | WRITE8_MEMBER(gts1_state::gts1_nvram_w) |
| 300 | 314 | { |
| 301 | 315 | switch (offset) |
| r242326 | r242327 | |
|---|
| 313 | 327 | } |
| 314 | 328 | } |
| 315 | 329 | |
| 330 | /** |
| 331 | * @brief read input groups A, B, C of lamp + apm I/O chip (U3) |
| 332 | * @param offset 0 ... 2 = group |
| 333 | * @return 4-bit value read from the group |
| 334 | */ |
| 335 | READ8_MEMBER (gts1_state::gts1_lamp_apm_r) |
| 336 | { |
| 337 | UINT8 data = 0x0f; |
| 338 | switch (offset) { |
| 339 | case 0: // group A switches S01-S04, S09-S12, S17-S20 |
| 340 | if (m_z30_out & 1) { |
| 341 | UINT8 dsw0 = ioport("DSW0")->read(); |
| 342 | if (0 == BIT(dsw0,0)) // S01 |
| 343 | data &= ~(1 << 3); |
| 344 | if (0 == BIT(dsw0,1)) // S02 |
| 345 | data &= ~(1 << 2); |
| 346 | if (0 == BIT(dsw0,2)) // S03 |
| 347 | data &= ~(1 << 1); |
| 348 | if (0 == BIT(dsw0,3)) // S04 |
| 349 | data &= ~(1 << 0); |
| 350 | } |
| 351 | if (m_z30_out & 2) { |
| 352 | UINT8 dsw1 = ioport("DSW1")->read(); |
| 353 | if (0 == BIT(dsw1,0)) // S09 |
| 354 | data &= ~(1 << 0); |
| 355 | if (0 == BIT(dsw1,1)) // S10 |
| 356 | data &= ~(1 << 1); |
| 357 | if (0 == BIT(dsw1,2)) // S11 |
| 358 | data &= ~(1 << 2); |
| 359 | if (0 == BIT(dsw1,3)) // S12 |
| 360 | data &= ~(1 << 3); |
| 361 | } |
| 362 | if (m_z30_out & 4) { |
| 363 | UINT8 dsw2 = ioport("DSW2")->read(); |
| 364 | if (0 == BIT(dsw2,0)) // S17 |
| 365 | data &= ~(1 << 0); |
| 366 | if (0 == BIT(dsw2,1)) // S18 |
| 367 | data &= ~(1 << 1); |
| 368 | if (0 == BIT(dsw2,2)) // S19 |
| 369 | data &= ~(1 << 2); |
| 370 | if (0 == BIT(dsw2,3)) // S20 |
| 371 | data &= ~(1 << 3); |
| 372 | } |
| 373 | break; |
| 374 | case 1: // group B switches S05-S08, S09-S12, S17-S20 |
| 375 | if (m_z30_out & 1) { |
| 376 | UINT8 dsw0 = ioport("DSW0")->read(); |
| 377 | if (0 == BIT(dsw0,4)) // S05 |
| 378 | data &= ~(1 << 3); |
| 379 | if (0 == BIT(dsw0,5)) // S06 |
| 380 | data &= ~(1 << 2); |
| 381 | if (0 == BIT(dsw0,6)) // S07 |
| 382 | data &= ~(1 << 1); |
| 383 | if (0 == BIT(dsw0,7)) // S08 |
| 384 | data &= ~(1 << 0); |
| 385 | } |
| 386 | if (m_z30_out & 2) { |
| 387 | UINT8 dsw1 = ioport("DSW1")->read(); |
| 388 | if (0 == BIT(dsw1,4)) // S13 |
| 389 | data &= ~(1 << 0); |
| 390 | if (0 == BIT(dsw1,5)) // S14 |
| 391 | data &= ~(1 << 1); |
| 392 | if (0 == BIT(dsw1,6)) // S15 |
| 393 | data &= ~(1 << 2); |
| 394 | if (0 == BIT(dsw1,7)) // S16 |
| 395 | data &= ~(1 << 3); |
| 396 | } |
| 397 | if (m_z30_out & 4) { |
| 398 | UINT8 dsw2 = ioport("DSW2")->read(); |
| 399 | if (0 == BIT(dsw2,4)) // S21 |
| 400 | data &= ~(1 << 0); |
| 401 | if (0 == BIT(dsw2,5)) // S22 |
| 402 | data &= ~(1 << 1); |
| 403 | if (0 == BIT(dsw2,6)) // S23 |
| 404 | data &= ~(1 << 2); |
| 405 | if (0 == BIT(dsw2,7)) // S24 |
| 406 | data &= ~(1 << 3); |
| 407 | } |
| 408 | break; |
| 409 | case 2: // TODO: connect |
| 410 | // IN-9 (unused?) |
| 411 | // IN-10 (reset sw25) |
| 412 | // IN-11 (outhole sw) |
| 413 | // IN-12 (slam sw) |
| 414 | break; |
| 415 | } |
| 416 | return data; |
| 417 | } |
| 418 | |
| 419 | /** |
| 420 | * @brief write output groups A, B, C of lamp + apm I/O chip (U3) |
| 421 | * @param offset 0 ... 2 = group |
| 422 | * @param data 4 bit value to write |
| 423 | */ |
| 424 | WRITE8_MEMBER(gts1_state::gts1_lamp_apm_w) |
| 425 | { |
| 426 | switch (offset) { |
| 427 | case 0: // DS0-DS4 |
| 428 | break; |
| 429 | case 1: // LD1-LD4 on jumper J5 |
| 430 | break; |
| 431 | case 2: // Z30 1-of-16 decoder |
| 432 | m_z30_out = 1 << (data & 15); |
| 433 | break; |
| 434 | } |
| 435 | } |
| 436 | |
| 316 | 437 | READ8_MEMBER (gts1_state::gts1_io_r) |
| 317 | 438 | { |
| 318 | 439 | UINT8 data = m_io[offset] & 0x0f; |