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r33628 Tuesday 2nd December, 2014 at 17:16:41 UTC by Zoë Blade
Tidy comments

Squashed commit of the following:

commit 8d8a0d9713d4614b22f06fda4cf948d4d5561de0
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Tue Dec 2 17:15:42 2014 +0000

   Revert fixes to libraries

   I'll fix those at the source, where possible.

commit 5dde94e3e60dcc622d5b782acaa62e590c62bafb
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Tue Dec 2 16:57:32 2014 +0000

   Add apostrophes

commit b27e168b58861f1ad0ca7af1c6ca1629cc6730ce
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Mon Dec 1 16:28:58 2014 +0000

   Fix some more word duplication

   I've left some instances of " in in " in, as they're ambiguous and
   may actually be correct.

commit a3dfd10cd501c3a521010942f950f5ca2c5395a7
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Mon Dec 1 10:35:03 2014 +0000

   Fix another typo

commit 01a3702209d9e880ac8f60dc4d74f26d426234fb
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Mon Dec 1 10:33:57 2014 +0000

   Fix more typos

commit 56c6fffd8769cdfab62c59c04d41b98b7f425262
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Mon Dec 1 10:30:19 2014 +0000

   Hopefully fix typos

   I'm not entirely sure about src/mame/drivers/nova2001.c line 933,
   as it could plausibly be either "which is not the top bit" or "which
   is now the top bit", with almost opposite meaning.

commit 906507b221de0175d236e252dc51f122cb56db23
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Mon Dec 1 08:39:55 2014 +0000

   Fix another typo

commit 14fcd939ae1c0570c10aacf00c6ea86724086f92
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Mon Dec 1 08:38:16 2014 +0000

   Fix some more word doubling in comments

commit d21283a447b94b28a38ec742a09fe425d77b55b2
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Sun Nov 30 23:06:07 2014 +0000

   Fix some more typos

commit 59b14d204af6d5983ea6dea2f5c8ad5bcc80460c
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Sun Nov 30 22:56:53 2014 +0000

   Tidy more

commit 9b3c9a868596c04c1a61b35aa8c96fb82c885149
Author: Zoë Blade <zoe@bytenoise.co.uk>
Date:   Sun Nov 30 22:43:30 2014 +0000

   Tidy more comments
[docs]floppy.txt
[hash]coco_flop.xml
[src/emu/cpu/alto2]a2disp.h a2ether.c
[src/emu/cpu/tms0980]tms0980.c
[src/mame/audio]dcs.c gottlieb.c
[src/mame/drivers]40love.c bfm_sc4h.c bottom9.c champbas.c cps1.c crystal.c dietgo.c ecoinfr.c gaelco3d.c galpani2.c igs_m036.c multfish_ref.c nova2001.c re900.c system16.c vsnes.c wc90b.c
[src/mame/includes]galpani2.h toaplan1.h
[src/mame/machine]pgmprot_igs027a_type3.c
[src/mame/video]bosco.c galpani2.c tankbust.c
[src/mess/audio]upd1771.c
[src/mess/tools/imgtool/modules]os9.c

trunk/docs/floppy.txt
r242139r242140
329329- FM-encoded sector data followed by two bytes of crc
330330- A number of FM-encoded 0xff (usually 48, very variable)
331331
332The the track is finished with a stream of '1' cells.
332The track is finished with a stream of '1' cells.
333333
334334The 125KHz pulse trains are used to lock the PLL to the signal
335335correctly.  The specific 16-cells streams allow to distinguish between
trunk/hash/coco_flop.xml
r242139r242140
33
44<softwarelist name="coco_flop" description="Tandy Radio Shack Color Computer disk images">
55
6   <!-- coco3 only requires 512Kb, audio is a farty, run best with a a 6309? - coco3h driver) -->
6   <!-- coco3 only requires 512Kb, audio is a farty, run best with a 6309? - coco3h driver) -->
77   <!-- RUN"DONKEY" -->
88   <software name="dkong" supported ="partial">
99      <description>Donkey Kong (Sock Master's Donkey Kong Emulator for CoCo 3) (512Kb)</description>
trunk/src/emu/cpu/alto2/a2disp.h
r242139r242140
7676#define ALTO2_DISPLAY_HEIGHT 808                                                    //!< number of visible scanlines per frame; 808 really, but there are some empty lines?
7777#define ALTO2_DISPLAY_WIDTH 606                                                     //!< visible width of the display; 38 x 16 bit words - 2 pixels
7878#define ALTO2_DISPLAY_VISIBLE_WORDS ((ALTO2_DISPLAY_WIDTH+15)/16)                   //!< visible words per scanline
79#define ALTO2_DISPLAY_BITCLOCK 20160000ll                                           //!< display bit clock in in Hertz (20.16MHz)
80#define ALTO2_DISPLAY_BITTIME(n) (U64(1000000000000)*(n)/ALTO2_DISPLAY_BITCLOCK)    //!< display bit time in in pico seconds (~= 49.6031ns)
79#define ALTO2_DISPLAY_BITCLOCK 20160000ll                                           //!< display bit clock in Hertz (20.16MHz)
80#define ALTO2_DISPLAY_BITTIME(n) (U64(1000000000000)*(n)/ALTO2_DISPLAY_BITCLOCK)    //!< display bit time in pico seconds (~= 49.6031ns)
8181#define ALTO2_DISPLAY_SCANLINE_TIME ALTO2_DISPLAY_BITTIME(ALTO2_DISPLAY_TOTAL_WIDTH)//!< time for a scanline in pico seconds (768 * 49.6031ns ~= 38095.1808ns)
8282#define ALTO2_DISPLAY_VISIBLE_TIME ALTO2_DISPLAY_BITTIME(ALTO2_DISPLAY_WIDTH)       //!< time of the visible part of a scanline in pico seconds (606 * 49.6031ns ~= 30059.4786ns)
8383#define ALTO2_DISPLAY_WORD_TIME ALTO2_DISPLAY_BITTIME(16)                           //!< time for a word in pico seconds (16 pixels * 49.6031ns ~= 793.6496ns)
trunk/src/emu/cpu/alto2/a2ether.c
r242139r242140
416416 * polynomials listed in Tabel I by applying the appropriate logic levels
417417 * to the select pins S0, S1 and S2.
418418 *
419 * Teh 'F401 consists of a 16-bit register, a Read Only Memory (ROM) and
419 * The 'F401 consists of a 16-bit register, a Read Only Memory (ROM) and
420420 * associated control circuitry as shown in the block diagram. The
421421 * polynomial control code presented at inputs S0, S1 and S2 is decoded
422422 * by the ROM, selecting the desired polynomial by establishing shift
trunk/src/emu/cpu/tms0980/tms0980.c
r242139r242140
4848    - Execute:
4949        1. Execute BRANCH/CALL/RETN part #1
5050
51*/
5251
53#include "tms0980.h"
54#include "debugger.h"
55
56/*
57
5852The MCU cores contains a set of fixed instructions and a set of
5953instructions created using microinstructions. A subset of the
6054instruction set could be defined from the microinstructions by
r242139r242140
6458cycle #2: C8(?), CKM, NE(?), STO
6559cycle #3,#4: AUTA, AUTY
6660
67unknown cycle: CME, SSE, SSS
68
6961*/
7062
71/* Microinstructions */
72#define M_15TN              0x00000001 /* 15 to -ALU */
73#define M_ATN               0x00000002 /* ACC to -ALU */
74#define M_AUTA              0x00000004 /* ALU to ACC */
75#define M_AUTY              0x00000008 /* ALU to Y */
76#define M_C8                0x00000010 /* CARRY8 to STATUS */
77#define M_CIN               0x00000020 /* Carry In to ALU */
78#define M_CKM               0x00000040 /* CKB to MEM */
79#define M_CKN               0x00000080 /* CKB to -ALU */
80#define M_CKP               0x00000100 /* CKB to +ALU */
81#define M_CME               0x00000200 /* Conditional Memory Enable */
82#define M_DMTP              0x00000400 /* DAM to +ALU */
83#define M_MTN               0x00000800 /* MEM to -ALU */
84#define M_MTP               0x00001000 /* MEM to +ALU */
85#define M_NATN              0x00002000 /* ~ACC to -ALU */
86#define M_NDMTP             0x00004000 /* ~DAM to +ALU */
87#define M_NE                0x00008000 /* COMP to STATUS */
88#define M_SSE               0x00010000 /* Special Status Enable */
89#define M_SSS               0x00020000 /* Special Status Sample */
90#define M_STO               0x00040000 /* ACC to MEM */
91#define M_STSL              0x00080000 /* STATUS to Status Latch */
92#define M_YTP               0x00100000 /* Y to +ALU */
63#include "tms0980.h"
64#include "debugger.h"
9365
94/* Standard/fixed instructions - these are documented more in their specific handlers below */
95#define F_BR                0x00000001
96#define F_CALL              0x00000002
97#define F_CLO               0x00000004
98#define F_COMC              0x00000008
99#define F_COMX              0x00000010
100#define F_COMX8             0x00000020
101#define F_LDP               0x00000040
102#define F_LDX               0x00000080
103#define F_OFF               0x00000100
104#define F_RBIT              0x00000200
105#define F_REAC              0x00000400
106#define F_RETN              0x00000800
107#define F_RSTR              0x00001000
108#define F_SAL               0x00002000
109#define F_SBIT              0x00004000
110#define F_SBL               0x00008000
111#define F_SEAC              0x00010000
112#define F_SETR              0x00020000
113#define F_TDO               0x00040000
114#define F_XDA               0x00080000
115
116
11766// supported types:
11867// note: dice information assumes the orientation is pictured with RAM at the bottom-left
11968
r242139r242140
340289
341290
342291
292/* Standard/fixed instructions */
293#define F_BR                0x00000001
294#define F_CALL              0x00000002
295#define F_CLO               0x00000004
296#define F_COMC              0x00000008
297#define F_COMX              0x00000010
298#define F_COMX8             0x00000020
299#define F_LDP               0x00000040
300#define F_LDX               0x00000080
301#define F_OFF               0x00000100
302#define F_RBIT              0x00000200
303#define F_REAC              0x00000400
304#define F_RETN              0x00000800
305#define F_RSTR              0x00001000
306#define F_SAL               0x00002000
307#define F_SBIT              0x00004000
308#define F_SBL               0x00008000
309#define F_SEAC              0x00010000
310#define F_SETR              0x00020000
311#define F_TDO               0x00040000
312#define F_XDA               0x00080000
313
314/* Microinstructions */
315#define M_15TN              0x00000001
316#define M_ATN               0x00000002
317#define M_AUTA              0x00000004
318#define M_AUTY              0x00000008
319#define M_C8                0x00000010
320#define M_CIN               0x00000020
321#define M_CKM               0x00000040
322#define M_CKN               0x00000080
323#define M_CKP               0x00000100
324#define M_CME               0x00000200
325#define M_DMTP              0x00000400
326#define M_MTN               0x00000800
327#define M_MTP               0x00001000
328#define M_NATN              0x00002000
329#define M_NDMTP             0x00004000
330#define M_NE                0x00008000
331#define M_SSE               0x00010000
332#define M_SSS               0x00020000
333#define M_STO               0x00040000
334#define M_STSL              0x00080000
335#define M_YTP               0x00100000
336
337
338
343339//-------------------------------------------------
344340//  device_start - device-specific startup
345341//-------------------------------------------------
trunk/src/mame/audio/dcs.c
r242139r242140
184184#define SET_INPUT_FULL()            (m_latch_control &= ~LCTRL_INPUT_EMPTY)
185185
186186
187/* These are the some of the control register, we dont use them all */
187/* These are some of the control registers. We don't use them all */
188188enum
189189{
190190   IDMA_CONTROL_REG = 0,   /* 3fe0 */
trunk/src/mame/audio/gottlieb.c
r242139r242140
10301030         m_nmi_state = 1;
10311031         nmi_state_update();
10321032
1033         // set a timer to turn it off again on hte next SOUND_CLOCK/16
1033         // set a timer to turn it off again on the next SOUND_CLOCK/16
10341034         timer_set(attotime::from_hz(SOUND2_CLOCK/16), TID_NMI_CLEAR);
10351035
10361036         // adjust the NMI timer for the next time
trunk/src/mame/drivers/40love.c
r242139r242140
2828Vintage                  : 1984
2929Game serial/model number : M4300006B ?
3030
31I dont have the wiring harness for this board, so dont know if it works.
31I don't have the wiring harness for this board, so don't know if it works.
3232One GFX ROM is bad though.
3333See A30-26.u23\A30-26.txt for details about the bad ROM.
3434To summarise:
trunk/src/mame/drivers/bfm_sc4h.c
r242139r242140
584584   else
585585   {
586586      // generating certain interrupts expects the bit 0x8000 to be set here
587      // but it's set ot dedicated i/o, not general purpose, source?
587      // but it's set to dedicated i/o, not general purpose, source?
588588      return 0x8040;
589589   }
590590}
trunk/src/mame/drivers/bottom9.c
r242139r242140
367367   ROM_LOAD32_BYTE( "891e09d", 0x40002, 0x10000, CRC(4e1335e6) SHA1(b892ab40a41978a89658ea2e7aabe9b073430b5d) )
368368   ROM_LOAD32_BYTE( "891e09b", 0x40003, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
369369
370   ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
370   ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
371371   ROM_LOAD32_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) )    /* sprites */
372372   ROM_LOAD32_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
373373   ROM_LOAD32_BYTE( "891e05e", 0x00002, 0x10000, CRC(b356e729) SHA1(2cda591415b0f139fdb1f80c349d432bb0579d8e) )
r242139r242140
424424   ROM_LOAD32_BYTE( "891e09d", 0x40002, 0x10000, CRC(4e1335e6) SHA1(b892ab40a41978a89658ea2e7aabe9b073430b5d) )
425425   ROM_LOAD32_BYTE( "891e09b", 0x40003, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
426426
427   ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
427   ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
428428   ROM_LOAD32_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) )    /* sprites */
429429   ROM_LOAD32_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
430430   ROM_LOAD32_BYTE( "891e05e", 0x80002, 0x10000, CRC(b356e729) SHA1(2cda591415b0f139fdb1f80c349d432bb0579d8e) )
trunk/src/mame/drivers/champbas.c
r242139r242140
320320   AM_RANGE(0xa002, 0xa002) AM_WRITE(champbas_gfxbank_w)
321321   AM_RANGE(0xa003, 0xa003) AM_WRITE(champbas_flipscreen_w)
322322   AM_RANGE(0xa006, 0xa006) AM_WRITE(champbas_mcu_halt_w)
323   AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* This is also MCU control, but i dont need it */
323   AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* This is also MCU control, but I don't need it */
324324
325325   AM_RANGE(0xa040, 0xa06f) AM_WRITEONLY AM_SHARE("spriteram") /* Sprite pos */
326326   AM_RANGE(0xa080, 0xa080) AM_WRITE(soundlatch_byte_w)
trunk/src/mame/drivers/cps1.c
r242139r242140
548548   AM_RANGE(0x800030, 0x800037) AM_WRITE(cps1_coinctrl_w)
549549   /* Forgotten Worlds has dial controls on B-board mapped at 800040-80005f. See DRIVER_INIT */
550550   AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_SHARE("cps_a_regs")  /* CPS-A custom */
551   /* CPS-B custom is mapped by the PAL IOB2 on the B-board. SF2 revision "E" World and USA 910228 has it a a different
551   /* CPS-B custom is mapped by the PAL IOB2 on the B-board. SF2 revision "E" World and USA 910228 has it at a different
552552      address, see DRIVER_INIT */
553553   AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_SHARE("cps_b_regs")
554554   AM_RANGE(0x800180, 0x800187) AM_WRITE(cps1_soundlatch_w)    /* Sound command */
trunk/src/mame/drivers/crystal.c
r242139r242140
10541054
10551055The PIC uses a software UART bit banged on a single output pin of the main CPU:
10561056the data port is bit 0x20000000 on the PIO register, the same register where the EEPROM control lines are. The serial data is transmitted at 8 data bits, even parity, 1 stop bit. It's probably
1057tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in in parallel, and the bit lengths must match. The pic bit delay routine is just a loop.
1057tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in parallel, and the bit lengths must match. The pic bit delay routine is just a loop.
10581058also it seems that bit 0x40000000 is the PIC reset.
10591059
10601060*/
trunk/src/mame/drivers/dietgo.c
r242139r242140
142142   PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
143143   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
144144   PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) // Demo_Sounds ) )
145   PORT_DIPSETTING(      0x4000, DEF_STR( Off ) ) // Players dont move in attract mode if on!?
145   PORT_DIPSETTING(      0x4000, DEF_STR( Off ) ) // Players don't move in attract mode if on!?
146146   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
147147   PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
148148   PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
trunk/src/mame/drivers/ecoinfr.c
r242139r242140
16941694GAME( 19??, ec_rdht7,   0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "Red Hot 7 (MAB PCB?) (Concept Games Ltd) (?)"      , GAME_FLAGS)
16951695GAME( 19??, ec_unkt,    0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "unknown 'T' (MAB PCB?) (Concept Games Ltd) (?)"        , GAME_FLAGS)
16961696
1697//These look more like some variant of Astra Gaming hardware than the MAB PCB, but I can't be sure. Certainly they dont seem to be on the base hardware
1697//These look more like some variant of Astra Gaming hardware than the MAB PCB, but I can't be sure. Certainly they don't seem to be on the base hardware
16981698GAME( 19??, ec_gold7,   0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "Golden 7 (Concept Games Ltd) (?)"      , GAME_FLAGS)
16991699GAME( 19??, ec_mgbel,   0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "Megabell (Concept Games Ltd) (?)"      , GAME_FLAGS)
17001700GAME( 19??, ec_jackb,   0        , ecoinfr,   ecoinfr_barx, ecoinfr_state,   ecoinfrmab,    ROT0,  "Concept Games Ltd", "Jackpot Bars (MAB PCB?) (Concept Games Ltd) (?)"       , GAME_FLAGS)
trunk/src/mame/drivers/gaelco3d.c
r242139r242140
523523 *
524524 *************************************/
525525
526/* These are the some of the control register, we dont use them all */
526/* These are some of the control registers. We don't use them all */
527527enum
528528{
529529   S1_AUTOBUF_REG = 15,
r242139r242140
663663         /* get the base value, since we need to keep it around for wrapping */
664664         source -= m_adsp_incs;
665665
666         /* make it go back one so we dont lose the first sample */
666         /* make it go back one so we don't lose the first sample */
667667         m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, source);
668668
669669         /* save it as it is now */
trunk/src/mame/drivers/galpani2.c
r242139r242140
337337   AM_RANGE(0x300000, 0x301fff) AM_RAM                                             // ?
338338   AM_RANGE(0x302000, 0x303fff) AM_RAM AM_SHARE("spriteram")   // Sprites
339339   AM_RANGE(0x304000, 0x30401f) AM_DEVREADWRITE("kan_spr", kaneko16_sprite_device, kaneko16_sprites_regs_r, kaneko16_sprites_regs_w)
340//   AM_RANGE(0x308000, 0x308001) AM_WRITENOP                                        // ? 0 at startup
341//   AM_RANGE(0x30c000, 0x30c001) AM_WRITENOP                                        // ? hblank effect ?
342   AM_RANGE(0x310000, 0x3101ff) AM_RAM_DEVWRITE("bg8palette", palette_device, write) AM_SHARE("bg8palette")    // ?
340   AM_RANGE(0x308000, 0x308001) AM_WRITENOP                                        // ? 0 at startup
341   AM_RANGE(0x30c000, 0x30c001) AM_WRITENOP                                        // ? hblank effect ?
342   AM_RANGE(0x310000, 0x3101ff) AM_RAM_WRITE(galpani2_palette_0_w) AM_SHARE("palette.0")    // ?
343343   AM_RANGE(0x314000, 0x314001) AM_WRITENOP                                        // ? flip backgrounds ?
344344   AM_RANGE(0x318000, 0x318001) AM_READWRITE(galpani2_eeprom_r, galpani2_eeprom_w) // EEPROM
345345   AM_RANGE(0x380000, 0x387fff) AM_RAM                                             // Palette?
346346   AM_RANGE(0x388000, 0x38ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")   // Palette
347//   AM_RANGE(0x390000, 0x3901ff) AM_WRITENOP                                        // ? at startup of service mode
347   AM_RANGE(0x390000, 0x3901ff) AM_WRITENOP                                        // ? at startup of service mode
348348
349   AM_RANGE(0x400000, 0x43ffff) AM_RAM AM_SHARE("bg8.0")    // Background 0
349   AM_RANGE(0x400000, 0x43ffff) AM_RAM_WRITE(galpani2_bg8_0_w) AM_SHARE("bg8.0")    // Background 0
350350   AM_RANGE(0x440000, 0x440001) AM_RAM AM_SHARE("bg8_scrollx.0")           // Background 0 Scroll X
351351   AM_RANGE(0x480000, 0x480001) AM_RAM AM_SHARE("bg8_scrolly.0")           // Background 0 Scroll Y
352//   AM_RANGE(0x4c0000, 0x4c0001) AM_WRITENOP                                        // ? 0 at startup only
353   AM_RANGE(0x500000, 0x53ffff) AM_RAM AM_SHARE("bg8.1")    // Background 1
352   AM_RANGE(0x4c0000, 0x4c0001) AM_WRITENOP                                        // ? 0 at startup only
353   AM_RANGE(0x500000, 0x53ffff) AM_RAM_WRITE(galpani2_bg8_1_w) AM_SHARE("bg8.1")    // Background 1
354354   AM_RANGE(0x540000, 0x540001) AM_RAM AM_SHARE("bg8_scrollx.1")           // Background 1 Scroll X
355   AM_RANGE(0x580000, 0x580001) AM_RAM AM_SHARE("bg8_scrolly.1")           // Background 1 Scroll Y
356//   AM_RANGE(0x5c0000, 0x5c0001) AM_WRITENOP                                        // ? 0 at startup only
357355
358356   AM_RANGE(0x540572, 0x540573) AM_READNOP                                         // ? galpani2 at F0A4
359357   AM_RANGE(0x54057a, 0x54057b) AM_READNOP                                         // ? galpani2 at F148
r242139r242140
365363   AM_RANGE(0x5405c2, 0x5405c3) AM_READNOP                                         // ? galpani2 at F0A4 and F148
366364   AM_RANGE(0x5405ca, 0x5405cb) AM_READNOP                                         // ? galpani2 at F148
367365
368   AM_RANGE(0x600000, 0x600001) AM_NOP                                        // Watchdog
366   AM_RANGE(0x580000, 0x580001) AM_RAM AM_SHARE("bg8_scrolly.1")           // Background 1 Scroll Y
367   AM_RANGE(0x5c0000, 0x5c0001) AM_WRITENOP                                        // ? 0 at startup only
368   AM_RANGE(0x600000, 0x600001) AM_WRITENOP                                        // Watchdog
369369   AM_RANGE(0x640000, 0x640001) AM_WRITE8(galpani2_mcu_init_w, 0x00ff          )   // ? 0 before resetting and at startup, Reset mcu ?
370370   AM_RANGE(0x680000, 0x680001) AM_WRITE8(galpani2_mcu_nmi1_w, 0x00ff)             // ? 0 -> 1 -> 0 (lev 5) / 0 -> $10 -> 0
371371   AM_RANGE(0x6c0000, 0x6c0001) AM_WRITE8(galpani2_coin_lockout_w, 0xff00      )   // Coin + Card Lockout
r242139r242140
403403static ADDRESS_MAP_START( galpani2_mem2, AS_PROGRAM, 16, galpani2_state )
404404   AM_RANGE(0x000000, 0x03ffff) AM_ROM                                                             // ROM
405405   AM_RANGE(0x100000, 0x13ffff) AM_RAM AM_SHARE("ram2")                                        // Work RAM
406   AM_RANGE(0x400000, 0x5fffff) AM_RAM AM_SHARE("bg15")  // bg15
407//   AM_RANGE(0x600000, 0x600001) AM_NOP // ? 0 at startup only
408//   AM_RANGE(0x640000, 0x640001) AM_WRITENOP                                // ? 0 at startup only
409//   AM_RANGE(0x680000, 0x680001) AM_WRITENOP                                // ? 0 at startup only
410//   AM_RANGE(0x6c0000, 0x6c0001) AM_WRITENOP                                // ? 0 at startup only
411   AM_RANGE(0x700000, 0x700001) AM_NOP                                 // Watchdog
406   AM_RANGE(0x400000, 0x4fffff) AM_RAM_WRITE(galpani2_bg15_w) AM_SHARE("bg15")  // bg15
407   AM_RANGE(0x500000, 0x5fffff) AM_RAM                                                             // bg15
408   AM_RANGE(0x600000, 0x600001) AM_NOP // ? 0 at startup only
409   AM_RANGE(0x640000, 0x640001) AM_WRITENOP                                // ? 0 at startup only
410   AM_RANGE(0x680000, 0x680001) AM_WRITENOP                                // ? 0 at startup only
411   AM_RANGE(0x6c0000, 0x6c0001) AM_WRITENOP                                // ? 0 at startup only
412   AM_RANGE(0x700000, 0x700001) AM_WRITENOP                                // Watchdog
412413//  AM_RANGE(0x740000, 0x740001) AM_WRITENOP                                // ? Reset mcu
413414   AM_RANGE(0x780000, 0x780001) AM_WRITE8(galpani2_mcu_nmi2_w, 0x00ff)             // ? 0 -> 1 -> 0 (lev 5)
414415   AM_RANGE(0x7c0000, 0x7c0001) AM_WRITEONLY AM_SHARE("rombank")   // Rom Bank
r242139r242140
625626   MCFG_SCREEN_SIZE(320, 256)
626627   MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 256-1-16)
627628   MCFG_SCREEN_UPDATE_DRIVER(galpani2_state, screen_update_galpani2)
629   MCFG_SCREEN_PALETTE("palette")
628630
629631   MCFG_GFXDECODE_ADD("gfxdecode", "palette", galpani2)
630   MCFG_PALETTE_ADD("palette", 0x4000)    // sprites
632   MCFG_PALETTE_ADD("palette", 0x4000 + 0x200 + 0x8000)    // sprites, bg8, bg15
631633   MCFG_PALETTE_FORMAT(xGGGGGRRRRRBBBBB)
634   MCFG_PALETTE_INIT_OWNER(galpani2_state, galpani2)
632635
633   MCFG_PALETTE_ADD("bg8palette", 0x200/2) // bg8
634   MCFG_PALETTE_FORMAT(xGGGGGRRRRRBBBBB)
635
636   MCFG_PALETTE_ADD("bgpalette", 32768) /* 32768 static colors for the bg */
637   MCFG_PALETTE_FORMAT(xGGGGGRRRRRBBBBB)
638   MCFG_PALETTE_INIT_OWNER(galpani2_state,galpani2)
639
640636   MCFG_DEVICE_ADD_KC002_SPRITES
641637   kaneko16_sprite_device::set_offsets(*device, 0x10000 - 0x16c0 + 0xc00, 0);
642638   MCFG_KANEKO16_SPRITE_GFXDECODE("gfxdecode")
trunk/src/mame/drivers/igs_m036.c
r242139r242140
1212IGS036 could be a upgraded version of IGS027A
1313but with GFX processor integrated
1414
15I dont know the CPU core (should ARM based due to fail test)
16the chip has internal rom build-in
17the the FLASH(u33, EV29LV160AB-90PCR) is external rom and encrypted
18if the external rom decrypted then we can
15I don't know the CPU core (should be ARM based due to fail test)
16the chip has internal rom built-in
17the FLASH(u33, EV29LV160AB-90PCR) is external rom and encrypted
18if the external rom is decrypted then we can
1919try to trojan the internal rom
20here we offer several revision a same game to see
20here we offer several revisions of the same game to see
2121if anyone could find any clue, these 4 revision can
2222be programmed and running on a same PCB.
2323===================================================
trunk/src/mame/drivers/multfish_ref.c
r242139r242140
11
22/* The following sets are known to exist based on official documentation, but have not been dumped. */
3/* no other official sets are known to exist apart from these and hte ones in multfish.c */
3/* no other official sets are known to exist apart from these and the ones in multfish.c */
44
55#if 0
66ROM_START( mfish ) // 021120
trunk/src/mame/drivers/nova2001.c
r242139r242140
930930/******************************************************************************
931931
932932Gfx ROMs in pkunwar have an unusual layout, where a high address bit
933(which is no the top bit) separates parts of the same tile.
933(which is not the top bit) separates parts of the same tile.
934934
935935This all originates from Nova2001 apparently, which uses 0x2000 bytes ROMs for
936936the graphics. When the number of tiles was increased, the same 0x2000 blocks
trunk/src/mame/drivers/re900.c
r242139r242140
4545
4646    How to play...
4747
48    This Roulette allow up to 6 players. To start the machine, turn the Operator Key
49    (the the Operator Key light will turn green). Whilest this key is turned ON, you
48    This Roulette allows up to 6 players. To start the machine, turn the Operator Key
49    (the Operator Key light will turn green). Whilst this key is turned ON, you
5050    can insert credits, play, and payout. Once the key is turned OFF (red light), you
5151    can play, but credits can't be entered/taken.
5252
trunk/src/mame/drivers/system16.c
r242139r242140
3535     - Tetris
3636     - E-Swat
3737
38    These appear to be a variation no the encrypted / protected bootlegs, but without the encryption
38    These appear to be a variation on the encrypted / protected bootlegs, but without the encryption
3939    or protection
4040
4141    - Golden Axe (set 2)
r242139r242140
566566   int scroll = data & 0x1ff;
567567
568568   scroll+= 0x200;
569   scroll+= 1; // so that the background fo the select screen is properly aligned
569   scroll+= 1; // so that the background of the select screen is properly aligned
570570   m_bg_scrollx = -scroll;
571571}
572572
trunk/src/mame/drivers/vsnes.c
r242139r242140
364364   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )            /* bit 1 of dsw goes here */
365365   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
366366   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
367   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )            /* this bit masks irqs - dont change */
367   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )            /* this bit masks irqs - don't change */
368368
369369   /* Right Side Controls */
370370   PORT_START("IN2")
r242139r242140
395395   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )            /* bit 1 of dsw goes here */
396396   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(1)
397397   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(1)
398   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )            /* this bit masks irqs - dont change */
398   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )            /* this bit masks irqs - don't change */
399399
400400   /* Both sides also have a DSW (#0 & #1) which are defined per game, below */
401401INPUT_PORTS_END
trunk/src/mame/drivers/wc90b.c
r242139r242140
6262sometimes it seems colors are not entirely correct, this is only due
6363to the crappy artwork of the person that did the bootleg.
6464
65Dip switches are not complete and they dont seem to differ from
65Dip switches are not complete and they don't seem to differ from
6666the original machine.
6767
6868Last but not least, the set of ROMs i have for Euro League seem to have
trunk/src/mame/includes/galpani2.h
r242139r242140
2121      m_spriteram(*this, "spriteram"),
2222      m_oki2(*this, "oki2"),
2323      m_eeprom(*this, "eeprom"),
24      m_palette(*this, "palette"),
25      m_bg15palette(*this, "bgpalette"),
26      m_bg8palette(*this, "bg8palette")
27   { }
24      m_palette(*this, "palette")
25      { }
2826
2927   required_shared_ptr_array<UINT16, 2> m_bg8;
3028   optional_shared_ptr_array<UINT16, 2> m_palette_val;
r242139r242140
3735   UINT16 m_old_mcu_nmi1;
3836   UINT16 m_old_mcu_nmi2;
3937   required_shared_ptr<UINT16> m_rombank;
38   bitmap_ind16 *m_bg8_bitmap[2];
39   bitmap_ind16 *m_bg15_bitmap;
4040
4141   required_device<cpu_device> m_maincpu;
4242   required_device<cpu_device> m_subcpu;
r242139r242140
5555   virtual void machine_reset();
5656   virtual void video_start();
5757   DECLARE_PALETTE_INIT(galpani2);
58   UINT32 screen_update_galpani2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
59   void copybg8(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int layer);
60   void copybg15(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
61
58   UINT32 screen_update_galpani2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
6259   TIMER_DEVICE_CALLBACK_MEMBER(galpani2_interrupt1);
6360   TIMER_DEVICE_CALLBACK_MEMBER(galpani2_interrupt2);
6461   void galpani2_mcu_nmi1();
6562   void galpani2_mcu_nmi2();
6663   /*----------- defined in video/galpani2.c -----------*/
64   inline void galpani2_bg8_w(offs_t offset, UINT16 data, UINT16 mem_mask, int _n_);
65   inline void galpani2_palette_w(offs_t offset, UINT16 data, UINT16 mem_mask, int _n_);
6766
67   DECLARE_WRITE16_MEMBER( galpani2_palette_0_w );
68   DECLARE_WRITE16_MEMBER( galpani2_palette_1_w );
69
70   DECLARE_WRITE16_MEMBER( galpani2_bg8_0_w );
71   DECLARE_WRITE16_MEMBER( galpani2_bg8_1_w );
72
73   DECLARE_WRITE16_MEMBER( galpani2_bg15_w );
6874   required_device<okim6295_device> m_oki2;
6975   required_device<eeprom_serial_93cxx_device> m_eeprom;
7076   required_device<palette_device> m_palette;
71   required_device<palette_device> m_bg15palette;
72   required_device<palette_device> m_bg8palette;
73
7477};
trunk/src/mame/includes/toaplan1.h
r242139r242140
2727
2828   optional_shared_ptr<UINT8> m_sharedram;
2929
30   int m_coin_count; /* coin count increments on startup ? , so dont count it */
30   int m_coin_count; /* coin count increments on startup ? , so don't count it */
3131   int m_intenable;
3232
3333   /* Demon world */
trunk/src/mame/machine/pgmprot_igs027a_type3.c
r242139r242140
498498   temp16[(base) /2] = 0xff1e; base += 2;
499499   temp16[(base) /2] = 0xe12f; base += 2;
500500
501   // the non-EO area starts in the middle of a function that seems similar to those  at 000037E4 / 000037D4 in killbldp.. by setting this up we allow the intro to run
502   // it sets '0x10000038' to a value ot 1
501   // the non-EO area starts in the middle of a function that seems similar to those at 000037E4 / 000037D4 in killbldp. by setting this up we allow the intro to run
502   // it sets '0x10000038' to a value of 1
503503   base = 0x184;
504504   temp16[(base) /2] = 0x105c; base += 2;
505505   temp16[(base) /2] = 0xE59F; base += 2;
trunk/src/mame/video/bosco.c
r242139r242140
248248            x = (m_star_seed_tab[star_cntr].x + m_stars_scrollx) % 256;
249249            y = (m_star_seed_tab[star_cntr].y + m_stars_scrolly) % 256;
250250
251            /* dont draw the stars that are off the screen */
251            /* don't draw the stars that are off the screen */
252252            if ( x < 224 )
253253            {
254254               if (flip) x += 64;
trunk/src/mame/video/galpani2.c
r242139r242140
5555WRITE16_MEMBER( galpani2_bg8_regs_1_w ) { galpani2_bg8_regs_w(space, offset, data, mem_mask, 1); }
5656#endif
5757
58inline void galpani2_state::galpani2_bg8_w(offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
59{
60   int x,y,pen;
61   UINT16 newword = COMBINE_DATA(&m_bg8[_n_][offset]);
62   pen =   newword & 0xff;
63   x   =   (offset % 512); /* 512 x 256 */
64   y   =   (offset / 512);
65   m_bg8_bitmap[_n_]->pix16(y, x) = 0x4000 + pen;
66}
5867
68WRITE16_MEMBER( galpani2_state::galpani2_bg8_0_w ) { galpani2_bg8_w(offset, data, mem_mask, 0); }
69WRITE16_MEMBER( galpani2_state::galpani2_bg8_1_w ) { galpani2_bg8_w(offset, data, mem_mask, 1); }
5970
71inline void galpani2_state::galpani2_palette_w(offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
72{
73   UINT16 newword = COMBINE_DATA(&m_palette_val[_n_][offset]);
74   m_palette->set_pen_color( offset + 0x4000 + _n_ * 0x100, pal5bit(newword >> 5), pal5bit(newword >> 10), pal5bit(newword >> 0) );
75}
76
77WRITE16_MEMBER( galpani2_state::galpani2_palette_0_w ) { galpani2_palette_w(offset, data, mem_mask, 0); }
78WRITE16_MEMBER( galpani2_state::galpani2_palette_1_w ) { galpani2_palette_w(offset, data, mem_mask, 1); }
79
80
6081/***************************************************************************
6182
6283
84                            xRGB  Background Layer
85
86
87***************************************************************************/
88
89/* 8 horizontal pages of 256x256 pixels? */
90WRITE16_MEMBER( galpani2_state::galpani2_bg15_w )
91{
92   UINT16 newword = COMBINE_DATA(&m_bg15[offset]);
93
94   int x = (offset % 256) + (offset / (256*256)) * 256 ;
95   int y = (offset / 256) % 256;
96
97   m_bg15_bitmap->pix16(y, x) = 0x4200 + (newword & 0x7fff);
98}
99
100
101/***************************************************************************
102
103
63104                            Video Init Functions
64105
65106
r242139r242140
72113
73114   /* initialize 555 RGB lookup */
74115   for (i = 0; i < 0x8000; i++)
75      palette.set_pen_color(i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0));
116      palette.set_pen_color(0x4200+i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0));
76117}
77118
78119void galpani2_state::video_start()
79120{
121   m_bg15_bitmap  = auto_bitmap_ind16_alloc(machine(), 256*8, 256);
122   m_bg8_bitmap[0] = auto_bitmap_ind16_alloc(machine(), 512, 256);
123   m_bg8_bitmap[1] = auto_bitmap_ind16_alloc(machine(), 512, 256);
80124}
81125
82126
r242139r242140
88132
89133***************************************************************************/
90134
91// based on videos these 8-bit layers actually get *blended* against the RGB555 layer
92// it should be noted that in the layer at 0x500000 the upper 8 bits are set too, this could be related
93void galpani2_state::copybg8(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int layer)
135UINT32 galpani2_state::screen_update_galpani2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
94136{
95   int x = - ( *m_bg8_scrollx[layer] + 0x200 - 0x0f5 );
96   int y = - ( *m_bg8_scrolly[layer] + 0x200 - 0x1be );
97   UINT16* ram = m_bg8[layer];
98
99   const pen_t *clut = &m_bg8palette->pen(0);
100   for (int xx = 0; xx < 320; xx++)
101   {
102      for (int yy = 0; yy < 240; yy++)
103      {
104         UINT16 pen = ram[(((y + yy) & 0xff) * 512) + ((x + xx) & 0x1ff)];
105         if (pen) bitmap.pix32(yy, xx) = clut[pen & 0xff];
106      }
107   }
108}
109
110// this seems to be 256x256 pages (arranged as 1024*256), but the game resolution is 320x240
111// https://www.youtube.com/watch?v=2b2SLFtC0uA is a video of the galpanic2j set, and shows the RGB pattern at
112// startup covering all screen lines - is the hardware mixing bitmaps of different resolutions or is there a
113// line select somewhere?  I should find the gal images and find what resolution they're stored at too.
114// (or is this just wrong format / layout due to protection?)
115void galpani2_state::copybg15(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
116{
117   UINT16* ram = m_bg15 + 0x40000/2;
118   
119   //int x = 0;
120   //int y = 0;
121
122   const pen_t *clut = &m_bg15palette->pen(0);
123   for (int xx = 0; xx < 320; xx++)
124   {
125      for (int yy = 0; yy < 240; yy++)
126      {
127         UINT16 pen = ram[(xx * 0x800) + yy];
128         bitmap.pix32(yy, xx) = clut[pen & 0x7fff];
129      }
130   }
131}
132
133UINT32 galpani2_state::screen_update_galpani2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
134{
135137   int layers_ctrl = -1;
136138
137#if 1 // MAME_DEBUG
139#ifdef MAME_DEBUG
138140if (machine().input().code_pressed(KEYCODE_Z))
139141{
140142   int msk = 0;
r242139r242140
149151   bitmap.fill(0, cliprect);
150152   screen.priority().fill(0, cliprect);
151153
154   if (layers_ctrl & 0x1)
155   {
156      int x = 0;
157      int y = 0;
158      copyscrollbitmap_trans(bitmap, *m_bg15_bitmap,
159                        1, &x, 1, &y,
160                        cliprect,0x4200 + 0);
161   }
162
152163/*  test mode:
153164    304000:0040 0000 0100 0000-0000 0000 0000 0000      (Sprite regs)
154165    304010:16C0 0200 16C0 0200-16C0 0200 16C0 0200
155166    16c0/40 = 5b        200/40 = 8
156167    scrollx = f5, on screen x should be 0 (f5+5b = 150) */
157168
158   if (layers_ctrl & 0x1) copybg15(screen, bitmap, cliprect);
159   if (layers_ctrl & 0x2) copybg8(screen, bitmap, cliprect, 0);
160   if (layers_ctrl & 0x4) copybg8(screen, bitmap, cliprect, 1);
169   if (layers_ctrl & 0x2)
170   {
171      int x = - ( *m_bg8_scrollx[0] + 0x200 - 0x0f5 );
172      int y = - ( *m_bg8_scrolly[0] + 0x200 - 0x1be );
173      copyscrollbitmap_trans(bitmap, *m_bg8_bitmap[0],
174                        1, &x, 1, &y,
175                        cliprect,0x4000 + 0);
176   }
177
178   if (layers_ctrl & 0x4)
179   {
180      int x = - ( *m_bg8_scrollx[1] + 0x200 - 0x0f5 );
181      int y = - ( *m_bg8_scrolly[1] + 0x200 - 0x1be );
182      copyscrollbitmap_trans(bitmap, *m_bg8_bitmap[1],
183                        1, &x, 1, &y,
184                        cliprect,0x4000 + 0);
185   }
186
161187   if (layers_ctrl & 0x8) m_kaneko_spr->kaneko16_render_sprites(bitmap, cliprect, screen.priority(), m_spriteram, m_spriteram.bytes());
162188   return 0;
163189}
trunk/src/mame/video/tankbust.c
r242139r242140
194194
195195      color = 0;
196196
197      //0x02 - dont know (most of the time this bit is set in tank sprite and others but not all and not always)
197      //0x02 - don't know (most of the time this bit is set in tank sprite and others but not all and not always)
198198      //0x04 - not used
199199      //0x08 - not used
200200      //0x10 - not used
trunk/src/mess/audio/upd1771.c
r242139r242140
2020    it is perfectly possible to generate other sounds with different rom code and data.
2121
2222    Most upd17XXX devices are typically 4bit NEC MCUs, however based on information
23    in in "Electronic Speech Synthesis" by Geoff Bristow (ISBN 0-07-007912-9, pages 148-152)
23    in "Electronic Speech Synthesis" by Geoff Bristow (ISBN 0-07-007912-9, pages 148-152)
2424    the upd1770/1771 is not one of these 4-bit ones.
2525
2626    The uPD1770/uPD1771 SSM is a 16-bit-wide rom/ram mcu with 8kb (4kw) of rom code,
r242139r242140
138138    pin  6 is tied to the   PC3 pin of the upD7801 CPU
139139    pin 26 is tied to the  INT1 pin of the upD7801 (CPU pin 12),
140140
141    1,2,3,28,27 dont generate any digital signals
141    1,2,3,28,27 don't generate any digital signals
142142    6 seems to be lowered 2.5 ms before an audio write
143143    7  is always low.
144144    12 is always high
r242139r242140
404404            m_t_timbre = (m_packet[1] & 0xe0) >> 5;
405405            m_t_offset = (m_packet[1] & 0x1f);
406406            m_t_period = m_packet[2];
407            //smaller periods dont all equal to 0x20
407            //smaller periods don't all equal to 0x20
408408            if (m_t_period < 0x20)
409409               m_t_period = 0x20;
410410
trunk/src/mess/tools/imgtool/modules/os9.c
r242139r242140
673673      return IMGTOOLERR_OUTOFMEMORY;
674674   memset(info->allocation_bitmap, 0, info->allocation_bitmap_bytes);
675675
676   /* sectors per track and track size dont jive? */
676   /* sectors per track and track size don't jive? */
677677   if (info->sectors_per_track != track_size_in_sectors)
678678      return IMGTOOLERR_CORRUPTIMAGE;
679679

https://github.com/mamedev/mame/commit/52e9bfd75d2b0d19323c2b74fa026427aa28c560

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