trunk/src/emu/machine/pla.c
| r241899 | r241900 | |
| 2 | 2 | // copyright-holders:Curt Coder |
| 3 | 3 | /********************************************************************** |
| 4 | 4 | |
| 5 | | PLS100 16x48x8 Programmable Logic Array emulation |
| 5 | PLA (Programmable Logic Array) emulation |
| 6 | 6 | |
| 7 | 7 | Copyright MESS Team. |
| 8 | 8 | Visit http://mamedev.org for licensing and usage restrictions. |
| r241899 | r241900 | |
| 10 | 10 | **********************************************************************/ |
| 11 | 11 | |
| 12 | 12 | #include "pla.h" |
| 13 | #include "jedparse.h" |
| 14 | #include "plaparse.h" |
| 13 | 15 | |
| 14 | 16 | |
| 17 | const device_type PLA = &device_creator<pla_device>; |
| 15 | 18 | |
| 16 | | //************************************************************************** |
| 17 | | // DEVICE TYPE DEFINITIONS |
| 18 | | //************************************************************************** |
| 19 | | |
| 20 | | const device_type PLS100 = &device_creator<pls100_device>; |
| 21 | | const device_type MOS8721 = &device_creator<mos8721_device>; |
| 22 | | |
| 23 | | |
| 24 | | |
| 25 | | //************************************************************************** |
| 26 | | // LIVE DEVICE |
| 27 | | //************************************************************************** |
| 28 | | |
| 29 | 19 | //------------------------------------------------- |
| 30 | 20 | // pla_device - constructor |
| 31 | 21 | //------------------------------------------------- |
| 32 | 22 | |
| 33 | | pla_device::pla_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int inputs, int outputs, int terms, UINT32 input_mask, const char *shortname, const char *source) : |
| 34 | | device_t(mconfig, type, name, tag, owner, clock, shortname, source), |
| 35 | | m_inputs(inputs), |
| 36 | | m_outputs(outputs), |
| 37 | | m_terms(terms), |
| 38 | | m_input_mask(((UINT64)input_mask << 32) | input_mask) |
| 23 | pla_device::pla_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 24 | : device_t(mconfig, PLA, "PLA", tag, owner, clock, "pla", __FILE__), |
| 25 | m_format(PLA_FMT_JEDBIN), |
| 26 | m_inputs(0), |
| 27 | m_outputs(0), |
| 28 | m_terms(0), |
| 29 | m_input_mask(0) |
| 39 | 30 | { |
| 40 | 31 | } |
| 41 | 32 | |
| 42 | | pls100_device::pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : |
| 43 | | pla_device(mconfig, PLS100, "PLS100", tag, owner, clock, 16, 8, 48, 0xffff, "pls100", __FILE__), |
| 44 | | m_output(*this, "output") |
| 45 | | { |
| 46 | | } |
| 47 | 33 | |
| 48 | | mos8721_device::mos8721_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : |
| 49 | | pla_device(mconfig, MOS8721, "MOS8721", tag, owner, clock, 27, 18, 379, 0x7ffffff, "mos8721", __FILE__) // TODO actual number of terms is unknown |
| 50 | | { |
| 51 | | } |
| 52 | | |
| 53 | | |
| 54 | 34 | //------------------------------------------------- |
| 55 | 35 | // device_start - device-specific startup |
| 56 | 36 | //------------------------------------------------- |
| 57 | 37 | |
| 58 | 38 | void pla_device::device_start() |
| 59 | 39 | { |
| 60 | | assert(machine().root_device().memregion(tag()) != NULL); |
| 40 | assert(region() != NULL); |
| 41 | assert(m_terms < MAX_TERMS); |
| 42 | assert(m_inputs < 32 && m_outputs <= 32); |
| 61 | 43 | |
| 44 | if (m_input_mask == 0) |
| 45 | m_input_mask = ((UINT64)1 << m_inputs) - 1; |
| 46 | m_input_mask = ((UINT64)m_input_mask << 32) | m_input_mask; |
| 47 | |
| 62 | 48 | // parse fusemap |
| 63 | 49 | parse_fusemap(); |
| 64 | 50 | |
| 65 | | // clear cache |
| 66 | | for (int i = 0; i < CACHE_SIZE; i++) |
| 67 | | { |
| 68 | | m_cache[i] = 0; |
| 69 | | } |
| 51 | // initialize cache |
| 52 | m_cache2_ptr = 0; |
| 53 | for (int i = 0; i < CACHE2_SIZE; i++) |
| 54 | m_cache2[i] = 0x80000000; |
| 70 | 55 | |
| 71 | | m_cache_ptr = 0; |
| 56 | m_cache_size = 0; |
| 57 | int csize = 1 << ((m_inputs > MAX_CACHE_BITS) ? MAX_CACHE_BITS : m_inputs); |
| 58 | m_cache.resize(csize); |
| 59 | for (int i = 0; i < csize; i++) |
| 60 | m_cache[i] = read(i); |
| 61 | |
| 62 | m_cache_size = csize; |
| 72 | 63 | } |
| 73 | 64 | |
| 74 | | void pls100_device::device_start() |
| 75 | | { |
| 76 | | pla_device::device_start(); |
| 77 | 65 | |
| 78 | | m_output.allocate(0x10000); |
| 79 | | |
| 80 | | for (UINT32 input = 0; input < 0x10000; input++) |
| 81 | | { |
| 82 | | m_output[input] = pla_device::read(input); |
| 83 | | } |
| 84 | | } |
| 85 | | |
| 86 | | |
| 87 | 66 | //------------------------------------------------- |
| 88 | 67 | // parse_fusemap - |
| 89 | 68 | //------------------------------------------------- |
| 90 | 69 | |
| 91 | 70 | void pla_device::parse_fusemap() |
| 92 | 71 | { |
| 93 | | memory_region *region = machine().root_device().memregion(tag()); |
| 94 | 72 | jed_data jed; |
| 95 | | |
| 96 | | jedbin_parse(region->base(), region->bytes(), &jed); |
| 97 | | |
| 73 | int result = JEDERR_NONE; |
| 74 | |
| 75 | // read pla file |
| 76 | switch (m_format) |
| 77 | { |
| 78 | case PLA_FMT_JEDBIN: |
| 79 | result = jedbin_parse(region()->base(), region()->bytes(), &jed); |
| 80 | break; |
| 81 | |
| 82 | case PLA_FMT_BERKELEY: |
| 83 | result = pla_parse(region()->base(), region()->bytes(), &jed); |
| 84 | break; |
| 85 | } |
| 86 | |
| 87 | if (result != JEDERR_NONE) |
| 88 | fatalerror("%s PLA parse error %d\n", tag(), result); |
| 89 | |
| 90 | // parse it |
| 98 | 91 | UINT32 fusenum = 0; |
| 99 | 92 | |
| 100 | 93 | for (int p = 0; p < m_terms; p++) |
| r241899 | r241900 | |
| 143 | 136 | UINT32 pla_device::read(UINT32 input) |
| 144 | 137 | { |
| 145 | 138 | // try the cache first |
| 146 | | for (int i = 0; i < CACHE_SIZE; ++i) |
| 139 | if (input < m_cache_size) |
| 140 | return m_cache[input]; |
| 141 | |
| 142 | for (int i = 0; i < CACHE2_SIZE; ++i) |
| 147 | 143 | { |
| 148 | | UINT64 cache_entry = m_cache[i]; |
| 144 | UINT64 cache2_entry = m_cache2[i]; |
| 149 | 145 | |
| 150 | | if ((UINT32)cache_entry == input) |
| 146 | if ((UINT32)cache2_entry == input) |
| 151 | 147 | { |
| 152 | | // cache hit |
| 153 | | return cache_entry >> 32; |
| 148 | // cache2 hit |
| 149 | return cache2_entry >> 32; |
| 154 | 150 | } |
| 155 | 151 | } |
| 156 | 152 | |
| r241899 | r241900 | |
| 170 | 166 | |
| 171 | 167 | s ^= m_xor; |
| 172 | 168 | |
| 173 | | // store output in cache |
| 174 | | m_cache[m_cache_ptr] = s | input; |
| 175 | | ++m_cache_ptr &= (CACHE_SIZE - 1); |
| 169 | // store output in cache2 |
| 170 | m_cache2[m_cache2_ptr] = s | input; |
| 171 | ++m_cache2_ptr &= (CACHE2_SIZE - 1); |
| 176 | 172 | |
| 177 | 173 | return s >> 32; |
| 178 | 174 | } |
| 179 | | |
| 180 | | |
| 181 | | //------------------------------------------------- |
| 182 | | // read - |
| 183 | | //------------------------------------------------- |
| 184 | | |
| 185 | | UINT32 pls100_device::read(UINT32 input) |
| 186 | | { |
| 187 | | return m_output[input]; |
| 188 | | } |
trunk/src/emu/machine/pla.h
| r241899 | r241900 | |
| 2 | 2 | // copyright-holders:Curt Coder |
| 3 | 3 | /********************************************************************** |
| 4 | 4 | |
| 5 | | PLS100 16x48x8 Programmable Logic Array emulation |
| 5 | PLA (Programmable Logic Array) emulation |
| 6 | 6 | |
| 7 | 7 | Copyright MESS Team. |
| 8 | 8 | Visit http://mamedev.org for licensing and usage restrictions. |
| 9 | 9 | |
| 10 | | ********************************************************************** |
| 11 | | _____ _____ |
| 12 | | FE 1 |* \_/ | 28 Vcc |
| 13 | | I7 2 | | 27 I8 |
| 14 | | I6 3 | | 26 I9 |
| 15 | | I5 4 | | 25 I10 |
| 16 | | I4 5 | | 24 I11 |
| 17 | | I3 6 | 82S100 | 23 I12 |
| 18 | | I2 7 | 82S101 | 22 I13 |
| 19 | | I1 8 | PLS100 | 21 I14 |
| 20 | | I0 9 | PLS101 | 20 I15 |
| 21 | | F7 10 | | 19 _CE |
| 22 | | F6 11 | | 18 F0 |
| 23 | | F5 12 | | 17 F1 |
| 24 | | F4 13 | | 16 F2 |
| 25 | | GND 14 |_____________| 15 F3 |
| 26 | | |
| 27 | 10 | **********************************************************************/ |
| 28 | 11 | |
| 29 | 12 | #pragma once |
| r241899 | r241900 | |
| 32 | 15 | #define __PLA__ |
| 33 | 16 | |
| 34 | 17 | #include "emu.h" |
| 35 | | #include "jedparse.h" |
| 36 | 18 | |
| 37 | 19 | |
| 38 | 20 | |
| r241899 | r241900 | |
| 41 | 23 | //************************************************************************** |
| 42 | 24 | |
| 43 | 25 | #define MAX_TERMS 512 |
| 44 | | #define CACHE_SIZE 8 |
| 26 | #define MAX_CACHE_BITS 16 |
| 27 | #define CACHE2_SIZE 8 |
| 45 | 28 | |
| 29 | enum |
| 30 | { |
| 31 | PLA_FMT_JEDBIN = 0, |
| 32 | PLA_FMT_BERKELEY |
| 33 | }; |
| 46 | 34 | |
| 47 | 35 | |
| 36 | |
| 48 | 37 | ///************************************************************************* |
| 49 | 38 | // INTERFACE CONFIGURATION MACROS |
| 50 | 39 | ///************************************************************************* |
| 51 | 40 | |
| 41 | #define MCFG_PLA_ADD(_tag, _inputs, _outputs, _terms) \ |
| 42 | MCFG_DEVICE_ADD(_tag, PLA, 0) \ |
| 43 | pla_device::set_num_inputs(*device, _inputs); \ |
| 44 | pla_device::set_num_outputs(*device, _outputs); \ |
| 45 | pla_device::set_num_terms(*device, _terms); |
| 46 | |
| 47 | #define MCFG_PLA_INPUTMASK(_mask) \ |
| 48 | pla_device::set_inputmask(*device, _mask); |
| 49 | |
| 50 | #define MCFG_PLA_FILEFORMAT(_format) \ |
| 51 | pla_device::set_format(*device, _format); |
| 52 | |
| 53 | |
| 54 | // macros for known (and used) devices |
| 55 | |
| 56 | // 82S100, 82S101, PLS100, PLS101 |
| 57 | // 16x48x8 PLA, 28-pin |
| 52 | 58 | #define MCFG_PLS100_ADD(_tag) \ |
| 53 | | MCFG_DEVICE_ADD(_tag, PLS100, 0) |
| 59 | MCFG_PLA_ADD(_tag, 16, 8, 48) |
| 54 | 60 | |
| 61 | // MOS 8721 PLA |
| 62 | // TODO: actual number of terms is unknown |
| 55 | 63 | #define MCFG_MOS8721_ADD(_tag) \ |
| 56 | | MCFG_DEVICE_ADD(_tag, MOS8721, 0) |
| 64 | MCFG_PLA_ADD(_tag, 27, 18, 379) |
| 57 | 65 | |
| 58 | 66 | |
| 67 | |
| 59 | 68 | ///************************************************************************* |
| 60 | 69 | // TYPE DEFINITIONS |
| 61 | 70 | ///************************************************************************* |
| 62 | 71 | |
| 63 | 72 | // ======================> pla_device |
| 64 | 73 | |
| 65 | | class pla_device : public device_t |
| 74 | class pla_device : public device_t |
| 66 | 75 | { |
| 67 | 76 | public: |
| 68 | 77 | // construction/destruction |
| 69 | | pla_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int inputs, int outputs, int terms, UINT32 output_mask, const char *shortname, const char *source); |
| 78 | pla_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 70 | 79 | |
| 71 | | virtual UINT32 read(UINT32 input); |
| 80 | // static configuration helpers |
| 81 | static void set_num_inputs(device_t &device, UINT32 i) { downcast<pla_device &>(device).m_inputs = i; } |
| 82 | static void set_num_outputs(device_t &device, UINT32 o) { downcast<pla_device &>(device).m_outputs = o; } |
| 83 | static void set_num_terms(device_t &device, UINT32 t) { downcast<pla_device &>(device).m_terms = t; } |
| 84 | static void set_inputmask(device_t &device, UINT32 mask) { downcast<pla_device &>(device).m_input_mask = mask; } // UINT32! |
| 85 | static void set_format(device_t &device, int format) { downcast<pla_device &>(device).m_format = format; } |
| 72 | 86 | |
| 87 | UINT32 read(UINT32 input); |
| 88 | |
| 73 | 89 | protected: |
| 74 | 90 | // device-level overrides |
| 75 | 91 | virtual void device_start(); |
| 76 | 92 | |
| 93 | private: |
| 77 | 94 | void parse_fusemap(); |
| 78 | 95 | |
| 79 | | int m_inputs; |
| 80 | | int m_outputs; |
| 81 | | int m_terms; |
| 96 | int m_format; |
| 97 | |
| 98 | UINT32 m_inputs; |
| 99 | UINT32 m_outputs; |
| 100 | UINT32 m_terms; |
| 82 | 101 | UINT64 m_input_mask; |
| 83 | 102 | UINT64 m_xor; |
| 84 | 103 | |
| 104 | int m_cache_size; |
| 105 | dynamic_array<UINT32> m_cache; |
| 106 | UINT64 m_cache2[CACHE2_SIZE]; |
| 107 | UINT8 m_cache2_ptr; |
| 108 | |
| 85 | 109 | struct term |
| 86 | 110 | { |
| 87 | 111 | UINT64 m_and; |
| 88 | 112 | UINT64 m_or; |
| 89 | | }; |
| 90 | | |
| 91 | | term m_term[MAX_TERMS]; |
| 92 | | |
| 93 | | UINT64 m_cache[CACHE_SIZE]; |
| 94 | | UINT8 m_cache_ptr; |
| 113 | } m_term[MAX_TERMS]; |
| 95 | 114 | }; |
| 96 | 115 | |
| 97 | 116 | |
| 98 | | // ======================> pls100_device |
| 99 | | |
| 100 | | class pls100_device : public pla_device |
| 101 | | { |
| 102 | | public: |
| 103 | | pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 104 | | |
| 105 | | // device-level overrides |
| 106 | | virtual void device_start(); |
| 107 | | |
| 108 | | virtual UINT32 read(UINT32 input); |
| 109 | | |
| 110 | | private: |
| 111 | | optional_shared_ptr<UINT8> m_output; |
| 112 | | }; |
| 113 | | |
| 114 | | |
| 115 | | // ======================> mos8721_device |
| 116 | | |
| 117 | | class mos8721_device : public pla_device |
| 118 | | { |
| 119 | | public: |
| 120 | | mos8721_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 121 | | }; |
| 122 | | |
| 123 | | |
| 124 | 117 | // device type definition |
| 125 | | extern const device_type PLS100; |
| 126 | | extern const device_type MOS8721; |
| 118 | extern const device_type PLA; |
| 127 | 119 | |
| 128 | 120 | |
| 129 | | |
| 130 | 121 | #endif |
trunk/src/mame/drivers/alinvade.c
| r241899 | r241900 | |
| 4 | 4 | |
| 5 | 5 | does it use any off-the shelf chips in addition to the 6502? |
| 6 | 6 | |
| 7 | Driver by David Haywood and Mariusz Wojcieszek |
| 7 | 8 | |
| 8 | 9 | */ |
| 9 | 10 | |
| r241899 | r241900 | |
| 14 | 15 | { |
| 15 | 16 | public: |
| 16 | 17 | alinvade_state(const machine_config &mconfig, device_type type, const char *tag) |
| 17 | | : driver_device(mconfig, type, tag) |
| 18 | : driver_device(mconfig, type, tag), |
| 19 | m_videoram(*this, "videoram") |
| 18 | 20 | { } |
| 19 | 21 | |
| 22 | required_shared_ptr<UINT8> m_videoram; |
| 20 | 23 | |
| 21 | 24 | public: |
| 22 | 25 | virtual void machine_start(); |
| r241899 | r241900 | |
| 27 | 30 | |
| 28 | 31 | |
| 29 | 32 | static ADDRESS_MAP_START( alinvade_map, AS_PROGRAM, 8, alinvade_state ) |
| 30 | | AM_RANGE(0x0000, 0x0fff) AM_RAM |
| 31 | | AM_RANGE(0xe000, 0xe3ff) AM_ROM |
| 32 | | AM_RANGE(0xe800, 0xebff) AM_RAM |
| 33 | | AM_RANGE(0xec00, 0xffff) AM_ROM |
| 33 | AM_RANGE(0x0000, 0x01ff) AM_RAM |
| 34 | AM_RANGE(0x0400, 0x0bff) AM_RAM AM_SHARE("videoram") |
| 35 | AM_RANGE(0x0c00, 0x0dff) AM_RAM |
| 36 | AM_RANGE(0x2000, 0x2000) AM_WRITENOP //?? |
| 37 | AM_RANGE(0x4000, 0x4000) AM_READ_PORT("COIN") |
| 38 | AM_RANGE(0x6000, 0x6000) AM_READ_PORT("DSW") |
| 39 | AM_RANGE(0x8000, 0x8000) AM_READ_PORT("IN0") |
| 40 | AM_RANGE(0x8001, 0x8001) AM_READ_PORT("IN1") |
| 41 | AM_RANGE(0x8002, 0x8002) AM_READ_PORT("IN2") |
| 42 | AM_RANGE(0x8003, 0x8003) AM_READ_PORT("IN3") |
| 43 | AM_RANGE(0x8004, 0x8004) AM_READ_PORT("IN4") |
| 44 | AM_RANGE(0xa000, 0xa000) AM_WRITENOP //?? |
| 45 | AM_RANGE(0xc400, 0xc7ff) AM_ROM |
| 46 | AM_RANGE(0xc800, 0xcbff) AM_ROM |
| 47 | AM_RANGE(0xe000, 0xe3ff) AM_ROM |
| 48 | AM_RANGE(0xe400, 0xe400) AM_WRITENOP //?? |
| 49 | AM_RANGE(0xe800, 0xe800) AM_READNOP AM_WRITENOP //?? |
| 50 | AM_RANGE(0xec00, 0xffff) AM_ROM |
| 51 | ADDRESS_MAP_END |
| 34 | 52 | |
| 35 | 53 | |
| 36 | | ADDRESS_MAP_END |
| 54 | static INPUT_PORTS_START( alinvade ) |
| 55 | PORT_START("COIN") |
| 56 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_COIN1 ) |
| 57 | PORT_BIT(0xef, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 37 | 58 | |
| 59 | PORT_START("IN0") |
| 60 | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) |
| 61 | PORT_BIT(0xdf, IP_ACTIVE_HIGH, IPT_UNKNOWN ) |
| 38 | 62 | |
| 39 | | static INPUT_PORTS_START( alinvade ) |
| 63 | PORT_START("IN1") |
| 64 | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(1) |
| 65 | PORT_BIT(0xdf, IP_ACTIVE_HIGH, IPT_UNKNOWN ) |
| 66 | |
| 67 | PORT_START("IN2") |
| 68 | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(1) |
| 69 | PORT_BIT(0xdf, IP_ACTIVE_HIGH, IPT_UNKNOWN ) |
| 70 | |
| 71 | PORT_START("IN3") |
| 72 | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_START1 ) |
| 73 | PORT_BIT(0xdf, IP_ACTIVE_HIGH, IPT_UNKNOWN ) |
| 74 | |
| 75 | PORT_START("IN4") |
| 76 | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_START2 ) |
| 77 | PORT_BIT(0xdf, IP_ACTIVE_HIGH, IPT_UNKNOWN ) |
| 78 | |
| 79 | PORT_START("DSW") |
| 80 | PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) |
| 81 | PORT_DIPSETTING( 0x00, "2" ) |
| 82 | PORT_DIPSETTING( 0x01, "3" ) |
| 83 | PORT_DIPSETTING( 0x02, "4" ) |
| 84 | PORT_DIPSETTING( 0x03, "5" ) |
| 85 | PORT_DIPNAME( 0x04, 0x00, DEF_STR ( Unknown ) ) // read, but not tested afterwards? |
| 86 | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 87 | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 88 | PORT_BIT( 0xf8, IP_ACTIVE_HIGH, IPT_UNUSED ) |
| 40 | 89 | INPUT_PORTS_END |
| 41 | 90 | |
| 42 | 91 | |
| 43 | | |
| 44 | 92 | void alinvade_state::machine_start() |
| 45 | 93 | { |
| 46 | 94 | } |
| r241899 | r241900 | |
| 51 | 99 | |
| 52 | 100 | UINT32 alinvade_state::screen_update_alinvade(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 53 | 101 | { |
| 102 | offs_t offs; |
| 103 | |
| 104 | for (offs = 0; offs < m_videoram.bytes(); offs++) |
| 105 | { |
| 106 | int i; |
| 107 | |
| 108 | UINT8 x = (offs << 3)&0x7f; |
| 109 | int y = (offs >> 4)&0x7f; |
| 110 | UINT8 data = m_videoram[offs]; |
| 111 | |
| 112 | for (i = 0; i < 8; i++) |
| 113 | { |
| 114 | pen_t pen = (data & 0x01) ? rgb_t::white : rgb_t::black; |
| 115 | bitmap.pix32(y, x) = pen; |
| 116 | |
| 117 | data = data >> 1; |
| 118 | x = x + 1; |
| 119 | } |
| 120 | } |
| 121 | |
| 122 | |
| 54 | 123 | return 0; |
| 55 | 124 | } |
| 56 | 125 | |
| r241899 | r241900 | |
| 66 | 135 | MCFG_SCREEN_ADD("screen", RASTER) |
| 67 | 136 | MCFG_SCREEN_REFRESH_RATE(60) |
| 68 | 137 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) |
| 69 | | MCFG_SCREEN_SIZE(256, 256) |
| 70 | | MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 16, 256-16-1) |
| 138 | MCFG_SCREEN_SIZE(128, 128) |
| 139 | MCFG_SCREEN_VISIBLE_AREA(0, 128-1, 0, 128-1) |
| 71 | 140 | MCFG_SCREEN_UPDATE_DRIVER(alinvade_state, screen_update_alinvade) |
| 72 | 141 | |
| 73 | 142 | /* sound hardware */ |
| r241899 | r241900 | |
| 77 | 146 | |
| 78 | 147 | |
| 79 | 148 | ROM_START( alinvade ) |
| 80 | | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 81 | | ROM_LOAD( "alien28.708", 0xe000, 0x0400, CRC(de376295) SHA1(e8eddbb1be1f8661c6b5b39c0d78a65bded65db2) ) |
| 82 | | ROM_LOAD( "alien29.708", 0xec00, 0x0400, CRC(20212977) SHA1(9d24a6b403d968267079fa6241545bd5a01afebb) ) |
| 83 | | ROM_LOAD( "alien30.708", 0xf000, 0x0400, CRC(734b691c) SHA1(9e562159061eecf4b1dee4ea0ee4752c901a54aa) ) |
| 84 | | ROM_LOAD( "alien31.708", 0xf400, 0x0400, CRC(5a70535c) SHA1(2827e7d4bffca78bd035da04481e1e972ee2da39) ) |
| 85 | | ROM_LOAD( "alien32.708", 0xf800, 0x0400, CRC(332dd234) SHA1(9974668344a2a351868a9e7757d1c3a497dc5621) ) |
| 86 | | ROM_LOAD( "alien33.708", 0xfc00, 0x0400, CRC(e0d57fc7) SHA1(7b8ddcb4a86811592d2d0bbc61b2f19e5caa9ccc) ) |
| 149 | ROM_REGION( 0x10000, "maincpu", 0 ) // todo, check mapping |
| 150 | |
| 151 | ROM_FILL( 0xc400, 0x800, 0x60 ) // rts for whole area, interrupt code jumps to various addresses here |
| 152 | |
| 153 | ROM_LOAD( "alien28.708", 0xe000, 0x0400, CRC(de376295) SHA1(e8eddbb1be1f8661c6b5b39c0d78a65bded65db2) ) |
| 154 | ROM_LOAD( "alien29.708", 0xec00, 0x0400, CRC(20212977) SHA1(9d24a6b403d968267079fa6241545bd5a01afebb) ) |
| 155 | ROM_LOAD( "alien30.708", 0xf000, 0x0400, CRC(734b691c) SHA1(9e562159061eecf4b1dee4ea0ee4752c901a54aa) ) |
| 156 | ROM_LOAD( "alien31.708", 0xf400, 0x0400, CRC(5a70535c) SHA1(2827e7d4bffca78bd035da04481e1e972ee2da39) ) |
| 157 | ROM_LOAD( "alien32.708", 0xf800, 0x0400, CRC(332dd234) SHA1(9974668344a2a351868a9e7757d1c3a497dc5621) ) |
| 158 | ROM_LOAD( "alien33.708", 0xfc00, 0x0400, CRC(e0d57fc7) SHA1(7b8ddcb4a86811592d2d0bbc61b2f19e5caa9ccc) ) |
| 87 | 159 | ROM_END |
| 88 | 160 | |
| 89 | 161 | |
| 90 | | GAME( 198?, alinvade, 0, alinvade, alinvade, driver_device, 0, ROT0, "Forbes?", "Alien Invaders", GAME_NOT_WORKING ) |
| 162 | GAME( 198?, alinvade, 0, alinvade, alinvade, driver_device, 0, ROT90, "Forbes?", "Alien Invaders", GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS ) |
trunk/src/mame/drivers/cps2.c
| r241899 | r241900 | |
| 317 | 317 | have the ROM details over 2 lines, in this case 'SSFA' would be on the first line and '03B' |
| 318 | 318 | on the second line. Each part of this label name is detailed below... |
| 319 | 319 | |
| 320 | | SSF - The game title shortened to 3 characters, this game is 'Super Street Fighter 2'. |
| 320 | SSF - The game title shortened to 3 characters, this game is 'Super Street Fighter II'. |
| 321 | 321 | |
| 322 | 322 | A - The region of the game, in this case 'Asia'. Known regions are... |
| 323 | 323 | J = Japan E = ETC (World and Euro) |
| r241899 | r241900 | |
| 498 | 498 | There is sufficient space next to the B-Board to enable this board to plug into the B-Board |
| 499 | 499 | into CN7 and still be fully enclosed inside the housing. The housing has holes in it to allow |
| 500 | 500 | the TX, RX and Register connectors to be accessed without opening the case. |
| 501 | | This board is known to be used with "Super Street Fighter 2 : The Tournament Battle" and some |
| 501 | This board is known to be used with "Super Street Fighter II : The Tournament Battle" and some |
| 502 | 502 | yellow rent boards also have this daughter board attached. |
| 503 | 503 | |
| 504 | 504 | SCN1 - Network Data IN |
| r241899 | r241900 | |
| 8822 | 8822 | GAME( 1998, sfz3a, sfa3, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Street Fighter Zero 3 (Asia 980904)", GAME_SUPPORTS_SAVE ) |
| 8823 | 8823 | GAME( 1998, sfz3ar1, sfa3, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Street Fighter Zero 3 (Asia 980701)", GAME_SUPPORTS_SAVE ) |
| 8824 | 8824 | GAME( 1999, jyangoku, 0, cps2, cps2_1p2b, cps_state, cps2, ROT0, "Capcom", "Jyangokushi: Haoh no Saihai (Japan 990527)", GAME_SUPPORTS_SAVE ) |
| 8825 | | GAME( 2004, hsf2, 0, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Hyper Street Fighter 2: The Anniversary Edition (USA 040202)", GAME_SUPPORTS_SAVE ) |
| 8826 | | GAME( 2004, hsf2a, hsf2, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Hyper Street Fighter 2: The Anniversary Edition (Asia 040202)", GAME_SUPPORTS_SAVE ) |
| 8827 | | GAME( 2004, hsf2j, hsf2, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Hyper Street Fighter 2: The Anniversary Edition (Japan 031222)", GAME_SUPPORTS_SAVE ) |
| 8825 | GAME( 2004, hsf2, 0, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Hyper Street Fighter II: The Anniversary Edition (USA 040202)", GAME_SUPPORTS_SAVE ) |
| 8826 | GAME( 2004, hsf2a, hsf2, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Hyper Street Fighter II: The Anniversary Edition (Asia 040202)", GAME_SUPPORTS_SAVE ) |
| 8827 | GAME( 2004, hsf2j, hsf2, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Hyper Street Fighter II: The Anniversary Edition (Japan 031222)", GAME_SUPPORTS_SAVE ) |
| 8828 | 8828 | |
| 8829 | 8829 | /* Games released on CPS-2 hardware by Takumi */ |
| 8830 | 8830 | |
trunk/src/mame/drivers/dynax.c
| r241899 | r241900 | |
| 482 | 482 | AM_RANGE( 0x8000, 0x81ff ) AM_WRITE(yarunara_palette_w) // Palette or RTC |
| 483 | 483 | ADDRESS_MAP_END |
| 484 | 484 | |
| 485 | //identical to yarunara, but nvram is in the 0x6000 - 0x6fff range |
| 486 | static ADDRESS_MAP_START( quiztvqq_mem_map, AS_PROGRAM, 8, dynax_state ) |
| 487 | AM_RANGE( 0x0000, 0x5fff ) AM_ROM |
| 488 | AM_RANGE( 0x6000, 0x6fff ) AM_RAM AM_SHARE("nvram") |
| 489 | AM_RANGE( 0x7000, 0x7fff ) AM_RAM |
| 490 | AM_RANGE( 0x8000, 0xffff ) AM_ROMBANK("bank1") |
| 491 | AM_RANGE( 0x8000, 0x81ff ) AM_WRITE(yarunara_palette_w) // Palette or RTC |
| 492 | ADDRESS_MAP_END |
| 493 | |
| 485 | 494 | static ADDRESS_MAP_START( jantouki_mem_map, AS_PROGRAM, 8, dynax_state ) |
| 486 | 495 | AM_RANGE( 0x0000, 0x5fff ) AM_ROM |
| 487 | 496 | AM_RANGE( 0x6000, 0x6fff ) AM_RAM |
| r241899 | r241900 | |
| 4328 | 4337 | MCFG_DEVICE_ADD("rtc", MSM6242, XTAL_32_768kHz) |
| 4329 | 4338 | MACHINE_CONFIG_END |
| 4330 | 4339 | |
| 4340 | static MACHINE_CONFIG_DERIVED( quiztvqq, yarunara ) |
| 4331 | 4341 | |
| 4342 | /* basic machine hardware */ |
| 4343 | MCFG_CPU_MODIFY("maincpu") |
| 4344 | MCFG_CPU_PROGRAM_MAP(quiztvqq_mem_map) |
| 4345 | MACHINE_CONFIG_END |
| 4346 | |
| 4347 | |
| 4332 | 4348 | /*************************************************************************** |
| 4333 | 4349 | Mahjong Campus Hunting |
| 4334 | 4350 | ***************************************************************************/ |
| r241899 | r241900 | |
| 6902 | 6918 | GAME( 1991, mjdialq2, 0, mjdialq2, mjdialq2, driver_device, 0, ROT180, "Dynax", "Mahjong Dial Q2 (Japan)", GAME_SUPPORTS_SAVE ) |
| 6903 | 6919 | GAME( 1991, yarunara, 0, yarunara, yarunara, driver_device, 0, ROT180, "Dynax", "Mahjong Yarunara (Japan)", GAME_SUPPORTS_SAVE ) |
| 6904 | 6920 | GAME( 1991, mjangels, 0, yarunara, yarunara, driver_device, 0, ROT180, "Dynax", "Mahjong Angels - Comic Theater Vol.2 (Japan)", GAME_SUPPORTS_SAVE ) |
| 6905 | | GAME( 1992, quiztvqq, 0, yarunara, quiztvqq, driver_device, 0, ROT180, "Dynax", "Quiz TV Gassyuukoku Q&Q (Japan)", GAME_SUPPORTS_SAVE ) |
| 6921 | GAME( 1992, quiztvqq, 0, quiztvqq, quiztvqq, driver_device, 0, ROT180, "Dynax", "Quiz TV Gassyuukoku Q&Q (Japan)", GAME_SUPPORTS_SAVE ) |
| 6906 | 6922 | GAME( 1993, mjelctrn, 0, mjelctrn, mjelctrn, dynax_state, mjelct3, ROT180, "Dynax", "Mahjong Electron Base (parts 2 & 4, Japan)", GAME_SUPPORTS_SAVE ) |
| 6907 | 6923 | GAME( 1990, mjelct3, mjelctrn, mjelctrn, mjelct3, dynax_state, mjelct3, ROT180, "Dynax", "Mahjong Electron Base (parts 2 & 3, Japan)", GAME_SUPPORTS_SAVE ) |
| 6908 | 6924 | GAME( 1990, mjelct3a, mjelctrn, mjelctrn, mjelct3, dynax_state, mjelct3a, ROT180, "Dynax", "Mahjong Electron Base (parts 2 & 3, alt., Japan)", GAME_SUPPORTS_SAVE ) |
trunk/src/mame/drivers/lethal.c
| r241899 | r241900 | |
| 109 | 109 | ---------------- --- -------- --------- ----------------------- |
| 110 | 110 | 000xxxxxxxxxxxxx R xxxxxxxx PROM program ROM (banked) |
| 111 | 111 | 001xxxxxxxxxxxxx R/W xxxxxxxx WRAM work RAM |
| 112 | | 010000--00xxxxxx W xxxxxxxx VREG 056832 control |
| 113 | | 010000--01--xxxx W xxxxxxxx VSCG 056832 control |
| 112 | 010000--00xxxxxx W xxxxxxxx VREG 054156 control |
| 113 | 010000--01--xxxx W xxxxxxxx VSCG 054157 control |
| 114 | 114 | 010000--1000---- R/W -------- AFR watchdog reset |
| 115 | 115 | 010000--1001---- W SDON sound enable? |
| 116 | 116 | 010000--1010 CCLR ? |
| r241899 | r241900 | |
| 121 | 121 | 010000--11-000-- W --x----- CRDB / |
| 122 | 122 | 010000--11-001-- W -----xxx EEP EEPROM DI, CS, CLK |
| 123 | 123 | 010000--11-001-- W ----x--- MUT sound mute? |
| 124 | | 010000--11-001-- W ---x---- CBNK bank switch 4800-7FFF region between palette and 053245/056832 |
| 124 | 010000--11-001-- W ---x---- CBNK bank switch 4400-7FFF region between palette and 053245/054156 |
| 125 | 125 | 010000--11-001-- W --x----- n.c. |
| 126 | 126 | 010000--11-001-- W xx------ SHD0/1 shadow control |
| 127 | 127 | 010000--11-010-- W -----xxx PCU1/XBA palette bank (tilemap A) |
| r241899 | r241900 | |
| 138 | 138 | 010000--11-11011 R -------x NCPU ? |
| 139 | 139 | 010000--11-111-- W --xxxxxx BREG ROM bank select |
| 140 | 140 | 010010--00------ n.c. |
| 141 | | 010010--01---xxx R/W xxxxxxxx OREG 053244 |
| 141 | 010010--01---xxx R/W xxxxxxxx OREG 053244/053245 control |
| 142 | 142 | 010010--10-xxxxx R/W xxxxxxxx HIP 054000 |
| 143 | 143 | 010010--11 R/W xxxxxxxx PAR sound communication |
| 144 | | 010100xxxxxxxxxx R/W xxxxxxxx OBJ 053245 |
| 145 | | 011xxxxxxxxxxxxx R/W xxxxxxxx VRAM 056832 |
| 144 | 010100xxxxxxxxxx R/W xxxxxxxx OBJ 053245 sprite RAM |
| 145 | 011xxxxxxxxxxxxx R/W xxxxxxxx VRAM 054156 video RAM |
| 146 | 146 | 1xxxxxxxxxxxxxxx R xxxxxxxx PROM program ROM |
| 147 | 147 | |
| 148 | 148 | |
| r241899 | r241900 | |
| 231 | 231 | |
| 232 | 232 | note: |
| 233 | 233 | |
| 234 | | lethal enforcers has 2 sprite rendering chips working in parallel mixing |
| 235 | | data together to give 6bpp.. we cheat by using a custom function in |
| 236 | | konamiic.c and a fixed 6bpp decode. |
| 234 | Lethal Enforcers has two sprite rendering chips working in parallel with their |
| 235 | output mixed to give 6bpp, and two tilemap rendering chips working in parallel |
| 236 | to give 8bpp. We currently cheat, using just one of each device but using |
| 237 | alternate gfx layouts. Emulating it accurately will require separating the |
| 238 | "front end" chips (053245, 054156) from the "back end" chips (053244, 054157) |
| 239 | as only the latter are doubled. |
| 237 | 240 | |
| 238 | 241 | mirror not set up correctly |
| 239 | 242 | |
| r241899 | r241900 | |
| 265 | 268 | /* bit 1 is cs (active low) */ |
| 266 | 269 | /* bit 2 is clock (active high) */ |
| 267 | 270 | /* bit 3 is "MUT" on the schematics (audio mute?) */ |
| 268 | | /* bit 4 bankswitches the 4800-7fff region: 0 = registers, 1 = RAM ("CBNK" on schematics) */ |
| 271 | /* bit 4 bankswitches the 4400-7fff region: 0 = registers, 1 = palette RAM ("CBNK" on schematics) */ |
| 269 | 272 | /* bit 6 is "SHD0" (some kind of shadow control) */ |
| 270 | 273 | /* bit 7 is "SHD1" (ditto) */ |
| 271 | 274 | |
| 272 | 275 | m_cur_control2 = data; |
| 273 | 276 | |
| 274 | | m_bank4800->set_bank((m_cur_control2 >> 4) & 1); |
| 277 | m_bank4000->set_bank(BIT(m_cur_control2, 4)); |
| 275 | 278 | |
| 276 | 279 | ioport("EEPROMOUT")->write(m_cur_control2, 0xff); |
| 277 | 280 | } |
| r241899 | r241900 | |
| 302 | 305 | membank("bank1")->set_entry(data); |
| 303 | 306 | } |
| 304 | 307 | |
| 305 | | // use one more palette entry for the BG color |
| 306 | | WRITE8_MEMBER(lethal_state::le_bgcolor_w) |
| 307 | | { |
| 308 | | m_palette->write(space, 0x3800 + offset, data); |
| 309 | | } |
| 310 | | |
| 311 | 308 | READ8_MEMBER(lethal_state::guns_r) |
| 312 | 309 | { |
| 313 | 310 | switch (offset) |
| r241899 | r241900 | |
| 356 | 353 | AM_RANGE(0x40d9, 0x40d9) AM_READ_PORT("INPUTS") |
| 357 | 354 | AM_RANGE(0x40db, 0x40db) AM_READ(gunsaux_r) // top X bit of guns |
| 358 | 355 | AM_RANGE(0x40dc, 0x40dc) AM_WRITE(le_bankswitch_w) |
| 359 | | AM_RANGE(0x47fe, 0x47ff) AM_WRITE(le_bgcolor_w) // BG color |
| 360 | | AM_RANGE(0x4800, 0x7fff) AM_DEVICE("bank4800", address_map_bank_device, amap8) |
| 356 | AM_RANGE(0x4000, 0x43ff) AM_UNMAP // first 0x400 bytes of palette RAM are inaccessible |
| 357 | AM_RANGE(0x4000, 0x7fff) AM_DEVICE("bank4000", address_map_bank_device, amap8) |
| 361 | 358 | AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION("maincpu", 0x38000) |
| 362 | 359 | ADDRESS_MAP_END |
| 363 | 360 | |
| 364 | | static ADDRESS_MAP_START( bank4800_map, AS_PROGRAM, 8, lethal_state ) |
| 365 | | AM_RANGE(0x0040, 0x004f) AM_DEVREADWRITE("k053244", k05324x_device, k053244_r, k053244_w) |
| 366 | | AM_RANGE(0x0080, 0x009f) AM_DEVREADWRITE("k054000", k054000_device, read, write) |
| 367 | | AM_RANGE(0x00c6, 0x00c6) AM_WRITE(sound_cmd_w) |
| 368 | | AM_RANGE(0x00c7, 0x00c7) AM_WRITE(sound_irq_w) |
| 369 | | AM_RANGE(0x00ca, 0x00ca) AM_READ(sound_status_r) |
| 370 | | AM_RANGE(0x0800, 0x17ff) AM_MASK(0x07ff) AM_DEVREADWRITE("k053244", k05324x_device, k053245_r, k053245_w) |
| 371 | | AM_RANGE(0x1800, 0x1fff) AM_DEVREADWRITE("k056832", k056832_device, ram_code_lo_r, ram_code_lo_w) |
| 372 | | AM_RANGE(0x2000, 0x27ff) AM_DEVREADWRITE("k056832", k056832_device, ram_code_hi_r, ram_code_hi_w) |
| 373 | | AM_RANGE(0x2800, 0x2fff) AM_DEVREADWRITE("k056832", k056832_device, ram_attr_lo_r, ram_attr_lo_w) |
| 374 | | AM_RANGE(0x3000, 0x37ff) AM_DEVREADWRITE("k056832", k056832_device, ram_attr_hi_r, ram_attr_hi_w) |
| 375 | | AM_RANGE(0x3800, 0x7001) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") // 2 extra bytes for the BG color |
| 361 | static ADDRESS_MAP_START( bank4000_map, AS_PROGRAM, 8, lethal_state ) |
| 362 | // VRD = 0 or 1, CBNK = 0 |
| 363 | AM_RANGE(0x0840, 0x084f) AM_MIRROR(0x8000) AM_DEVREADWRITE("k053244", k05324x_device, k053244_r, k053244_w) |
| 364 | AM_RANGE(0x0880, 0x089f) AM_MIRROR(0x8000) AM_DEVREADWRITE("k054000", k054000_device, read, write) |
| 365 | AM_RANGE(0x08c6, 0x08c6) AM_MIRROR(0x8000) AM_WRITE(sound_cmd_w) |
| 366 | AM_RANGE(0x08c7, 0x08c7) AM_MIRROR(0x8000) AM_WRITE(sound_irq_w) |
| 367 | AM_RANGE(0x08ca, 0x08ca) AM_MIRROR(0x8000) AM_READ(sound_status_r) |
| 368 | AM_RANGE(0x1000, 0x17ff) AM_MIRROR(0x8000) AM_DEVREADWRITE("k053244", k05324x_device, k053245_r, k053245_w) |
| 369 | |
| 370 | // VRD = 0, CBNK = 0 |
| 371 | AM_RANGE(0x2000, 0x27ff) AM_DEVREADWRITE("k056832", k056832_device, ram_code_lo_r, ram_code_lo_w) |
| 372 | AM_RANGE(0x2800, 0x2fff) AM_DEVREADWRITE("k056832", k056832_device, ram_code_hi_r, ram_code_hi_w) |
| 373 | AM_RANGE(0x3000, 0x37ff) AM_DEVREADWRITE("k056832", k056832_device, ram_attr_lo_r, ram_attr_lo_w) |
| 374 | AM_RANGE(0x3800, 0x3fff) AM_DEVREADWRITE("k056832", k056832_device, ram_attr_hi_r, ram_attr_hi_w) |
| 375 | |
| 376 | // VRD = 1, CBNK = 0 or 1 |
| 377 | AM_RANGE(0xa000, 0xbfff) AM_MIRROR(0x4000) AM_UNMAP // AM_DEVREAD("k056832", k056832_device, rom_byte_r) |
| 378 | |
| 379 | // CBNK = 1; partially overlaid when VRD = 1 |
| 380 | AM_RANGE(0x4000, 0x7fff) AM_MIRROR(0x8000) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") |
| 376 | 381 | ADDRESS_MAP_END |
| 377 | 382 | |
| 378 | 383 | static ADDRESS_MAP_START( le_sound, AS_PROGRAM, 8, lethal_state ) |
| r241899 | r241900 | |
| 467 | 472 | membank("bank1")->set_entry(0); |
| 468 | 473 | |
| 469 | 474 | save_item(NAME(m_cur_control2)); |
| 475 | save_item(NAME(m_layer_colorbase)); |
| 470 | 476 | save_item(NAME(m_sprite_colorbase)); |
| 471 | | save_item(NAME(m_layer_colorbase)); |
| 477 | save_item(NAME(m_back_colorbase)); |
| 472 | 478 | } |
| 473 | 479 | |
| 474 | 480 | void lethal_state::machine_reset() |
| r241899 | r241900 | |
| 477 | 483 | m_layer_colorbase[i] = 0; |
| 478 | 484 | |
| 479 | 485 | m_sprite_colorbase = 0; |
| 486 | m_back_colorbase = 0; |
| 480 | 487 | m_cur_control2 = 0; |
| 481 | | m_bank4800->set_bank(0); |
| 488 | m_bank4000->set_bank(0); |
| 482 | 489 | } |
| 483 | 490 | |
| 484 | 491 | static MACHINE_CONFIG_START( lethalen, lethal_state ) |
| r241899 | r241900 | |
| 491 | 498 | MCFG_CPU_ADD("soundcpu", Z80, MAIN_CLOCK/4) /* verified on pcb */ |
| 492 | 499 | MCFG_CPU_PROGRAM_MAP(le_sound) |
| 493 | 500 | |
| 494 | | MCFG_DEVICE_ADD("bank4800", ADDRESS_MAP_BANK, 0) |
| 495 | | MCFG_DEVICE_PROGRAM_MAP(bank4800_map) |
| 501 | MCFG_DEVICE_ADD("bank4000", ADDRESS_MAP_BANK, 0) |
| 502 | MCFG_DEVICE_PROGRAM_MAP(bank4000_map) |
| 496 | 503 | MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) |
| 497 | 504 | MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) |
| 498 | | MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(15) |
| 499 | | MCFG_ADDRESS_MAP_BANK_STRIDE(0x3800) |
| 505 | MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16) |
| 506 | MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) |
| 500 | 507 | |
| 501 | 508 | MCFG_EEPROM_SERIAL_ER5911_8BIT_ADD("eeprom") |
| 502 | 509 | |
| r241899 | r241900 | |
| 511 | 518 | MCFG_SCREEN_UPDATE_DRIVER(lethal_state, screen_update_lethalen) |
| 512 | 519 | MCFG_SCREEN_PALETTE("palette") |
| 513 | 520 | |
| 514 | | MCFG_PALETTE_ADD("palette", 7168+1) |
| 521 | MCFG_PALETTE_ADD("palette", 8192) |
| 515 | 522 | MCFG_PALETTE_ENABLE_SHADOWS() |
| 516 | 523 | MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR) |
| 517 | 524 | |
trunk/src/mame/drivers/popobear.c
| r241899 | r241900 | |
| 89 | 89 | : driver_device(mconfig, type, tag), |
| 90 | 90 | m_maincpu(*this,"maincpu"), |
| 91 | 91 | m_spr(*this, "spr"), |
| 92 | m_vram(*this, "vram"), |
| 92 | 93 | m_vregs(*this, "vregs"), |
| 93 | 94 | m_gfxdecode(*this, "gfxdecode"), |
| 94 | 95 | m_palette(*this, "palette") |
| r241899 | r241900 | |
| 98 | 99 | tilemap_base[1] = 0xf4000; |
| 99 | 100 | tilemap_base[2] = 0xf8000; |
| 100 | 101 | tilemap_base[3] = 0xfc000; |
| 101 | | |
| 102 | | tilemap_size[0] = 0x04000; |
| 103 | | tilemap_size[1] = 0x04000; |
| 104 | | tilemap_size[2] = 0x04000; |
| 105 | | tilemap_size[3] = 0x04000; |
| 106 | 102 | } |
| 107 | 103 | |
| 108 | 104 | required_device<cpu_device> m_maincpu; |
| 109 | 105 | required_shared_ptr<UINT16> m_spr; |
| 106 | required_shared_ptr<UINT16> m_vram; |
| 110 | 107 | required_shared_ptr<UINT16> m_vregs; |
| 111 | 108 | optional_device<gfxdecode_device> m_gfxdecode; |
| 112 | 109 | required_device<palette_device> m_palette; |
| 113 | 110 | |
| 114 | | UINT16* m_vram; |
| 115 | | UINT16* m_vram_rearranged; |
| 111 | dynamic_array<UINT16> m_vram_rearranged; |
| 116 | 112 | |
| 117 | 113 | int tilemap_base[4]; |
| 118 | | int tilemap_size[4]; |
| 119 | 114 | |
| 120 | 115 | DECLARE_READ8_MEMBER(popo_620000_r); |
| 121 | 116 | DECLARE_WRITE8_MEMBER(popobear_irq_ack_w); |
| r241899 | r241900 | |
| 124 | 119 | TIMER_DEVICE_CALLBACK_MEMBER(popobear_irq); |
| 125 | 120 | void draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect); |
| 126 | 121 | |
| 127 | | int m_gfx_index; |
| 128 | 122 | tilemap_t *m_bg_tilemap[4]; |
| 129 | 123 | TILE_GET_INFO_MEMBER(get_popobear_bg0_tile_info); |
| 130 | 124 | TILE_GET_INFO_MEMBER(get_popobear_bg1_tile_info); |
| r241899 | r241900 | |
| 149 | 143 | |
| 150 | 144 | |
| 151 | 145 | COMBINE_DATA(&m_vram_rearranged[swapped_offset]); |
| 152 | | m_gfxdecode->gfx(m_gfx_index)->mark_dirty((swapped_offset)/32); |
| 146 | m_gfxdecode->gfx(0)->mark_dirty((swapped_offset)/32); |
| 153 | 147 | |
| 154 | 148 | // unfortunately tilemaps and tilegfx share the same ram so we're always dirty if we write to RAM |
| 155 | 149 | m_bg_tilemap[0]->mark_all_dirty(); |
| r241899 | r241900 | |
| 158 | 152 | m_bg_tilemap[3]->mark_all_dirty(); |
| 159 | 153 | |
| 160 | 154 | } |
| 161 | | DECLARE_READ16_MEMBER(popo_vram_r) { return m_vram[offset]; } |
| 162 | 155 | |
| 163 | 156 | }; |
| 164 | 157 | |
| r241899 | r241900 | |
| 166 | 159 | static const gfx_layout popobear_char_layout = |
| 167 | 160 | { |
| 168 | 161 | 8,8, |
| 169 | | 0x4000, |
| 162 | RGN_FRAC(1,1), |
| 170 | 163 | 8, |
| 171 | 164 | { 0,1,2,3,4,5,6,7 }, |
| 172 | 165 | { STEP8(0, 8) }, |
| r241899 | r241900 | |
| 174 | 167 | 8*64 |
| 175 | 168 | }; |
| 176 | 169 | |
| 170 | GFXDECODE_START(popobear) |
| 171 | GFXDECODE_RAM( "vram", 0, popobear_char_layout, 0, 1 ) |
| 172 | GFXDECODE_END |
| 177 | 173 | |
| 178 | 174 | TILE_GET_INFO_MEMBER(popobear_state::get_popobear_bg0_tile_info) |
| 179 | 175 | { |
| r241899 | r241900 | |
| 212 | 208 | |
| 213 | 209 | void popobear_state::video_start() |
| 214 | 210 | { |
| 215 | | /* find first empty slot to decode gfx */ |
| 216 | | for (m_gfx_index = 0; m_gfx_index < MAX_GFX_ELEMENTS; m_gfx_index++) |
| 217 | | if (m_gfxdecode->gfx(m_gfx_index) == 0) |
| 218 | | break; |
| 211 | m_vram_rearranged.resize(0x100000 / 2); |
| 219 | 212 | |
| 220 | | assert(m_gfx_index != MAX_GFX_ELEMENTS); |
| 213 | m_gfxdecode->gfx(0)->set_source(reinterpret_cast<UINT8 *>(&m_vram_rearranged[0])); |
| 221 | 214 | |
| 222 | | m_vram = auto_alloc_array_clear(machine(), UINT16, 0x100000/2); |
| 223 | | m_vram_rearranged = auto_alloc_array_clear(machine(), UINT16, 0x100000/2); |
| 224 | | |
| 225 | | |
| 226 | | /* create the char set (gfx will then be updated dynamically from RAM) */ |
| 227 | | m_gfxdecode->set_gfx(m_gfx_index, global_alloc(gfx_element(m_palette, popobear_char_layout, (UINT8 *)m_vram_rearranged, NATIVE_ENDIAN_VALUE_LE_BE(8,0), m_palette->entries() / 16, 0))); |
| 228 | | |
| 229 | 215 | m_bg_tilemap[0] = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(popobear_state::get_popobear_bg0_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 128, 64); |
| 230 | 216 | m_bg_tilemap[1] = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(popobear_state::get_popobear_bg1_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 128, 64); |
| 231 | 217 | m_bg_tilemap[2] = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(popobear_state::get_popobear_bg2_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 128, 64); |
| r241899 | r241900 | |
| 243 | 229 | |
| 244 | 230 | void popobear_state::draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect) |
| 245 | 231 | { |
| 246 | | // ERROR: This cast is NOT endian-safe without the use of BYTE/WORD/DWORD_XOR_* macros! |
| 247 | 232 | UINT8* vram = reinterpret_cast<UINT8 *>(m_spr.target()); |
| 248 | 233 | int i; |
| 249 | 234 | |
| r241899 | r241900 | |
| 264 | 249 | /* 0x*29 = 32 x 32 */ |
| 265 | 250 | for(i = 0x800-8;i >= 0; i-=8) |
| 266 | 251 | { |
| 267 | | int y = vram[i+0x7f800+2]|(vram[i+0x7f800+3]<<8); |
| 268 | | int x = vram[i+0x7f800+4]|(vram[i+0x7f800+5]<<8); |
| 269 | | int spr_num = vram[i+0x7f800+6]|(vram[i+0x7f800+7]<<8); |
| 270 | | int param = vram[i+0x7f800+0]|(vram[i+0x7f800+1]<<8); |
| 252 | UINT16 *sprdata = &m_spr[(0x7f800 + i) / 2]; |
| 271 | 253 | |
| 254 | int param = sprdata[0]; |
| 272 | 255 | int pri = (param & 0x0f00)>>8; |
| 273 | 256 | |
| 274 | 257 | // we do this because it's sprite<->sprite priority, |
| 275 | 258 | if (pri!=drawpri) |
| 276 | 259 | continue; |
| 277 | 260 | |
| 261 | int y = sprdata[1]; |
| 262 | int x = sprdata[2]; |
| 263 | int spr_num = sprdata[3]; |
| 264 | |
| 278 | 265 | int width = 8 << ((param & 0x30)>>4); |
| 279 | 266 | int height = width; // sprites are always square? |
| 280 | 267 | |
| r241899 | r241900 | |
| 327 | 314 | |
| 328 | 315 | for(int xi=0;xi<width;xi++) |
| 329 | 316 | { |
| 330 | | UINT8 pix = (vram[spr_num^1] & 0xff); |
| 317 | UINT8 pix = vram[BYTE_XOR_BE(spr_num)]; |
| 331 | 318 | int x_draw = (x_dir) ? x+((width-1) - xi) : x+xi; |
| 332 | 319 | |
| 333 | 320 | if(cliprect.contains(x_draw, y_draw)) |
| r241899 | r241900 | |
| 479 | 466 | AM_RANGE(0x000000, 0x03ffff) AM_ROM |
| 480 | 467 | AM_RANGE(0x210000, 0x21ffff) AM_RAM |
| 481 | 468 | AM_RANGE(0x280000, 0x2fffff) AM_RAM AM_SHARE("spr") // unknown boundaries, 0x2ff800 contains a sprite list, lower area = sprite gfx |
| 482 | | AM_RANGE(0x300000, 0x3fffff) AM_READWRITE( popo_vram_r, popo_vram_w ) // tile definitions + tilemaps |
| 469 | AM_RANGE(0x300000, 0x3fffff) AM_RAM_WRITE( popo_vram_w ) AM_SHARE("vram") // tile definitions + tilemaps |
| 483 | 470 | |
| 484 | 471 | |
| 485 | 472 | /* Most if not all of these are vregs */ |
| r241899 | r241900 | |
| 660 | 647 | |
| 661 | 648 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 662 | 649 | |
| 663 | | MCFG_GFXDECODE_ADD("gfxdecode", "palette", empty) |
| 650 | MCFG_GFXDECODE_ADD("gfxdecode", "palette", popobear) |
| 664 | 651 | |
| 665 | 652 | MCFG_SOUND_ADD("ymsnd", YM2413, XTAL_42MHz/16) // XTAL CORRECT, DIVISOR GUESSED |
| 666 | 653 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) |
trunk/src/mame/drivers/segas16b.c
| r241899 | r241900 | |
| 4470 | 4470 | // |
| 4471 | 4471 | ROM_START( dunkshot ) |
| 4472 | 4472 | ROM_REGION( 0x30000, "maincpu", 0 ) // 68000 code |
| 4473 | ROM_LOAD16_BYTE( "epr-10520c.a1", 0x000001, 0x8000, CRC(ba9c5d10) SHA1(370d0455903c1bce3b5ad2ffa1d02ccd6da78840) ) |
| 4474 | ROM_LOAD16_BYTE( "epr-10523c.a4", 0x000000, 0x8000, CRC(106733c2) SHA1(d792b3d5073becbd9f440faff45692ab9e6309b9) ) |
| 4475 | ROM_LOAD16_BYTE( "epr-10521.a2", 0x010001, 0x8000, CRC(e2d5f97a) SHA1(bf7b4a029580633fee65be89d5c9c83ff76a8484) ) // == epr-10468.a2 |
| 4476 | ROM_LOAD16_BYTE( "epr-10524.a5", 0x010000, 0x8000, CRC(22777314) SHA1(fbc35505a94c8d4bdb44ee058e9e2e9e9b377c5c) ) // == epr-10471.a5 |
| 4477 | ROM_LOAD16_BYTE( "epr-10522.a3", 0x020001, 0x8000, CRC(e5b5f754) SHA1(af02c46437e3cf62331753dc405211b7f90e3f62) ) |
| 4478 | ROM_LOAD16_BYTE( "epr-10525.a6", 0x020000, 0x8000, CRC(7f41f334) SHA1(631f6113f3c0c47f2dd1ee0ea6e7db4321d7366d) ) |
| 4479 | |
| 4480 | ROM_REGION( 0x18000, "gfx1", 0 ) // tiles |
| 4481 | ROM_LOAD( "epr-10528.b9", 0x00000, 0x8000, CRC(a8a3762d) SHA1(af75df6eda0df903e2b3f9680cd128da4227961d) ) |
| 4482 | ROM_LOAD( "epr-10529.b10", 0x08000, 0x8000, CRC(80cbff50) SHA1(3641ee337194d56d774bf1be91939d03f3c0f77b) ) |
| 4483 | ROM_LOAD( "epr-10530.b11", 0x10000, 0x8000, CRC(2dbe1e52) SHA1(a6b74f88e2f47322fbde1f6682cae58caf79f6c8) ) |
| 4484 | |
| 4485 | ROM_REGION16_BE( 0x80000, "sprites", 0 ) // sprites |
| 4486 | ROM_LOAD16_BYTE( "epr-10481.b5", 0x00000, 0x8000, CRC(feb04bc9) SHA1(233dc8e3b887a88ac114723d58a909a58f0ae771) ) |
| 4487 | ROM_RELOAD( 0x10000, 0x8000 ) |
| 4488 | ROM_LOAD16_BYTE( "epr-10477.b1", 0x00001, 0x8000, CRC(f9d3b2cb) SHA1(b530fe16882c718122bfd1de098f39e54993de28) ) |
| 4489 | ROM_RELOAD( 0x10001, 0x8000 ) |
| 4490 | ROM_LOAD16_BYTE( "epr-10482.b6", 0x20000, 0x8000, CRC(5bc07618) SHA1(f4c88f81b407d467f958181770ea4fd32aab3daf) ) |
| 4491 | ROM_RELOAD( 0x30000, 0x8000 ) |
| 4492 | ROM_LOAD16_BYTE( "epr-10478.b2", 0x20001, 0x8000, CRC(5b5c5c92) SHA1(1c6f1cafa0788678c80ade11560f4a8d8bb7272a) ) |
| 4493 | ROM_RELOAD( 0x30001, 0x8000 ) |
| 4494 | ROM_LOAD16_BYTE( "epr-10483.b7", 0x40000, 0x8000, CRC(7cab4f9e) SHA1(2310a9fe604f78d74d84bea301c95e6f0e6a6085) ) |
| 4495 | ROM_RELOAD( 0x50000, 0x8000 ) |
| 4496 | ROM_LOAD16_BYTE( "epr-10479.b3", 0x40001, 0x8000, CRC(e84190a0) SHA1(23a8799adf81e1884a8c6b4c55397b8bca2f1850) ) |
| 4497 | ROM_RELOAD( 0x50001, 0x8000 ) |
| 4498 | ROM_LOAD16_BYTE( "epr-10527.b8", 0x60000, 0x8000, CRC(39b1a242) SHA1(cf0c0768d006a18345b66dd389acba1e8192ec53) ) |
| 4499 | ROM_RELOAD( 0x70000, 0x8000 ) |
| 4500 | ROM_LOAD16_BYTE( "epr-10526.b4", 0x60001, 0x8000, CRC(bf200754) SHA1(60900d80cfea147b011813dde558c1d39fdd274c) ) |
| 4501 | ROM_RELOAD( 0x70001, 0x8000 ) |
| 4502 | |
| 4503 | ROM_REGION( 0x50000, "soundcpu", 0 ) // sound CPU |
| 4504 | ROM_LOAD( "epr-10473.a7", 0x00000, 0x08000, CRC(7f1f5a27) SHA1(7ff91b95c883b395ab4ff5e440d78e553a09e623) ) |
| 4505 | ROM_LOAD( "epr-10474.a8", 0x10000, 0x08000, CRC(419a656e) SHA1(aa734ae835761badeb069f99acc5fded2a19b3a3) ) |
| 4506 | ROM_LOAD( "epr-10475.a9", 0x20000, 0x08000, CRC(17d55e85) SHA1(0c414bafecbfaa82679cc155f15f5255c186358d) ) |
| 4507 | ROM_LOAD( "epr-10476.a10", 0x30000, 0x08000, CRC(a6be0956) SHA1(fc4d6e25e0b46679f94fddbb1850fb0b02f8d84b) ) |
| 4508 | |
| 4509 | ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key |
| 4510 | ROM_LOAD( "317-0022.key", 0x0000, 0x2000, CRC(4eedc66d) SHA1(50588fa13bf25a2d1322579cdc9937450543c978) ) |
| 4511 | ROM_END |
| 4512 | |
| 4513 | |
| 4514 | ROM_START( dunkshoto ) |
| 4515 | ROM_REGION( 0x30000, "maincpu", 0 ) // 68000 code |
| 4473 | 4516 | ROM_LOAD16_BYTE( "epr-10467.a1", 0x000001, 0x8000, CRC(29774114) SHA1(3a88739213afd4ef7807ddbd3acdfddeb9636fd3) ) |
| 4474 | 4517 | ROM_LOAD16_BYTE( "epr-10470.a4", 0x000000, 0x8000, CRC(8c60761f) SHA1(aba009f482df7023b460ab20e50225ab5f6dff6d) ) |
| 4475 | 4518 | ROM_LOAD16_BYTE( "epr-10468.a2", 0x010001, 0x8000, CRC(e2d5f97a) SHA1(bf7b4a029580633fee65be89d5c9c83ff76a8484) ) |
| r241899 | r241900 | |
| 6817 | 6860 | GAME( 1988, dduxj, ddux, system16b_fd1094, ddux, segas16b_state,generic_5521, ROT0, "Sega", "Dynamite Dux (set 2, Japan, FD1094 317-0094)", 0 ) |
| 6818 | 6861 | GAME( 1988, ddux1, ddux, system16b_i8751, ddux, segas16b_state,ddux_5704, ROT0, "Sega", "Dynamite Dux (set 1, 8751 317-0095)", 0 ) |
| 6819 | 6862 | |
| 6820 | | GAME( 1986, dunkshot, 0, system16b_fd1089a, dunkshot, segas16b_state,dunkshot_5358_small,ROT0, "Sega", "Dunk Shot (FD1089A 317-0022)", 0 ) |
| 6863 | GAME( 1987, dunkshot, 0, system16b_fd1089a, dunkshot, segas16b_state,dunkshot_5358_small,ROT0, "Sega", "Dunk Shot (Rev C, FD1089A 317-0022)", 0 ) |
| 6864 | GAME( 1986, dunkshoto, dunkshot, system16b_fd1089a, dunkshot, segas16b_state,dunkshot_5358_small,ROT0, "Sega", "Dunk Shot (FD1089A 317-0022)", 0 ) |
| 6821 | 6865 | |
| 6822 | 6866 | GAME( 1989, eswat, 0, system16b_fd1094_5797,eswat, segas16b_state,generic_5797, ROT0, "Sega", "E-Swat - Cyber Police (set 4, World, FD1094 317-0130)", 0 ) |
| 6823 | 6867 | GAME( 1989, eswatu, eswat, system16b_fd1094_5797,eswat, segas16b_state,generic_5797, ROT0, "Sega", "E-Swat - Cyber Police (set 3, US, FD1094 317-0129)", 0 ) |
trunk/src/mess/drivers/gamecom.c
| r241899 | r241900 | |
| 18 | 18 | ***************************************************************************/ |
| 19 | 19 | |
| 20 | 20 | #include "includes/gamecom.h" |
| 21 | #include "gamecom.lh" |
| 21 | 22 | |
| 22 | 23 | static ADDRESS_MAP_START(gamecom_mem_map, AS_PROGRAM, 8, gamecom_state) |
| 23 | 24 | AM_RANGE( 0x0000, 0x0013 ) AM_RAM |
| r241899 | r241900 | |
| 31 | 32 | AM_RANGE( 0x4000, 0x5FFF ) AM_ROMBANK("bank2") /* External ROM/Flash. Controlled by MMU2 */ |
| 32 | 33 | AM_RANGE( 0x6000, 0x7FFF ) AM_ROMBANK("bank3") /* External ROM/Flash. Controlled by MMU3 */ |
| 33 | 34 | AM_RANGE( 0x8000, 0x9FFF ) AM_ROMBANK("bank4") /* External ROM/Flash. Controlled by MMU4 */ |
| 34 | | AM_RANGE( 0xA000, 0xDFFF ) AM_RAM AM_SHARE("p_videoram") /* VRAM */ |
| 35 | | AM_RANGE( 0xE000, 0xFFFF ) AM_RAM AM_SHARE("p_nvram")// AM_SHARE("nvram") /* Extended I/O, Extended RAM */ |
| 35 | AM_RANGE( 0xA000, 0xDFFF ) AM_RAM AM_SHARE("videoram") /* VRAM */ |
| 36 | AM_RANGE( 0xE000, 0xFFFF ) AM_RAM AM_SHARE("nvram") /* Extended I/O, Extended RAM */ |
| 36 | 37 | ADDRESS_MAP_END |
| 37 | 38 | |
| 38 | 39 | static INPUT_PORTS_START( gamecom ) |
| r241899 | r241900 | |
| 43 | 44 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_NAME( "Right" ) |
| 44 | 45 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( "Menu" ) PORT_CODE( KEYCODE_M ) |
| 45 | 46 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( DEF_STR(Pause) ) PORT_CODE( KEYCODE_V ) |
| 46 | | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( "Sound" ) PORT_CODE( KEYCODE_B ) |
| 47 | | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME( "Button A" ) |
| 47 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( "Sound" ) PORT_CODE( KEYCODE_S ) |
| 48 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME( "Button A" ) PORT_CODE( KEYCODE_A ) PORT_CODE( KEYCODE_LCONTROL ) |
| 48 | 49 | |
| 49 | 50 | PORT_START("IN1") |
| 50 | | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME( "Button B" ) |
| 51 | | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME( "Button C" ) |
| 51 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME( "Button B" ) PORT_CODE( KEYCODE_B ) PORT_CODE( KEYCODE_LALT ) |
| 52 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME( "Button C" ) PORT_CODE( KEYCODE_C ) PORT_CODE( KEYCODE_SPACE ) |
| 52 | 53 | |
| 53 | 54 | PORT_START("IN2") |
| 54 | 55 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( "Reset" ) PORT_CODE( KEYCODE_N ) |
| 55 | | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME( "Button D" ) |
| 56 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME( "Button D" ) PORT_CODE( KEYCODE_D ) PORT_CODE( KEYCODE_LSHIFT ) |
| 56 | 57 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( "Stylus press" ) PORT_CODE( KEYCODE_Z ) PORT_CODE( MOUSECODE_BUTTON1 ) |
| 57 | 58 | |
| 58 | | PORT_START("STYX") |
| 59 | | PORT_BIT( 0xff, 100, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1, 0, 0) PORT_MINMAX(0,199) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) |
| 59 | PORT_START("GRID.0") |
| 60 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 61 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 62 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 63 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 64 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 65 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 66 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 67 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 68 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 69 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 60 | 70 | |
| 61 | | PORT_START("STYY") |
| 62 | | PORT_BIT( 0xff, 80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1, 0, 0) PORT_MINMAX(0,159) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) |
| 63 | | INPUT_PORTS_END |
| 71 | PORT_START("GRID.1") |
| 72 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 73 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 74 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 75 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 76 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 77 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 78 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 79 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 80 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 81 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 64 | 82 | |
| 83 | PORT_START("GRID.2") |
| 84 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 85 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 86 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 87 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 88 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 89 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 90 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 91 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 92 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 93 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 94 | |
| 95 | PORT_START("GRID.3") |
| 96 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 97 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 98 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 99 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 100 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 101 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 102 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 103 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 104 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 105 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 106 | |
| 107 | PORT_START("GRID.4") |
| 108 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 109 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 110 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 111 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 112 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 113 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 114 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 115 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 116 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 117 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 118 | |
| 119 | PORT_START("GRID.5") |
| 120 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 121 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 122 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 123 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 124 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 125 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 126 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 127 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 128 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 129 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 130 | |
| 131 | PORT_START("GRID.6") |
| 132 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 133 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 134 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 135 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 136 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 137 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 138 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 139 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 140 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 141 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 142 | |
| 143 | PORT_START("GRID.7") |
| 144 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 145 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 146 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 147 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 148 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 149 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 150 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 151 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 152 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 153 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 154 | |
| 155 | PORT_START("GRID.8") |
| 156 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 157 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 158 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 159 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 160 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 161 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 162 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 163 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 164 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 165 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 166 | |
| 167 | PORT_START("GRID.9") |
| 168 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 169 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 170 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 171 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 172 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 173 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 174 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 175 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 176 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 177 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 178 | |
| 179 | PORT_START("GRID.10") |
| 180 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 181 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 182 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 183 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 184 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 185 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 186 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 187 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 188 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 189 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 190 | |
| 191 | PORT_START("GRID.11") |
| 192 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 193 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 194 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 195 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 196 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 197 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 198 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 199 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 200 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 201 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 202 | |
| 203 | PORT_START("GRID.12") |
| 204 | PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) |
| 205 | PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) |
| 206 | PORT_BIT( 0x004, IP_ACTIVE_HIGH, IPT_OTHER) |
| 207 | PORT_BIT( 0x008, IP_ACTIVE_HIGH, IPT_OTHER) |
| 208 | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_OTHER) |
| 209 | PORT_BIT( 0x020, IP_ACTIVE_HIGH, IPT_OTHER) |
| 210 | PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_OTHER) |
| 211 | PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_OTHER) |
| 212 | PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_OTHER) |
| 213 | PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_OTHER) |
| 214 | INPUT_PORTS_END |
| 215 | |
| 65 | 216 | static const unsigned char palette_gamecom[] = |
| 66 | 217 | { |
| 67 | 218 | 0xDF, 0xFF, 0x8F, /* White */ |
| r241899 | r241900 | |
| 108 | 259 | MCFG_SCREEN_REFRESH_RATE( 59.732155 ) |
| 109 | 260 | MCFG_SCREEN_VBLANK_TIME(500) |
| 110 | 261 | MCFG_SCREEN_UPDATE_DRIVER(gamecom_state, screen_update) |
| 111 | | MCFG_SCREEN_SIZE( 200, 200 ) |
| 112 | | MCFG_SCREEN_VISIBLE_AREA( 0, 199, 0, 159 ) |
| 262 | MCFG_SCREEN_SIZE( 208, 160 ) |
| 263 | MCFG_SCREEN_VISIBLE_AREA( 0, 207, 0, 159 ) |
| 113 | 264 | MCFG_SCREEN_PALETTE("palette") |
| 114 | 265 | |
| 115 | | MCFG_DEFAULT_LAYOUT(layout_lcd) |
| 266 | MCFG_DEFAULT_LAYOUT(layout_gamecom) |
| 116 | 267 | MCFG_PALETTE_ADD("palette", 5) |
| 117 | 268 | MCFG_PALETTE_INIT_OWNER(gamecom_state, gamecom) |
| 118 | 269 | |
| r241899 | r241900 | |
| 143 | 294 | ROM_LOAD( "external.bin", 0x00000, 0x40000, CRC(e235a589) SHA1(97f782e72d738f4d7b861363266bf46b438d9b50) ) |
| 144 | 295 | ROM_END |
| 145 | 296 | |
| 146 | | /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */ |
| 147 | | CONS( 1997, gamecom, 0, 0, gamecom, gamecom, gamecom_state, gamecom,"Tiger", "Game.com", GAME_NOT_WORKING | GAME_NO_SOUND) |
| 297 | /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */ |
| 298 | CONS( 1997, gamecom, 0, 0, gamecom, gamecom, gamecom_state, gamecom, "Tiger", "Game.com", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |
trunk/src/mess/drivers/ngen.c
| r241899 | r241900 | |
| 14 | 14 | #include "machine/am9517a.h" |
| 15 | 15 | #include "machine/pic8259.h" |
| 16 | 16 | #include "machine/pit8253.h" |
| 17 | #include "machine/z80dart.h" |
| 17 | 18 | |
| 18 | 19 | class ngen_state : public driver_device |
| 19 | 20 | { |
| r241899 | r241900 | |
| 23 | 24 | m_maincpu(*this,"maincpu"), |
| 24 | 25 | m_crtc(*this,"crtc"), |
| 25 | 26 | m_viduart(*this,"videouart"), |
| 27 | m_iouart(*this,"iouart"), |
| 26 | 28 | m_dmac(*this,"dmac"), |
| 27 | 29 | m_pic(*this,"pic"), |
| 28 | | m_pit(*this,"pit") |
| 30 | m_pit(*this,"pit"), |
| 31 | m_vram(*this,"vram"), |
| 32 | m_fontram(*this,"fontram") |
| 29 | 33 | {} |
| 30 | 34 | |
| 31 | 35 | DECLARE_WRITE_LINE_MEMBER(pit_out0_w); |
| r241899 | r241900 | |
| 43 | 47 | required_device<cpu_device> m_maincpu; |
| 44 | 48 | required_device<mc6845_device> m_crtc; |
| 45 | 49 | required_device<i8251_device> m_viduart; |
| 50 | required_device<upd7201_device> m_iouart; |
| 46 | 51 | required_device<am9517a_device> m_dmac; |
| 47 | 52 | required_device<pic8259_device> m_pic; |
| 48 | 53 | required_device<pit8254_device> m_pit; |
| 54 | required_shared_ptr<UINT16> m_vram; |
| 55 | required_shared_ptr<UINT16> m_fontram; |
| 49 | 56 | |
| 50 | 57 | UINT16 m_peripheral; |
| 51 | 58 | UINT16 m_upper; |
| 52 | 59 | UINT16 m_middle; |
| 53 | 60 | UINT16 m_port00; |
| 61 | UINT16 m_periph141; |
| 54 | 62 | }; |
| 55 | 63 | |
| 56 | 64 | WRITE_LINE_MEMBER(ngen_state::pit_out0_w) |
| 57 | 65 | { |
| 58 | | m_pic->ir0_w(state); |
| 66 | //m_pic->ir0_w(state); |
| 67 | logerror("80186 Timer 1 state %i\n",state); |
| 59 | 68 | } |
| 60 | 69 | |
| 61 | 70 | WRITE_LINE_MEMBER(ngen_state::pit_out1_w) |
| 62 | 71 | { |
| 72 | logerror("PIT Timer 1 state %i\n",state); |
| 63 | 73 | } |
| 64 | 74 | |
| 65 | 75 | WRITE_LINE_MEMBER(ngen_state::pit_out2_w) |
| 66 | 76 | { |
| 77 | logerror("PIT Timer 2 state %i\n",state); |
| 67 | 78 | } |
| 68 | 79 | |
| 69 | 80 | WRITE16_MEMBER(ngen_state::cpu_peripheral_cb) |
| r241899 | r241900 | |
| 97 | 108 | } |
| 98 | 109 | |
| 99 | 110 | // 80186 peripheral space |
| 111 | // Largely guesswork at this stage |
| 100 | 112 | WRITE16_MEMBER(ngen_state::peripheral_w) |
| 101 | 113 | { |
| 102 | 114 | switch(offset) |
| 103 | 115 | { |
| 116 | case 0x141: |
| 117 | // bit 1 enables speaker? |
| 118 | COMBINE_DATA(&m_periph141); |
| 119 | break; |
| 120 | case 0x144: |
| 121 | if(mem_mask & 0x00ff) |
| 122 | m_crtc->address_w(space,0,data & 0xff); |
| 123 | break; |
| 124 | case 0x145: |
| 125 | if(mem_mask & 0x00ff) |
| 126 | m_crtc->register_w(space,0,data & 0xff); |
| 127 | break; |
| 128 | case 0x146: |
| 129 | if(mem_mask & 0x00ff) |
| 130 | m_iouart->ba_cd_w(space,0,data & 0xff); |
| 131 | logerror("Video write offset 0x146 data %04x mask %04x\n",data,mem_mask); |
| 132 | break; |
| 104 | 133 | case 0x147: |
| 105 | | if(mem_mask & 0xff00) |
| 106 | | m_pic->write(space,0,(data >> 8) & 0xff); |
| 107 | 134 | if(mem_mask & 0x00ff) |
| 108 | | m_pic->write(space,1,data & 0xff); |
| 135 | m_iouart->ba_cd_w(space,1,data & 0xff); |
| 136 | logerror("Video write offset 0x147 data %04x mask %04x\n",data,mem_mask); |
| 109 | 137 | break; |
| 138 | default: |
| 139 | logerror("(PC=%06x) Unknown 80186 peripheral write offset %04x data %04x mask %04x\n",m_maincpu->device_t::safe_pc(),offset,data,mem_mask); |
| 110 | 140 | } |
| 111 | | logerror("Peripheral write offset %04x data %04x mask %04x\n",offset,data,mem_mask); |
| 112 | 141 | } |
| 113 | 142 | |
| 114 | 143 | READ16_MEMBER(ngen_state::peripheral_r) |
| 115 | 144 | { |
| 116 | | UINT16 ret = 0xff; |
| 145 | UINT16 ret = 0xffff; |
| 117 | 146 | switch(offset) |
| 118 | 147 | { |
| 148 | case 0x141: |
| 149 | ret = m_periph141; |
| 150 | break; |
| 151 | case 0x144: |
| 152 | if(mem_mask & 0x00ff) |
| 153 | ret = m_crtc->status_r(space,0); |
| 154 | break; |
| 155 | case 0x145: |
| 156 | if(mem_mask & 0x00ff) |
| 157 | ret = m_crtc->register_r(space,0); |
| 158 | break; |
| 119 | 159 | case 0x146: |
| 120 | 160 | if(mem_mask & 0x00ff) |
| 121 | | ret = m_pic->read(space,0); |
| 161 | ret = m_iouart->ba_cd_r(space,0); |
| 122 | 162 | break; |
| 123 | | case 0x147: |
| 163 | case 0x147: // definitely video related, likely UART sending data to the video board |
| 124 | 164 | if(mem_mask & 0x00ff) |
| 125 | | ret = m_pic->read(space,1); |
| 165 | ret = m_iouart->ba_cd_r(space,1); |
| 166 | // expects bit 0 to be set (Video ready signal?) |
| 167 | ret |= 1; |
| 126 | 168 | break; |
| 169 | default: |
| 170 | logerror("(PC=%06x) Unknown 80186 peripheral read offset %04x mask %04x returning %04x\n",m_maincpu->device_t::safe_pc(),offset,mem_mask,ret); |
| 127 | 171 | } |
| 128 | | logerror("Peripheral read offset %04x mask %04x\n",offset,mem_mask); |
| 129 | 172 | return ret; |
| 130 | 173 | } |
| 131 | 174 | |
| r241899 | r241900 | |
| 147 | 190 | |
| 148 | 191 | MC6845_UPDATE_ROW( ngen_state::crtc_update_row ) |
| 149 | 192 | { |
| 193 | UINT16 addr = ma; |
| 194 | |
| 195 | for(int x=0;x<bitmap.width();x+=9) |
| 196 | { |
| 197 | UINT8 ch = m_vram[addr++]; |
| 198 | for(int z=0;z<9;z++) |
| 199 | { |
| 200 | if(BIT(m_fontram[ch*16+ra],8-z)) |
| 201 | bitmap.pix32(y,x+z) = rgb_t(0,0xff,0); |
| 202 | else |
| 203 | bitmap.pix32(y,x+z) = rgb_t(0,0,0); |
| 204 | } |
| 205 | } |
| 150 | 206 | } |
| 151 | 207 | |
| 152 | 208 | static ADDRESS_MAP_START( ngen_mem, AS_PROGRAM, 16, ngen_state ) |
| 153 | | AM_RANGE(0x00000, 0xfdfff) AM_RAM |
| 209 | AM_RANGE(0x00000, 0xf7fff) AM_RAM |
| 210 | AM_RANGE(0xf8000, 0xf9fff) AM_RAM AM_SHARE("vram") |
| 211 | AM_RANGE(0xfa000, 0xfbfff) AM_RAM AM_SHARE("fontram") |
| 154 | 212 | AM_RANGE(0xfe000, 0xfffff) AM_ROM AM_REGION("bios",0) |
| 155 | 213 | ADDRESS_MAP_END |
| 156 | 214 | |
| r241899 | r241900 | |
| 197 | 255 | |
| 198 | 256 | MCFG_DEVICE_ADD("dmac", AM9517A, XTAL_14_7456MHz / 3) // NEC D8237A, divisor unknown |
| 199 | 257 | |
| 258 | // I/O board |
| 259 | MCFG_UPD7201_ADD("iouart",XTAL_14_7456MHz / 3, 0,0,0,0) // no clock visible on I/O board, guessing for now |
| 260 | |
| 200 | 261 | // video board |
| 201 | 262 | MCFG_SCREEN_ADD("screen", RASTER) |
| 202 | 263 | MCFG_SCREEN_SIZE(720,348) |
| 264 | MCFG_SCREEN_VISIBLE_AREA(0,719,0,347) |
| 203 | 265 | MCFG_SCREEN_REFRESH_RATE(60) |
| 204 | 266 | MCFG_SCREEN_UPDATE_DEVICE("crtc",mc6845_device, screen_update) |
| 205 | 267 | |
| 206 | | MCFG_MC6845_ADD("crtc", MC6845, NULL, 19980000 / 16) // divisor unknown |
| 268 | MCFG_MC6845_ADD("crtc", MC6845, NULL, 19980000 / 9) // divisor unknown -- /9 gives 60Hz output, so likely correct |
| 207 | 269 | MCFG_MC6845_SHOW_BORDER_AREA(false) |
| 208 | 270 | MCFG_MC6845_CHAR_WIDTH(9) |
| 209 | 271 | MCFG_MC6845_UPDATE_ROW_CB(ngen_state, crtc_update_row) |
| 272 | MCFG_VIDEO_SET_SCREEN("screen") |
| 210 | 273 | |
| 211 | | MCFG_DEVICE_ADD("videouart", I8251, 19980000 / 16) // divisor unknown |
| 274 | MCFG_DEVICE_ADD("videouart", I8251, 19980000 / 9) // divisor unknown |
| 212 | 275 | |
| 213 | 276 | MACHINE_CONFIG_END |
| 214 | 277 | |
trunk/src/mess/includes/gamecom.h
| r241899 | r241900 | |
| 16 | 16 | #include "sound/dac.h" |
| 17 | 17 | #include "bus/generic/slot.h" |
| 18 | 18 | #include "bus/generic/carts.h" |
| 19 | #include "machine/nvram.h" |
| 19 | 20 | |
| 20 | | #include "rendlay.h" |
| 21 | | |
| 22 | 21 | /* SM8521 register addresses */ |
| 23 | 22 | enum |
| 24 | 23 | { |
| r241899 | r241900 | |
| 212 | 211 | { |
| 213 | 212 | public: |
| 214 | 213 | gamecom_state(const machine_config &mconfig, device_type type, const char *tag) |
| 215 | | : driver_device(mconfig, type, tag), |
| 216 | | m_maincpu(*this, "maincpu"), |
| 217 | | m_dac(*this, "dac"), |
| 218 | | m_cart1(*this, "cartslot1"), |
| 219 | | m_cart2(*this, "cartslot2"), |
| 220 | | m_p_nvram(*this,"p_nvram"), |
| 221 | | m_p_videoram(*this,"p_videoram"), |
| 222 | | m_bank1(*this, "bank1"), |
| 223 | | m_bank2(*this, "bank2"), |
| 224 | | m_bank3(*this, "bank3"), |
| 225 | | m_bank4(*this, "bank4"), |
| 226 | | m_region_maincpu(*this, "maincpu"), |
| 227 | | m_region_kernel(*this, "kernel"), |
| 228 | | m_io_in0(*this, "IN0"), |
| 229 | | m_io_in1(*this, "IN1"), |
| 230 | | m_io_in2(*this, "IN2"), |
| 231 | | m_io_styx(*this, "STYX"), |
| 232 | | m_io_styy(*this, "STYY") |
| 214 | : driver_device(mconfig, type, tag) |
| 215 | , m_p_videoram(*this,"videoram") |
| 216 | , m_p_nvram(*this,"nvram") |
| 217 | , m_maincpu(*this, "maincpu") |
| 218 | , m_dac(*this, "dac") |
| 219 | , m_cart1(*this, "cartslot1") |
| 220 | , m_cart2(*this, "cartslot2") |
| 221 | , m_bank1(*this, "bank1") |
| 222 | , m_bank2(*this, "bank2") |
| 223 | , m_bank3(*this, "bank3") |
| 224 | , m_bank4(*this, "bank4") |
| 225 | , m_region_maincpu(*this, "maincpu") |
| 226 | , m_region_kernel(*this, "kernel") |
| 227 | , m_io_in0(*this, "IN0") |
| 228 | , m_io_in1(*this, "IN1") |
| 229 | , m_io_in2(*this, "IN2") |
| 230 | , m_io_grid(*this, "GRID") |
| 233 | 231 | { } |
| 234 | 232 | |
| 235 | | required_device<cpu_device> m_maincpu; |
| 236 | | required_device<dac_device> m_dac; |
| 237 | | required_device<generic_slot_device> m_cart1; |
| 238 | | required_device<generic_slot_device> m_cart2; |
| 239 | 233 | DECLARE_READ8_MEMBER( gamecom_internal_r ); |
| 240 | 234 | DECLARE_READ8_MEMBER( gamecom_pio_r ); |
| 241 | 235 | DECLARE_WRITE8_MEMBER( gamecom_internal_w ); |
| 242 | 236 | DECLARE_WRITE8_MEMBER( gamecom_pio_w ); |
| 243 | | required_shared_ptr<UINT8> m_p_nvram; |
| 237 | DECLARE_DRIVER_INIT(gamecom); |
| 238 | DECLARE_PALETTE_INIT(gamecom); |
| 239 | INTERRUPT_GEN_MEMBER(gamecom_interrupt); |
| 240 | TIMER_CALLBACK_MEMBER(gamecom_clock_timer_callback); |
| 241 | TIMER_CALLBACK_MEMBER(gamecom_scanline); |
| 242 | DECLARE_WRITE8_MEMBER( gamecom_handle_dma ); |
| 243 | DECLARE_WRITE8_MEMBER( gamecom_update_timers ); |
| 244 | DECLARE_DEVICE_IMAGE_LOAD_MEMBER( gamecom_cart1 ); |
| 245 | DECLARE_DEVICE_IMAGE_LOAD_MEMBER( gamecom_cart2 ); |
| 246 | UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 247 | private: |
| 244 | 248 | UINT8 *m_p_ram; |
| 245 | | required_shared_ptr<UINT8> m_p_videoram; |
| 246 | 249 | UINT8 *m_cart_ptr; |
| 250 | UINT8 m_lcdc_reg; |
| 251 | UINT8 m_lch_reg; |
| 252 | UINT8 m_lcv_reg; |
| 253 | UINT16 m_scanline; |
| 254 | UINT16 m_base_address; |
| 247 | 255 | memory_region *m_cart1_rom; |
| 248 | 256 | memory_region *m_cart2_rom; |
| 249 | 257 | emu_timer *m_clock_timer; |
| r241899 | r241900 | |
| 251 | 259 | GAMECOM_DMA m_dma; |
| 252 | 260 | GAMECOM_TIMER m_timer[2]; |
| 253 | 261 | gamecom_sound_t m_sound; |
| 254 | | int m_stylus_x; |
| 255 | | int m_stylus_y; |
| 256 | | int m_scanline; |
| 257 | | unsigned int m_base_address; |
| 258 | 262 | bitmap_ind16 m_bitmap; |
| 259 | 263 | void gamecom_set_mmu(UINT8 mmu, UINT8 data); |
| 260 | 264 | void handle_stylus_press(int column); |
| 261 | | UINT8 m_lcdc_reg; |
| 262 | | UINT8 m_lch_reg; |
| 263 | | UINT8 m_lcv_reg; |
| 264 | 265 | void recompute_lcd_params(); |
| 265 | 266 | void handle_input_press(UINT16 mux_data); |
| 266 | | |
| 267 | | UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 268 | | DECLARE_DRIVER_INIT(gamecom); |
| 267 | int common_load(device_image_interface &image, generic_slot_device *slot); |
| 269 | 268 | virtual void machine_reset(); |
| 270 | 269 | virtual void video_start(); |
| 271 | | DECLARE_PALETTE_INIT(gamecom); |
| 272 | | INTERRUPT_GEN_MEMBER(gamecom_interrupt); |
| 273 | | TIMER_CALLBACK_MEMBER(gamecom_clock_timer_callback); |
| 274 | | TIMER_CALLBACK_MEMBER(gamecom_scanline); |
| 275 | | DECLARE_WRITE8_MEMBER( gamecom_handle_dma ); |
| 276 | | DECLARE_WRITE8_MEMBER( gamecom_update_timers ); |
| 277 | | int common_load(device_image_interface &image, generic_slot_device *slot); |
| 278 | | DECLARE_DEVICE_IMAGE_LOAD_MEMBER( gamecom_cart1 ); |
| 279 | | DECLARE_DEVICE_IMAGE_LOAD_MEMBER( gamecom_cart2 ); |
| 280 | | |
| 281 | | protected: |
| 270 | required_shared_ptr<UINT8> m_p_videoram; |
| 271 | required_shared_ptr<UINT8> m_p_nvram; |
| 272 | required_device<cpu_device> m_maincpu; |
| 273 | required_device<dac_device> m_dac; |
| 274 | required_device<generic_slot_device> m_cart1; |
| 275 | required_device<generic_slot_device> m_cart2; |
| 282 | 276 | required_memory_bank m_bank1; |
| 283 | 277 | required_memory_bank m_bank2; |
| 284 | 278 | required_memory_bank m_bank3; |
| r241899 | r241900 | |
| 288 | 282 | required_ioport m_io_in0; |
| 289 | 283 | required_ioport m_io_in1; |
| 290 | 284 | required_ioport m_io_in2; |
| 291 | | required_ioport m_io_styx; |
| 292 | | required_ioport m_io_styy; |
| 285 | required_ioport_array<13> m_io_grid; |
| 293 | 286 | }; |
| 294 | 287 | |
| 295 | 288 | #endif /* GAMECOM_H_ */ |
trunk/src/mess/layout/gamecom.lay
| r0 | r241900 | |
| 1 | <!-- gamecom.lay --> |
| 2 | |
| 3 | <mamelayout version="2"> |
| 4 | |
| 5 | <element name="grid"><rect><color red="0.0" green="0.0" blue="0.0" alpha="0.0"/></rect></element> |
| 6 | |
| 7 | <view name="Default Grid"> |
| 8 | |
| 9 | <backdrop element="grid" inputtag="GRID.0" inputmask="0x01" > |
| 10 | <bounds x="0" y="0" width="16" height="16" /> |
| 11 | </backdrop> |
| 12 | <backdrop element="grid" inputtag="GRID.1" inputmask="0x01" > |
| 13 | <bounds x="16" y="0" width="16" height="16" /> |
| 14 | </backdrop> |
| 15 | <backdrop element="grid" inputtag="GRID.2" inputmask="0x01" > |
| 16 | <bounds x="32" y="0" width="16" height="16" /> |
| 17 | </backdrop> |
| 18 | <backdrop element="grid" inputtag="GRID.3" inputmask="0x01" > |
| 19 | <bounds x="48" y="0" width="16" height="16" /> |
| 20 | </backdrop> |
| 21 | <backdrop element="grid" inputtag="GRID.4" inputmask="0x01" > |
| 22 | <bounds x="64" y="0" width="16" height="16" /> |
| 23 | </backdrop> |
| 24 | <backdrop element="grid" inputtag="GRID.5" inputmask="0x01" > |
| 25 | <bounds x="80" y="0" width="16" height="16" /> |
| 26 | </backdrop> |
| 27 | <backdrop element="grid" inputtag="GRID.6" inputmask="0x01" > |
| 28 | <bounds x="96" y="0" width="16" height="16" /> |
| 29 | </backdrop> |
| 30 | <backdrop element="grid" inputtag="GRID.7" inputmask="0x01" > |
| 31 | <bounds x="112" y="0" width="16" height="16" /> |
| 32 | </backdrop> |
| 33 | <backdrop element="grid" inputtag="GRID.8" inputmask="0x01" > |
| 34 | <bounds x="128" y="0" width="16" height="16" /> |
| 35 | </backdrop> |
| 36 | <backdrop element="grid" inputtag="GRID.9" inputmask="0x01" > |
| 37 | <bounds x="144" y="0" width="16" height="16" /> |
| 38 | </backdrop> |
| 39 | <backdrop element="grid" inputtag="GRID.10" inputmask="0x01" > |
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| 41 | </backdrop> |
| 42 | <backdrop element="grid" inputtag="GRID.11" inputmask="0x01" > |
| 43 | <bounds x="176" y="0" width="16" height="16" /> |
| 44 | </backdrop> |
| 45 | <backdrop element="grid" inputtag="GRID.12" inputmask="0x01" > |
| 46 | <bounds x="192" y="0" width="16" height="16" /> |
| 47 | </backdrop> |
| 48 | |
| 49 | <backdrop element="grid" inputtag="GRID.0" inputmask="0x02" > |
| 50 | <bounds x="0" y="16" width="16" height="16" /> |
| 51 | </backdrop> |
| 52 | <backdrop element="grid" inputtag="GRID.1" inputmask="0x02" > |
| 53 | <bounds x="16" y="16" width="16" height="16" /> |
| 54 | </backdrop> |
| 55 | <backdrop element="grid" inputtag="GRID.2" inputmask="0x02" > |
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| 57 | </backdrop> |
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| 60 | </backdrop> |
| 61 | <backdrop element="grid" inputtag="GRID.4" inputmask="0x02" > |
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| 63 | </backdrop> |
| 64 | <backdrop element="grid" inputtag="GRID.5" inputmask="0x02" > |
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| 66 | </backdrop> |
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| 69 | </backdrop> |
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| 71 | <bounds x="112" y="16" width="16" height="16" /> |
| 72 | </backdrop> |
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| 78 | </backdrop> |
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| 87 | </backdrop> |
| 88 | |
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| 352 | </backdrop> |
| 353 | <backdrop element="grid" inputtag="GRID.8" inputmask="0x100" > |
| 354 | <bounds x="128" y="128" width="16" height="16" /> |
| 355 | </backdrop> |
| 356 | <backdrop element="grid" inputtag="GRID.9" inputmask="0x100" > |
| 357 | <bounds x="144" y="128" width="16" height="16" /> |
| 358 | </backdrop> |
| 359 | <backdrop element="grid" inputtag="GRID.10" inputmask="0x100" > |
| 360 | <bounds x="160" y="128" width="16" height="16" /> |
| 361 | </backdrop> |
| 362 | <backdrop element="grid" inputtag="GRID.11" inputmask="0x100" > |
| 363 | <bounds x="176" y="128" width="16" height="16" /> |
| 364 | </backdrop> |
| 365 | <backdrop element="grid" inputtag="GRID.12" inputmask="0x100" > |
| 366 | <bounds x="192" y="128" width="16" height="16" /> |
| 367 | </backdrop> |
| 368 | |
| 369 | <backdrop element="grid" inputtag="GRID.0" inputmask="0x200" > |
| 370 | <bounds x="0" y="144" width="16" height="16" /> |
| 371 | </backdrop> |
| 372 | <backdrop element="grid" inputtag="GRID.1" inputmask="0x200" > |
| 373 | <bounds x="16" y="144" width="16" height="16" /> |
| 374 | </backdrop> |
| 375 | <backdrop element="grid" inputtag="GRID.2" inputmask="0x200" > |
| 376 | <bounds x="32" y="144" width="16" height="16" /> |
| 377 | </backdrop> |
| 378 | <backdrop element="grid" inputtag="GRID.3" inputmask="0x200" > |
| 379 | <bounds x="48" y="144" width="16" height="16" /> |
| 380 | </backdrop> |
| 381 | <backdrop element="grid" inputtag="GRID.4" inputmask="0x200" > |
| 382 | <bounds x="64" y="144" width="16" height="16" /> |
| 383 | </backdrop> |
| 384 | <backdrop element="grid" inputtag="GRID.5" inputmask="0x200" > |
| 385 | <bounds x="80" y="144" width="16" height="16" /> |
| 386 | </backdrop> |
| 387 | <backdrop element="grid" inputtag="GRID.6" inputmask="0x200" > |
| 388 | <bounds x="96" y="144" width="16" height="16" /> |
| 389 | </backdrop> |
| 390 | <backdrop element="grid" inputtag="GRID.7" inputmask="0x200" > |
| 391 | <bounds x="112" y="144" width="16" height="16" /> |
| 392 | </backdrop> |
| 393 | <backdrop element="grid" inputtag="GRID.8" inputmask="0x200" > |
| 394 | <bounds x="128" y="144" width="16" height="16" /> |
| 395 | </backdrop> |
| 396 | <backdrop element="grid" inputtag="GRID.9" inputmask="0x200" > |
| 397 | <bounds x="144" y="144" width="16" height="16" /> |
| 398 | </backdrop> |
| 399 | <backdrop element="grid" inputtag="GRID.10" inputmask="0x200" > |
| 400 | <bounds x="160" y="144" width="16" height="16" /> |
| 401 | </backdrop> |
| 402 | <backdrop element="grid" inputtag="GRID.11" inputmask="0x200" > |
| 403 | <bounds x="176" y="144" width="16" height="16" /> |
| 404 | </backdrop> |
| 405 | <backdrop element="grid" inputtag="GRID.12" inputmask="0x200" > |
| 406 | <bounds x="192" y="144" width="16" height="16" /> |
| 407 | </backdrop> |
| 408 | <screen index="0"> |
| 409 | <bounds left="0" top="0" right="208" bottom="160" /> |
| 410 | </screen> |
| 411 | |
| 412 | </view> |
| 413 | </mamelayout> |
| | No newline at end of file |