Previous

199869 Revisions

Next

r33147 Sunday 2nd November, 2014 at 18:53:39 UTC by Curt Coder
(MESS) victor9k: Floppy WIP. (nw)

[src/mess]	mess.mak
[src/mess/drivers]	victor9k.c
[src/mess/includes]	victor9k.h
[src/mess/machine]	victor9k_fdc.c* victor9k_fdc.h*

trunk/src/mess/drivers/victor9k.c

r241658	r241659
29	29
30	30
31	31	//**************************************************************************
32		//  READ/WRITE HANDLERS
33		//**************************************************************************
34
35		//-------------------------------------------------
36		//  floppy_p1_r -
37		//-------------------------------------------------
38
39		READ8_MEMBER( victor9k_state::floppy_p1_r )
40		{
41		/*
42
43		bit     description
44
45		0       L0MS0
46		1       L0MS1
47		2       L0MS2
48		3       L0MS3
49		4       L1MS0
50		5       L1MS1
51		6       L1MS2
52		7       L1MS3
53
54		*/
55
56		return m_lms;
57		}
58
59
60		//-------------------------------------------------
61		//  floppy_p2_r -
62		//-------------------------------------------------
63
64		READ8_MEMBER( victor9k_state::floppy_p2_r )
65		{
66		/*
67
68		bit     description
69
70		0
71		1
72		2
73		3
74		4
75		5
76		6       RDY0
77		7       RDY1
78
79		*/
80
81		UINT8 data = 0;
82
83		data |= m_rdy0 << 6;
84		data |= m_rdy1 << 7;
85
86		return data;
87		}
88
89
90		//-------------------------------------------------
91		//  floppy_p2_w -
92		//-------------------------------------------------
93
94		WRITE8_MEMBER( victor9k_state::floppy_p2_w )
95		{
96		/*
97
98		bit     description
99
100		0       START0
101		1       STOP0
102		2       START1
103		3       STOP1
104		4       SEL1
105		5       SEL0
106		6
107		7
108
109		*/
110
111		if (BIT(data, 0)) m_floppy0->mon_w(0);
112		if (BIT(data, 1)) m_floppy0->mon_w(1);
113		if (BIT(data, 2)) m_floppy1->mon_w(0);
114		if (BIT(data, 3)) m_floppy1->mon_w(1);
115
116		int sel0 = BIT(data, 5);
117
118		if (m_sel0 && !sel0)
119		{
120		m_da0 = m_da;
121		//m_floppy0->set_rpm();
122		}
123
124		m_sel0 = sel0;
125
126		int sel1 = BIT(data, 4);
127
128		if (m_sel1 && !sel1)
129		{
130		m_da1 = m_da;
131		//m_floppy1->set_rpm();
132		}
133
134		m_sel1 = sel1;
135		}
136
137
138		//-------------------------------------------------
139		//  tach0_r -
140		//-------------------------------------------------
141
142		READ8_MEMBER( victor9k_state::tach0_r )
143		{
144		return m_tach0;
145		}
146
147
148		//-------------------------------------------------
149		//  tach1_r -
150		//-------------------------------------------------
151
152		READ8_MEMBER( victor9k_state::tach1_r )
153		{
154		return m_tach1;
155		}
156
157
158		//-------------------------------------------------
159		//  da_w -
160		//-------------------------------------------------
161
162		WRITE8_MEMBER( victor9k_state::da_w )
163		{
164		m_da = data;
165		}
166
167
168
169		//**************************************************************************
170	32	//  ADDRESS MAPS
171	33	//**************************************************************************
172	34
r241658	r241659
193	55	ADDRESS_MAP_END
194	56
195	57
196		//-------------------------------------------------
197		//  ADDRESS_MAP( floppy_io )
198		//-------------------------------------------------
199	58
200		static ADDRESS_MAP_START( floppy_io, AS_IO, 8, victor9k_state )
201		AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(floppy_p1_r) AM_WRITENOP
202		AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(floppy_p2_r, floppy_p2_w)
203		AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(tach0_r)
204		AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(tach1_r)
205		AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_WRITE(da_w)
206		ADDRESS_MAP_END
207
208
209
210	59	//**************************************************************************
211	60	//  INPUT PORTS
212	61	//**************************************************************************
r241658	r241659
511	360
512	361	*/
513	362
514		m_lms = (m_lms & 0xf0) | (data & 0x0f);
515		m_st[0] = data >> 4;
	363	m_fdc->l0ms_w(data & 0x0f);
	364	m_fdc->st0_w(data >> 4);
516	365	}
517	366
518	367	WRITE8_MEMBER( victor9k_state::via4_pb_w )
r241658	r241659
532	381
533	382	*/
534	383
535		m_lms = (data << 4) | (m_lms & 0x0f);
536		m_st[1] = data >> 4;
	384	m_fdc->l1ms_w(data & 0x0f);
	385	m_fdc->st1_w(data >> 4);
537	386	}
538	387
539	388	WRITE_LINE_MEMBER( victor9k_state::mode_w )
r241658	r241659
609	458	UINT8 data = 0;
610	459
611	460	// track 0 drive A sense
612		data |= m_floppy0->trk00_r() << 1;
	461	data |= m_fdc->trk0d0_r() << 1;
613	462
614	463	// track 0 drive B sense
615		data |= m_floppy1->trk00_r() << 3;
	464	data |= m_fdc->trk0d1_r() << 3;
616	465
617	466	// write protect sense
618		data |= (m_drive ? m_floppy1->wpt_r() : m_floppy0->wpt_r()) << 6;
	467	data |= m_fdc->wps_r() << 6;
619	468
620	469	// disk sync detect
621		data |= m_sync << 7;
	470	data |= m_fdc->sync_r() << 7;
622	471
623	472	return data;
624	473	}
r241658	r241659
641	490	*/
642	491
643	492	// LED, drive A
644		output_set_led_value(LED_A, BIT(data, 0));
	493	m_fdc->led0a_w(BIT(data, 0));
645	494
646	495	// LED, drive B
647		output_set_led_value(LED_B, BIT(data, 2));
	496	m_fdc->led1a_w(BIT(data, 2));
648	497
649	498	// dual side select
650		m_side = BIT(data, 4);
	499	m_fdc->side_select_w(BIT(data, 4));
651	500
652	501	// select drive A/B
653		m_drive = BIT(data, 5);
	502	m_fdc->drive_select_w(BIT(data, 5));
654	503	}
655	504
656	505	READ8_MEMBER( victor9k_state::via6_pb_r )
r241658	r241659
673	522	UINT8 data = 0;
674	523
675	524	// motor speed status, drive A
676		data |= m_rdy0;
	525	data |= m_fdc->rdy0_r();
677	526
678	527	// motor speed status, drive B
679		data |= m_rdy1 << 1;
	528	data |= m_fdc->rdy1_r() << 1;
680	529
681	530	// door B sense
682		data |= m_ds1 << 3;
	531	data |= m_fdc->ds1_r() << 3;
683	532
684	533	// door A sense
685		data |= m_ds0 << 4;
	534	data |= m_fdc->ds0_r() << 4;
686	535
687	536	// single/double sided
688		data |= (m_drive ? m_floppy1->twosid_r() : m_floppy0->twosid_r()) << 5;
	537	data |= m_fdc->single_double_sided_r() << 5;
689	538
690	539	return data;
691	540	}
r241658	r241659
708	557	*/
709	558
710	559	// motor speed controller reset
711		if (!BIT(data, 2))
712		m_fdc_cpu->reset();
	560	m_fdc->screset_w(BIT(data, 2));
713	561
714	562	// stepper enable A
715		m_stp[0] = BIT(data, 6);
	563	m_fdc->stp0_w(BIT(data, 6));
716	564
717	565	// stepper enable B
718		m_stp[1] = BIT(data, 7);
	566	m_fdc->stp1_w(BIT(data, 7));
719	567	}
720	568
721		WRITE_LINE_MEMBER( victor9k_state::drw_w )
722		{
723		}
724
725		WRITE_LINE_MEMBER( victor9k_state::erase_w )
726		{
727		}
728
729	569	WRITE_LINE_MEMBER( victor9k_state::via6_irq_w )
730	570	{
731	571	m_via6_irq = state;
r241658	r241659
753	593	m_via2->write_pa6(state);
754	594	}
755	595
756		//-------------------------------------------------
757		//  SLOT_INTERFACE( victor9k_floppies )
758		//-------------------------------------------------
759	596
760		void victor9k_state::ready0_cb(floppy_image_device *device, int state)
761		{
762		m_rdy0 = state;
763
764		m_via5->write_ca2(m_rdy0);
765		}
766
767		int victor9k_state::load0_cb(floppy_image_device *device)
768		{
769		m_ds0 = 0;
770
771		m_via4->write_ca1(m_ds0);
772
773		return IMAGE_INIT_PASS;
774		}
775
776		void victor9k_state::unload0_cb(floppy_image_device *device)
777		{
778		m_ds0 = 1;
779
780		m_via4->write_ca1(m_ds0);
781		}
782
783		void victor9k_state::ready1_cb(floppy_image_device *device, int state)
784		{
785		m_rdy1 = state;
786
787		m_via5->write_cb2(m_rdy1);
788		}
789
790		int victor9k_state::load1_cb(floppy_image_device *device)
791		{
792		m_ds1 = 0;
793
794		m_via4->write_cb1(m_ds1);
795
796		return IMAGE_INIT_PASS;
797		}
798
799		void victor9k_state::unload1_cb(floppy_image_device *device)
800		{
801		m_ds1 = 1;
802
803		m_via4->write_cb1(m_ds1);
804		}
805
806		static SLOT_INTERFACE_START( victor9k_floppies )
807		SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
808		SLOT_INTERFACE_END
809
810		FLOPPY_FORMATS_MEMBER( victor9k_state::floppy_formats )
811		FLOPPY_VICTOR_9000_FORMAT
812		FLOPPY_FORMATS_END
813
814
815	597	//**************************************************************************
816	598	//  MACHINE INITIALIZATION
817	599	//**************************************************************************
r241658	r241659
822	604
823	605	void victor9k_state::machine_start()
824	606	{
825		// set floppy callbacks
826		m_floppy0->setup_ready_cb(floppy_image_device::ready_cb(FUNC(victor9k_state::ready0_cb), this));
827		m_floppy0->setup_load_cb(floppy_image_device::load_cb(FUNC(victor9k_state::load0_cb), this));
828		m_floppy0->setup_unload_cb(floppy_image_device::unload_cb(FUNC(victor9k_state::unload0_cb), this));
829		m_floppy1->setup_ready_cb(floppy_image_device::ready_cb(FUNC(victor9k_state::ready1_cb), this));
830		m_floppy1->setup_load_cb(floppy_image_device::load_cb(FUNC(victor9k_state::load1_cb), this));
831		m_floppy1->setup_unload_cb(floppy_image_device::unload_cb(FUNC(victor9k_state::unload1_cb), this));
	607	// state saving
	608	save_item(NAME(m_brt));
	609	save_item(NAME(m_cont));
	610	save_item(NAME(m_via1_irq));
	611	save_item(NAME(m_via2_irq));
	612	save_item(NAME(m_via3_irq));
	613	save_item(NAME(m_via4_irq));
	614	save_item(NAME(m_via5_irq));
	615	save_item(NAME(m_via6_irq));
	616	save_item(NAME(m_ssda_irq));
832	617
833	618	// memory banking
834	619	address_space &program = m_maincpu->space(AS_PROGRAM);
835	620	program.install_ram(0x00000, m_ram->size() - 1, m_ram->pointer());
836
837		m_via5->write_ca1(m_brdy);
838		m_via6->write_ca1(m_gcrerr);
839	621	}
840	622
841	623
r241658	r241659
854	636	MCFG_CPU_PROGRAM_MAP(victor9k_mem)
855	637	MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE(I8259A_TAG, pic8259_device, inta_cb)
856	638
857		MCFG_CPU_ADD(I8048_TAG, I8048, XTAL_30MHz/6)
858		MCFG_CPU_IO_MAP(floppy_io)
859
860	639	// video hardware
861	640	MCFG_SCREEN_ADD(SCREEN_TAG, RASTER)
862	641	MCFG_SCREEN_REFRESH_RATE(50)
r241658	r241659
942	721	MCFG_VIA6522_READPB_HANDLER(READ8(victor9k_state, via6_pb_r))
943	722	MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(victor9k_state, via6_pa_w))
944	723	MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(victor9k_state, via6_pb_w))
945		MCFG_VIA6522_CA2_HANDLER(WRITELINE(victor9k_state, drw_w))
946		MCFG_VIA6522_CB2_HANDLER(WRITELINE(victor9k_state, erase_w))
	724	MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(FDC_TAG, victor_9000_fdc_t, drw_w))
	725	MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, victor_9000_fdc_t, erase_w))
947	726	MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via6_irq_w))
948	727
949		MCFG_FLOPPY_DRIVE_ADD(I8048_TAG":0", victor9k_floppies, "525qd", victor9k_state::floppy_formats)
950		MCFG_FLOPPY_DRIVE_ADD(I8048_TAG":1", victor9k_floppies, "525qd", victor9k_state::floppy_formats)
951
952	728	MCFG_RS232_PORT_ADD(RS232_A_TAG, default_rs232_devices, NULL)
953	729	MCFG_RS232_RXD_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, rxa_w))
954	730	MCFG_RS232_DCD_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, dcda_w))
r241658	r241659
967	743	MCFG_VICTOR9K_KBRDY_HANDLER(WRITELINE(victor9k_state, kbrdy_w))
968	744	MCFG_VICTOR9K_KBDATA_HANDLER(WRITELINE(victor9k_state, kbdata_w))
969	745
	746	MCFG_DEVICE_ADD(FDC_TAG, VICTOR_9000_FDC, 0)
	747	MCFG_VICTOR_9000_FDC_DS0_CB(DEVWRITELINE(M6522_4_TAG, via6522_device, write_ca1))
	748	MCFG_VICTOR_9000_FDC_DS1_CB(DEVWRITELINE(M6522_4_TAG, via6522_device, write_cb1))
	749	MCFG_VICTOR_9000_FDC_RDY0_CB(DEVWRITELINE(M6522_5_TAG, via6522_device, write_ca2))
	750	MCFG_VICTOR_9000_FDC_RDY1_CB(DEVWRITELINE(M6522_5_TAG, via6522_device, write_cb2))
	751	MCFG_VICTOR_9000_FDC_BRDY_CB(DEVWRITELINE(M6522_5_TAG, via6522_device, write_ca1))
	752	MCFG_VICTOR_9000_FDC_GCRERR_CB(DEVWRITELINE(M6522_6_TAG, via6522_device, write_ca1))
	753
970	754	// internal ram
971	755	MCFG_RAM_ADD(RAM_TAG)
972	756	MCFG_RAM_DEFAULT_SIZE("128K")
r241658	r241659
995	779	ROM_SYSTEM_BIOS( 1, "univ", "Universal" )
996	780	ROMX_LOAD( "v9000 univ. fe f3f7 13db.7j", 0x0000, 0x1000, CRC(25c7a59f) SHA1(8784e9aa7eb9439f81e18b8e223c94714e033911), ROM_BIOS(2) )
997	781	ROMX_LOAD( "v9000 univ. ff f3f7 39fe.8j", 0x1000, 0x1000, CRC(496c7467) SHA1(eccf428f62ef94ab85f4a43ba59ae6a066244a66), ROM_BIOS(2) )
998
999		ROM_REGION( 0x400, I8048_TAG, 0)
1000		ROM_LOAD( "36080.5d", 0x000, 0x400, CRC(9bf49f7d) SHA1(b3a11bb65105db66ae1985b6f482aab6ea1da38b) )
1001
1002		ROM_REGION( 0x800, "gcr", 0 )
1003		ROM_LOAD( "100836-001.4k", 0x000, 0x800, CRC(adc601bd) SHA1(6eeff3d2063ae2d97452101aa61e27ef83a467e5) )
1004	782	ROM_END
1005	783
1006	784

trunk/src/mess/includes/victor9k.h

r241658	r241659
16	16
17	17	#include "bus/rs232/rs232.h"
18	18	#include "cpu/i86/i86.h"
19		#include "cpu/mcs48/mcs48.h"
20	19	#include "formats/victor9k_dsk.h"
21	20	#include "imagedev/floppy.h"
22	21	#include "machine/ram.h"
r241658	r241659
28	27	#include "machine/pic8259.h"
29	28	#include "machine/z80dart.h"
30	29	#include "machine/victor9kb.h"
	30	#include "machine/victor9k_fdc.h"
31	31	#include "sound/hc55516.h"
32	32	#include "video/mc6845.h"
33	33
34	34	#define I8088_TAG       "8l"
35		#define I8048_TAG       "5d"
36	35	#define I8253_TAG       "13h"
37	36	#define I8259A_TAG      "7l"
38	37	#define UPD7201_TAG     "16e"
r241658	r241659
52	51	#define RS232_B_TAG     "rs232b"
53	52	#define SCREEN_TAG      "screen"
54	53	#define VICTOR9K_KEYBOARD_TAG   "victor9kb"
	54	#define FDC_TAG         "fdc"
55	55
56	56	class victor9k_state : public driver_device
57	57	{
58	58	public:
59		victor9k_state(const machine_config &mconfig, device_type type, const char *tag)
60		: driver_device(mconfig, type, tag),
61		m_maincpu(*this, I8088_TAG),
62		m_fdc_cpu(*this, I8048_TAG),
63		m_ieee488(*this, IEEE488_TAG),
64		m_pic(*this, I8259A_TAG),
65		m_upd7201(*this, UPD7201_TAG),
66		m_ssda(*this, MC6852_TAG),
67		m_via1(*this, M6522_1_TAG),
68		m_via2(*this, M6522_2_TAG),
69		m_via3(*this, M6522_3_TAG),
70		m_via4(*this, M6522_4_TAG),
71		m_via5(*this, M6522_5_TAG),
72		m_via6(*this, M6522_6_TAG),
73		m_cvsd(*this, HC55516_TAG),
74		m_crtc(*this, HD46505S_TAG),
75		m_ram(*this, RAM_TAG),
76		m_floppy0(*this, I8048_TAG":0:525qd"),
77		m_floppy1(*this, I8048_TAG":1:525qd"),
78		m_kb(*this, VICTOR9K_KEYBOARD_TAG),
79		m_rs232a(*this, RS232_A_TAG),
80		m_rs232b(*this, RS232_B_TAG),
81		m_video_ram(*this, "video_ram"),
82		m_da(0),
83		m_da0(0),
84		m_da1(0),
85		m_sel0(0),
86		m_sel1(0),
87		m_tach0(0),
88		m_tach1(0),
89		m_rdy0(0),
90		m_rdy1(0),
91		m_ds0(1),
92		m_ds1(1),
93		m_lms(0),
94		m_brdy(1),
95		m_sync(1),
96		m_gcrerr(0),
97		m_palette(*this, "palette")
	59	victor9k_state(const machine_config &mconfig, device_type type, const char *tag) :
	60	driver_device(mconfig, type, tag),
	61	m_maincpu(*this, I8088_TAG),
	62	m_ieee488(*this, IEEE488_TAG),
	63	m_pic(*this, I8259A_TAG),
	64	m_upd7201(*this, UPD7201_TAG),
	65	m_ssda(*this, MC6852_TAG),
	66	m_via1(*this, M6522_1_TAG),
	67	m_via2(*this, M6522_2_TAG),
	68	m_via3(*this, M6522_3_TAG),
	69	m_via4(*this, M6522_4_TAG),
	70	m_via5(*this, M6522_5_TAG),
	71	m_via6(*this, M6522_6_TAG),
	72	m_cvsd(*this, HC55516_TAG),
	73	m_crtc(*this, HD46505S_TAG),
	74	m_ram(*this, RAM_TAG),
	75	m_kb(*this, VICTOR9K_KEYBOARD_TAG),
	76	m_fdc(*this, FDC_TAG),
	77	m_rs232a(*this, RS232_A_TAG),
	78	m_rs232b(*this, RS232_B_TAG),
	79	m_palette(*this, "palette"),
	80	m_video_ram(*this, "video_ram"),
	81	m_brt(0),
	82	m_cont(0),
	83	m_via1_irq(CLEAR_LINE),
	84	m_via2_irq(CLEAR_LINE),
	85	m_via3_irq(CLEAR_LINE),
	86	m_via4_irq(CLEAR_LINE),
	87	m_via5_irq(CLEAR_LINE),
	88	m_via6_irq(CLEAR_LINE),
	89	m_ssda_irq(CLEAR_LINE)
98	90	{ }
99	91
100	92	required_device<cpu_device> m_maincpu;
101		required_device<cpu_device> m_fdc_cpu;
102	93	required_device<ieee488_device> m_ieee488;
103	94	required_device<pic8259_device> m_pic;
104	95	required_device<upd7201_device> m_upd7201;
r241658	r241659
112	103	required_device<hc55516_device> m_cvsd;
113	104	required_device<mc6845_device> m_crtc;
114	105	required_device<ram_device> m_ram;
115		required_device<floppy_image_device> m_floppy0;
116		required_device<floppy_image_device> m_floppy1;
117	106	required_device<victor9k_keyboard_device> m_kb;
	107	required_device<victor_9000_fdc_t> m_fdc;
118	108	required_device<rs232_port_device> m_rs232a;
119	109	required_device<rs232_port_device> m_rs232b;
	110	required_device<palette_device> m_palette;
	111	required_shared_ptr<UINT8> m_video_ram;
120	112
121	113	virtual void machine_start();
122	114
123		DECLARE_READ8_MEMBER( floppy_p1_r );
124		DECLARE_READ8_MEMBER( floppy_p2_r );
125		DECLARE_WRITE8_MEMBER( floppy_p2_w );
126		DECLARE_READ8_MEMBER( tach0_r );
127		DECLARE_READ8_MEMBER( tach1_r );
128		DECLARE_WRITE8_MEMBER( da_w );
129
130	115	DECLARE_WRITE8_MEMBER( via1_pa_w );
131	116	DECLARE_WRITE_LINE_MEMBER( write_nfrd );
132	117	DECLARE_WRITE_LINE_MEMBER( write_ndac );
r241658	r241659
155	140	DECLARE_READ8_MEMBER( via6_pb_r );
156	141	DECLARE_WRITE8_MEMBER( via6_pa_w );
157	142	DECLARE_WRITE8_MEMBER( via6_pb_w );
158		DECLARE_WRITE_LINE_MEMBER( drw_w );
159		DECLARE_WRITE_LINE_MEMBER( erase_w );
160	143	DECLARE_WRITE_LINE_MEMBER( kbrdy_w );
161	144	DECLARE_WRITE_LINE_MEMBER( kbdata_w );
162	145	DECLARE_WRITE_LINE_MEMBER( vert_w );
r241658	r241659
165	148	DECLARE_WRITE_LINE_MEMBER( ssda_irq_w );
166	149	MC6845_UPDATE_ROW( crtc_update_row );
167	150
168		DECLARE_FLOPPY_FORMATS( floppy_formats );
169
170		void ready0_cb(floppy_image_device *, int device);
171		int load0_cb(floppy_image_device *device);
172		void unload0_cb(floppy_image_device *device);
173		void ready1_cb(floppy_image_device *, int device);
174		int load1_cb(floppy_image_device *device);
175		void unload1_cb(floppy_image_device *device);
176
177		enum
178		{
179		LED_A = 0,
180		LED_B
181		};
182
183	151	/* video state */
184		required_shared_ptr<UINT8> m_video_ram;
185	152	int m_brt;
186	153	int m_cont;
187	154
r241658	r241659
194	161	int m_via6_irq;
195	162	int m_ssda_irq;
196	163
197		/* floppy state */
198		UINT8 m_da;
199		UINT8 m_da0;
200		UINT8 m_da1;
201		int m_sel0;
202		int m_sel1;
203		int m_tach0;
204		int m_tach1;
205		int m_rdy0;
206		int m_rdy1;
207		int m_ds0;
208		int m_ds1;
209		UINT8 m_lms;                         /* motor speed */
210		int m_st[2];                        /* stepper phase */
211		int m_stp[2];                        /* stepper enable */
212		int m_drive;                        /* selected drive */
213		int m_side;                         /* selected side */
214		int m_brdy;
215		int m_sync;
216		int m_gcrerr;
217
218	164	DECLARE_WRITE_LINE_MEMBER(mux_serial_b_w);
219	165	DECLARE_WRITE_LINE_MEMBER(mux_serial_a_w);
220		required_device<palette_device> m_palette;
221	166	};
222	167
223	168	#endif

trunk/src/mess/machine/victor9k_fdc.c

r0	r241659
	1	// license:BSD-3-Clause
	2	// copyright-holders:Curt Coder
	3	/**********************************************************************
	4
	5	Victor 9000 floppy disk controller emulation
	6
	7	Copyright MESS Team.
	8	Visit http://mamedev.org for licensing and usage restrictions.
	9
	10	**********************************************************************/
	11
	12	/*
	13
	14	TODO:
	15
	16	- everything
	17
	18	*/
	19
	20	#include "victor9k_fdc.h"
	21
	22
	23
	24	//**************************************************************************
	25	//  MACROS / CONSTANTS
	26	//**************************************************************************
	27
	28	#define LOG 0
	29
	30	#define I8048_TAG       "5d"
	31
	32
	33
	34	//**************************************************************************
	35	//  DEVICE DEFINITIONS
	36	//**************************************************************************
	37
	38	const device_type VICTOR_9000_FDC = &device_creator<victor_9000_fdc_t>;
	39
	40
	41	//-------------------------------------------------
	42	//  ROM( victor_9000_fdc )
	43	//-------------------------------------------------
	44
	45	ROM_START( victor_9000_fdc )
	46	ROM_REGION( 0x400, I8048_TAG, 0)
	47	ROM_LOAD( "36080.5d", 0x000, 0x400, CRC(9bf49f7d) SHA1(b3a11bb65105db66ae1985b6f482aab6ea1da38b) )
	48
	49	ROM_REGION( 0x800, "gcr", 0 )
	50	ROM_LOAD( "100836-001.4k", 0x000, 0x800, CRC(adc601bd) SHA1(6eeff3d2063ae2d97452101aa61e27ef83a467e5) )
	51	ROM_END
	52
	53
	54	//-------------------------------------------------
	55	//  rom_region - device-specific ROM region
	56	//-------------------------------------------------
	57
	58	const rom_entry *victor_9000_fdc_t::device_rom_region() const
	59	{
	60	return ROM_NAME( victor_9000_fdc );
	61	}
	62
	63
	64	//-------------------------------------------------
	65	//  ADDRESS_MAP( floppy_io )
	66	//-------------------------------------------------
	67
	68	static ADDRESS_MAP_START( floppy_io, AS_IO, 8, victor_9000_fdc_t )
	69	AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(floppy_p1_r) AM_WRITENOP
	70	AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(floppy_p2_r, floppy_p2_w)
	71	AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(tach0_r)
	72	AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(tach1_r)
	73	AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_WRITE(da_w)
	74	ADDRESS_MAP_END
	75
	76
	77	//-------------------------------------------------
	78	//  SLOT_INTERFACE( victor9k_floppies )
	79	//-------------------------------------------------
	80
	81	void victor_9000_fdc_t::ready0_cb(floppy_image_device *device, int state)
	82	{
	83	m_rdy0 = state;
	84
	85	m_rdy0_cb(state);
	86	}
	87
	88	int victor_9000_fdc_t::load0_cb(floppy_image_device *device)
	89	{
	90	m_ds0 = 0;
	91
	92	m_ds0_cb(0);
	93
	94	return IMAGE_INIT_PASS;
	95	}
	96
	97	void victor_9000_fdc_t::unload0_cb(floppy_image_device *device)
	98	{
	99	m_ds0 = 1;
	100
	101	m_ds0_cb(1);
	102	}
	103
	104	void victor_9000_fdc_t::ready1_cb(floppy_image_device *device, int state)
	105	{
	106	m_rdy1 = state;
	107
	108	m_rdy1_cb(state);
	109	}
	110
	111	int victor_9000_fdc_t::load1_cb(floppy_image_device *device)
	112	{
	113	m_ds1 = 0;
	114
	115	m_ds1_cb(0);
	116
	117	return IMAGE_INIT_PASS;
	118	}
	119
	120	void victor_9000_fdc_t::unload1_cb(floppy_image_device *device)
	121	{
	122	m_ds1 = 1;
	123
	124	m_ds1_cb(1);
	125	}
	126
	127	static SLOT_INTERFACE_START( victor9k_floppies )
	128	SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
	129	SLOT_INTERFACE_END
	130
	131	FLOPPY_FORMATS_MEMBER( victor_9000_fdc_t::floppy_formats )
	132	FLOPPY_VICTOR_9000_FORMAT
	133	FLOPPY_FORMATS_END
	134
	135
	136	//-------------------------------------------------
	137	//  MACHINE_CONFIG_FRAGMENT( victor_9000_fdc )
	138	//-------------------------------------------------
	139
	140	static MACHINE_CONFIG_FRAGMENT( victor_9000_fdc )
	141	MCFG_CPU_ADD(I8048_TAG, I8048, XTAL_30MHz/6)
	142	MCFG_CPU_IO_MAP(floppy_io)
	143
	144	MCFG_FLOPPY_DRIVE_ADD(I8048_TAG":0", victor9k_floppies, "525qd", victor_9000_fdc_t::floppy_formats)
	145	MCFG_FLOPPY_DRIVE_ADD(I8048_TAG":1", victor9k_floppies, "525qd", victor_9000_fdc_t::floppy_formats)
	146	MACHINE_CONFIG_END
	147
	148
	149	//-------------------------------------------------
	150	//  machine_config_additions - device-specific
	151	//  machine configurations
	152	//-------------------------------------------------
	153
	154	machine_config_constructor victor_9000_fdc_t::device_mconfig_additions() const
	155	{
	156	return MACHINE_CONFIG_NAME( victor_9000_fdc );
	157	}
	158
	159
	160
	161	//**************************************************************************
	162	//  LIVE DEVICE
	163	//**************************************************************************
	164
	165	//-------------------------------------------------
	166	//  victor_9000_fdc_t - constructor
	167	//-------------------------------------------------
	168
	169	victor_9000_fdc_t::victor_9000_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	170	device_t(mconfig, VICTOR_9000_FDC, "Victor 9000 FDC", tag, owner, clock, "victor9k_fdc", __FILE__),
	171	m_ds0_cb(*this),
	172	m_ds1_cb(*this),
	173	m_rdy0_cb(*this),
	174	m_rdy1_cb(*this),
	175	m_brdy_cb(*this),
	176	m_gcrerr_cb(*this),
	177	m_maincpu(*this, I8048_TAG),
	178	m_floppy0(*this, I8048_TAG":0:525qd"),
	179	m_floppy1(*this, I8048_TAG":1:525qd"),
	180	m_gcr_rom(*this, "gcr"),
	181	m_da(0),
	182	m_da0(0),
	183	m_da1(0),
	184	m_sel0(0),
	185	m_sel1(0),
	186	m_tach0(0),
	187	m_tach1(0),
	188	m_rdy0(0),
	189	m_rdy1(0),
	190	m_ds0(1),
	191	m_ds1(1),
	192	m_lms(0),
	193	m_st0(0),
	194	m_st1(0),
	195	m_stp0(0),
	196	m_stp1(0),
	197	m_drive(0),
	198	m_side(0),
	199	m_brdy(1),
	200	m_sync(1),
	201	m_gcrerr(0)
	202	{
	203	}
	204
	205
	206	//-------------------------------------------------
	207	//  device_start - device-specific startup
	208	//-------------------------------------------------
	209
	210	void victor_9000_fdc_t::device_start()
	211	{
	212	// state saving
	213	save_item(NAME(m_da));
	214	save_item(NAME(m_da0));
	215	save_item(NAME(m_da1));
	216	save_item(NAME(m_sel0));
	217	save_item(NAME(m_sel1));
	218	save_item(NAME(m_tach0));
	219	save_item(NAME(m_tach1));
	220	save_item(NAME(m_rdy0));
	221	save_item(NAME(m_rdy1));
	222	save_item(NAME(m_ds0));
	223	save_item(NAME(m_ds1));
	224	save_item(NAME(m_lms));
	225	save_item(NAME(m_st0));
	226	save_item(NAME(m_st1));
	227	save_item(NAME(m_stp0));
	228	save_item(NAME(m_stp1));
	229	save_item(NAME(m_drive));
	230	save_item(NAME(m_side));
	231	save_item(NAME(m_brdy));
	232	save_item(NAME(m_sync));
	233	save_item(NAME(m_gcrerr));
	234	}
	235
	236
	237	//-------------------------------------------------
	238	//  device_reset - device-specific reset
	239	//-------------------------------------------------
	240
	241	void victor_9000_fdc_t::device_reset()
	242	{
	243	// resolve callbacks
	244	m_ds0_cb.resolve_safe();
	245	m_ds1_cb.resolve_safe();
	246	m_rdy0_cb.resolve_safe();
	247	m_rdy1_cb.resolve_safe();
	248	m_brdy_cb.resolve_safe();
	249	m_gcrerr_cb.resolve_safe();
	250
	251	// set floppy callbacks
	252	m_floppy0->setup_ready_cb(floppy_image_device::ready_cb(FUNC(victor_9000_fdc_t::ready0_cb), this));
	253	m_floppy0->setup_load_cb(floppy_image_device::load_cb(FUNC(victor_9000_fdc_t::load0_cb), this));
	254	m_floppy0->setup_unload_cb(floppy_image_device::unload_cb(FUNC(victor_9000_fdc_t::unload0_cb), this));
	255	m_floppy1->setup_ready_cb(floppy_image_device::ready_cb(FUNC(victor_9000_fdc_t::ready1_cb), this));
	256	m_floppy1->setup_load_cb(floppy_image_device::load_cb(FUNC(victor_9000_fdc_t::load1_cb), this));
	257	m_floppy1->setup_unload_cb(floppy_image_device::unload_cb(FUNC(victor_9000_fdc_t::unload1_cb), this));
	258	}
	259
	260
	261	//-------------------------------------------------
	262	//  device_timer - handler timer events
	263	//-------------------------------------------------
	264
	265	void victor_9000_fdc_t::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
	266	{
	267	}
	268
	269
	270	//-------------------------------------------------
	271	//  floppy_p1_r -
	272	//-------------------------------------------------
	273
	274	READ8_MEMBER( victor_9000_fdc_t::floppy_p1_r )
	275	{
	276	/*
	277
	278	bit     description
	279
	280	0       L0MS0
	281	1       L0MS1
	282	2       L0MS2
	283	3       L0MS3
	284	4       L1MS0
	285	5       L1MS1
	286	6       L1MS2
	287	7       L1MS3
	288
	289	*/
	290
	291	return m_lms;
	292	}
	293
	294
	295	//-------------------------------------------------
	296	//  floppy_p2_r -
	297	//-------------------------------------------------
	298
	299	READ8_MEMBER( victor_9000_fdc_t::floppy_p2_r )
	300	{
	301	/*
	302
	303	bit     description
	304
	305	0
	306	1
	307	2
	308	3
	309	4
	310	5
	311	6       RDY0
	312	7       RDY1
	313
	314	*/
	315
	316	UINT8 data = 0;
	317
	318	data |= m_rdy0 << 6;
	319	data |= m_rdy1 << 7;
	320
	321	return data;
	322	}
	323
	324
	325	//-------------------------------------------------
	326	//  floppy_p2_w -
	327	//-------------------------------------------------
	328
	329	WRITE8_MEMBER( victor_9000_fdc_t::floppy_p2_w )
	330	{
	331	/*
	332
	333	bit     description
	334
	335	0       START0
	336	1       STOP0
	337	2       START1
	338	3       STOP1
	339	4       SEL1
	340	5       SEL0
	341	6
	342	7
	343
	344	*/
	345
	346	if (BIT(data, 0)) m_floppy0->mon_w(0);
	347	if (BIT(data, 1)) m_floppy0->mon_w(1);
	348	if (BIT(data, 2)) m_floppy1->mon_w(0);
	349	if (BIT(data, 3)) m_floppy1->mon_w(1);
	350
	351	int sel0 = BIT(data, 5);
	352
	353	if (m_sel0 && !sel0)
	354	{
	355	m_da0 = m_da;
	356	//m_floppy0->set_rpm();
	357	}
	358
	359	m_sel0 = sel0;
	360
	361	int sel1 = BIT(data, 4);
	362
	363	if (m_sel1 && !sel1)
	364	{
	365	m_da1 = m_da;
	366	//m_floppy1->set_rpm();
	367	}
	368
	369	m_sel1 = sel1;
	370	}
	371
	372
	373	//-------------------------------------------------
	374	//  tach0_r -
	375	//-------------------------------------------------
	376
	377	READ8_MEMBER( victor_9000_fdc_t::tach0_r )
	378	{
	379	return m_tach0;
	380	}
	381
	382
	383	//-------------------------------------------------
	384	//  tach1_r -
	385	//-------------------------------------------------
	386
	387	READ8_MEMBER( victor_9000_fdc_t::tach1_r )
	388	{
	389	return m_tach1;
	390	}
	391
	392
	393	//-------------------------------------------------
	394	//  da_w -
	395	//-------------------------------------------------
	396
	397	WRITE8_MEMBER( victor_9000_fdc_t::da_w )
	398	{
	399	m_da = data;
	400	}

trunk/src/mess/machine/victor9k_fdc.h

r0	r241659
	1	// license:BSD-3-Clause
	2	// copyright-holders:Curt Coder
	3	/**********************************************************************
	4
	5	Victor 9000 floppy disk controller emulation
	6
	7	Copyright MESS Team.
	8	Visit http://mamedev.org for licensing and usage restrictions.
	9
	10	**********************************************************************/
	11
	12	#pragma once
	13
	14	#ifndef __VICTOR_9000_FDC__
	15	#define __VICTOR_9000_FDC__
	16
	17	#include "emu.h"
	18	#include "cpu/mcs48/mcs48.h"
	19	#include "formats/victor9k_dsk.h"
	20	#include "imagedev/floppy.h"
	21
	22
	23
	24	//**************************************************************************
	25	//  INTERFACE CONFIGURATION MACROS
	26	//**************************************************************************
	27
	28	#define MCFG_VICTOR_9000_FDC_DS0_CB(_write) \
	29	devcb = &victor_9000_fdc_t::set_ds0_wr_callback(*device, DEVCB_##_write);
	30
	31	#define MCFG_VICTOR_9000_FDC_DS1_CB(_write) \
	32	devcb = &victor_9000_fdc_t::set_ds1_wr_callback(*device, DEVCB_##_write);
	33
	34	#define MCFG_VICTOR_9000_FDC_RDY0_CB(_write) \
	35	devcb = &victor_9000_fdc_t::set_rdy0_wr_callback(*device, DEVCB_##_write);
	36
	37	#define MCFG_VICTOR_9000_FDC_RDY1_CB(_write) \
	38	devcb = &victor_9000_fdc_t::set_rdy1_wr_callback(*device, DEVCB_##_write);
	39
	40	#define MCFG_VICTOR_9000_FDC_BRDY_CB(_write) \
	41	devcb = &victor_9000_fdc_t::set_brdy_wr_callback(*device, DEVCB_##_write);
	42
	43	#define MCFG_VICTOR_9000_FDC_GCRERR_CB(_write) \
	44	devcb = &victor_9000_fdc_t::set_gcrerr_wr_callback(*device, DEVCB_##_write);
	45
	46
	47
	48	//**************************************************************************
	49	//  TYPE DEFINITIONS
	50	//**************************************************************************
	51
	52	// ======================> victor_9000_fdc_t
	53
	54	class victor_9000_fdc_t :  public device_t
	55	{
	56	public:
	57	// construction/destruction
	58	victor_9000_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	59
	60	template<class _Object> static devcb_base &set_ds0_wr_callback(device_t &device, _Object object) { return downcast<victor_9000_fdc_t &>(device).m_ds0_cb.set_callback(object); }
	61	template<class _Object> static devcb_base &set_ds1_wr_callback(device_t &device, _Object object) { return downcast<victor_9000_fdc_t &>(device).m_ds1_cb.set_callback(object); }
	62	template<class _Object> static devcb_base &set_rdy0_wr_callback(device_t &device, _Object object) { return downcast<victor_9000_fdc_t &>(device).m_rdy0_cb.set_callback(object); }
	63	template<class _Object> static devcb_base &set_rdy1_wr_callback(device_t &device, _Object object) { return downcast<victor_9000_fdc_t &>(device).m_rdy1_cb.set_callback(object); }
	64	template<class _Object> static devcb_base &set_brdy_wr_callback(device_t &device, _Object object) { return downcast<victor_9000_fdc_t &>(device).m_brdy_cb.set_callback(object); }
	65	template<class _Object> static devcb_base &set_gcrerr_wr_callback(device_t &device, _Object object) { return downcast<victor_9000_fdc_t &>(device).m_gcrerr_cb.set_callback(object); }
	66
	67	void set_floppy(floppy_image_device *floppy0, floppy_image_device *floppy1);
	68
	69	void l0ms_w(UINT8 data) { m_lms = (m_lms & 0xf0) | (data & 0x0f); }
	70	void l1ms_w(UINT8 data) { m_lms = (data << 4) | (m_lms & 0x0f); }
	71	void st0_w(UINT8 data) { m_st0 = data; }
	72	void st1_w(UINT8 data) { m_st1 = data; }
	73	DECLARE_WRITE_LINE_MEMBER( side_select_w ) { m_side = state; }
	74	DECLARE_WRITE_LINE_MEMBER( drive_select_w ) { m_drive = state; }
	75	DECLARE_WRITE_LINE_MEMBER( stp0_w ) { m_stp0 = state; }
	76	DECLARE_WRITE_LINE_MEMBER( stp1_w ) { m_stp1 = state; }
	77	DECLARE_WRITE_LINE_MEMBER( drw_w ) { }
	78	DECLARE_WRITE_LINE_MEMBER( erase_w ) { }
	79	DECLARE_READ_LINE_MEMBER( trk0d0_r ) { return m_floppy0->trk00_r(); }
	80	DECLARE_READ_LINE_MEMBER( trk0d1_r ) { return m_floppy1->trk00_r(); }
	81	DECLARE_READ_LINE_MEMBER( wps_r ) { return m_drive ? m_floppy1->wpt_r() : m_floppy0->wpt_r(); }
	82	DECLARE_READ_LINE_MEMBER( sync_r ) { return 1; }
	83	DECLARE_WRITE_LINE_MEMBER( led0a_w ) { output_set_led_value(LED_A, state); }
	84	DECLARE_WRITE_LINE_MEMBER( led1a_w ) { output_set_led_value(LED_B, state); }
	85	DECLARE_READ_LINE_MEMBER( rdy0_r ) { return m_rdy0; }
	86	DECLARE_READ_LINE_MEMBER( rdy1_r ) { return m_rdy1; }
	87	DECLARE_READ_LINE_MEMBER( ds0_r ) { return m_ds0; }
	88	DECLARE_READ_LINE_MEMBER( ds1_r ) { return m_ds1; }
	89	DECLARE_READ_LINE_MEMBER( single_double_sided_r ) { return m_drive ? m_floppy1->twosid_r() : m_floppy0->twosid_r(); }
	90	DECLARE_WRITE_LINE_MEMBER( screset_w ) { if (!state) m_maincpu->reset(); }
	91
	92	DECLARE_FLOPPY_FORMATS( floppy_formats );
	93
	94	DECLARE_READ8_MEMBER( floppy_p1_r );
	95	DECLARE_READ8_MEMBER( floppy_p2_r );
	96	DECLARE_WRITE8_MEMBER( floppy_p2_w );
	97	DECLARE_READ8_MEMBER( tach0_r );
	98	DECLARE_READ8_MEMBER( tach1_r );
	99	DECLARE_WRITE8_MEMBER( da_w );
	100
	101	protected:
	102	// device-level overrides
	103	virtual void device_start();
	104	virtual void device_reset();
	105	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
	106
	107	// optional information overrides
	108	virtual const rom_entry *device_rom_region() const;
	109	virtual machine_config_constructor device_mconfig_additions() const;
	110
	111	private:
	112	enum
	113	{
	114	LED_A = 0,
	115	LED_B
	116	};
	117
	118	devcb_write_line m_ds0_cb;
	119	devcb_write_line m_ds1_cb;
	120	devcb_write_line m_rdy0_cb;
	121	devcb_write_line m_rdy1_cb;
	122	devcb_write_line m_brdy_cb;
	123	devcb_write_line m_gcrerr_cb;
	124
	125	required_device<cpu_device> m_maincpu;
	126	required_device<floppy_image_device> m_floppy0;
	127	required_device<floppy_image_device> m_floppy1;
	128	required_memory_region m_gcr_rom;
	129
	130	void ready0_cb(floppy_image_device *, int device);
	131	int load0_cb(floppy_image_device *device);
	132	void unload0_cb(floppy_image_device *device);
	133	void ready1_cb(floppy_image_device *, int device);
	134	int load1_cb(floppy_image_device *device);
	135	void unload1_cb(floppy_image_device *device);
	136
	137	/* floppy state */
	138	UINT8 m_da;
	139	UINT8 m_da0;
	140	UINT8 m_da1;
	141	int m_sel0;
	142	int m_sel1;
	143	int m_tach0;
	144	int m_tach1;
	145	int m_rdy0;
	146	int m_rdy1;
	147	int m_ds0;
	148	int m_ds1;
	149	UINT8 m_lms;                         /* motor speed */
	150	int m_st0;                        /* stepper phase */
	151	int m_st1;                        /* stepper phase */
	152	int m_stp0;                        /* stepper enable */
	153	int m_stp1;                        /* stepper enable */
	154	int m_drive;                        /* selected drive */
	155	int m_side;                         /* selected side */
	156	int m_brdy;
	157	int m_sync;
	158	int m_gcrerr;
	159	};
	160
	161
	162
	163	// device type definition
	164	extern const device_type VICTOR_9000_FDC;
	165
	166
	167
	168	#endif

trunk/src/mess/mess.mak

r241658	r241659
959	959	$(MESS_DRIVERS)/apricotf.o  \
960	960	$(MESS_DRIVERS)/apricotp.o  \
961	961	$(MESS_MACHINE)/apricotkb.o \
962		$(MESS_DRIVERS)/victor9k.o $(MESS_MACHINE)/victor9kb.o \
	962	$(MESS_DRIVERS)/victor9k.o $(MESS_MACHINE)/victor9kb.o $(MESS_MACHINE)/victor9k_fdc.o \
963	963
964	964	$(MESSOBJ)/adc.a:               \
965	965	$(MESS_DRIVERS)/super6.o    \

https://github.com/mamedev/mame/commit/1f42617b3cdb5f66d9938490b34afdf5a32cbfc5

Previous

199869 Revisions

Next

---

© 1997-2024 The MAME Team