trunk/src/mame/drivers/chqflag.c
| r31716 | r31717 | |
| 31 | 31 | m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); |
| 32 | 32 | } |
| 33 | 33 | |
| 34 | | WRITE8_MEMBER(chqflag_state::chqflag_bankswitch_w) |
| 34 | /* these trampolines are less confusing than nested address_map_bank_devices */ |
| 35 | READ8_MEMBER(chqflag_state::k051316_1_ramrom_r) |
| 35 | 36 | { |
| 36 | | m_bank = data; //needed to restore the bankswitch post load |
| 37 | | |
| 38 | | int bankaddress; |
| 39 | | UINT8 *RAM = memregion("maincpu")->base(); |
| 37 | if (m_k051316_readroms) |
| 38 | return m_k051316_1->rom_r(space, offset); |
| 39 | else |
| 40 | return m_k051316_1->read(space, offset); |
| 41 | } |
| 40 | 42 | |
| 43 | READ8_MEMBER(chqflag_state::k051316_2_ramrom_r) |
| 44 | { |
| 45 | if (m_k051316_readroms) |
| 46 | return m_k051316_2->rom_r(space, offset); |
| 47 | else |
| 48 | return m_k051316_2->read(space, offset); |
| 49 | } |
| 50 | |
| 51 | WRITE8_MEMBER(chqflag_state::chqflag_bankswitch_w) |
| 52 | { |
| 41 | 53 | /* bits 0-4 = ROM bank # (0x00-0x11) */ |
| 42 | | bankaddress = 0x10000 + (data & 0x1f) * 0x4000; |
| 43 | | membank("bank4")->set_base(&RAM[bankaddress]); |
| 54 | int bankaddress = data & 0x1f; |
| 55 | if (bankaddress < (0x50000 / 0x4000)) |
| 56 | m_rombank->set_entry(bankaddress); |
| 44 | 57 | |
| 45 | | /* bit 5 = memory bank select */ |
| 46 | | if (data & 0x20) |
| 47 | | { |
| 48 | | space.install_read_bank(0x1800, 0x1fff, "bank5"); |
| 49 | | space.install_write_handler(0x1800, 0x1fff, write8_delegate(FUNC(palette_device::write),m_palette.target())); |
| 50 | | membank("bank5")->set_base(m_paletteram); |
| 58 | /* bit 5 = select work RAM or k051316 + palette */ |
| 59 | m_bank1000->set_bank((data & 0x20) >> 5); |
| 51 | 60 | |
| 52 | | if (m_k051316_readroms) |
| 53 | | space.install_readwrite_handler(0x1000, 0x17ff, read8_delegate(FUNC(k051316_device::rom_r), (k051316_device*)m_k051316_1), write8_delegate(FUNC(k051316_device::write), (k051316_device*)m_k051316_1)); /* 051316 #1 (ROM test) */ |
| 54 | | else |
| 55 | | space.install_readwrite_handler(0x1000, 0x17ff, read8_delegate(FUNC(k051316_device::read), (k051316_device*)m_k051316_1), write8_delegate(FUNC(k051316_device::write), (k051316_device*)m_k051316_1)); /* 051316 #1 */ |
| 56 | | } |
| 57 | | else |
| 58 | | { |
| 59 | | space.install_readwrite_bank(0x1000, 0x17ff, "bank1"); /* RAM */ |
| 60 | | space.install_readwrite_bank(0x1800, 0x1fff, "bank2"); /* RAM */ |
| 61 | | } |
| 62 | | |
| 63 | 61 | /* other bits unknown/unused */ |
| 64 | 62 | } |
| 65 | 63 | |
| 66 | | void chqflag_state::bankswitch_restore() |
| 67 | | { |
| 68 | | chqflag_bankswitch_w(m_maincpu->space(AS_PROGRAM), 0, m_bank); |
| 69 | | } |
| 70 | | |
| 71 | 64 | WRITE8_MEMBER(chqflag_state::chqflag_vreg_w) |
| 72 | 65 | { |
| 73 | 66 | /* bits 0 & 1 = coin counters */ |
| r31716 | r31717 | |
| 77 | 70 | /* bit 4 = enable rom reading through K051316 #1 & #2 */ |
| 78 | 71 | m_k051316_readroms = (data & 0x10); |
| 79 | 72 | |
| 80 | | if (m_k051316_readroms) |
| 81 | | space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(k051316_device::rom_r), (k051316_device*)m_k051316_2)); /* 051316 (ROM test) */ |
| 82 | | else |
| 83 | | space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(k051316_device::read), (k051316_device*)m_k051316_2)); /* 051316 */ |
| 84 | | |
| 85 | 73 | /* Bits 3-7 probably control palette dimming in a similar way to TMNT2/Sunset Riders, */ |
| 86 | 74 | /* however I don't have enough evidence to determine the exact behaviour. */ |
| 87 | 75 | /* Bits 3 and 7 are set in night stages, where the background should get darker and */ |
| r31716 | r31717 | |
| 139 | 127 | /****************************************************************************/ |
| 140 | 128 | |
| 141 | 129 | static ADDRESS_MAP_START( chqflag_map, AS_PROGRAM, 8, chqflag_state ) |
| 142 | | AM_RANGE(0x0000, 0x0fff) AM_RAM /* RAM */ |
| 143 | | AM_RANGE(0x1000, 0x17ff) AM_RAMBANK("bank1") /* banked RAM (RAM/051316 (chip 1)) */ |
| 144 | | AM_RANGE(0x1800, 0x1fff) AM_RAMBANK("bank2") /* palette + RAM */ |
| 145 | | AM_RANGE(0x2000, 0x2007) AM_DEVREADWRITE("k051960", k051960_device, k051937_r, k051937_w) /* Sprite control registers */ |
| 146 | | AM_RANGE(0x2400, 0x27ff) AM_DEVREADWRITE("k051960", k051960_device, k051960_r, k051960_w) /* Sprite RAM */ |
| 147 | | AM_RANGE(0x2800, 0x2fff) AM_READ_BANK("bank3") AM_DEVWRITE("k051316_2", k051316_device, write) /* 051316 zoom/rotation (chip 2) */ |
| 148 | | AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_byte_w) /* sound code # */ |
| 130 | AM_RANGE(0x0000, 0x0fff) AM_RAM |
| 131 | AM_RANGE(0x1000, 0x1fff) AM_DEVICE("bank1000", address_map_bank_device, amap8) |
| 132 | AM_RANGE(0x2000, 0x2007) AM_DEVREADWRITE("k051960", k051960_device, k051937_r, k051937_w) /* Sprite control registers */ |
| 133 | AM_RANGE(0x2400, 0x27ff) AM_DEVREADWRITE("k051960", k051960_device, k051960_r, k051960_w) /* Sprite RAM */ |
| 134 | AM_RANGE(0x2800, 0x2fff) AM_READ(k051316_2_ramrom_r) AM_DEVWRITE("k051316_2", k051316_device, write) /* 051316 zoom/rotation (chip 2) */ |
| 135 | AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_byte_w) /* sound code # */ |
| 149 | 136 | AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w) /* cause interrupt on audio CPU */ |
| 150 | 137 | AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w) /* bankswitch control */ |
| 151 | 138 | AM_RANGE(0x3003, 0x3003) AM_WRITE(chqflag_vreg_w) /* enable K051316 ROM reading */ |
| r31716 | r31717 | |
| 160 | 147 | AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w) /* select accelerator/wheel */ |
| 161 | 148 | AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2") /* Brake + Shift + ? */ |
| 162 | 149 | AM_RANGE(0x3702, 0x3702) AM_READWRITE(analog_read_r, select_analog_ctrl_w) /* accelerator/wheel */ |
| 163 | | AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank4") /* banked ROM */ |
| 164 | | AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */ |
| 150 | AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("rombank") /* banked ROM */ |
| 151 | AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION("maincpu", 0x48000) /* ROM */ |
| 165 | 152 | ADDRESS_MAP_END |
| 166 | 153 | |
| 154 | static ADDRESS_MAP_START( bank1000_map, AS_PROGRAM, 8, chqflag_state ) |
| 155 | AM_RANGE(0x0000, 0x0fff) AM_RAM |
| 156 | AM_RANGE(0x1000, 0x17ff) AM_READ(k051316_1_ramrom_r) AM_DEVWRITE("k051316_1", k051316_device, write) |
| 157 | AM_RANGE(0x1800, 0x1fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") |
| 158 | ADDRESS_MAP_END |
| 159 | |
| 160 | |
| 167 | 161 | WRITE8_MEMBER(chqflag_state::k007232_bankswitch_w) |
| 168 | 162 | { |
| 169 | 163 | int bank_A, bank_B; |
| r31716 | r31717 | |
| 275 | 269 | |
| 276 | 270 | void chqflag_state::machine_start() |
| 277 | 271 | { |
| 278 | | UINT8 *ROM = memregion("maincpu")->base(); |
| 272 | m_rombank->configure_entries(0, 0x50000 / 0x4000, memregion("maincpu")->base(), 0x4000); |
| 279 | 273 | |
| 280 | | membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x2000); |
| 281 | | |
| 282 | | m_paletteram.resize(m_palette->entries() * 2); |
| 283 | | m_palette->basemem().set(m_paletteram, ENDIANNESS_BIG, 2); |
| 284 | | |
| 285 | | save_item(NAME(m_paletteram)); |
| 286 | 274 | save_item(NAME(m_k051316_readroms)); |
| 287 | 275 | save_item(NAME(m_last_vreg)); |
| 288 | 276 | save_item(NAME(m_analog_ctrl)); |
| 289 | 277 | save_item(NAME(m_accel)); |
| 290 | 278 | save_item(NAME(m_wheel)); |
| 291 | | save_item(NAME(m_bank)); |
| 292 | | machine().save().register_postload(save_prepost_delegate(FUNC(chqflag_state::bankswitch_restore), this)); |
| 293 | 279 | } |
| 294 | 280 | |
| 295 | 281 | void chqflag_state::machine_reset() |
| r31716 | r31717 | |
| 299 | 285 | m_analog_ctrl = 0; |
| 300 | 286 | m_accel = 0; |
| 301 | 287 | m_wheel = 0; |
| 302 | | m_bank = 0; |
| 303 | 288 | } |
| 304 | 289 | |
| 305 | 290 | static MACHINE_CONFIG_START( chqflag, chqflag_state ) |
| r31716 | r31717 | |
| 312 | 297 | MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* verified on pcb */ |
| 313 | 298 | MCFG_CPU_PROGRAM_MAP(chqflag_sound_map) |
| 314 | 299 | |
| 300 | MCFG_DEVICE_ADD("bank1000", ADDRESS_MAP_BANK, 0) |
| 301 | MCFG_DEVICE_PROGRAM_MAP(bank1000_map) |
| 302 | MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG) |
| 303 | MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) |
| 304 | MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(13) |
| 305 | MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) |
| 306 | |
| 315 | 307 | MCFG_QUANTUM_TIME(attotime::from_hz(600)) |
| 316 | 308 | |
| 317 | 309 | /* video hardware */ |
| r31716 | r31717 | |
| 368 | 360 | MACHINE_CONFIG_END |
| 369 | 361 | |
| 370 | 362 | ROM_START( chqflag ) |
| 371 | | ROM_REGION( 0x58000, "maincpu", 0 ) /* 052001 code */ |
| 372 | | ROM_LOAD( "717h02", 0x050000, 0x008000, CRC(f5bd4e78) SHA1(7bab02152d055a6c3a322c88e7ee0b85a39d8ef2) ) /* banked ROM */ |
| 373 | | ROM_CONTINUE( 0x008000, 0x008000 ) /* fixed ROM */ |
| 374 | | ROM_LOAD( "717e10", 0x010000, 0x040000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) ) /* banked ROM */ |
| 375 | | /* extra memory for banked RAM */ |
| 363 | ROM_REGION( 0x50000, "maincpu", 0 ) /* 052001 code */ |
| 364 | ROM_LOAD( "717e10", 0x00000, 0x40000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) ) |
| 365 | ROM_LOAD( "717h02", 0x40000, 0x10000, CRC(f5bd4e78) SHA1(7bab02152d055a6c3a322c88e7ee0b85a39d8ef2) ) |
| 376 | 366 | |
| 377 | | ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */ |
| 367 | ROM_REGION( 0x08000, "audiocpu", 0 ) /* Z80 code */ |
| 378 | 368 | ROM_LOAD( "717e01", 0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) ) |
| 379 | 369 | |
| 380 | 370 | ROM_REGION( 0x100000, "k051960", 0 ) /* sprites */ |
| r31716 | r31717 | |
| 398 | 388 | ROM_END |
| 399 | 389 | |
| 400 | 390 | ROM_START( chqflagj ) |
| 401 | | ROM_REGION( 0x58000, "maincpu", 0 ) /* 052001 code */ |
| 402 | | ROM_LOAD( "717j02.bin", 0x050000, 0x008000, CRC(05355daa) SHA1(130ddbc289c077565e44f33c63a63963e6417e19) ) /* banked ROM */ |
| 403 | | ROM_CONTINUE( 0x008000, 0x008000 ) /* fixed ROM */ |
| 404 | | ROM_LOAD( "717e10", 0x010000, 0x040000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) ) /* banked ROM */ |
| 405 | | /* extra memory for banked RAM */ |
| 391 | ROM_REGION( 0x50000, "maincpu", 0 ) /* 052001 code */ |
| 392 | ROM_LOAD( "717e10", 0x00000, 0x40000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) ) |
| 393 | ROM_LOAD( "717j02.bin", 0x40000, 0x10000, CRC(05355daa) SHA1(130ddbc289c077565e44f33c63a63963e6417e19) ) |
| 406 | 394 | |
| 407 | | ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */ |
| 395 | ROM_REGION( 0x08000, "audiocpu", 0 ) /* Z80 code */ |
| 408 | 396 | ROM_LOAD( "717e01", 0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) ) |
| 409 | 397 | |
| 410 | 398 | ROM_REGION( 0x100000, "k051960", 0 ) /* sprites */ |
trunk/src/mame/includes/chqflag.h
| r31716 | r31717 | |
| 3 | 3 | Chequered Flag |
| 4 | 4 | |
| 5 | 5 | *************************************************************************/ |
| 6 | #include "machine/bankdev.h" |
| 6 | 7 | #include "sound/k007232.h" |
| 7 | 8 | #include "video/k051960.h" |
| 8 | 9 | #include "video/k051316.h" |
| r31716 | r31717 | |
| 16 | 17 | : driver_device(mconfig, type, tag), |
| 17 | 18 | m_maincpu(*this, "maincpu"), |
| 18 | 19 | m_audiocpu(*this, "audiocpu"), |
| 20 | m_bank1000(*this, "bank1000"), |
| 19 | 21 | m_k007232_1(*this, "k007232_1"), |
| 20 | 22 | m_k007232_2(*this, "k007232_2"), |
| 21 | 23 | m_k051960(*this, "k051960"), |
| 22 | 24 | m_k051316_1(*this, "k051316_1"), |
| 23 | 25 | m_k051316_2(*this, "k051316_2"), |
| 24 | | m_palette(*this, "palette") { } |
| 26 | m_palette(*this, "palette"), |
| 27 | m_rombank(*this, "rombank") { } |
| 25 | 28 | |
| 26 | | /* memory pointers */ |
| 27 | | UINT8 * m_ram; |
| 28 | | dynamic_array<UINT8> m_paletteram; |
| 29 | | |
| 30 | 29 | /* video-related */ |
| 31 | 30 | int m_zoom_colorbase[2]; |
| 32 | 31 | int m_sprite_colorbase; |
| r31716 | r31717 | |
| 37 | 36 | int m_analog_ctrl; |
| 38 | 37 | int m_accel; |
| 39 | 38 | int m_wheel; |
| 40 | | int m_bank; |
| 41 | 39 | |
| 42 | 40 | /* devices */ |
| 43 | 41 | required_device<cpu_device> m_maincpu; |
| 44 | 42 | required_device<cpu_device> m_audiocpu; |
| 43 | required_device<address_map_bank_device> m_bank1000; |
| 45 | 44 | required_device<k007232_device> m_k007232_1; |
| 46 | 45 | required_device<k007232_device> m_k007232_2; |
| 47 | 46 | required_device<k051960_device> m_k051960; |
| r31716 | r31717 | |
| 49 | 48 | required_device<k051316_device> m_k051316_2; |
| 50 | 49 | required_device<palette_device> m_palette; |
| 51 | 50 | |
| 51 | /* memory pointers */ |
| 52 | required_memory_bank m_rombank; |
| 53 | |
| 54 | DECLARE_READ8_MEMBER(k051316_1_ramrom_r); |
| 55 | DECLARE_READ8_MEMBER(k051316_2_ramrom_r); |
| 52 | 56 | DECLARE_WRITE8_MEMBER(chqflag_bankswitch_w); |
| 53 | 57 | DECLARE_WRITE8_MEMBER(chqflag_vreg_w); |
| 54 | 58 | DECLARE_WRITE8_MEMBER(select_analog_ctrl_w); |
| r31716 | r31717 | |
| 66 | 70 | K051316_CB_MEMBER(zoom_callback_1); |
| 67 | 71 | K051316_CB_MEMBER(zoom_callback_2); |
| 68 | 72 | K051960_CB_MEMBER(sprite_callback); |
| 69 | | void bankswitch_restore(); |
| 70 | 73 | }; |