trunk/src/mess/drivers/dmv.c
| r31715 | r31716 | |
| 108 | 108 | DECLARE_WRITE8_MEMBER(rambank_w); |
| 109 | 109 | DECLARE_READ8_MEMBER(program_r); |
| 110 | 110 | DECLARE_WRITE8_MEMBER(program_w); |
| 111 | DECLARE_READ8_MEMBER(exp_program_r); |
| 112 | DECLARE_WRITE8_MEMBER(exp_program_w); |
| 111 | 113 | DECLARE_FLOPPY_FORMATS( floppy_formats ); |
| 112 | 114 | |
| 115 | UINT8 program_read(address_space &space, int cas, offs_t offset); |
| 116 | void program_write(address_space &space, int cas, offs_t offset, UINT8 data); |
| 117 | |
| 113 | 118 | void ifsel_r(address_space &space, int ifsel, offs_t offset, UINT8 &data); |
| 114 | 119 | void ifsel_w(address_space &space, int ifsel, offs_t offset, UINT8 data); |
| 115 | 120 | DECLARE_READ8_MEMBER(ifsel0_r) { UINT8 data = 0xff; ifsel_r(space, 0, offset, data); return data; } |
| r31715 | r31716 | |
| 323 | 328 | slots[i]->io_write(space, ifsel, offset, data); |
| 324 | 329 | } |
| 325 | 330 | |
| 331 | WRITE8_MEMBER(dmv_state::exp_program_w) |
| 332 | { |
| 333 | program_write(space, (offset >> 16) & 0x07, offset, data); |
| 334 | } |
| 335 | |
| 336 | READ8_MEMBER(dmv_state::exp_program_r) |
| 337 | { |
| 338 | return program_read(space, (offset >> 16) & 0x07, offset); |
| 339 | } |
| 340 | |
| 326 | 341 | WRITE8_MEMBER(dmv_state::program_w) |
| 327 | 342 | { |
| 343 | program_write(space, m_ram_bank, offset, data); |
| 344 | } |
| 345 | |
| 346 | READ8_MEMBER(dmv_state::program_r) |
| 347 | { |
| 348 | return program_read(space, m_ram_bank, offset); |
| 349 | } |
| 350 | |
| 351 | void dmv_state::program_write(address_space &space, int cas, offs_t offset, UINT8 data) |
| 352 | { |
| 328 | 353 | bool tramd = false; |
| 329 | 354 | dmvcart_slot_device *slots[] = { m_slot2, m_slot2a, m_slot3, m_slot4, m_slot5, m_slot6, m_slot7, m_slot7a }; |
| 330 | 355 | for(int i=0; i<8 && !tramd; i++) |
| r31715 | r31716 | |
| 332 | 357 | |
| 333 | 358 | if (!tramd) |
| 334 | 359 | { |
| 335 | | int cas = (m_switch16 ? offset >> 16 : m_ram_bank) & 0x07; |
| 336 | | |
| 337 | 360 | if (cas == 0) |
| 338 | 361 | m_ram->base()[offset & 0xffff] = data; |
| 339 | 362 | else |
| r31715 | r31716 | |
| 341 | 364 | } |
| 342 | 365 | } |
| 343 | 366 | |
| 344 | | READ8_MEMBER(dmv_state::program_r) |
| 367 | UINT8 dmv_state::program_read(address_space &space, int cas, offs_t offset) |
| 345 | 368 | { |
| 346 | 369 | UINT8 data = 0xff; |
| 347 | 370 | if (m_ramoutdis && offset < 0x2000) |
| r31715 | r31716 | |
| 357 | 380 | |
| 358 | 381 | if (!tramd) |
| 359 | 382 | { |
| 360 | | int cas = (m_switch16 ? offset >> 16 : m_ram_bank) & 0x07; |
| 361 | | |
| 362 | 383 | if (cas == 0) |
| 363 | 384 | data = m_ram->base()[offset & 0xffff]; |
| 364 | 385 | else |
| r31715 | r31716 | |
| 645 | 666 | |
| 646 | 667 | MCFG_DEVICE_ADD("slot7", DMVCART_SLOT, 0) |
| 647 | 668 | MCFG_DEVICE_SLOT_INTERFACE(dmv_slot7, NULL, false) |
| 648 | | MCFG_DMVCART_SLOT_PROGRAM_READWRITE_CB(READ8(dmv_state, program_r), WRITE8(dmv_state, program_w)) |
| 669 | MCFG_DMVCART_SLOT_PROGRAM_READWRITE_CB(READ8(dmv_state, exp_program_r), WRITE8(dmv_state, exp_program_w)) |
| 649 | 670 | MCFG_DEVICE_ADD("slot7a", DMVCART_SLOT, 0) |
| 650 | 671 | MCFG_DEVICE_SLOT_INTERFACE(dmv_slot7a, "k230", false) |
| 651 | | MCFG_DMVCART_SLOT_PROGRAM_READWRITE_CB(READ8(dmv_state, program_r), WRITE8(dmv_state, program_w)) |
| 672 | MCFG_DMVCART_SLOT_PROGRAM_READWRITE_CB(READ8(dmv_state, exp_program_r), WRITE8(dmv_state, exp_program_w)) |
| 652 | 673 | |
| 653 | 674 | MACHINE_CONFIG_END |
| 654 | 675 | |