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r31657 Thursday 14th August, 2014 at 22:01:03 UTC by hap
nothing much

[src/emu/cpu/i86]	i186.c i186.h
[src/emu/machine]	pit8253.c
[src/mame/audio]	leland.c
[src/mame/includes]	leland.h
[src/mame/video]	leland.c

trunk/src/emu/cpu/i86/i186.c

r31656	r31657
153	153
154	154	UINT8 i80186_cpu_device::fetch_op()
155	155	{
156		UINT8 data;
157		data = m_direct->read_decrypted_byte(pc(), m_fetch_xor);
	156	UINT8 data = m_direct->read_decrypted_byte(pc(), m_fetch_xor);
158	157	m_ip++;
159	158	return data;
160	159	}
161	160
162	161	UINT8 i80186_cpu_device::fetch()
163	162	{
164		UINT8 data;
165		data = m_direct->read_raw_byte(pc(), m_fetch_xor);
	163	UINT8 data = m_direct->read_raw_byte(pc(), m_fetch_xor);
166	164	m_ip++;
167	165	return data;
168	166	}
r31656	r31657
181	179	m_prev_ip = m_ip;
182	180	m_seg_prefix = false;
183	181
184		/* Dispatch IRQ */
	182	/* Dispatch IRQ */
185	183	if ( m_pending_irq && m_no_interrupt == 0 )
186	184	{
187	185	if ( m_pending_irq & NMI_IRQ )
r31656	r31657
252	250	m_regs.w[DI] = POP();
253	251	m_regs.w[SI] = POP();
254	252	m_regs.w[BP] = POP();
255		POP();
	253	POP();
256	254	m_regs.w[BX] = POP();
257	255	m_regs.w[DX] = POP();
258	256	m_regs.w[CX] = POP();
r31656	r31657
344	342	logerror("%s: %06x: Mov Sreg - Invalid register\n", tag(), pc());
345	343	m_ip = m_prev_ip;
346	344	interrupt(6);
	345	break;
347	346	}
348	347	break;
349	348
r31656	r31657
522	521	// Decrement IP and pass on
523	522	m_ip -= 1 + (m_seg_prefix_next ? 1 : 0);
524	523	pass = true;
	524	break;
525	525	}
526	526	if(!pass)
527	527	{
r31656	r31657
530	530	break;
531	531	}
532	532	}
533
	533	// through to default
534	534	default:
535	535	if(!common_op(op))
536	536	{
r31656	r31657
555	555
556	556	state_add(STATE_GENPC, "curpc", m_pc).callimport().callexport().formatstr("%05X");
557	557
	558	// register for savestates
558	559	save_item(NAME(m_timer[0].control));
559	560	save_item(NAME(m_timer[0].maxA));
560	561	save_item(NAME(m_timer[0].maxB));
r31656	r31657
593	594	save_item(NAME(m_mem.middle_size));
594	595	save_item(NAME(m_mem.peripheral));
595	596	save_item(NAME(m_reloc));
596
	597
	598	// zerofill
	599	memset(m_timer, 0, sizeof(m_timer));
	600	memset(m_dma, 0, sizeof(m_dma));
	601	memset(&m_intr, 0, sizeof(intr_state));
	602	memset(&m_mem, 0, sizeof(mem_state));
	603	m_reloc = 0;
	604
597	605	m_timer[0].int_timer = timer_alloc(TIMER_INT0);
598	606	m_timer[1].int_timer = timer_alloc(TIMER_INT1);
599	607	m_timer[2].int_timer = timer_alloc(TIMER_INT2);
r31656	r31657
618	626	m_intr.ext[3]           = 0x000f;
619	627	m_intr.in_service       = 0x0000;
620	628
621		m_intr.pending           = 0x0000;
622		m_intr.ack_mask          = 0x0000;
623		m_intr.request           = 0x0000;
624		m_intr.status            = 0x0000;
625		m_intr.poll_status       = 0x0000;
626		m_intr.ext_state         = 0x00;
	629	m_intr.pending          = 0x0000;
	630	m_intr.ack_mask         = 0x0000;
	631	m_intr.request          = 0x0000;
	632	m_intr.status           = 0x0000;
	633	m_intr.poll_status      = 0x0000;
	634	m_intr.ext_state        = 0x00;
627	635	m_reloc = 0x20ff;
628	636
629		for(int i = 0; i < ARRAY_LENGTH(m_dma); ++i)
	637	for (int i = 0; i < ARRAY_LENGTH(m_dma); i++)
630	638	{
631	639	m_dma[i].drq_state = false;
632	640	m_dma[i].control = 0;
633	641	}
634	642
635		for(int i = 0; i < ARRAY_LENGTH(m_timer); ++i)
	643	for (int i = 0; i < ARRAY_LENGTH(m_timer); i++)
636	644	{
637	645	m_timer[i].control = 0;
638	646	m_timer[i].maxA = 0;
r31656	r31657
708	716	set_input_line(0, CLEAR_LINE);
709	717	m_intr.pending = 0;
710	718
711		oldreq=m_intr.request;
	719	oldreq = m_intr.request;
712	720
713	721	/* clear the request and set the in-service bit */
714	722	if(m_intr.ack_mask & 0xf0)
r31656	r31657
726	734	if((LOG_INTERRUPTS) && (m_intr.request!=oldreq))
727	735	logerror("intr.request changed from %02X to %02X\n",oldreq,m_intr.request);
728	736
729		old=m_intr.in_service;
	737	old = m_intr.in_service;
730	738
731	739	m_intr.in_service |= m_intr.ack_mask;
732	740
r31656	r31657
750	758	/* return the vector */
751	759	switch(m_intr.poll_status & 0x1F)
752	760	{
753		case 0x0C   : vector=(m_intr.ext[0] & EXTINT_CTRL_CASCADE) ? m_read_slave_ack_func(0) : (m_intr.poll_status & 0x1f); break;
754		case 0x0D   : vector=(m_intr.ext[1] & EXTINT_CTRL_CASCADE) ? m_read_slave_ack_func(1) : (m_intr.poll_status & 0x1f); break;
755		default :
756		vector=m_intr.poll_status & 0x1f; break;
	761	case 0x0C: vector = (m_intr.ext[0] & EXTINT_CTRL_CASCADE) ? m_read_slave_ack_func(0) : (m_intr.poll_status & 0x1f); break;
	762	case 0x0D: vector = (m_intr.ext[1] & EXTINT_CTRL_CASCADE) ? m_read_slave_ack_func(1) : (m_intr.poll_status & 0x1f); break;
	763	default:
	764	vector = m_intr.poll_status & 0x1f; break;
757	765	}
758	766
759	767	if (LOG_INTERRUPTS)
r31656	r31657
932	940	/* Trigger an external interrupt, optionally supplying the vector to take */
933	941	void i80186_cpu_device::external_int(UINT16 intno, int state)
934	942	{
935		if(!(m_intr.ext_state & (1 << intno)) == !state)
	943	if (!(m_intr.ext_state & (1 << intno)) == !state)
936	944	return;
937	945
938	946	if (LOG_INTERRUPTS_EXT) logerror("generating external int %02X\n",intno);
939	947
940		if(!state)
	948	if (!state)
941	949	{
942		m_intr.request &= ~(0x010 << intno);
943		m_intr.ack_mask &= ~(0x0010 << intno);
	950	m_intr.request &= ~(0x10 << intno);
	951	m_intr.ack_mask &= ~(0x10 << intno);
944	952	m_intr.ext_state &= ~(1 << intno);
945	953	}
946	954	else // Turn on the requested request bit and handle interrupt
947	955	{
948		m_intr.request |= (0x010 << intno);
	956	m_intr.request |= (0x10 << intno);
949	957	m_intr.ext_state |= (1 << intno);
950	958	}
951	959	update_interrupt_state();
r31656	r31657
966	974	case TIMER_INT2:
967	975	{
968	976	int which = param;
969		struct timer_state *t = &m_timer[which];
	977	timer_state *t = &m_timer[which];
970	978
971	979	if (LOG_TIMER) logerror("Hit interrupt callback for timer %d\n", which);
972	980
r31656	r31657
1041	1049
1042	1050	void i80186_cpu_device::internal_timer_sync(int which)
1043	1051	{
1044		struct timer_state *t = &m_timer[which];
	1052	timer_state *t = &m_timer[which];
1045	1053
1046	1054	/* if we have a timing timer running, adjust the count */
1047	1055	if ((t->control & 0x8000) && !(t->control & 0x0c))
r31656	r31657
1050	1058
1051	1059	void i80186_cpu_device::inc_timer(int which)
1052	1060	{
1053		struct timer_state *t = &m_timer[which];
	1061	timer_state *t = &m_timer[which];
1054	1062
1055	1063	t->count++;
1056	1064	if (t->control & 2)
r31656	r31657
1062	1070	device_timer(*t->int_timer, which, which, NULL);
1063	1071	}
1064	1072
1065		void i80186_cpu_device::internal_timer_update(int which,int new_count,int new_maxA,int new_maxB,int new_control)
	1073	void i80186_cpu_device::internal_timer_update(int which, int new_count, int new_maxA, int new_maxB, int new_control)
1066	1074	{
1067		struct timer_state *t = &m_timer[which];
	1075	timer_state *t = &m_timer[which];
1068	1076	int update_int_timer = 0;
1069	1077
1070	1078	if (LOG_TIMER)
1071		logerror("internal_timer_update: %d, new_count=%d, new_maxA=%d, new_maxB=%d,new_control=%d\n",which,new_count,new_maxA,new_maxB,new_control);
	1079	logerror("internal_timer_update: %d, new_count=%d, new_maxA=%d, new_maxB=%d,new_control=%d\n", which, new_count, new_maxA, new_maxB, new_control);
1072	1080
1073	1081	/* if we have a new count and we're on, update things */
1074	1082	if (new_count != -1)
r31656	r31657
1192	1200
1193	1201	void i80186_cpu_device::update_dma_control(int which, int new_control)
1194	1202	{
1195		struct dma_state *d = &m_dma[which];
	1203	dma_state *d = &m_dma[which];
1196	1204	int diff;
1197	1205
1198	1206	/* handle the CHG bit */
r31656	r31657
1213	1221
1214	1222	void i80186_cpu_device::drq_callback(int which)
1215	1223	{
1216		struct dma_state *dma = &m_dma[which];
	1224	dma_state *dma = &m_dma[which];
1217	1225
1218	1226	UINT16  dma_word;
1219	1227	UINT8   dma_byte;
r31656	r31657
1222	1230	if (LOG_DMA>1)
1223	1231	logerror("Control=%04X, src=%05X, dest=%05X, count=%04X\n",dma->control,dma->source,dma->dest,dma->count);
1224	1232
1225		if(!(dma->control & ST_STOP))
	1233	if (!(dma->control & ST_STOP))
1226	1234	{
1227	1235	if(LOG_DMA)
1228	1236	logerror("%05X:ERROR! - drq%d with dma channel stopped\n", pc(), which);
r31656	r31657
1233	1241	address_space *src_space = (dma->control & SRC_MIO) ? m_program : m_io;
1234	1242
1235	1243	// Do the transfer, 80188 is incapable of word transfers
1236		if((dma->control & BYTE_WORD) && (m_program->data_width() == 16))
	1244	if ((dma->control & BYTE_WORD) && (m_program->data_width() == 16))
1237	1245	{
1238		dma_word=src_space->read_word(dma->source);
1239		dest_space->write_word(dma->dest,dma_word);
1240		incdec_size=2;
	1246	dma_word = src_space->read_word(dma->source);
	1247	dest_space->write_word(dma->dest, dma_word);
	1248	incdec_size = 2;
1241	1249	}
1242	1250	else
1243	1251	{
1244		dma_byte=src_space->read_byte(dma->source);
1245		dest_space->write_byte(dma->dest,dma_byte);
1246		incdec_size=1;
	1252	dma_byte = src_space->read_byte(dma->source);
	1253	dest_space->write_byte(dma->dest, dma_byte);
	1254	incdec_size = 1;
1247	1255	}
1248	1256
1249	1257	// Increment or Decrement destination and source pointers as needed
r31656	r31657
1271	1279	dma->count -= 1;
1272	1280
1273	1281	// Terminate if count is zero, and terminate flag set
1274		if(((dma->control & TERMINATE_ON_ZERO) || !(dma->control & SYNC_MASK)) && (dma->count==0))
	1282	if (((dma->control & TERMINATE_ON_ZERO) || !(dma->control & SYNC_MASK)) && (dma->count == 0))
1275	1283	{
1276	1284	dma->control &= ~ST_STOP;
1277	1285	if (LOG_DMA) logerror("DMA terminated\n");
1278	1286	}
1279	1287
1280	1288	// Interrupt if count is zero, and interrupt flag set
1281		if((dma->control & INTERRUPT_ON_ZERO) && (dma->count==0))
	1289	if ((dma->control & INTERRUPT_ON_ZERO) && (dma->count == 0))
1282	1290	{
1283	1291	if (LOG_DMA>1) logerror("DMA%d - requesting interrupt: count = %04X, source = %04X\n", which, dma->count, dma->source);
1284	1292	m_intr.request |= 0x04 << which;
r31656	r31657
1456	1464	logerror("%05X:read 80186 port %02X\n", pc(), offset);
1457	1465	break;
1458	1466	}
1459		return 0x00;
	1467
	1468	return 0x0000;
1460	1469	}
1461	1470
1462	1471	/*************************************
r31656	r31657
1668	1677
1669	1678	case 0x7f:
1670	1679	if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X\n", pc(), data);
1671		if((data & 0x1fff) != (m_reloc & 0x1fff))
	1680	if ((data & 0x1fff) != (m_reloc & 0x1fff))
1672	1681	{
1673	1682	UINT32 newmap = (data & 0xfff) << 8;
1674	1683	UINT32 oldmap = (m_reloc & 0xfff) << 8;

trunk/src/emu/cpu/i86/i186.h

r31656	r31657
57	57	void handle_eoi(int data);
58	58	void external_int(UINT16 intno, int state);
59	59	void internal_timer_sync(int which);
60		void internal_timer_update(int which,int new_count,int new_maxA,int new_maxB,int new_control);
	60	void internal_timer_update(int which, int new_count, int new_maxA, int new_maxB, int new_control);
61	61	void update_dma_control(int which, int new_control);
62	62	void drq_callback(int which);
63	63	void inc_timer(int which);
r31656	r31657
90	90	UINT32      dest;
91	91	UINT16      count;
92	92	UINT16      control;
93		emu_timer   *finish_timer;
94	93	};
95	94
96	95	struct intr_state
97	96	{
98		UINT8   pending;
99		UINT16  ack_mask;
100		UINT16  priority_mask;
101		UINT16  in_service;
102		UINT16  request;
103		UINT16  status;
104		UINT16  poll_status;
105		UINT16  timer;
106		UINT16  dma[2];
107		UINT16  ext[4];
108		UINT8   ext_state;
	97	UINT8       pending;
	98	UINT16      ack_mask;
	99	UINT16      priority_mask;
	100	UINT16      in_service;
	101	UINT16      request;
	102	UINT16      status;
	103	UINT16      poll_status;
	104	UINT16      timer;
	105	UINT16      dma[2];
	106	UINT16      ext[4];
	107	UINT8       ext_state;
109	108	};
110	109
	110	timer_state     m_timer[3];
	111	dma_state       m_dma[2];
	112	intr_state      m_intr;
	113	mem_state       m_mem;
	114
111	115	static const device_timer_id TIMER_INT0 = 0;
112	116	static const device_timer_id TIMER_INT1 = 1;
113	117	static const device_timer_id TIMER_INT2 = 2;
114	118
115		struct timer_state  m_timer[3];
116		struct dma_state    m_dma[2];
117		struct intr_state   m_intr;
118		struct mem_state    m_mem;
119	119	UINT16 m_reloc;
120	120
121	121	address_space_config m_program_config;

trunk/src/emu/machine/pit8253.c

r31656	r31657
100	100	m_out1_handler.resolve_safe();
101	101	m_out2_handler.resolve_safe();
102	102
103		/* register for state saving */
104	103	for (int timerno = 0; timerno < PIT8253_MAX_TIMER; timerno++)
105	104	{
106	105	pit8253_timer *timer = get_timer(timerno);

trunk/src/mame/audio/leland.c

r31656	r31657
245	245
246	246	void leland_80186_sound_device::device_start()
247	247	{
	248	// register for savestates
	249	save_item(NAME(m_peripheral));
	250	save_item(NAME(m_last_control));
	251	save_item(NAME(m_clock_active));
	252	save_item(NAME(m_clock_tick));
	253	save_item(NAME(m_sound_command));
	254	save_item(NAME(m_sound_response));
	255	save_item(NAME(m_ext_start));
	256	save_item(NAME(m_ext_stop));
	257	save_item(NAME(m_ext_active));
	258	save_item(NAME(m_dac_sample));
	259	save_item(NAME(m_dac_volume));
	260
	261	// zerofill
	262	m_peripheral = 0;
	263	m_last_control = 0;
	264	m_clock_active = 0;
	265	m_clock_tick = 0;
	266	m_sound_command = 0;
	267	m_sound_response = 0;
	268	m_ext_start = 0;
	269	m_ext_stop = 0;
	270	m_ext_active = 0;
	271	m_ext_base = NULL;
	272	memset(m_dac_sample, 0, sizeof(m_dac_sample));
	273	memset(m_dac_volume, 0x80, sizeof(m_dac_volume));
	274
248	275	m_audiocpu = downcast<i80186_cpu_device *>(machine().device("audiocpu"));
249	276
250	277	/* determine which sound hardware is installed */
r31656	r31657
273	300	m_ext_active = 0;
274	301	memset(m_dac_sample, 0, sizeof(m_dac_sample));
275	302	memset(m_dac_volume, 0x80, sizeof(m_dac_volume));
	303
276	304	m_dac_timer->adjust(attotime::from_hz(48000), 0, attotime::from_hz(48000));
277	305	}
278	306
r31656	r31657
361	389	{
362	390	/* see if anything changed */
363	391	int diff = (m_last_control ^ data) & 0xf8;
364		if (!diff)
	392	if (diff == 0)
365	393	return;
366	394	m_last_control = data;
367	395
r31656	r31657
377	405	}
378	406
379	407	/* /RESET */
380		m_audiocpu->device_t::execute().set_input_line(INPUT_LINE_RESET, data & 0x80  ? CLEAR_LINE : ASSERT_LINE);
381		m_audiocpu->device_t::execute().set_input_line(INPUT_LINE_TEST, data & 0x10  ? CLEAR_LINE : ASSERT_LINE);
	408	m_audiocpu->device_t::execute().set_input_line(INPUT_LINE_RESET, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	409	m_audiocpu->device_t::execute().set_input_line(INPUT_LINE_TEST, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
382	410
383	411	/* /NMI */
384	412	/*  If the master CPU doesn't get a response by the time it's ready to send
385	413	the next command, it uses an NMI to force the issue; unfortunately, this
386	414	seems to really screw up the sound system. It turns out it's better to
387	415	just wait for the original interrupt to occur naturally */
388		/*  space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);*/
	416	/*  space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);*/
389	417
390	418	/* INT0 */
391	419	m_audiocpu->int0_w(data & 0x20);

trunk/src/mame/includes/leland.h

r31656	r31657
259	259	private:
260	260	void command_lo_sync(void *ptr, int param);
261	261	void delayed_response_r(void *ptr, int param);
262		void set_clock_line(int which, bool state) { m_clock_active = state ? (m_clock_active | (1<<which)) : (m_clock_active & ~(1<<which)); }
	262	void set_clock_line(int which, int state) { m_clock_active = state ? (m_clock_active | (1<<which)) : (m_clock_active & ~(1<<which)); }
	263
263	264	// internal state
264	265	i80186_cpu_device *m_audiocpu;
265	266	UINT16 m_peripheral;

trunk/src/mame/video/leland.c

r31656	r31657
63	63	/* scanline timer */
64	64	m_scanline_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(leland_state::scanline_callback),this));
65	65	m_scanline_timer->adjust(m_screen->time_until_pos(0));
66
67	66	}
68	67
69	68	VIDEO_START_MEMBER(leland_state,ataxx)
r31656	r31657
385	384
386	385	UINT32 leland_state::screen_update_leland(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
387	386	{
388		int y;
389
390	387	const UINT8 *bg_prom = memregion("user1")->base();
391	388	const UINT8 *bg_gfx = memregion("gfx1")->base();
392	389	offs_t bg_gfx_bank_page_size = memregion("gfx1")->bytes() / 3;
r31656	r31657
394	391	offs_t prom_bank = ((m_gfxbank >> 3) & 0x01) * 0x2000;
395	392
396	393	/* for each scanline in the visible region */
397		for (y = cliprect.min_y; y <= cliprect.max_y; y++)
	394	for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
398	395	{
399		int x;
400	396	UINT8 fg_data = 0;
401	397
402	398	UINT16 *dst = &bitmap.pix16(y);
403	399	UINT8 *fg_src = &m_video_ram[y << 8];
404	400
405	401	/* for each pixel on the scanline */
406		for (x = 0; x < VIDEO_WIDTH; x++)
	402	for (int x = 0; x < VIDEO_WIDTH; x++)
407	403	{
408	404	/* compute the effective scrolled pixel coordinates */
409	405	UINT16 sx = (x + m_xscroll) & 0x07ff;
r31656	r31657
437	433
438	434	*dst++ = pen;
439	435	}
440
441	436	}
442	437
443	438	return 0;
r31656	r31657
453	448
454	449	UINT32 leland_state::screen_update_ataxx(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
455	450	{
456		int y;
457
458	451	const UINT8 *bg_gfx = memregion("gfx1")->base();
459	452	offs_t bg_gfx_bank_page_size = memregion("gfx1")->bytes() / 6;
460	453	offs_t bg_gfx_offs_mask = bg_gfx_bank_page_size - 1;
461	454
462	455	/* for each scanline in the visible region */
463		for (y = cliprect.min_y; y <= cliprect.max_y; y++)
	456	for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
464	457	{
465		int x;
466	458	UINT8 fg_data = 0;
467	459
468	460	UINT16 *dst = &bitmap.pix16(y);
469	461	UINT8 *fg_src = &m_video_ram[y << 8];
470	462
471	463	/* for each pixel on the scanline */
472		for (x = 0; x < VIDEO_WIDTH; x++)
	464	for (int x = 0; x < VIDEO_WIDTH; x++)
473	465	{
474	466	/* compute the effective scrolled pixel coordinates */
475	467	UINT16 sx = (x + m_xscroll) & 0x07ff;

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