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r31176 Thursday 3rd July, 2014 at 19:04:50 UTC by hap
go back to a fake memmap for now

[src/emu/cpu/tms7000]	tms7000.c tms7000.h
[src/mess/drivers]	exelv.c

trunk/src/emu/cpu/tms7000/tms7000.h

r31175	r31176
24	24
25	25	#include "emu.h"
26	26
	27
27	28	enum { TMS7000_PC=1, TMS7000_SP, TMS7000_ST, TMS7000_IDLE, TMS7000_T1_CL, TMS7000_T1_PS, TMS7000_T1_DEC };
28	29
29	30	enum
r31175	r31176
34	35	TMS7000_IRQNONE = 255
35	36	};
36	37
	38	enum
	39	{
	40	TMS7000_PORTA = 0, /* read-only */
	41	TMS7000_PORTB,     /* write-only */
	42	TMS7000_PORTC,
	43	TMS7000_PORTD
	44	};
37	45
38		/***************************************************************************
39		DEVICE CONFIGURATION MACROS
40		***************************************************************************/
41	46
42		// I/O callbacks
43
44		// (port A is read-only)
45		#define MCFG_TMS7000_PORTA_READ_CB(_devcb) \
46		devcb = &tms7000_device::set_inportsa_cb(*device, DEVCB_##_devcb);
47
48		#define MCFG_TMS7000_PORTC_READ_CB(_devcb) \
49		devcb = &tms7000_device::set_inportsc_cb(*device, DEVCB_##_devcb);
50
51		#define MCFG_TMS7000_PORTD_READ_CB(_devcb) \
52		devcb = &tms7000_device::set_inportsd_cb(*device, DEVCB_##_devcb);
53
54		// (port B is write-only)
55		#define MCFG_TMS7000_PORTB_WRITE_CB(_devcb) \
56		devcb = &tms7000_device::set_outportsb_cb(*device, DEVCB_##_devcb);
57
58		#define MCFG_TMS7000_PORTC_WRITE_CB(_devcb) \
59		devcb = &tms7000_device::set_outportsc_cb(*device, DEVCB_##_devcb);
60
61		#define MCFG_TMS7000_PORTD_WRITE_CB(_devcb) \
62		devcb = &tms7000_device::set_outportsd_cb(*device, DEVCB_##_devcb);
63
64
65		/***************************************************************************
66		TYPE DEFINITIONS
67		***************************************************************************/
68
69	47	class tms7000_device : public cpu_device
70	48	{
71	49	public:
r31175	r31176
77	55	tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
78	56	tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source);
79	57
80		// static configuration helpers
81		template<class _Object> static devcb_base & set_inportsa_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsa.set_callback(object); }
82		template<class _Object> static devcb_base & set_inportsc_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsc.set_callback(object); }
83		template<class _Object> static devcb_base & set_inportsd_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsd.set_callback(object); }
84
85		template<class _Object> static devcb_base & set_outportsb_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsb.set_callback(object); }
86		template<class _Object> static devcb_base & set_outportsc_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsc.set_callback(object); }
87		template<class _Object> static devcb_base & set_outportsd_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsd.set_callback(object); }
88
89	58	DECLARE_WRITE8_MEMBER( tms70x0_pf_w );
90	59	DECLARE_READ8_MEMBER( tms70x0_pf_r );
91	60
r31175	r31176
102	71	virtual void execute_set_input(int inputnum, int state);
103	72
104	73	// device_memory_interface overrides
105		virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
	74	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
106	75
107	76	// device_state_interface overrides
108	77	void state_string_export(const device_state_entry &entry, astring &string);
r31175	r31176
114	83
115	84	private:
116	85	address_space_config m_program_config;
	86	address_space_config m_io_config;
117	87
118	88	const opcode_func *m_opcode;
119	89
r31175	r31176
136	106
137	107	address_space *m_program;
138	108	direct_read_data *m_direct;
	109	address_space *m_io;
139	110
140		// callbacks
141		devcb_read8 m_inportsa;
142		devcb_read8 m_inportsc;
143		devcb_read8 m_inportsd;
144
145		devcb_write8 m_outportsb;
146		devcb_write8 m_outportsc;
147		devcb_write8 m_outportsd;
148
149		/////////////////////////////////////////////////////////
150
151	111	inline UINT16 RM16( UINT32 mAddr );
152	112	inline UINT16 RRF16( UINT32 mAddr );
153	113	inline void WRF16( UINT32 mAddr, PAIR p );

trunk/src/emu/cpu/tms7000/tms7000.c

r31175	r31176
55	55	const device_type TMS70C20 = &device_creator<tms70c20_device>;
56	56	const device_type TMS70C40 = &device_creator<tms70c40_device>;
57	57
	58	static ADDRESS_MAP_START(tms7000_io, AS_IO, 8, tms7000_device)
	59	ADDRESS_MAP_UNMAP_HIGH
	60	AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_WRITENOP
	61	AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_READNOP
	62	ADDRESS_MAP_END
	63
58	64	static ADDRESS_MAP_START(tms7000_mem, AS_PROGRAM, 8, tms7000_device )
59	65	AM_RANGE(0x0000, 0x007f) AM_RAM // 128 bytes internal RAM
60	66	AM_RANGE(0x0100, 0x010f) AM_READWRITE(tms70x0_pf_r, tms70x0_pf_w)             /* tms7000 internal I/O ports */
r31175	r31176
72	78
73	79
74	80	tms7000_device::tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
75		: cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__),
76		m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem)),
77		m_opcode(s_opfn),
78		m_inportsa(*this),
79		m_inportsc(*this),
80		m_inportsd(*this),
81		m_outportsb(*this),
82		m_outportsc(*this),
83		m_outportsd(*this)
	81	: cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__)
	82	, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem))
	83	, m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io))
	84	, m_opcode(s_opfn)
84	85	{
85	86	}
86	87
87	88	tms7000_device::tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source)
88		: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
89		m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal),
90		m_opcode(opcode),
91		m_inportsa(*this),
92		m_inportsc(*this),
93		m_inportsd(*this),
94		m_outportsb(*this),
95		m_outportsc(*this),
96		m_outportsd(*this)
	89	: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
	90	, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal)
	91	, m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io))
	92	, m_opcode(opcode)
97	93	{
98	94	}
99	95
r31175	r31176
195	191	{
196	192	m_program = &space(AS_PROGRAM);
197	193	m_direct = &m_program->direct();
	194	m_io = &space(AS_IO);
198	195
199		// resolve callbacks
200		m_inportsa.resolve_safe(0xff);
201		m_inportsc.resolve_safe(0xff);
202		m_inportsd.resolve_safe(0xff);
203
204		m_outportsb.resolve_safe();
205		m_outportsc.resolve_safe();
206		m_outportsd.resolve_safe();
207
208	196	memset(m_pf, 0, 0x100);
209	197	m_cycles_per_INT2 = 0;
210	198	m_t1_capture_latch = 0;
r31175	r31176
492	480	break;
493	481
494	482	case 0x06: /* Port B write */
495		m_outportsb(data);
	483	m_io->write_byte( TMS7000_PORTB, data );
496	484	m_pf[ 0x06 ] = data;
497	485	break;
498	486
499	487	case 0x08: /* Port C write */
500	488	temp1 = data & m_pf[ 0x09 ];    /* Mask off input bits */
501		m_outportsc(temp1);
	489	m_io->write_byte( TMS7000_PORTC, temp1 );
502	490	m_pf[ 0x08 ] = temp1;
503	491	break;
504	492
505	493	case 0x0a: /* Port D write */
506	494	temp1 = data & m_pf[ 0x0b ];    /* Mask off input bits */
507		m_outportsd(temp1);
	495	m_io->write_byte( TMS7000_PORTD, temp1 );
508	496	m_pf[ 0x0a ] = temp1;
509	497	break;
510	498
r31175	r31176
539	527	break;
540	528
541	529	case 0x04: /* Port A read */
542		result = m_inportsa();
	530	result = m_io->read_byte( TMS7000_PORTA );
543	531	break;
544	532
545	533
r31175	r31176
550	538
551	539	case 0x08: /* Port C read */
552	540	temp1 = m_pf[ 0x08 ] & m_pf[ 0x09 ];    /* Get previous output bits */
553		temp2 = m_inportsc();           /* Read port */
	541	temp2 = m_io->read_byte( TMS7000_PORTC );           /* Read port */
554	542	temp3 = temp2 & (~m_pf[ 0x09 ]);                /* Mask off output bits */
555	543	result = temp1 | temp3;                             /* OR together */
556	544	break;
557	545
558	546	case 0x0a: /* Port D read */
559	547	temp1 = m_pf[ 0x0a ] & m_pf[ 0x0b ];    /* Get previous output bits */
560		temp2 = m_inportsd();           /* Read port */
	548	temp2 = m_io->read_byte( TMS7000_PORTD );           /* Read port */
561	549	temp3 = temp2 & (~m_pf[ 0x0b ]);                /* Mask off output bits */
562	550	result = temp1 | temp3;                             /* OR together */
563	551	break;

trunk/src/mess/drivers/exelv.c

r31175	r31176
429	429	AM_RANGE(0xc800, 0xf7ff) AM_NOP
430	430	ADDRESS_MAP_END
431	431
	432	static ADDRESS_MAP_START(tms7020_port, AS_IO, 8, exelv_state)
	433	AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_READ(tms7020_porta_r)
	434	AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_WRITE(tms7020_portb_w)
	435	ADDRESS_MAP_END
432	436
	437
433	438	static ADDRESS_MAP_START(tms7041_map, AS_PROGRAM, 8, exelv_state)
434	439	AM_RANGE(0x0080, 0x00ff) AM_RAM
435	440	ADDRESS_MAP_END
436	441
	442	static ADDRESS_MAP_START(tms7041_port, AS_IO, 8, exelv_state)
	443	AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_READ(tms7041_porta_r)
	444	AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_WRITE(tms7041_portb_w)
	445	AM_RANGE(TMS7000_PORTC, TMS7000_PORTC) AM_READWRITE(tms7041_portc_r, tms7041_portc_w)
	446	AM_RANGE(TMS7000_PORTD, TMS7000_PORTD) AM_READWRITE(tms7041_portd_r, tms7041_portd_w)
	447	ADDRESS_MAP_END
437	448
	449
438	450	static ADDRESS_MAP_START(tms7040_mem, AS_PROGRAM, 8, exelv_state)
439	451	AM_RANGE(0x0080, 0x00ff) AM_NOP
440	452	AM_RANGE(0x0124, 0x0124) AM_DEVREAD("tms3556", tms3556_device, vram_r)
r31175	r31176
500	512	/* basic machine hardware */
501	513	MCFG_CPU_ADD("maincpu", TMS7020_EXL, XTAL_4_9152MHz)
502	514	MCFG_CPU_PROGRAM_MAP(tms7020_mem)
503		MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7020_porta_r))
504		MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7020_portb_w))
	515	MCFG_CPU_IO_MAP(tms7020_port)
505	516	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
506	517
507	518	MCFG_CPU_ADD("tms7041", TMS7040, XTAL_4_9152MHz) // should be TMS7041
508	519	MCFG_CPU_PROGRAM_MAP(tms7041_map)
509		MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7041_porta_r))
510		MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7041_portb_w))
511		MCFG_TMS7000_PORTC_READ_CB(READ8(exelv_state, tms7041_portc_r))
512		MCFG_TMS7000_PORTC_WRITE_CB(WRITE8(exelv_state, tms7041_portc_w))
513		MCFG_TMS7000_PORTD_READ_CB(READ8(exelv_state, tms7041_portd_r))
514		MCFG_TMS7000_PORTD_WRITE_CB(WRITE8(exelv_state, tms7041_portd_w))
	520	MCFG_CPU_IO_MAP(tms7041_port)
515	521
516	522	MCFG_QUANTUM_PERFECT_CPU("maincpu")
517	523
r31175	r31176
558	564	/* basic machine hardware */
559	565	MCFG_CPU_ADD("maincpu", TMS7040, XTAL_4_9152MHz)
560	566	MCFG_CPU_PROGRAM_MAP(tms7040_mem)
561		MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7020_porta_r))
562		MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7020_portb_w))
	567	MCFG_CPU_IO_MAP(tms7020_port)
563	568	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
564	569
565	570	MCFG_CPU_ADD("tms7042", TMS7040, XTAL_4_9152MHz) // should be TMS7042
566	571	MCFG_CPU_PROGRAM_MAP(tms7042_map)
567		MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7041_porta_r))
568		MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7041_portb_w))
569		MCFG_TMS7000_PORTC_READ_CB(READ8(exelv_state, tms7041_portc_r))
570		MCFG_TMS7000_PORTC_WRITE_CB(WRITE8(exelv_state, tms7041_portc_w))
571		MCFG_TMS7000_PORTD_READ_CB(READ8(exelv_state, tms7041_portd_r))
572		MCFG_TMS7000_PORTD_WRITE_CB(WRITE8(exelv_state, tms7041_portd_w))
	572	MCFG_CPU_IO_MAP(tms7041_port)
573	573
574	574	MCFG_QUANTUM_PERFECT_CPU("maincpu")
575	575

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