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r31083 Monday 23rd June, 2014 at 12:20:39 UTC by hap
more trampoline madness

[src/emu/cpu/z80]	tmpz84c015.c tmpz84c015.h
[src/mess/drivers]	pve500.c

trunk/src/emu/cpu/z80/tmpz84c015.c

r31082	r31083
15	15	const device_type TMPZ84C015 = &device_creator<tmpz84c015_device>;
16	16
17	17	static ADDRESS_MAP_START( tmpz84c015_internal_io_map, AS_IO, 8, tmpz84c015_device )
18		AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
19		AM_RANGE(0x18, 0x1b) AM_MIRROR(0xff00) AM_DEVREADWRITE("sio", z80dart_device, ba_cd_r, ba_cd_w)
20		AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xff00) AM_DEVREADWRITE("pio", z80pio_device, read_alt, write_alt)
	18	AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE("tmpz84c015_ctc", z80ctc_device, read, write)
	19	AM_RANGE(0x18, 0x1b) AM_MIRROR(0xff00) AM_DEVREADWRITE("tmpz84c015_sio", z80dart_device, ba_cd_r, ba_cd_w)
	20	AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xff00) AM_DEVREADWRITE("tmpz84c015_pio", z80pio_device, read_alt, write_alt)
21	21	AM_RANGE(0xf4, 0xf4) AM_MIRROR(0xff00) AM_WRITE(irq_priority_w)
22	22	ADDRESS_MAP_END
23	23
24	24
25	25	tmpz84c015_device::tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
26	26	: z80_device(mconfig, TMPZ84C015, "TMPZ84C015", tag, owner, clock, "tmpz84c015", __FILE__),
27		m_ctc(*this, "ctc"),
28		m_sio(*this, "sio"),
29		m_pio(*this, "pio"),
30	27	m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c015_internal_io_map ) ),
31		m_irq_priority(-1) // !
	28	m_ctc(*this, "tmpz84c015_ctc"),
	29	m_sio(*this, "tmpz84c015_sio"),
	30	m_pio(*this, "tmpz84c015_pio"),
	31	m_irq_priority(-1), // !
	32
	33	m_out_txda_cb(*this),
	34	m_out_dtra_cb(*this),
	35	m_out_rtsa_cb(*this),
	36	m_out_wrdya_cb(*this),
	37	m_out_synca_cb(*this),
	38
	39	m_out_txdb_cb(*this),
	40	m_out_dtrb_cb(*this),
	41	m_out_rtsb_cb(*this),
	42	m_out_wrdyb_cb(*this),
	43	m_out_syncb_cb(*this),
	44
	45	m_out_rxdrqa_cb(*this),
	46	m_out_txdrqa_cb(*this),
	47	m_out_rxdrqb_cb(*this),
	48	m_out_txdrqb_cb(*this),
	49
	50	m_zc0_cb(*this),
	51	m_zc1_cb(*this),
	52	m_zc2_cb(*this),
	53
	54	m_in_pa_cb(*this),
	55	m_out_pa_cb(*this),
	56	m_out_ardy_cb(*this),
	57
	58	m_in_pb_cb(*this),
	59	m_out_pb_cb(*this),
	60	m_out_brdy_cb(*this)
32	61	{
33	62	}
34	63
r31082	r31083
41	70	{
42	71	z80_device::device_start();
43	72
	73	// resolve callbacks
	74	m_out_txda_cb.resolve_safe();
	75	m_out_dtra_cb.resolve_safe();
	76	m_out_rtsa_cb.resolve_safe();
	77	m_out_wrdya_cb.resolve_safe();
	78	m_out_synca_cb.resolve_safe();
	79
	80	m_out_txdb_cb.resolve_safe();
	81	m_out_dtrb_cb.resolve_safe();
	82	m_out_rtsb_cb.resolve_safe();
	83	m_out_wrdyb_cb.resolve_safe();
	84	m_out_syncb_cb.resolve_safe();
	85
	86	m_out_rxdrqa_cb.resolve_safe();
	87	m_out_txdrqa_cb.resolve_safe();
	88	m_out_rxdrqb_cb.resolve_safe();
	89	m_out_txdrqb_cb.resolve_safe();
	90
	91	m_zc0_cb.resolve_safe();
	92	m_zc1_cb.resolve_safe();
	93	m_zc2_cb.resolve_safe();
	94
	95	m_in_pa_cb.resolve_safe(0);
	96	m_out_pa_cb.resolve_safe();
	97	m_out_ardy_cb.resolve_safe();
	98
	99	m_in_pb_cb.resolve_safe(0);
	100	m_out_pb_cb.resolve_safe();
	101	m_out_brdy_cb.resolve_safe();
	102
44	103	// register for save states
45	104	save_item(NAME(m_irq_priority));
46	105	}
r31082	r31083
83	142
84	143	if (m_irq_priority != data)
85	144	{
86		static const char *dev[3] = { "ctc", "sio", "pio" };
	145	static const char *dev[3] = { "tmpz84c015_ctc", "tmpz84c015_sio", "tmpz84c015_pio" };
87	146	static const int prio[6][3] =
88	147	{
89	148	{ 0, 1, 2 }, // 0: ctc -> sio -> pio -> ext
r31082	r31083
111	170	static MACHINE_CONFIG_FRAGMENT( tmpz84c015 )
112	171
113	172	/* basic machine hardware */
114		MCFG_DEVICE_ADD("ctc", Z80CTC, DERIVED_CLOCK(1,1) )
	173	MCFG_Z80SIO0_ADD("tmpz84c015_sio", DERIVED_CLOCK(1,1), 0, 0, 0, 0)
	174	MCFG_Z80DART_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
	175
	176	MCFG_Z80DART_OUT_TXDA_CB(WRITELINE(tmpz84c015_device, out_txda_cb_trampoline_w))
	177	MCFG_Z80DART_OUT_DTRA_CB(WRITELINE(tmpz84c015_device, out_dtra_cb_trampoline_w))
	178	MCFG_Z80DART_OUT_RTSA_CB(WRITELINE(tmpz84c015_device, out_rtsa_cb_trampoline_w))
	179	MCFG_Z80DART_OUT_WRDYA_CB(WRITELINE(tmpz84c015_device, out_wrdya_cb_trampoline_w))
	180	MCFG_Z80DART_OUT_SYNCA_CB(WRITELINE(tmpz84c015_device, out_synca_cb_trampoline_w))
	181
	182	MCFG_Z80DART_OUT_TXDB_CB(WRITELINE(tmpz84c015_device, out_txdb_cb_trampoline_w))
	183	MCFG_Z80DART_OUT_DTRB_CB(WRITELINE(tmpz84c015_device, out_dtrb_cb_trampoline_w))
	184	MCFG_Z80DART_OUT_RTSB_CB(WRITELINE(tmpz84c015_device, out_rtsb_cb_trampoline_w))
	185	MCFG_Z80DART_OUT_WRDYB_CB(WRITELINE(tmpz84c015_device, out_wrdyb_cb_trampoline_w))
	186	MCFG_Z80DART_OUT_SYNCB_CB(WRITELINE(tmpz84c015_device, out_syncb_cb_trampoline_w))
	187
	188	MCFG_Z80DART_OUT_RXDRQA_CB(WRITELINE(tmpz84c015_device, out_rxdrqa_cb_trampoline_w))
	189	MCFG_Z80DART_OUT_TXDRQA_CB(WRITELINE(tmpz84c015_device, out_txdrqa_cb_trampoline_w))
	190	MCFG_Z80DART_OUT_RXDRQB_CB(WRITELINE(tmpz84c015_device, out_rxdrqb_cb_trampoline_w))
	191	MCFG_Z80DART_OUT_TXDRQB_CB(WRITELINE(tmpz84c015_device, out_txdrqb_cb_trampoline_w))
	192
	193	MCFG_DEVICE_ADD("tmpz84c015_ctc", Z80CTC, DERIVED_CLOCK(1,1) )
115	194	MCFG_Z80CTC_INTR_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
116	195
117		MCFG_Z80SIO0_ADD("sio", DERIVED_CLOCK(1,1), 0, 0, 0, 0)
118		MCFG_Z80DART_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
	196	MCFG_Z80CTC_ZC0_CB(WRITELINE(tmpz84c015_device, zc0_cb_trampoline_w))
	197	MCFG_Z80CTC_ZC1_CB(WRITELINE(tmpz84c015_device, zc1_cb_trampoline_w))
	198	MCFG_Z80CTC_ZC2_CB(WRITELINE(tmpz84c015_device, zc2_cb_trampoline_w))
119	199
120		MCFG_DEVICE_ADD("pio", Z80PIO, DERIVED_CLOCK(1,1) )
	200	MCFG_DEVICE_ADD("tmpz84c015_pio", Z80PIO, DERIVED_CLOCK(1,1) )
121	201	MCFG_Z80PIO_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
	202
	203	MCFG_Z80PIO_IN_PA_CB(READ8(tmpz84c015_device, in_pa_cb_trampoline_r))
	204	MCFG_Z80PIO_OUT_PA_CB(WRITE8(tmpz84c015_device, out_pa_cb_trampoline_w))
	205	MCFG_Z80PIO_OUT_ARDY_CB(WRITELINE(tmpz84c015_device, out_ardy_cb_trampoline_w))
	206
	207	MCFG_Z80PIO_IN_PB_CB(READ8(tmpz84c015_device, in_pb_cb_trampoline_r))
	208	MCFG_Z80PIO_OUT_PB_CB(WRITE8(tmpz84c015_device, out_pb_cb_trampoline_w))
	209	MCFG_Z80PIO_OUT_BRDY_CB(WRITELINE(tmpz84c015_device, out_brdy_cb_trampoline_w))
122	210	MACHINE_CONFIG_END
123	211
124	212	machine_config_constructor tmpz84c015_device::device_mconfig_additions() const

trunk/src/emu/cpu/z80/tmpz84c015.h

r31082	r31083
22	22	***************************************************************************/
23	23
24	24	// If an external daisy chain is used, insert this before your own device tags:
25		#define TMPZ84C015_DAISY_INTERNAL { "ctc" }, { "sio" }, { "pio" }
	25	#define TMPZ84C015_DAISY_INTERNAL { "tmpz84c015_ctc" }, { "tmpz84c015_sio" }, { "tmpz84c015_pio" }
26	26
27		// NOTE: for callbacks, see machine/z80dart.h, machine/z80ctc.h, machine/z80pio.h
	27	// SIO callbacks
	28	#define MCFG_TMPZ84C015_OUT_TXDA_CB(_devcb) \
	29	devcb = &tmpz84c015_device::set_out_txda_callback(*device, DEVCB_##_devcb);
28	30
	31	#define MCFG_TMPZ84C015_OUT_DTRA_CB(_devcb) \
	32	devcb = &tmpz84c015_device::set_out_dtra_callback(*device, DEVCB_##_devcb);
29	33
	34	#define MCFG_TMPZ84C015_OUT_RTSA_CB(_devcb) \
	35	devcb = &tmpz84c015_device::set_out_rtsa_callback(*device, DEVCB_##_devcb);
	36
	37	#define MCFG_TMPZ84C015_OUT_WRDYA_CB(_devcb) \
	38	devcb = &tmpz84c015_device::set_out_wrdya_callback(*device, DEVCB_##_devcb);
	39
	40	#define MCFG_TMPZ84C015_OUT_SYNCA_CB(_devcb) \
	41	devcb = &tmpz84c015_device::set_out_synca_callback(*device, DEVCB_##_devcb);
	42
	43	#define MCFG_TMPZ84C015_OUT_TXDB_CB(_devcb) \
	44	devcb = &tmpz84c015_device::set_out_txdb_callback(*device, DEVCB_##_devcb);
	45
	46	#define MCFG_TMPZ84C015_OUT_DTRB_CB(_devcb) \
	47	devcb = &tmpz84c015_device::set_out_dtrb_callback(*device, DEVCB_##_devcb);
	48
	49	#define MCFG_TMPZ84C015_OUT_RTSB_CB(_devcb) \
	50	devcb = &tmpz84c015_device::set_out_rtsb_callback(*device, DEVCB_##_devcb);
	51
	52	#define MCFG_TMPZ84C015_OUT_WRDYB_CB(_devcb) \
	53	devcb = &tmpz84c015_device::set_out_wrdyb_callback(*device, DEVCB_##_devcb);
	54
	55	#define MCFG_TMPZ84C015_OUT_SYNCB_CB(_devcb) \
	56	devcb = &tmpz84c015_device::set_out_syncb_callback(*device, DEVCB_##_devcb);
	57
	58	#define MCFG_TMPZ84C015_OUT_RXDRQA_CB(_devcb) \
	59	devcb = &tmpz84c015_device::set_out_rxdrqa_callback(*device, DEVCB_##_devcb);
	60
	61	#define MCFG_TMPZ84C015_OUT_TXDRQA_CB(_devcb) \
	62	devcb = &tmpz84c015_device::set_out_txdrqa_callback(*device, DEVCB_##_devcb);
	63
	64	#define MCFG_TMPZ84C015_OUT_RXDRQB_CB(_devcb) \
	65	devcb = &tmpz84c015_device::set_out_rxdrqb_callback(*device, DEVCB_##_devcb);
	66
	67	#define MCFG_TMPZ84C015_OUT_TXDRQB_CB(_devcb) \
	68	devcb = &tmpz84c015_device::set_out_txdrqb_callback(*device, DEVCB_##_devcb);
	69
	70
	71	// CTC callbacks
	72	#define MCFG_TMPZ84C015_ZC0_CB(_devcb) \
	73	devcb = &tmpz84c015_device::set_zc0_callback(*device, DEVCB_##_devcb);
	74
	75	#define MCFG_TMPZ84C015_ZC1_CB(_devcb) \
	76	devcb = &tmpz84c015_device::set_zc1_callback(*device, DEVCB_##_devcb);
	77
	78	#define MCFG_TMPZ84C015_ZC2_CB(_devcb) \
	79	devcb = &tmpz84c015_device::set_zc2_callback(*device, DEVCB_##_devcb);
	80
	81
	82	// PIO callbacks
	83	#define MCFG_TMPZ84C015_IN_PA_CB(_devcb) \
	84	devcb = &tmpz84c015_device::set_in_pa_callback(*device, DEVCB_##_devcb);
	85
	86	#define MCFG_TMPZ84C015_OUT_PA_CB(_devcb) \
	87	devcb = &tmpz84c015_device::set_out_pa_callback(*device, DEVCB_##_devcb);
	88
	89	#define MCFG_TMPZ84C015_OUT_ARDY_CB(_devcb) \
	90	devcb = &tmpz84c015_device::set_out_ardy_callback(*device, DEVCB_##_devcb);
	91
	92	#define MCFG_TMPZ84C015_IN_PB_CB(_devcb) \
	93	devcb = &tmpz84c015_device::set_in_pb_callback(*device, DEVCB_##_devcb);
	94
	95	#define MCFG_TMPZ84C015_OUT_PB_CB(_devcb) \
	96	devcb = &tmpz84c015_device::set_out_pb_callback(*device, DEVCB_##_devcb);
	97
	98	#define MCFG_TMPZ84C015_OUT_BRDY_CB(_devcb) \
	99	devcb = &tmpz84c015_device::set_out_brdy_callback(*device, DEVCB_##_devcb);
	100
	101
30	102	/***************************************************************************
31	103	TYPE DEFINITIONS
32	104	***************************************************************************/
r31082	r31083
36	108	public:
37	109	tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
38	110
39		// devices/pointers
40		required_device<z80ctc_device> m_ctc;
41		required_device<z80dart_device> m_sio;
42		required_device<z80pio_device> m_pio;
	111	// static configuration helpers
	112	template<class _Object> static devcb_base &set_out_txda_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_txda_cb.set_callback(object); }
	113	template<class _Object> static devcb_base &set_out_dtra_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_dtra_cb.set_callback(object); }
	114	template<class _Object> static devcb_base &set_out_rtsa_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_rtsa_cb.set_callback(object); }
	115	template<class _Object> static devcb_base &set_out_wrdya_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_wrdya_cb.set_callback(object); }
	116	template<class _Object> static devcb_base &set_out_synca_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_synca_cb.set_callback(object); }
43	117
44		DECLARE_WRITE8_MEMBER(irq_priority_w);
	118	template<class _Object> static devcb_base &set_out_txdb_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_txdb_cb.set_callback(object); }
	119	template<class _Object> static devcb_base &set_out_dtrb_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_dtrb_cb.set_callback(object); }
	120	template<class _Object> static devcb_base &set_out_rtsb_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_rtsb_cb.set_callback(object); }
	121	template<class _Object> static devcb_base &set_out_wrdyb_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_wrdyb_cb.set_callback(object); }
	122	template<class _Object> static devcb_base &set_out_syncb_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_syncb_cb.set_callback(object); }
45	123
	124	template<class _Object> static devcb_base &set_out_rxdrqa_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_rxdrqa_cb.set_callback(object); }
	125	template<class _Object> static devcb_base &set_out_txdrqa_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_txdrqa_cb.set_callback(object); }
	126	template<class _Object> static devcb_base &set_out_rxdrqb_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_rxdrqb_cb.set_callback(object); }
	127	template<class _Object> static devcb_base &set_out_txdrqb_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_txdrqb_cb.set_callback(object); }
	128
	129	template<class _Object> static devcb_base &set_zc0_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_zc0_cb.set_callback(object); }
	130	template<class _Object> static devcb_base &set_zc1_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_zc1_cb.set_callback(object); }
	131	template<class _Object> static devcb_base &set_zc2_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_zc2_cb.set_callback(object); }
	132
	133	template<class _Object> static devcb_base &set_in_pa_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_in_pa_cb.set_callback(object); }
	134	template<class _Object> static devcb_base &set_out_pa_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_pa_cb.set_callback(object); }
	135	template<class _Object> static devcb_base &set_out_ardy_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_ardy_cb.set_callback(object); }
	136
	137	template<class _Object> static devcb_base &set_in_pb_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_in_pb_cb.set_callback(object); }
	138	template<class _Object> static devcb_base &set_out_pb_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_pb_cb.set_callback(object); }
	139	template<class _Object> static devcb_base &set_out_brdy_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_brdy_cb.set_callback(object); }
	140
	141	// SIO public interface
	142	DECLARE_WRITE_LINE_MEMBER( rxa_w ) { m_sio->rxa_w(state); }
	143	DECLARE_WRITE_LINE_MEMBER( rxb_w ) { m_sio->rxb_w(state); }
	144	DECLARE_WRITE_LINE_MEMBER( ctsa_w ) { m_sio->ctsa_w(state); }
	145	DECLARE_WRITE_LINE_MEMBER( ctsb_w ) { m_sio->ctsb_w(state); }
	146	DECLARE_WRITE_LINE_MEMBER( dcda_w ) { m_sio->dcda_w(state); }
	147	DECLARE_WRITE_LINE_MEMBER( dcdb_w ) { m_sio->dcdb_w(state); }
	148	DECLARE_WRITE_LINE_MEMBER( ria_w ) { m_sio->ria_w(state); }
	149	DECLARE_WRITE_LINE_MEMBER( rib_w ) { m_sio->rib_w(state); }
	150	DECLARE_WRITE_LINE_MEMBER( rxca_w ) { m_sio->rxca_w(state); }
	151	DECLARE_WRITE_LINE_MEMBER( rxcb_w ) { m_sio->rxcb_w(state); }
	152	DECLARE_WRITE_LINE_MEMBER( txca_w ) { m_sio->txca_w(state); }
	153	DECLARE_WRITE_LINE_MEMBER( txcb_w ) { m_sio->txcb_w(state); }
	154	DECLARE_WRITE_LINE_MEMBER( rxtxcb_w ) { m_sio->rxtxcb_w(state); }
	155	DECLARE_WRITE_LINE_MEMBER( synca_w ) { m_sio->synca_w(state); }
	156	DECLARE_WRITE_LINE_MEMBER( syncb_w ) { m_sio->syncb_w(state); }
	157
	158	// CTC public interface
	159	DECLARE_WRITE_LINE_MEMBER( trg0 ) { m_ctc->trg0(state); }
	160	DECLARE_WRITE_LINE_MEMBER( trg1 ) { m_ctc->trg1(state); }
	161	DECLARE_WRITE_LINE_MEMBER( trg2 ) { m_ctc->trg2(state); }
	162	DECLARE_WRITE_LINE_MEMBER( trg3 ) { m_ctc->trg3(state); }
	163
	164	// PIO public interface
	165	DECLARE_READ_LINE_MEMBER( rdy_a ) { return m_pio->rdy_a(); }
	166	DECLARE_READ_LINE_MEMBER( rdy_b ) { return m_pio->rdy_b(); }
	167	DECLARE_WRITE_LINE_MEMBER( strobe_a ) { m_pio->strobe_a(state); }
	168	DECLARE_WRITE_LINE_MEMBER( strobe_b ) { m_pio->strobe_b(state); }
	169
	170	DECLARE_WRITE8_MEMBER( pa_w ) { m_pio->pa_w(space, offset, data, mem_mask); }
	171	DECLARE_READ8_MEMBER( pa_r ) { return m_pio->pa_r(space, offset, mem_mask); }
	172	DECLARE_WRITE8_MEMBER( pb_w ) { m_pio->pb_w(space, offset, data, mem_mask); }
	173	DECLARE_READ8_MEMBER( pb_r ) { return m_pio->pb_r(space, offset, mem_mask); }
	174
	175	/////////////////////////////////////////////////////////
	176
	177	DECLARE_WRITE8_MEMBER( irq_priority_w );
	178
	179	DECLARE_WRITE_LINE_MEMBER( out_txda_cb_trampoline_w ) { m_out_txda_cb(state); }
	180	DECLARE_WRITE_LINE_MEMBER( out_dtra_cb_trampoline_w ) { m_out_dtra_cb(state); }
	181	DECLARE_WRITE_LINE_MEMBER( out_rtsa_cb_trampoline_w ) { m_out_rtsa_cb(state); }
	182	DECLARE_WRITE_LINE_MEMBER( out_wrdya_cb_trampoline_w ) { m_out_wrdya_cb(state); }
	183	DECLARE_WRITE_LINE_MEMBER( out_synca_cb_trampoline_w ) { m_out_synca_cb(state); }
	184
	185	DECLARE_WRITE_LINE_MEMBER( out_txdb_cb_trampoline_w ) { m_out_txdb_cb(state); }
	186	DECLARE_WRITE_LINE_MEMBER( out_dtrb_cb_trampoline_w ) { m_out_dtrb_cb(state); }
	187	DECLARE_WRITE_LINE_MEMBER( out_rtsb_cb_trampoline_w ) { m_out_rtsb_cb(state); }
	188	DECLARE_WRITE_LINE_MEMBER( out_wrdyb_cb_trampoline_w ) { m_out_wrdyb_cb(state); }
	189	DECLARE_WRITE_LINE_MEMBER( out_syncb_cb_trampoline_w ) { m_out_syncb_cb(state); }
	190
	191	DECLARE_WRITE_LINE_MEMBER( out_rxdrqa_cb_trampoline_w ) { m_out_rxdrqa_cb(state); }
	192	DECLARE_WRITE_LINE_MEMBER( out_txdrqa_cb_trampoline_w ) { m_out_txdrqa_cb(state); }
	193	DECLARE_WRITE_LINE_MEMBER( out_rxdrqb_cb_trampoline_w ) { m_out_rxdrqb_cb(state); }
	194	DECLARE_WRITE_LINE_MEMBER( out_txdrqb_cb_trampoline_w ) { m_out_txdrqb_cb(state); }
	195
	196	DECLARE_WRITE_LINE_MEMBER( zc0_cb_trampoline_w ) { m_zc0_cb(state); }
	197	DECLARE_WRITE_LINE_MEMBER( zc1_cb_trampoline_w ) { m_zc1_cb(state); }
	198	DECLARE_WRITE_LINE_MEMBER( zc2_cb_trampoline_w ) { m_zc2_cb(state); }
	199
	200	DECLARE_READ8_MEMBER( in_pa_cb_trampoline_r ) { return m_in_pa_cb(); }
	201	DECLARE_WRITE8_MEMBER( out_pa_cb_trampoline_w ) { m_out_pa_cb(data); }
	202	DECLARE_WRITE_LINE_MEMBER( out_ardy_cb_trampoline_w ) { m_out_ardy_cb(state); }
	203
	204	DECLARE_READ8_MEMBER( in_pb_cb_trampoline_r ) { return m_in_pb_cb(); }
	205	DECLARE_WRITE8_MEMBER( out_pb_cb_trampoline_w ) { m_out_pb_cb(data); }
	206	DECLARE_WRITE_LINE_MEMBER( out_brdy_cb_trampoline_w ) { m_out_brdy_cb(state); }
	207
46	208	protected:
47	209	// device-level overrides
48	210	virtual machine_config_constructor device_mconfig_additions() const;
r31082	r31083
62	224	}
63	225
64	226	private:
	227	// devices/pointers
	228	required_device<z80ctc_device> m_ctc;
	229	required_device<z80dart_device> m_sio;
	230	required_device<z80pio_device> m_pio;
	231
	232	// internal state
65	233	UINT8 m_irq_priority;
	234
	235	// callbacks
	236	devcb_write_line m_out_txda_cb;
	237	devcb_write_line m_out_dtra_cb;
	238	devcb_write_line m_out_rtsa_cb;
	239	devcb_write_line m_out_wrdya_cb;
	240	devcb_write_line m_out_synca_cb;
	241
	242	devcb_write_line m_out_txdb_cb;
	243	devcb_write_line m_out_dtrb_cb;
	244	devcb_write_line m_out_rtsb_cb;
	245	devcb_write_line m_out_wrdyb_cb;
	246	devcb_write_line m_out_syncb_cb;
	247
	248	devcb_write_line m_out_rxdrqa_cb;
	249	devcb_write_line m_out_txdrqa_cb;
	250	devcb_write_line m_out_rxdrqb_cb;
	251	devcb_write_line m_out_txdrqb_cb;
	252
	253	devcb_write_line m_zc0_cb;
	254	devcb_write_line m_zc1_cb;
	255	devcb_write_line m_zc2_cb;
	256
	257	devcb_read8 m_in_pa_cb;
	258	devcb_write8 m_out_pa_cb;
	259	devcb_write_line m_out_ardy_cb;
	260
	261	devcb_read8 m_in_pb_cb;
	262	devcb_write8 m_out_pb_cb;
	263	devcb_write_line m_out_brdy_cb;
66	264	};
67	265
68	266

trunk/src/mess/drivers/pve500.c

r31082	r31083
196	196	READ8_MEMBER(pve500_state::dualport_ram_left_r)
197	197	{
198	198	//printf("dualport_ram: Left READ\n");
199		m_subcpu->m_ctc->trg1(1); //(INT_Right)
	199	m_subcpu->trg1(1); //(INT_Right)
200	200	return dualport_7FE_data;
201	201	}
202	202
r31082	r31083
204	204	{
205	205	//printf("dualport_ram: Left WRITE\n");
206	206	dualport_7FF_data = data;
207		m_subcpu->m_ctc->trg1(0); //(INT_Right)
	207	m_subcpu->trg1(0); //(INT_Right)
208	208	}
209	209
210	210	READ8_MEMBER(pve500_state::dualport_ram_right_r)
211	211	{
212	212	//printf("dualport_ram: Right READ\n");
213		m_maincpu->m_ctc->trg1(1); //(INT_Left)
	213	m_maincpu->trg1(1); //(INT_Left)
214	214	return dualport_7FF_data;
215	215	}
216	216
r31082	r31083
218	218	{
219	219	//printf("dualport_ram: Right WRITE\n");
220	220	dualport_7FE_data = data;
221		m_maincpu->m_ctc->trg1(0); //(INT_Left)
	221	m_maincpu->trg1(0); //(INT_Left)
222	222	}
223	223
224	224	READ8_MEMBER(pve500_state::io_expander_r)

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