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r31082 Monday 23rd June, 2014 at 10:54:37 UTC by hap
ok, made TMPZ84C011 pins external instead of making drivers having to interface with its internal peripherals

[src/emu/cpu/z80]	tmpz84c011.c tmpz84c011.h tmpz84c015.h
[src/emu/machine]	mb89363b.h
[src/mame/drivers]	csplayh5.c kenseim.c nbmj9195.c niyanpai.c
[src/mame/includes]	nbmj9195.h

trunk/src/mame/drivers/niyanpai.c

r31081	r31082
762	762
763	763	static const z80_daisy_config daisy_chain_sound[] =
764	764	{
765		{ "audiocpu:ctc" },
	765	TMPZ84C011_DAISY_INTERNAL,
766	766	{ NULL }
767	767	};
768	768
r31081	r31082
786	786	MCFG_TMPZ84C011_PORTB_WRITE_CB(WRITE8(niyanpai_state, cpu_portb_w))
787	787	MCFG_TMPZ84C011_PORTC_WRITE_CB(WRITE8(niyanpai_state, cpu_portc_w))
788	788	MCFG_TMPZ84C011_PORTE_WRITE_CB(WRITE8(niyanpai_state, cpu_porte_w))
789		MCFG_DEVICE_MODIFY("audiocpu:ctc")
790		MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("ctc", z80ctc_device, trg3))
	789	MCFG_TMPZ84C011_ZC0_CB(DEVWRITELINE("audiocpu", tmpz84c011_device, trg3))
791	790
792	791	MCFG_NVRAM_ADD_0FILL("nvram")
793	792

trunk/src/mame/drivers/kenseim.c

r31081	r31082
11	11	https://www.youtube.com/watch?v=yQpMvRL0FfM
12	12
13	13	todo:
14		we have no way of telling the physical order of the moles on the control panel vs. the reads / writes
15		so our moles could be in the wrong positions - maybe there are fixed patterns in the video we can use
16		to figure it out? * the big mole appears to be worth 2 points so that one we can identify
	14	- we have no way of telling the physical order of the moles on the control panel vs. the reads / writes
	15	so our moles could be in the wrong positions - maybe there are fixed patterns in the video we can use
	16	to figure it out? * the big mole appears to be worth 2 points so that one we can identify
17	17
18	18
19	19
20		Additional 'DRIVE BOARD' PCB  (todo, improve ascii layout)
	20	Additional 'DRIVE BOARD' PCB
21	21
22	22	--------------------------------------------------------------------------------------------------------------|
23	23	|                                                                                                             |
r31081	r31082
466	466
467	467	static const z80_daisy_config daisy_chain_gamecpu[] =
468	468	{
469		{ "gamecpu:ctc" },
	469	TMPZ84C011_DAISY_INTERNAL,
470	470	{ NULL }
471	471	};
472	472

trunk/src/mame/drivers/nbmj9195.c

r31081	r31082
321	321	/* CTC of main cpu, ch0 trigger is vblank */
322	322	INTERRUPT_GEN_MEMBER(nbmj9195_state::ctc0_trg1)
323	323	{
324		z80ctc_device *ctc = machine().device<z80ctc_device>("maincpu:ctc");
325		ctc->trg1(1);
326		ctc->trg1(0);
	324	m_maincpu->trg1(1);
	325	m_maincpu->trg1(0);
327	326	}
328	327
329	328	void nbmj9195_state::machine_reset()
r31081	r31082
2780	2779
2781	2780	static const z80_daisy_config daisy_chain_main[] =
2782	2781	{
2783		{ "maincpu:ctc" },
	2782	TMPZ84C011_DAISY_INTERNAL,
2784	2783	{ NULL }
2785	2784	};
2786	2785
2787	2786	static const z80_daisy_config daisy_chain_sound[] =
2788	2787	{
2789		{ "audiocpu:ctc" },
	2788	TMPZ84C011_DAISY_INTERNAL,
2790	2789	{ NULL }
2791	2790	};
2792	2791
r31081	r31082
2838	2837	MCFG_CPU_CONFIG(daisy_chain_sound)
2839	2838	MCFG_CPU_PROGRAM_MAP(sailorws_sound_map)
2840	2839	MCFG_CPU_IO_MAP(sailorws_sound_io_map)
2841		MCFG_DEVICE_MODIFY("audiocpu:ctc")
2842		MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("ctc", z80ctc_device, trg3))
	2840	MCFG_TMPZ84C011_ZC0_CB(DEVWRITELINE("audiocpu", tmpz84c011_device, trg3))
2843	2841
2844	2842	/* video hardware */
2845	2843	MCFG_SCREEN_ADD("screen", RASTER)

trunk/src/mame/drivers/csplayh5.c

r31081	r31082
450	450
451	451	static const z80_daisy_config daisy_chain_sound[] =
452	452	{
453		{ "audiocpu:ctc" },
	453	TMPZ84C011_DAISY_INTERNAL,
454	454	{ NULL }
455	455	};
456	456
r31081	r31082
480	480	MCFG_TMPZ84C011_PORTC_WRITE_CB(WRITE8(csplayh5_state, soundcpu_dac1_w))
481	481	MCFG_TMPZ84C011_PORTD_READ_CB(READ8(csplayh5_state, soundcpu_portd_r))
482	482	MCFG_TMPZ84C011_PORTE_WRITE_CB(WRITE8(csplayh5_state, soundcpu_porte_w))
483		MCFG_DEVICE_MODIFY("audiocpu:ctc")
484		MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("ctc", z80ctc_device, trg3))
	483	MCFG_TMPZ84C011_ZC0_CB(DEVWRITELINE("audiocpu", tmpz84c011_device, trg3))
485	484
486	485	MCFG_NVRAM_ADD_0FILL("nvram")
487	486

trunk/src/mame/includes/nbmj9195.h

r31081	r31082
	1	/******************************************************************************
	2
	3	nbmj9195 - Nichibutsu Mahjong games for years 1991-1995
	4
	5	******************************************************************************/
	6
	7	#include "cpu/z80/tmpz84c011.h"
1	8	#include "sound/dac.h"
2	9
3	10	#define VRAM_MAX    2
r31081	r31082
20	27	m_dac1(*this, "dac1"),
21	28	m_dac2(*this, "dac2"),
22	29	m_screen(*this, "screen"),
23		m_palette(*this, "palette") { }
	30	m_palette(*this, "palette")
	31	{ }
24	32
	33	required_device<tmpz84c011_device> m_maincpu;
	34	required_device<dac_device> m_dac1;
	35	required_device<dac_device> m_dac2;
	36	required_device<screen_device> m_screen;
	37	required_device<palette_device> m_palette;
	38
25	39	int m_inputport;
26	40	int m_dipswbitsel;
27	41	int m_outcoin_flag;
r31081	r31082
114	128	int nbmj9195_dipsw_r();
115	129	void nbmj9195_dipswbitsel_w(int data);
116	130	void mscoutm_inputportsel_w(int data);
117		required_device<cpu_device> m_maincpu;
118		required_device<dac_device> m_dac1;
119		required_device<dac_device> m_dac2;
120		required_device<screen_device> m_screen;
121		required_device<palette_device> m_palette;
122	131
123	132	protected:
124	133	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);

trunk/src/emu/machine/mb89363b.h

r31081	r31082
	1	/***************************************************************************
1	2
	3	Fujitsu MB89363 Parallel Communication Interface
	4	(this acts as a trampoline to 2x i8255 chips)
	5
	6	***************************************************************************/
	7
2	8	#pragma once
3	9
4	10	#ifndef __MB89363B__

trunk/src/emu/cpu/z80/tmpz84c015.h

r31081	r31082
5	5
6	6	***************************************************************************/
7	7
	8	#pragma once
	9
	10	#ifndef __TMPZ84C015__
	11	#define __TMPZ84C015__
	12
8	13	#include "emu.h"
9	14	#include "z80.h"
10	15	#include "machine/z80dart.h"
11	16	#include "machine/z80ctc.h"
12	17	#include "machine/z80pio.h"
13	18
	19
	20	/***************************************************************************
	21	DEVICE CONFIGURATION MACROS
	22	***************************************************************************/
	23
14	24	// If an external daisy chain is used, insert this before your own device tags:
15	25	#define TMPZ84C015_DAISY_INTERNAL { "ctc" }, { "sio" }, { "pio" }
16	26
17	27	// NOTE: for callbacks, see machine/z80dart.h, machine/z80ctc.h, machine/z80pio.h
18	28
19	29
	30	/***************************************************************************
	31	TYPE DEFINITIONS
	32	***************************************************************************/
	33
20	34	class tmpz84c015_device : public z80_device
21	35	{
22	36	public:
r31081	r31082
51	65	UINT8 m_irq_priority;
52	66	};
53	67
	68
	69	// device type definition
54	70	extern const device_type TMPZ84C015;
	71
	72
	73	#endif // __TMPZ84C015__

trunk/src/emu/cpu/z80/tmpz84c011.c

r31081	r31082
13	13	const device_type TMPZ84C011 = &device_creator<tmpz84c011_device>;
14	14
15	15	static ADDRESS_MAP_START( tmpz84c011_internal_io_map, AS_IO, 8, tmpz84c011_device )
16		AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
	16	AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE("tmpz84c011_ctc", z80ctc_device, read, write)
17	17
18	18	AM_RANGE(0x50, 0x50) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_pa_r, tmpz84c011_pa_w)
19	19	AM_RANGE(0x51, 0x51) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_pb_r, tmpz84c011_pb_w)
r31081	r31082
30	30
31	31	tmpz84c011_device::tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
32	32	: z80_device(mconfig, TMPZ84C011, "TMPZ84C011", tag, owner, clock, "tmpz84c011", __FILE__),
33		m_ctc(*this, "ctc"),
34	33	m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c011_internal_io_map ) ),
	34	m_ctc(*this, "tmpz84c011_ctc"),
35	35	m_outportsa(*this),
36	36	m_outportsb(*this),
37	37	m_outportsc(*this),
r31081	r31082
41	41	m_inportsb(*this),
42	42	m_inportsc(*this),
43	43	m_inportsd(*this),
44		m_inportse(*this)
	44	m_inportse(*this),
	45	m_zc0_cb(*this),
	46	m_zc1_cb(*this),
	47	m_zc2_cb(*this)
45	48	{
46	49	memset(m_pio_dir, 0, 5);
47	50	memset(m_pio_latch, 0, 5);
r31081	r31082
69	72	m_inportsd.resolve_safe(0);
70	73	m_inportse.resolve_safe(0);
71	74
	75	m_zc0_cb.resolve_safe();
	76	m_zc1_cb.resolve_safe();
	77	m_zc2_cb.resolve_safe();
	78
72	79	// register for save states
73	80	save_item(NAME(m_pio_dir[0]));
74	81	save_item(NAME(m_pio_latch[0]));
r31081	r31082
91	98	{
92	99	z80_device::device_reset();
93	100
94		// initialize TMPZ84C011 PIO
	101	// initialize I/O
95	102	tmpz84c011_dir_pa_w(*m_io, 0, 0); tmpz84c011_pa_w(*m_io, 0, 0xff);
96	103	tmpz84c011_dir_pb_w(*m_io, 0, 0); tmpz84c011_pb_w(*m_io, 0, 0xff);
97	104	tmpz84c011_dir_pc_w(*m_io, 0, 0); tmpz84c011_pc_w(*m_io, 0, 0xff);
r31081	r31082
207	214
208	215
209	216	static MACHINE_CONFIG_FRAGMENT( tmpz84c011 )
210		MCFG_DEVICE_ADD("ctc", Z80CTC, DERIVED_CLOCK(1,1) )
	217	MCFG_DEVICE_ADD("tmpz84c011_ctc", Z80CTC, DERIVED_CLOCK(1,1) )
211	218	MCFG_Z80CTC_INTR_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
	219	MCFG_Z80CTC_ZC0_CB(WRITELINE(tmpz84c011_device, zc0_cb_trampoline_w))
	220	MCFG_Z80CTC_ZC1_CB(WRITELINE(tmpz84c011_device, zc1_cb_trampoline_w))
	221	MCFG_Z80CTC_ZC2_CB(WRITELINE(tmpz84c011_device, zc2_cb_trampoline_w))
212	222	MACHINE_CONFIG_END
213	223
214	224	machine_config_constructor tmpz84c011_device::device_mconfig_additions() const

trunk/src/emu/cpu/z80/tmpz84c011.h

r31081	r31082
5	5
6	6	***************************************************************************/
7	7
	8	#pragma once
	9
	10	#ifndef __TMPZ84C011__
	11	#define __TMPZ84C011__
	12
8	13	#include "emu.h"
9	14	#include "z80.h"
10	15	#include "machine/z80ctc.h"
11	16
12		// NOTE: for CTC callbacks, see machine/z80ctc.h
13		// TMPZ84C011 PIO callbacks
	17
	18	/***************************************************************************
	19	DEVICE CONFIGURATION MACROS
	20	***************************************************************************/
	21
	22	// For daisy chain configuration, insert this:
	23	#define TMPZ84C011_DAISY_INTERNAL { "tmpz84c011_ctc" }
	24
	25	// CTC callbacks
	26	#define MCFG_TMPZ84C011_ZC0_CB(_devcb) \
	27	devcb = &tmpz84c011_device::set_zc0_callback(*device, DEVCB_##_devcb);
	28
	29	#define MCFG_TMPZ84C011_ZC1_CB(_devcb) \
	30	devcb = &tmpz84c011_device::set_zc1_callback(*device, DEVCB_##_devcb);
	31
	32	#define MCFG_TMPZ84C011_ZC2_CB(_devcb) \
	33	devcb = &tmpz84c011_device::set_zc2_callback(*device, DEVCB_##_devcb);
	34
	35
	36	// I/O callbacks
14	37	#define MCFG_TMPZ84C011_PORTA_READ_CB(_devcb) \
15	38	devcb = &tmpz84c011_device::set_inportsa_cb(*device, DEVCB_##_devcb);
16	39
r31081	r31082
43	66	devcb = &tmpz84c011_device::set_outportse_cb(*device, DEVCB_##_devcb);
44	67
45	68
	69	/***************************************************************************
	70	TYPE DEFINITIONS
	71	***************************************************************************/
	72
46	73	class tmpz84c011_device : public z80_device
47	74	{
48	75	public:
49	76	tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
50	77
51	78	// static configuration helpers
	79	template<class _Object> static devcb_base &set_zc0_callback(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_zc0_cb.set_callback(object); }
	80	template<class _Object> static devcb_base &set_zc1_callback(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_zc1_cb.set_callback(object); }
	81	template<class _Object> static devcb_base &set_zc2_callback(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_zc2_cb.set_callback(object); }
	82
52	83	template<class _Object> static devcb_base & set_outportsa_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_outportsa.set_callback(object); }
53	84	template<class _Object> static devcb_base & set_outportsb_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_outportsb.set_callback(object); }
54	85	template<class _Object> static devcb_base & set_outportsc_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_outportsc.set_callback(object); }
r31081	r31082
61	92	template<class _Object> static devcb_base & set_inportsd_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_inportsd.set_callback(object); }
62	93	template<class _Object> static devcb_base & set_inportse_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_inportse.set_callback(object); }
63	94
64		// devices/pointers
65		required_device<z80ctc_device> m_ctc;
	95	// CTC public interface
	96	DECLARE_WRITE_LINE_MEMBER( trg0 ) { m_ctc->trg0(state); }
	97	DECLARE_WRITE_LINE_MEMBER( trg1 ) { m_ctc->trg1(state); }
	98	DECLARE_WRITE_LINE_MEMBER( trg2 ) { m_ctc->trg2(state); }
	99	DECLARE_WRITE_LINE_MEMBER( trg3 ) { m_ctc->trg3(state); }
	100
	101	/////////////////////////////////////////////////////////
66	102
67		DECLARE_READ8_MEMBER(tmpz84c011_pa_r);
68		DECLARE_READ8_MEMBER(tmpz84c011_pb_r);
69		DECLARE_READ8_MEMBER(tmpz84c011_pc_r);
70		DECLARE_READ8_MEMBER(tmpz84c011_pd_r);
71		DECLARE_READ8_MEMBER(tmpz84c011_pe_r);
72		DECLARE_WRITE8_MEMBER(tmpz84c011_pa_w);
73		DECLARE_WRITE8_MEMBER(tmpz84c011_pb_w);
74		DECLARE_WRITE8_MEMBER(tmpz84c011_pc_w);
75		DECLARE_WRITE8_MEMBER(tmpz84c011_pd_w);
76		DECLARE_WRITE8_MEMBER(tmpz84c011_pe_w);
77		DECLARE_READ8_MEMBER(tmpz84c011_dir_pa_r);
78		DECLARE_READ8_MEMBER(tmpz84c011_dir_pb_r);
79		DECLARE_READ8_MEMBER(tmpz84c011_dir_pc_r);
80		DECLARE_READ8_MEMBER(tmpz84c011_dir_pd_r);
81		DECLARE_READ8_MEMBER(tmpz84c011_dir_pe_r);
82		DECLARE_WRITE8_MEMBER(tmpz84c011_dir_pa_w);
83		DECLARE_WRITE8_MEMBER(tmpz84c011_dir_pb_w);
84		DECLARE_WRITE8_MEMBER(tmpz84c011_dir_pc_w);
85		DECLARE_WRITE8_MEMBER(tmpz84c011_dir_pd_w);
86		DECLARE_WRITE8_MEMBER(tmpz84c011_dir_pe_w);
	103	DECLARE_READ8_MEMBER( tmpz84c011_pa_r );
	104	DECLARE_READ8_MEMBER( tmpz84c011_pb_r );
	105	DECLARE_READ8_MEMBER( tmpz84c011_pc_r );
	106	DECLARE_READ8_MEMBER( tmpz84c011_pd_r );
	107	DECLARE_READ8_MEMBER( tmpz84c011_pe_r );
	108	DECLARE_WRITE8_MEMBER( tmpz84c011_pa_w );
	109	DECLARE_WRITE8_MEMBER( tmpz84c011_pb_w );
	110	DECLARE_WRITE8_MEMBER( tmpz84c011_pc_w );
	111	DECLARE_WRITE8_MEMBER( tmpz84c011_pd_w );
	112	DECLARE_WRITE8_MEMBER( tmpz84c011_pe_w );
87	113
	114	DECLARE_READ8_MEMBER( tmpz84c011_dir_pa_r );
	115	DECLARE_READ8_MEMBER( tmpz84c011_dir_pb_r );
	116	DECLARE_READ8_MEMBER( tmpz84c011_dir_pc_r );
	117	DECLARE_READ8_MEMBER( tmpz84c011_dir_pd_r );
	118	DECLARE_READ8_MEMBER( tmpz84c011_dir_pe_r );
	119	DECLARE_WRITE8_MEMBER( tmpz84c011_dir_pa_w );
	120	DECLARE_WRITE8_MEMBER( tmpz84c011_dir_pb_w );
	121	DECLARE_WRITE8_MEMBER( tmpz84c011_dir_pc_w );
	122	DECLARE_WRITE8_MEMBER( tmpz84c011_dir_pd_w );
	123	DECLARE_WRITE8_MEMBER( tmpz84c011_dir_pe_w );
	124
	125	DECLARE_WRITE_LINE_MEMBER( zc0_cb_trampoline_w ) { m_zc0_cb(state); }
	126	DECLARE_WRITE_LINE_MEMBER( zc1_cb_trampoline_w ) { m_zc1_cb(state); }
	127	DECLARE_WRITE_LINE_MEMBER( zc2_cb_trampoline_w ) { m_zc2_cb(state); }
	128
88	129	protected:
89	130	// device-level overrides
90	131	virtual machine_config_constructor device_mconfig_additions() const;
r31081	r31082
103	144	}
104	145
105	146	private:
	147	// devices/pointers
	148	required_device<z80ctc_device> m_ctc;
	149
106	150	// internal state
107	151	UINT8 m_pio_dir[5];
108	152	UINT8 m_pio_latch[5];
r31081	r31082
119	163	devcb_read8 m_inportsc;
120	164	devcb_read8 m_inportsd;
121	165	devcb_read8 m_inportse;
	166
	167	devcb_write_line m_zc0_cb;
	168	devcb_write_line m_zc1_cb;
	169	devcb_write_line m_zc2_cb;
122	170	};
123	171
	172
	173	// device type definition
124	174	extern const device_type TMPZ84C011;
	175
	176
	177	#endif /// __TMPZ84C011__

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