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r30888 Sunday 8th June, 2014 at 18:38:41 UTC by Michael Zapf
New implementation of HDC9234 for modern floppy system, still WIP. (nw)
[src/emu/machine]hdc9234.c* hdc9234.h*

trunk/src/emu/machine/hdc9234.c
r0r30888
1/*
2    HDC9234 Hard and Floppy Disk Controller
3
4    This controller handles MFM and FM encoded floppy disks and hard disks.
5    The SMC9224 is used in some DEC systems.  The HDC9234 is used in the
6    Myarc HFDC card for the TI99/4A.
7
8    References:
9    * SMC HDC9234 preliminary data book (1988)
10
11    Michael Zapf, June 2014
12*/
13
14#include "emu.h"
15#include "hdc9234.h"
16
17hdc9234_device::hdc9234_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
18   : device_t(mconfig, HDC9234, "SMC HDC9234 Universal Disk Controller", tag, owner, clock, "hdc9234", __FILE__),
19   m_out_intrq(*this),
20   m_out_dip(*this),
21   m_out_auxbus(*this),
22   m_in_auxbus(*this),
23   m_in_dma(*this),
24   m_out_dma(*this)
25{
26}
27
28/*
29    Read a byte of data from the controller
30    The address (offset) encodes the C/D* line (command and /data)
31*/
32READ8_MEMBER( hdc9234_device::read )
33{
34   logerror("%s: Read access to %04x\n", tag(), offset & 0xffff);
35   return 0;
36}
37
38/*
39    Write a byte to the controller
40    The address (offset) encodes the C/D* line (command and /data)
41*/
42WRITE8_MEMBER( hdc9234_device::write )
43{
44   logerror("%s: Write access to %04x: %d\n", tag(), offset & 0xffff, data);
45}
46
47void hdc9234_device::device_start()
48{
49   logerror("%s: start\n", tag());
50   m_out_intrq.resolve_safe();
51   m_out_dip.resolve_safe();
52   m_out_auxbus.resolve_safe();
53   m_in_auxbus.resolve_safe(0);
54   m_out_dma.resolve_safe();
55   m_in_dma.resolve_safe(0);
56
57   // allocate timers
58}
59
60void hdc9234_device::device_reset()
61{
62   logerror("%s: reset\n", tag());
63}
64
65const device_type HDC9234 = &device_creator<hdc9234_device>;
Property changes on: trunk/src/emu/machine/hdc9234.c
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trunk/src/emu/machine/hdc9234.h
r0r30888
1// license:BSD-3-Clause
2// copyright-holders:Michael Zapf
3/*
4    HDC9234 Hard and Floppy Disk Controller
5    For details see hdc9234.c
6*/
7#ifndef __HDC9234_H__
8#define __HDC9234_H__
9
10#include "emu.h"
11
12extern const device_type HDC9234;
13
14//===================================================================
15
16/* Interrupt line. To be connected with the controller PCB. */
17#define MCFG_HDC9234_INTRQ_CALLBACK(_write) \
18   devcb = &hdc9234_device::set_intrq_wr_callback(*device, DEVCB_##_write);
19
20/* DMA in progress line. To be connected with the controller PCB. */
21#define MCFG_HDC9234_DIP_CALLBACK(_write) \
22   devcb = &hdc9234_device::set_dip_wr_callback(*device, DEVCB_##_write);
23
24/* Auxiliary Bus. These 8 lines need to be connected to external latches
25   and to a counter circuitry which works together with the external RAM.
26   We use the S0/S1 lines as address lines. */
27#define MCFG_HDC9234_AUXBUS_OUT_CALLBACK(_write) \
28   devcb = &hdc9234_device::set_auxbus_wr_callback(*device, DEVCB_##_write);
29
30/* Auxiliary Bus. This is only used for S0=S1=0. */
31#define MCFG_HDC9234_AUXBUS_IN_CALLBACK(_read) \
32   devcb = &hdc9234_device::set_auxbus_rd_callback(*device, DEVCB_##_read);
33
34/* Callback to read the contents of the external RAM via the data bus.
35   Note that the address must be set and automatically increased
36   by external circuitry. */
37#define MCFG_HDC9234_DMA_IN_CALLBACK(_read) \
38   devcb = &hdc9234_device::set_dma_rd_callback(*device, DEVCB_##_read);
39
40/* Callback to write the contents of the external RAM via the data bus.
41   Note that the address must be set and automatically increased
42   by external circuitry. */
43#define MCFG_HDC9234_DMA_OUT_CALLBACK(_write) \
44   devcb = &hdc9234_device::set_dma_wr_callback(*device, DEVCB_##_write);
45
46//===================================================================
47
48class hdc9234_device : public device_t
49{
50public:
51   hdc9234_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
52
53   // Accesors from the CPU side
54   DECLARE_READ8_MEMBER( read );
55   DECLARE_WRITE8_MEMBER( write );
56
57   // Callbacks
58   template<class _Object> static devcb_base &set_intrq_wr_callback(device_t &device, _Object object) { return downcast<hdc9234_device &>(device).m_out_intrq.set_callback(object); }
59   template<class _Object> static devcb_base &set_dip_wr_callback(device_t &device, _Object object) { return downcast<hdc9234_device &>(device).m_out_dip.set_callback(object); }
60   template<class _Object> static devcb_base &set_auxbus_wr_callback(device_t &device, _Object object) { return downcast<hdc9234_device &>(device).m_out_auxbus.set_callback(object); }
61   template<class _Object> static devcb_base &set_auxbus_rd_callback(device_t &device, _Object object) { return downcast<hdc9234_device &>(device).m_in_auxbus.set_callback(object); }
62   template<class _Object> static devcb_base &set_dma_rd_callback(device_t &device, _Object object) { return downcast<hdc9234_device &>(device).m_in_dma.set_callback(object); }
63   template<class _Object> static devcb_base &set_dma_wr_callback(device_t &device, _Object object) { return downcast<hdc9234_device &>(device).m_out_dma.set_callback(object); }
64
65protected:
66   void device_start();
67   void device_reset();
68
69private:
70   devcb_write_line   m_out_intrq;    // INT line
71   devcb_write_line   m_out_dip;      // DMA in progress line
72   devcb_write8       m_out_auxbus;   // AB0-7 lines (using S0,S1 as address)
73   devcb_read8        m_in_auxbus;    // AB0-7 lines (S0=S1=0)
74   devcb_read8        m_in_dma;       // DMA read access to the cache buffer
75   devcb_write8       m_out_dma;      // DMA write access to the cache buffer
76};
77
78#endif
Property changes on: trunk/src/emu/machine/hdc9234.h
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