MAME SVN History

199869 Revisions

r29543 Friday 11th April, 2014 at 21:41:22 UTC by Nathan Woods
Merge branch 'master' of ssh://mess.org/mame into new_menus

[/branches/new_menus/hash]	gameboy.xml
[/branches/new_menus/src/emu/bus/ecbbus]	grip.c
[/branches/new_menus/src/emu/bus/isa]	3c503.c ega.c ega.h gus.c gus.h ne1000.c ne2000.c wdxt_gen.c
[/branches/new_menus/src/emu/bus/nubus]	nubus_asntmc3b.c
[/branches/new_menus/src/emu/bus/snes]	event.c event.h upd.c upd.h
[/branches/new_menus/src/emu/bus/vip]	vp620.c
[/branches/new_menus/src/emu/bus/x68k]	x68k_neptunex.c
[/branches/new_menus/src/emu/cpu/arm]	arm.c arm.h
[/branches/new_menus/src/emu/machine]	aakart.c dp8390.c dp8390.h hd63450.c keyboard.c keyboard.h terminal.c terminal.h wd11c00_17.c wd11c00_17.h
[/branches/new_menus/src/emu/ui]	viewgfx.c
[/branches/new_menus/src/emu/video]	crtc_ega.c crtc_ega.h hd63484.c hd63484.h mb_vcu.c mb_vcu.h psx.c ramdac.c ramdac.h t6a04.c t6a04.h
[/branches/new_menus/src/lib/formats]	td0_dsk.c
[/branches/new_menus/src/mame/audio]	taitosnd.h
[/branches/new_menus/src/mame/drivers]	blitz68k.c chsuper.c globalvr.c konamigx.c maygay1b.c maygayv1.c mazerbla.c mediagx.c namcos12.c namcos23.c pinball2k.c rltennis.c sfbonus.c shanghai.c sigmab52.c sliver.c taito_b.c wildpkr.c
[/branches/new_menus/src/mame/machine]	inder_vid.c
[/branches/new_menus/src/mame/video]	namcona1.c
[/branches/new_menus/src/mess/drivers]	a310.c a6809.c abc80.c amust.c basic52.c besta.c bigbord2.c binbug.c c900.c ccs2810.c ccs300.c cd2650.c chaos.c cm1800.c codata.c cxhumax.c czk80.c d6809.c digel804.c dim68k.c dm7000.c dms86.c dsb46.c dual68.c ec65.c evmbug.c ft68m.c h19.c harriet.c hpz80unk.c ie15.c imds.c imsai.c ipc.c ipds.c jade.c jupiter.c k8915.c lft.c llc.c m20.c mcb216.c mccpm.c mice.c microdec.c mits680b.c mod8.c modellot.c ms9540.c msbc1.c mx2178.c okean240.c onyx.c p8k.c pdp11.c pes.c phunsy.c pimps.c pm68k.c poly.c ptcsol.c qtsbc.c ravens.c rm380z.c rvoice.c sacstate.c sapi1.c sbc6510.c seattle.c sun1.c swtpc.c systec.c tavernie.c ti85.c tk80bs.c tricep.c trs80m2.c ts802.c ts816.c tsispch.c v6809.c vax11.c vector4.c votrpss.c xerox820.c z9001.c zexall.c zorba.c zrt80.c zsbc3.c
[/branches/new_menus/src/mess/machine]	teleprinter.c teleprinter.h

branches/new_menus/src/mess/drivers/sapi1.c
r29542	r29543
491	491	m_term_data = data;
492	492	}
493	493
494		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
495		{
496		DEVCB_DRIVER_MEMBER(sapi1_state, kbd_put)
497		};
498
499
500
501	494	/**************************************
502	495
503	496	Machine
r29542	r29543
584	577	/* basic machine hardware */
585	578	MCFG_CPU_MODIFY("maincpu")
586	579	MCFG_CPU_PROGRAM_MAP(sapi2_mem)
587		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, terminal_intf)
	580	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	581	MCFG_GENERIC_KEYBOARD_CB(WRITE8(sapi1_state, kbd_put))
588	582	MACHINE_CONFIG_END
589	583
590	584	static MACHINE_CONFIG_DERIVED( sapi3, sapi2 )
r29542	r29543
618	612	MCFG_MACHINE_RESET_OVERRIDE(sapi1_state, sapizps3 )
619	613
620	614	/* video hardware */
621		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	615	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	616	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(sapi1_state, kbd_put))
622	617
623	618	/* internal ram */
624	619	MCFG_RAM_ADD(RAM_TAG)

branches/new_menus/src/mess/drivers/mcb216.c
r29542	r29543
104	104	m_term_data = data;
105	105	}
106	106
107		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
108		{
109		DEVCB_DRIVER_MEMBER(mcb216_state, kbd_put)
110		};
111
112	107	MACHINE_RESET_MEMBER( mcb216_state, mcb216 )
113	108	{
114	109	m_term_data = 0;
r29542	r29543
128	123	MCFG_MACHINE_RESET_OVERRIDE(mcb216_state, mcb216)
129	124
130	125	/* video hardware */
131		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	126	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	127	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(mcb216_state, kbd_put))
132	128	MACHINE_CONFIG_END
133	129
134	130	static MACHINE_CONFIG_START( cb308, mcb216_state )
r29542	r29543
139	135	MCFG_MACHINE_RESET_OVERRIDE(mcb216_state, cb308)
140	136
141	137	/* video hardware */
142		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	138	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	139	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(mcb216_state, kbd_put))
143	140	MACHINE_CONFIG_END
144	141
145	142	/* ROM definition */

branches/new_menus/src/mess/drivers/mccpm.c
r29542	r29543
124	124	m_term_data = data;
125	125	}
126	126
127		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
128		{
129		DEVCB_DRIVER_MEMBER(mccpm_state, kbd_put)
130		};
131
132	127	static MACHINE_CONFIG_START( mccpm, mccpm_state )
133	128	/* basic machine hardware */
134	129	MCFG_CPU_ADD("maincpu",Z80, XTAL_4MHz)
r29542	r29543
136	131	MCFG_CPU_IO_MAP(mccpm_io)
137	132
138	133	/* video hardware */
139		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	134	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	135	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(mccpm_state, kbd_put))
140	136	MACHINE_CONFIG_END
141	137
142	138	/* ROM definition */

branches/new_menus/src/mess/drivers/ec65.c
r29542	r29543
101	101	}
102	102	}
103	103
104
105		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
106		{
107		DEVCB_DRIVER_MEMBER(ec65_state, kbd_put)
108		};
109
110	104	void ec65_state::machine_reset()
111	105	{
112	106	m_via_1->write_pb0(1);
r29542	r29543
221	215	MCFG_DEVICE_ADD(ACIA6551_TAG, MOS6551, 0)
222	216	MCFG_MOS6551_XTAL(XTAL_1_8432MHz)
223	217
224		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	218	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	219	MCFG_GENERIC_KEYBOARD_CB(WRITE8(ec65_state, kbd_put))
225	220	MACHINE_CONFIG_END
226	221
227	222	static MACHINE_CONFIG_START( ec65k, ec65k_state )

branches/new_menus/src/mess/drivers/pm68k.c
r29542	r29543
78	78	m_term_data = data;
79	79	}
80	80
81		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
82		{
83		DEVCB_DRIVER_MEMBER(pm68k_state, kbd_put)
84		};
85
86	81	static MACHINE_CONFIG_START( pm68k, pm68k_state )
87	82	/* basic machine hardware */
88	83	MCFG_CPU_ADD("maincpu", M68000, 8000000)
89	84	MCFG_CPU_PROGRAM_MAP(pm68k_mem)
90	85
91	86	/* video hardware */
92		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	87	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	88	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(pm68k_state, kbd_put))
93	89	MACHINE_CONFIG_END
94	90
95	91	/* ROM definition */

branches/new_menus/src/mess/drivers/k8915.c
r29542	r29543
149	149	m_term_data = data;
150	150	}
151	151
152		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
153		{
154		DEVCB_DRIVER_MEMBER(k8915_state, kbd_put)
155		};
156
157	152	static MACHINE_CONFIG_START( k8915, k8915_state )
158	153	/* basic machine hardware */
159	154	MCFG_CPU_ADD("maincpu", Z80, XTAL_16MHz / 4)
r29542	r29543
171	166
172	167	MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
173	168
174		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	169	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	170	MCFG_GENERIC_KEYBOARD_CB(WRITE8(k8915_state, kbd_put))
175	171	MACHINE_CONFIG_END
176	172
177	173

branches/new_menus/src/mess/drivers/cxhumax.c
r29542	r29543
1048	1048	memset(m_gxa_cmd_regs,0,sizeof(m_gxa_cmd_regs));
1049	1049	}
1050	1050
1051		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
1052		{
1053		DEVCB_NULL
1054		};
1055
1056	1051	static MACHINE_CONFIG_START( cxhumax, cxhumax_state )
1057	1052	MCFG_CPU_ADD("maincpu", ARM920T, 180000000) // CX24175 (RevC up?)
1058	1053	MCFG_CPU_PROGRAM_MAP(cxhumax_map)
r29542	r29543
1072	1067
1073	1068	MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
1074	1069
1075		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
1076
	1070	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
1077	1071	MACHINE_CONFIG_END
1078	1072
1079	1073	ROM_START( hxhdci2k )

branches/new_menus/src/mess/drivers/lft.c
r29542	r29543
68	68	m_term_data = data;
69	69	}
70	70
71		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
72		{
73		DEVCB_DRIVER_MEMBER(lft_state, kbd_put)
74		};
75
76	71	void lft_state::machine_reset()
77	72	{
78	73	m_term_data = 0;
r29542	r29543
85	80	MCFG_CPU_IO_MAP(lft_io)
86	81
87	82	/* video hardware */
88		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	83	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	84	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(lft_state, kbd_put))
89	85	MACHINE_CONFIG_END
90	86
91	87	/* ROM definition */

branches/new_menus/src/mess/drivers/basic52.c
r29542	r29543
112	112	m_term_data = data;
113	113	}
114	114
115		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
116		{
117		DEVCB_DRIVER_MEMBER(basic52_state, kbd_put)
118		};
119
120	115	static I8255_INTERFACE( ppi8255_intf )
121	116	{
122	117	DEVCB_NULL, /* Port A read */
r29542	r29543
135	130
136	131
137	132	/* video hardware */
138		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	133	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	134	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(basic52_state, kbd_put))
139	135
140	136	MCFG_I8255_ADD("ppi8255", ppi8255_intf )
141	137	MACHINE_CONFIG_END

branches/new_menus/src/mess/drivers/dms86.c
r29542	r29543
105	105	m_term_data = data;
106	106	}
107	107
108		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
109		{
110		DEVCB_DRIVER_MEMBER(dms86_state, kbd_put)
111		};
112
113
114	108	static MACHINE_CONFIG_START( dms86, dms86_state )
115	109	/* basic machine hardware */
116	110	MCFG_CPU_ADD("maincpu",I8086, XTAL_9_8304MHz)
r29542	r29543
118	112	MCFG_CPU_IO_MAP(dms86_io)
119	113
120	114
121		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	115	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	116	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(dms86_state, kbd_put))
122	117	MACHINE_CONFIG_END
123	118
124	119	/* ROM definition */

branches/new_menus/src/mess/drivers/vector4.c
r29542	r29543
84	84	m_term_data = data;
85	85	}
86	86
87		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
88		{
89		DEVCB_DRIVER_MEMBER(vector4_state, kbd_put)
90		};
91
92
93	87	static MACHINE_CONFIG_START( vector4, vector4_state )
94	88	/* basic machine hardware */
95	89	MCFG_CPU_ADD("maincpu",Z80, XTAL_4MHz)
r29542	r29543
98	92
99	93
100	94	/* video hardware */
101		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	95	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	96	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(vector4_state, kbd_put))
102	97	MACHINE_CONFIG_END
103	98
104	99	/* ROM definition */

branches/new_menus/src/mess/drivers/ccs300.c
r29542	r29543
93	93	m_term_data = data;
94	94	}
95	95
96		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
97		{
98		DEVCB_DRIVER_MEMBER(ccs300_state, kbd_put)
99		};
100
101	96	//*************************************
102	97	//
103	98	// Machine
r29542	r29543
131	126	MCFG_MACHINE_RESET_OVERRIDE(ccs300_state, ccs300)
132	127
133	128	/* video hardware */
134		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	129	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	130	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(ccs300_state, kbd_put))
135	131	MACHINE_CONFIG_END
136	132
137	133	/* ROM definition */

branches/new_menus/src/mess/drivers/sacstate.c
r29542	r29543
120	120	m_term_data = data;
121	121	}
122	122
123		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
124		{
125		DEVCB_DRIVER_MEMBER(sacstate_state, kbd_put)
126		};
127
128	123	void sacstate_state::machine_reset()
129	124	{
130	125	m_term_data = 0;
r29542	r29543
138	133	MCFG_CPU_IO_MAP(sacstate_io)
139	134
140	135	/* video hardware */
141		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	136	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	137	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(sacstate_state, kbd_put))
142	138	MACHINE_CONFIG_END
143	139
144	140	/* ROM definition */

branches/new_menus/src/mess/drivers/zorba.c
r29542	r29543
336	336	m_term_data = data;
337	337	}
338	338
339		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
340		{
341		DEVCB_DRIVER_MEMBER(zorba_state, kbd_put)
342		};
343
344	339	static MACHINE_CONFIG_START( zorba, zorba_state )
345	340	// basic machine hardware
346	341	MCFG_CPU_ADD("maincpu", Z80, XTAL_24MHz / 6)
r29542	r29543
405	400	MCFG_FLOPPY_DRIVE_ADD("fdc:1", zorba_floppies, "525dd", floppy_image_device::default_floppy_formats)
406	401
407	402	/* Keyboard */
408		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	403	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	404	MCFG_GENERIC_KEYBOARD_CB(WRITE8(zorba_state, kbd_put))
409	405	MACHINE_CONFIG_END
410	406
411	407	ROM_START( zorba )

branches/new_menus/src/mess/drivers/modellot.c
r29542	r29543
80	80	m_term_data = data;
81	81	}
82	82
83		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
84		{
85		DEVCB_DRIVER_MEMBER(modellot_state, kbd_put)
86		};
87
88	83	void modellot_state::machine_reset()
89	84	{
90	85	m_term_data = 1;
r29542	r29543
172	167	MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
173	168
174	169	/* Devices */
175		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	170	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	171	MCFG_GENERIC_KEYBOARD_CB(WRITE8(modellot_state, kbd_put))
176	172	MACHINE_CONFIG_END
177	173
178	174	/* ROM definition */

branches/new_menus/src/mess/drivers/evmbug.c
r29542	r29543
85	85	m_term_data = data;
86	86	}
87	87
88		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
89		{
90		DEVCB_DRIVER_MEMBER(evmbug_state, kbd_put)
91		};
92
93
94	88	void evmbug_state::machine_reset()
95	89	{
96	90	m_term_data = 0;
r29542	r29543
105	99	MCFG_TMS99xx_ADD("maincpu", TMS9995, 12000000, evmbug_mem, evmbug_io )
106	100
107	101	/* video hardware */
108		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	102	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	103	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(evmbug_state, kbd_put))
109	104	MACHINE_CONFIG_END
110	105
111	106	/* ROM definition */

branches/new_menus/src/mess/drivers/pimps.c
r29542	r29543
89	89	m_term_data = data;
90	90	}
91	91
92		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
93		{
94		DEVCB_DRIVER_MEMBER(pimps_state, kbd_put)
95		};
96
97	92	static MACHINE_CONFIG_START( pimps, pimps_state )
98	93	/* basic machine hardware */
99	94	MCFG_CPU_ADD("maincpu",I8085A, XTAL_2MHz)
r29542	r29543
101	96	MCFG_CPU_IO_MAP(pimps_io)
102	97
103	98	/* video hardware */
104		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	99	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	100	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(pimps_state, kbd_put))
105	101	MACHINE_CONFIG_END
106	102
107	103	/* ROM definition */

branches/new_menus/src/mess/drivers/seattle.c
r29542	r29543
104	104	m_key_available = 1;
105	105	}
106	106
107		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
108		{
109		DEVCB_DRIVER_MEMBER(seattle_comp_state, kbd_put)
110		};
111
112	107	static MACHINE_CONFIG_START( seattle, seattle_comp_state )
113	108	/* basic machine hardware */
114	109	MCFG_CPU_ADD("maincpu", I8086, 4000000) // no idea
r29542	r29543
116	111	MCFG_CPU_IO_MAP(seattle_io)
117	112
118	113	/* video hardware */
119		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	114	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	115	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(seattle_comp_state, kbd_put))
120	116	MACHINE_CONFIG_END
121	117
122	118	/* ROM definition */

branches/new_menus/src/mess/drivers/imsai.c
r29542	r29543
101	101	m_uart->write_rxc(state);
102	102	}
103	103
104		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
105		{
106		DEVCB_DRIVER_MEMBER(imsai_state, kbd_put)
107		};
108
109	104	WRITE8_MEMBER( imsai_state::control_w )
110	105	{
111	106	}
r29542	r29543
122	117	MCFG_CPU_IO_MAP(imsai_io)
123	118
124	119	/* video hardware */
125		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	120	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	121	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(imsai_state, kbd_put))
126	122
127	123	/* Devices */
128	124	MCFG_DEVICE_ADD("uart", I8251, 0)

branches/new_menus/src/mess/drivers/dual68.c
r29542	r29543
77	77	//m_term_data = data;
78	78	}
79	79
80		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
81		{
82		DEVCB_DRIVER_MEMBER(dual68_state, kbd_put)
83		};
84
85	80	static MACHINE_CONFIG_START( dual68, dual68_state )
86	81	/* basic machine hardware */
87	82	MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz / 2)
r29542	r29543
93	88
94	89
95	90	/* video hardware */
96		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG,terminal_intf)
	91	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	92	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(dual68_state, kbd_put))
97	93	MACHINE_CONFIG_END
98	94
99	95	/* ROM definition */

branches/new_menus/src/mess/drivers/digel804.c
r29542	r29543
567	567	//m_acia->receive_character(data);
568	568	}
569	569
570		static GENERIC_TERMINAL_INTERFACE( digel804_terminal_intf )
571		{
572		DEVCB_DRIVER_MEMBER(digel804_state,digel804_serial_put)
573		};
574
575	570	WRITE_LINE_MEMBER( digel804_state::da_w )
576	571	{
577	572	m_maincpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
r29542	r29543
588	583	MCFG_ROC10937_ADD("vfd",0) // RIGHT_TO_LEFT
589	584
590	585	/* video hardware */
591		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, digel804_terminal_intf)
	586	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	587	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(digel804_state, digel804_serial_put))
592	588
593	589	MCFG_DEFAULT_LAYOUT(layout_digel804)
594	590

branches/new_menus/src/mess/drivers/imds.c
r29542	r29543
74	74	m_term_data = data;
75	75	}
76	76
77		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
78		{
79		DEVCB_DRIVER_MEMBER(imds_state, kbd_put)
80		};
81
82	77	void imds_state::machine_reset()
83	78	{
84	79	m_term_data = 0;
r29542	r29543
102	97	// MCFG_INS8250_ADD( "ins8250", imds_com_interface )
103	98
104	99	/* video hardware */
105		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	100	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	101	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(imds_state, kbd_put))
106	102	MACHINE_CONFIG_END
107	103
108	104	/* ROM definition */

branches/new_menus/src/mess/drivers/binbug.c
r29542	r29543
474	474	m_pio->strobe_a(1);
475	475	}
476	476
477		static ASCII_KEYBOARD_INTERFACE( dg680_keyboard_intf )
478		{
479		DEVCB_DRIVER_MEMBER(dg680_state, kbd_put)
480		};
481
482	477	READ8_MEMBER( dg680_state::porta_r )
483	478	{
484	479	UINT8 data = m_term_data;
r29542	r29543
566	561	MCFG_PALETTE_ADD_MONOCHROME_AMBER("palette")
567	562
568	563	/* Keyboard */
569		MCFG_ASCII_KEYBOARD_ADD("keyb", dg680_keyboard_intf)
	564	MCFG_DEVICE_ADD("keyb", GENERIC_KEYBOARD, 0)
	565	MCFG_GENERIC_KEYBOARD_CB(WRITE8(dg680_state, kbd_put))
570	566
571	567	/* Cassette */
572	568	MCFG_CASSETTE_ADD( "cassette", default_cassette_interface )

branches/new_menus/src/mess/drivers/ccs2810.c
r29542	r29543
174	174	m_term_data = data;
175	175	}
176	176
177		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
178		{
179		DEVCB_DRIVER_MEMBER(ccs_state, kbd_put)
180		};
181
182	177	#if 0
183	178	static const ins8250_interface com_intf =
184	179	{
r29542	r29543
340	335	MCFG_MACHINE_RESET_OVERRIDE(ccs_state, ccs)
341	336
342	337	/* video hardware */
343		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	338	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	339	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(ccs_state, kbd_put))
344	340
345	341	/* Devices */
346	342	//MCFG_INS8250_ADD( "ins8250", com_intf, XTAL_1_8432MHz )
r29542	r29543
354	350	MCFG_MACHINE_RESET_OVERRIDE(ccs_state, ccs)
355	351
356	352	/* video hardware */
357		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	353	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	354	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(ccs_state, kbd_put))
358	355
359	356	/* Devices */
360	357	MCFG_MB8877x_ADD("fdc", XTAL_16MHz / 8) // UB1793 or MB8877

branches/new_menus/src/mess/drivers/systec.c
r29542	r29543
73	73	m_term_data = data;
74	74	}
75	75
76		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
77		{
78		DEVCB_DRIVER_MEMBER(systec_state, kbd_put)
79		};
80
81
82	76	static ADDRESS_MAP_START(systec_mem, AS_PROGRAM, 8, systec_state)
83	77	ADDRESS_MAP_UNMAP_HIGH
84	78	AM_RANGE(0x0000, 0xffff) AM_RAM AM_REGION("maincpu", 0)
r29542	r29543
109	103
110	104
111	105	/* video hardware */
112		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	106	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	107	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(systec_state, kbd_put))
113	108	MACHINE_CONFIG_END
114	109
115	110

branches/new_menus/src/mess/drivers/tavernie.c
r29542	r29543
316	316	m_pia_ivg->cb1_w(1);
317	317	}
318	318
319		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
320		{
321		DEVCB_DRIVER_MEMBER(tavernie_state, kbd_put)
322		};
323
324	319	WRITE_LINE_MEMBER( tavernie_state::write_acia_clock )
325	320	{
326	321	m_acia->write_txc(state);
r29542	r29543
384	379	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
385	380
386	381	/* Devices */
387		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	382	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	383	MCFG_GENERIC_KEYBOARD_CB(WRITE8(tavernie_state, kbd_put))
388	384	MCFG_MC6845_ADD("crtc", MC6845, "screen", 1008000, mc6845_intf) // unknown clock
389	385
390	386	MCFG_DEVICE_ADD("pia_ivg", PIA6821, 0)

branches/new_menus/src/mess/drivers/sbc6510.c
r29542	r29543
216	216	m_terminal->write(space, 0, data);
217	217	}
218	218
219		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
220		{
221		DEVCB_NULL
222		};
223
224
225	219	void sbc6510_state::machine_start()
226	220	{
227	221	char kbdrow[6];
r29542	r29543
314	308	MCFG_GFXDECODE_ADD("gfxdecode", TERMINAL_TAG":palette", sbc6510)
315	309
316	310	/* video hardware */
317		MCFG_GE~~NER~~IC_TE~~RMINAL~~_ADD(TERMINAL_TAG, ~~terminal~~_~~intf~~)
	311	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
318	312
319	313	/* sound hardware */
320	314	MCFG_SPEAKER_STANDARD_MONO("mono")

branches/new_menus/src/mess/drivers/tricep.c
r29542	r29543
68	68	{
69	69	}
70	70
71		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
72		{
73		DEVCB_DRIVER_MEMBER(tricep_state, kbd_put)
74		};
75
76	71	static MACHINE_CONFIG_START( tricep, tricep_state )
77	72	/* basic machine hardware */
78	73	MCFG_CPU_ADD("maincpu",M68000, XTAL_8MHz)
r29542	r29543
80	75
81	76
82	77	/* video hardware */
83		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	78	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	79	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(tricep_state, kbd_put))
84	80	MACHINE_CONFIG_END
85	81
86	82	/* ROM definition */

branches/new_menus/src/mess/drivers/vax11.c
r29542	r29543
135	135	m_term_status = 0xffff;
136	136	}
137	137
138		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
139		{
140		DEVCB_DRIVER_MEMBER(vax11_state, kbd_put)
141		};
142
143	138	static MACHINE_CONFIG_START( vax11, vax11_state )
144	139	/* basic machine hardware */
145	140	MCFG_CPU_ADD("maincpu",T11, XTAL_4MHz) // Need proper CPU here
r29542	r29543
147	142	MCFG_CPU_PROGRAM_MAP(vax11_mem)
148	143
149	144	/* video hardware */
150		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	145	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	146	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(vax11_state, kbd_put))
151	147
152	148	MCFG_RX01_ADD("rx01")
153	149	MACHINE_CONFIG_END

branches/new_menus/src/mess/drivers/cm1800.c
r29542	r29543
97	97	{
98	98	}
99	99
100		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
101		{
102		DEVCB_DRIVER_MEMBER(cm1800_state, kbd_put)
103		};
104
105	100	static MACHINE_CONFIG_START( cm1800, cm1800_state )
106	101	/* basic machine hardware */
107	102	MCFG_CPU_ADD("maincpu",I8080, XTAL_2MHz)
r29542	r29543
110	105
111	106
112	107	/* video hardware */
113		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	108	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	109	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(cm1800_state, kbd_put))
114	110	MACHINE_CONFIG_END
115	111
116	112	/* ROM definition */

branches/new_menus/src/mess/drivers/okean240.c
r29542	r29543
411	411	m_term_data = data;
412	412	}
413	413
414		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
415		{
416		DEVCB_DRIVER_MEMBER(okean240_state, kbd_put)
417		};
418
419	414	DRIVER_INIT_MEMBER(okean240_state,okean240)
420	415	{
421	416	UINT8 *RAM = memregion("maincpu")->base();
r29542	r29543
495	490
496	491	MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
497	492
498		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	493	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	494	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(okean240_state, kbd_put))
499	495	MACHINE_CONFIG_END
500	496
501	497	static MACHINE_CONFIG_DERIVED( okean240a, okean240t )
r29542	r29543
503	499	MCFG_CPU_IO_MAP(okean240a_io)
504	500	MCFG_GFXDECODE_ADD("gfxdecode", "palette", okean240a)
505	501	MCFG_DEVICE_REMOVE(TERMINAL_TAG)
506		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, terminal_intf)
	502	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	503	MCFG_GENERIC_KEYBOARD_CB(WRITE8(okean240_state, kbd_put))
507	504	MACHINE_CONFIG_END
508	505
509	506	static MACHINE_CONFIG_DERIVED( okean240, okean240t )
r29542	r29543
511	508	MCFG_CPU_IO_MAP(okean240_io)
512	509	MCFG_GFXDECODE_ADD("gfxdecode", "palette", okean240)
513	510	MCFG_DEVICE_REMOVE(TERMINAL_TAG)
514		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, terminal_intf)
	511	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	512	MCFG_GENERIC_KEYBOARD_CB(WRITE8(okean240_state, kbd_put))
515	513	MACHINE_CONFIG_END
516	514
517	515	/* ROM definition */

branches/new_menus/src/mess/drivers/microdec.c
r29542	r29543
89	89	m_term_data = data;
90	90	}
91	91
92		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
93		{
94		DEVCB_DRIVER_MEMBER(microdec_state, kbd_put)
95		};
96
97	92	static SLOT_INTERFACE_START( microdec_floppies )
98	93	SLOT_INTERFACE( "525hd", FLOPPY_525_HD )
99	94	SLOT_INTERFACE_END
r29542	r29543
105	100	MCFG_CPU_IO_MAP(microdec_io)
106	101
107	102	/* video hardware */
108		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	103	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	104	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(microdec_state, kbd_put))
109	105
110	106	MCFG_UPD765A_ADD("upd765", true, true)
111	107	MCFG_FLOPPY_DRIVE_ADD("upd765:0", microdec_floppies, "525hd", floppy_image_device::default_floppy_formats)

branches/new_menus/src/mess/drivers/ti85.c
r29542	r29543
537	537	MACHINE_CONFIG_END
538	538
539	539
540		static const t6a04_interface ti82_display =
541		{
542		64, // number of lines
543		96, // pixels for line
544		};
545
546	540	static MACHINE_CONFIG_DERIVED( ti82, ti81 )
547	541	MCFG_CPU_MODIFY("maincpu")
548	542	MCFG_CPU_CLOCK( 6000000) /* 6 MHz */
r29542	r29543
557	551	MCFG_PALETTE_ENTRIES(2)
558	552	MCFG_PALETTE_INIT_OWNER(ti85_state, ti82 )
559	553
560		MCFG_T6A04_ADD("t6a04", ti82_display)
	554	MCFG_DEVICE_ADD("t6a04", T6A04, 0)
	555	MCFG_T6A04_SIZE(96, 64)
561	556
562	557	MCFG_SPEAKER_STANDARD_MONO("mono")
563	558	MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
r29542	r29543
587	582	MCFG_PALETTE_ENTRIES(2)
588	583	MCFG_PALETTE_INIT_OWNER(ti85_state, ti82 )
589	584
590		MCFG_T6A04_ADD("t6a04", ti82_display)
	585	MCFG_DEVICE_ADD("t6a04", T6A04, 0)
	586	MCFG_T6A04_SIZE(96, 64)
591	587	MACHINE_CONFIG_END
592	588
593	589	static MACHINE_CONFIG_DERIVED( ti86, ti85 )
r29542	r29543
621	617	MCFG_PALETTE_ENTRIES(2)
622	618	MCFG_PALETTE_INIT_OWNER(ti85_state, ti82 )
623	619
624		MCFG_T6A04_ADD("t6a04", ti82_display)
	620	MCFG_DEVICE_ADD("t6a04", T6A04, 0)
	621	MCFG_T6A04_SIZE(96, 64)
625	622
626	623	MCFG_DEVICE_REMOVE("nvram")
627	624	MCFG_NVRAM_HANDLER(ti83p)

branches/new_menus/src/mess/drivers/amust.c
r29542	r29543
202	202	m_term_data = data;
203	203	}
204	204
205		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
206		{
207		DEVCB_DRIVER_MEMBER(amust_state, kbd_put)
208		};
209
210
211	205	/* F4 Character Displayer */
212	206	static const gfx_layout amust_charlayout =
213	207	{
r29542	r29543
311	305
312	306	/* Devices */
313	307	MCFG_MC6845_ADD("crtc", H46505, "screen", XTAL_14_31818MHz / 8, amust_crtc)
314		MCFG_ASCII_KEYBOARD_ADD("keybd", keyboard_intf)
	308	MCFG_DEVICE_ADD("keybd", GENERIC_KEYBOARD, 0)
	309	MCFG_GENERIC_KEYBOARD_CB(WRITE8(amust_state, kbd_put))
315	310	MCFG_UPD765A_ADD("fdc", false, true)
316	311	MCFG_FLOPPY_DRIVE_ADD("fdc:0", amust_floppies, "525dd", floppy_image_device::default_floppy_formats)
317	312	MCFG_FLOPPY_DRIVE_ADD("fdc:1", amust_floppies, "525dd", floppy_image_device::default_floppy_formats)

branches/new_menus/src/mess/drivers/harriet.c
r29542	r29543
180	180	m_teletype_status \|= 0x80;
181	181	}
182	182
183		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
184		{
185		DEVCB_DRIVER_MEMBER(harriet_state, kbd_put)
186		};
187
188	183	void harriet_state::machine_start()
189	184	{
190	185	}
r29542	r29543
201	196	MCFG_CPU_PROGRAM_MAP(harriet_map)
202	197
203	198	/* video hardware */
204		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	199	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	200	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(harriet_state, kbd_put))
205	201
206	202	MCFG_PALETTE_ADD("palette", 8)
207	203

branches/new_menus/src/mess/drivers/mod8.c
r29542	r29543
139	139	m_maincpu->set_input_line(0, HOLD_LINE);
140	140	}
141	141
142		static GENERIC_TELEPRINTER_INTERFACE( teleprinter_intf )
143		{
144		DEVCB_DRIVER_MEMBER(mod8_state, kbd_put)
145		};
146
147	142	static MACHINE_CONFIG_START( mod8, mod8_state )
148	143	/* basic machine hardware */
149	144	MCFG_CPU_ADD("maincpu",I8008, 800000)
r29542	r29543
151	146	MCFG_CPU_IO_MAP(mod8_io)
152	147
153	148	/* video hardware */
154		MCFG_GENERIC_TELEPRINTER_ADD(TELEPRINTER_TAG, teleprinter_intf)
	149	MCFG_DEVICE_ADD(TELEPRINTER_TAG, TELEPRINTER, 0)
	150	MCFG_GENERIC_TELEPRINTER_KEYBOARD_CB(WRITE8(mod8_state, kbd_put))
155	151	MACHINE_CONFIG_END
156	152
157	153

branches/new_menus/src/mess/drivers/mice.c
r29542	r29543
81	81	m_term_data = data;
82	82	}
83	83
84		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
85		{
86		DEVCB_DRIVER_MEMBER(mice_state, kbd_put)
87		};
88
89
90	84	static MACHINE_CONFIG_START( mice, mice_state )
91	85	/* basic machine hardware */
92	86	MCFG_CPU_ADD("maincpu", I8085A, XTAL_6_144MHz)
r29542	r29543
94	88	MCFG_CPU_IO_MAP(mice_io)
95	89
96	90	/* video hardware */
97		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	91	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	92	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(mice_state, kbd_put))
98	93	MACHINE_CONFIG_END
99	94
100	95	/* ROM definition */

branches/new_menus/src/mess/drivers/msbc1.c
r29542	r29543
75	75	m_maincpu->reset();
76	76	}
77	77
78		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
79		{
80		DEVCB_NULL
81		};
82
83	78	static MACHINE_CONFIG_START( msbc1, msbc1_state )
84	79	/* basic machine hardware */
85	80	MCFG_CPU_ADD(MC68000R12_TAG, M68000, XTAL_12_5MHz)
86	81	MCFG_CPU_PROGRAM_MAP(msbc1_mem)
87	82
88	83	// devices
89		MCFG_GE~~NER~~IC_TE~~RMINAL~~_ADD(TERMINAL_TAG, ~~terminal~~_~~intf~~)
	84	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
90	85	MACHINE_CONFIG_END
91	86
92	87	/* ROM definition */

branches/new_menus/src/mess/drivers/rvoice.c
r29542	r29543
356	356	{
357	357	}
358	358
359		static GENERIC_TERMINAL_INTERFACE( dectalk_terminal_intf )
360		{
361		DEVCB_DRIVER_MEMBER(rvoice_state,null_kbd_put)
362		};
363
364	359	static MACHINE_CONFIG_START( rvoicepc, rvoice_state )
365	360	/* basic machine hardware */
366	361	MCFG_CPU_ADD("maincpu", HD63701, XTAL_7_3728MHz)
r29542	r29543
379	374	//MCFG_DEFAULT_LAYOUT(layout_dectalk) // hack to avoid screenless system crash
380	375
381	376	/* sound hardware */
382		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG,dectalk_terminal_intf)
	377	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	378	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(rvoice_state, null_kbd_put))
383	379
384	380	MACHINE_CONFIG_END
385	381

branches/new_menus/src/mess/drivers/hpz80unk.c
r29542	r29543
119	119	m_term_data = data;
120	120	}
121	121
122		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
123		{
124		DEVCB_DRIVER_MEMBER(hpz80unk_state, kbd_put)
125		};
126
127	122	static MACHINE_CONFIG_START( hpz80unk, hpz80unk_state )
128	123	/* basic machine hardware */
129	124	MCFG_CPU_ADD("maincpu",Z80, XTAL_4MHz)
r29542	r29543
131	126	MCFG_CPU_IO_MAP(hpz80unk_io)
132	127
133	128	/* video hardware */
134		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	129	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	130	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(hpz80unk_state, kbd_put))
135	131	MACHINE_CONFIG_END
136	132
137	133	/* ROM definition */

branches/new_menus/src/mess/drivers/codata.c
r29542	r29543
75	75	m_term_data = data;
76	76	}
77	77
78		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
79		{
80		DEVCB_DRIVER_MEMBER(codata_state, kbd_put)
81		};
82
83	78	void codata_state::machine_reset()
84	79	{
85	80	UINT8* RAM = memregion("user1")->base();
r29542	r29543
94	89	MCFG_CPU_PROGRAM_MAP(codata_mem)
95	90
96	91	/* video hardware */
97		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	92	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	93	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(codata_state, kbd_put))
98	94	MACHINE_CONFIG_END
99	95
100	96	/* ROM definition */

branches/new_menus/src/mess/drivers/ft68m.c
r29542	r29543
93	93	m_term_data = data;
94	94	}
95	95
96		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
97		{
98		DEVCB_DRIVER_MEMBER(ft68m_state, kbd_put)
99		};
100
101	96	static MACHINE_CONFIG_START( ft68m, ft68m_state )
102	97
103	98	/* basic machine hardware */
r29542	r29543
105	100	MCFG_CPU_PROGRAM_MAP(ft68m_mem)
106	101
107	102	/* video hardware */
108		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	103	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	104	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(ft68m_state, kbd_put))
109	105	MACHINE_CONFIG_END
110	106
111	107	/* ROM definition */

branches/new_menus/src/mess/drivers/abc80.c
r29542	r29543
446	446	timer_set(attotime::from_msec(50), TIMER_ID_FAKE_KEYBOARD_CLEAR);
447	447	}
448	448
449		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
450		{
451		DEVCB_DRIVER_MEMBER(abc80_state, kbd_w)
452		};
453
454
455
456	449	//**************************************************************************
457	450	// MACHINE INITIALIZATION
458	451	//**************************************************************************
r29542	r29543
567	560	MCFG_ABCBUS_SLOT_ADD(ABCBUS_TAG, abcbus_cards, "slow")
568	561	MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("slow", abc830_slow)
569	562	MCFG_RS232_PORT_ADD(RS232_TAG, default_rs232_devices, NULL)
570		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	563	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	564	MCFG_GENERIC_KEYBOARD_CB(WRITE8(abc80_state, kbd_w))
571	565
572	566	// internal ram
573	567	MCFG_RAM_ADD(RAM_TAG)

branches/new_menus/src/mess/drivers/dim68k.c
r29542	r29543
318	318	m_term_data = data;
319	319	}
320	320
321		static ASCII_KEYBOARD_INTERFACE( kb_intf )
322		{
323		DEVCB_DRIVER_MEMBER(dim68k_state, kbd_put)
324		};
325
326	321	static MACHINE_CONFIG_START( dim68k, dim68k_state )
327	322	/* basic machine hardware */
328	323	MCFG_CPU_ADD("maincpu", M68000, XTAL_10MHz)
r29542	r29543
348	343	MCFG_FLOPPY_DRIVE_ADD("fdc:0", dim68k_floppies, "525hd", floppy_image_device::default_floppy_formats)
349	344	MCFG_FLOPPY_DRIVE_ADD("fdc:1", dim68k_floppies, "525hd", floppy_image_device::default_floppy_formats)
350	345	MCFG_MC6845_ADD("crtc", MC6845, "screen", 1790000, dim68k_crtc)
351		MCFG_ASCII_KEYBOARD_ADD("keyboard", kb_intf)
	346	MCFG_DEVICE_ADD("keyboard", GENERIC_KEYBOARD, 0)
	347	MCFG_GENERIC_KEYBOARD_CB(WRITE8(dim68k_state, kbd_put))
352	348	MACHINE_CONFIG_END
353	349
354	350	/*

branches/new_menus/src/mess/drivers/ie15.c
r29542	r29543
486	486	}
487	487	}
488	488
489		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
490		{
491		DEVCB_DRIVER_MEMBER(ie15_state, kbd_put)
492		};
493
494
495	489	void ie15_state::machine_reset()
496	490	{
497	491	m_ruslat = m_beep = m_statusline = m_cursor = m_video = m_kb_data = m_kb_flag0 = 0;
r29542	r29543
640	634	MCFG_PALETTE_INIT_OWNER(ie15_state, ie15)
641	635
642	636	/* Devices */
643		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	637	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	638	MCFG_GENERIC_KEYBOARD_CB(WRITE8(ie15_state, kbd_put))
644	639	MCFG_BITBANGER_ADD(BITBANGER_TAG, ie15_state::ie15_bitbanger_config)
645	640
646	641	MCFG_SPEAKER_STANDARD_MONO("mono")

branches/new_menus/src/mess/drivers/dm7000.c
r29542	r29543
297	297	m_scc0_lsr = 1;
298	298	}
299	299
300		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
301		{
302		DEVCB_DRIVER_MEMBER(dm7000_state, kbd_put)
303		};
304
305	300	static const powerpc_config ppc405_config =
306	301	{
307	302	252000000
r29542	r29543
323	318	MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
324	319	MCFG_SCREEN_UPDATE_DRIVER(dm7000_state, screen_update_dm7000)
325	320
326		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	321	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	322	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(dm7000_state, kbd_put))
327	323
328	324	MACHINE_CONFIG_END
329	325

branches/new_menus/src/mess/drivers/votrpss.c
r29542	r29543
261	261	m_term_data = data;
262	262	}
263	263
264		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
265		{
266		DEVCB_DRIVER_MEMBER(votrpss_state, kbd_put)
267		};
268
269	264	DECLARE_WRITE_LINE_MEMBER( votrpss_state::write_uart_clock )
270	265	{
271	266	m_uart->write_txc(state);
r29542	r29543
294	289	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
295	290
296	291	/* Devices */
297		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	292	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	293	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(votrpss_state, kbd_put))
298	294
299	295	MCFG_DEVICE_ADD("uart", I8251, 0)
300	296	MCFG_I8251_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))

branches/new_menus/src/mess/drivers/pes.c
r29542	r29543
91	91	m_maincpu->set_input_line(MCS51_RX_LINE, CLEAR_LINE);
92	92	}
93	93
94		static GENERIC_TERMINAL_INTERFACE( pes_terminal_intf )
95		{
96		DEVCB_DRIVER_MEMBER(pes_state,pes_kbd_input)
97		};
98
99	94	/* Helper Functions */
100	95	READ8_MEMBER( pes_state::data_to_i8031)
101	96	{
r29542	r29543
266	261	MCFG_SOUND_ADD("tms5220", TMS5220C, 720000) /* 720Khz clock, 10khz output */
267	262	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
268	263
269		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG,pes_terminal_intf)
	264	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	265	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(pes_state, pes_kbd_input))
270	266	MACHINE_CONFIG_END
271	267
272	268	/******************************************************************************

branches/new_menus/src/mess/drivers/d6809.c
r29542	r29543
139	139	m_term_data = data;
140	140	}
141	141
142		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
143		{
144		DEVCB_DRIVER_MEMBER(d6809_state, kbd_put)
145		};
146
147	142	void d6809_state::machine_reset()
148	143	{
149	144	}
r29542	r29543
156	151
157	152
158	153	/* video hardware */
159		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	154	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	155	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(d6809_state, kbd_put))
160	156	MACHINE_CONFIG_END
161	157
162	158	/* ROM definition */

branches/new_menus/src/mess/drivers/qtsbc.c
r29542	r29543
78	78	m_term_data = data;
79	79	}
80	80
81		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
82		{
83		DEVCB_DRIVER_MEMBER(qtsbc_state, kbd_put)
84		};
85
86	81	static MACHINE_CONFIG_START( qtsbc, qtsbc_state )
87	82	/* basic machine hardware */
88	83	MCFG_CPU_ADD("maincpu",Z80, XTAL_4MHz) // Mostek MK3880
r29542	r29543
90	85	MCFG_CPU_IO_MAP(qtsbc_io)
91	86
92	87	/* video hardware */
93		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	88	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	89	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(qtsbc_state, kbd_put))
94	90	MACHINE_CONFIG_END
95	91
96	92	/* ROM definition */

branches/new_menus/src/mess/drivers/ptcsol.c
r29542	r29543
739	739	}
740	740	}
741	741
742		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
743		{
744		DEVCB_DRIVER_MEMBER(sol20_state, kbd_put)
745		};
746
747	742	static MACHINE_CONFIG_START( sol20, sol20_state )
748	743	/* basic machine hardware */
749	744	MCFG_CPU_ADD("maincpu",I8080, XTAL_14_31818MHz/7)
r29542	r29543
774	769	MCFG_CASSETTE_ADD( "cassette2", sol20_cassette_interface )
775	770	MCFG_AY31015_ADD( "uart", sol20_ay31015_config )
776	771	MCFG_AY31015_ADD( "uart_s", sol20_ay31015_config )
777		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	772	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	773	MCFG_GENERIC_KEYBOARD_CB(WRITE8(sol20_state, kbd_put))
778	774	MACHINE_CONFIG_END
779	775
780	776	/* ROM definition */

branches/new_menus/src/mess/drivers/c900.c
r29542	r29543
84	84	m_term_data = data;
85	85	}
86	86
87		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
88		{
89		DEVCB_DRIVER_MEMBER(c900_state, kbd_put)
90		};
91
92	87	/* F4 Character Displayer */
93	88	static const gfx_layout c900_charlayout =
94	89	{
r29542	r29543
114	109	MCFG_CPU_DATA_MAP(c900_data)
115	110	MCFG_CPU_IO_MAP(c900_io)
116	111
117		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	112	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	113	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(c900_state, kbd_put))
118	114	MCFG_GFXDECODE_ADD("gfxdecode", "palette", c900)
119	115	MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
120	116	MACHINE_CONFIG_END

branches/new_menus/src/mess/drivers/trs80m2.c
r29542	r29543
511	511	m_ctc->trg3(m_kbirq);
512	512	}
513	513
514		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
515		{
516		DEVCB_DRIVER_MEMBER(trs80m2_state, kbd_w)
517		};
518
519
520	514	//-------------------------------------------------
521	515	// Z80DMA_INTERFACE( dma_intf )
522	516	//-------------------------------------------------
r29542	r29543
842	836
843	837	MCFG_DEVICE_ADD(TRS80M2_KEYBOARD_TAG, TRS80M2_KEYBOARD, 0)
844	838	MCFG_TRS80M2_KEYBOARD_CLOCK_CALLBACK(WRITELINE(trs80m2_state, kb_clock_w))
845		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	839	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	840	MCFG_GENERIC_KEYBOARD_CB(WRITE8(trs80m2_state, kbd_w))
846	841
847	842	// internal RAM
848	843	MCFG_RAM_ADD(RAM_TAG)
r29542	r29543
906	901
907	902	MCFG_DEVICE_ADD(TRS80M2_KEYBOARD_TAG, TRS80M2_KEYBOARD, 0)
908	903	MCFG_TRS80M2_KEYBOARD_CLOCK_CALLBACK(WRITELINE(trs80m2_state, kb_clock_w))
909		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	904	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	905	MCFG_GENERIC_KEYBOARD_CB(WRITE8(trs80m2_state, kbd_w))
910	906
911	907	// internal RAM
912	908	MCFG_RAM_ADD(RAM_TAG)

branches/new_menus/src/mess/drivers/dsb46.c
r29542	r29543
99	99	m_term_data = data;
100	100	}
101	101
102		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
103		{
104		DEVCB_DRIVER_MEMBER(dsb46_state, kbd_put)
105		};
106
107	102	static MACHINE_CONFIG_START( dsb46, dsb46_state )
108	103	// basic machine hardware
109	104	MCFG_CPU_ADD("maincpu", Z80, 4000000)
r29542	r29543
112	107	MCFG_MACHINE_RESET_OVERRIDE(dsb46_state, dsb46)
113	108
114	109	/* video hardware */
115		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	110	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	111	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(dsb46_state, kbd_put))
116	112	MACHINE_CONFIG_END
117	113
118	114	ROM_START( dsb46 )

branches/new_menus/src/mess/drivers/sun1.c
r29542	r29543
127	127	m_term_data = data;
128	128	}
129	129
130		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
131		{
132		DEVCB_DRIVER_MEMBER(sun1_state, kbd_put)
133		};
134
135
136	130	static MACHINE_CONFIG_START( sun1, sun1_state )
137	131	/* basic machine hardware */
138	132	MCFG_CPU_ADD("maincpu", M68000, XTAL_10MHz)
139	133	MCFG_CPU_PROGRAM_MAP(sun1_mem)
140	134
141	135	/* video hardware */
142		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	136	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	137	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(sun1_state, kbd_put))
143	138	MACHINE_CONFIG_END
144	139
145	140	/* ROM definition */

branches/new_menus/src/mess/drivers/a310.c
r29542	r29543
134	134	{
135	135	archimedes_init();
136	136
	137
	138
137	139	// reset the DAC to centerline
138	140	//m_dac->write_signed8(0x80);
139	141	}
r29542	r29543
160	162
161	163	if(newval && !oldval)
162	164	m_kart->send_keycode_down(row_val,col_val);
163
	165
164	166	if(oldval && !newval)
165	167	m_kart->send_keycode_up(row_val,col_val);
166	168	}
r29542	r29543
277	279	PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("*") PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x24) PORT_IMPULSE(1) // (KP?)
278	280	PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("#") PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x25) PORT_IMPULSE(1) // (KP?)
279	281
280
281	282	PORT_START("via1a") /* VIA #1 PORT A */
282	283	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(1)
283	284	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(2)
r29542	r29543
325	326	DEVCB_DRIVER_LINE_MEMBER(archimedes_state, a310_kart_rx_w)
326	327	};
327	328
	329	static ARM_INTERFACE( a310_config )
	330	{
	331	ARM_COPRO_TYPE_VL86C020
	332	};
	333
328	334	static MACHINE_CONFIG_START( a310, a310_state )
329	335	/* basic machine hardware */
330	336	MCFG_CPU_ADD("maincpu", ARM, 8000000) /* 8 MHz */
331	337	MCFG_CPU_PROGRAM_MAP(a310_mem)
	338	MCFG_CPU_CONFIG(a310_config)
332	339
333	340	MCFG_AAKART_ADD("kart", 8000000/256, kart_interface) // TODO: frequency
334	341

branches/new_menus/src/mess/drivers/z9001.c
r29542	r29543
226	226	m_maincpu->space(AS_PROGRAM).write_byte(0x0025, data);
227	227	}
228	228
229		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
230		{
231		DEVCB_DRIVER_MEMBER(z9001_state, kbd_put)
232		};
233
234	229	static GFXDECODE_START( z9001 )
235	230	GFXDECODE_ENTRY( "chargen", 0x0000, z9001_charlayout, 0, 1 )
236	231	GFXDECODE_END
r29542	r29543
263	258	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
264	259
265	260	/* Devices */
266		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	261	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	262	MCFG_GENERIC_KEYBOARD_CB(WRITE8(z9001_state, kbd_put))
267	263	MCFG_TIMER_DRIVER_ADD_PERIODIC("z9001_timer", z9001_state, timer_callback, attotime::from_msec(10))
268	264	MCFG_Z80PIO_ADD( "z80pio1", XTAL_9_8304MHz / 4, pio1_intf )
269	265	MCFG_Z80PIO_ADD( "z80pio2", XTAL_9_8304MHz / 4, pio2_intf )

branches/new_menus/src/mess/drivers/onyx.c
r29542	r29543
68	68	m_term_data = data;
69	69	}
70	70
71		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
72		{
73		DEVCB_DRIVER_MEMBER(onyx_state, kbd_put)
74		};
75
76	71	#if 0
77	72	WRITE_LINE_MEMBER( onyx_state::p8k_daisy_interrupt )
78	73	{
r29542	r29543
420	415	//MCFG_Z80PIO_ADD("z80pio_2", XTAL_4MHz, p8k_16_pio_2_intf )
421	416
422	417	/* video hardware */
423		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	418	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	419	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(onyx_state, kbd_put))
424	420	MACHINE_CONFIG_END
425	421
426	422	/* ROM definition */

branches/new_menus/src/mess/drivers/czk80.c
r29542	r29543
230	230	m_term_data = data;
231	231	}
232	232
233		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
234		{
235		DEVCB_DRIVER_MEMBER(czk80_state, kbd_put)
236		};
237
238	233	static MACHINE_CONFIG_START( czk80, czk80_state )
239	234	/* basic machine hardware */
240	235	MCFG_CPU_ADD("maincpu", Z80, XTAL_16MHz / 4)
r29542	r29543
243	238	MCFG_CPU_CONFIG(daisy_chain)
244	239	MCFG_MACHINE_RESET_OVERRIDE(czk80_state, czk80)
245	240
246		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	241	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	242	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(czk80_state, kbd_put))
247	243	MCFG_UPD765A_ADD("fdc", false, true)
248	244	MCFG_FLOPPY_DRIVE_ADD("fdc:0", czk80_floppies, "525dd", floppy_image_device::default_floppy_formats)
249	245	MCFG_Z80CTC_ADD( "z80ctc", XTAL_16MHz / 4, ctc_intf)

branches/new_menus/src/mess/drivers/ipds.c
r29542	r29543
135	135	m_term_data = data;
136	136	}
137	137
138		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
139		{
140		DEVCB_DRIVER_MEMBER(ipds_state, kbd_put)
141		};
142
143
144	138	static MACHINE_CONFIG_START( ipds, ipds_state )
145	139	/* basic machine hardware */
146	140	MCFG_CPU_ADD("maincpu",I8085A, XTAL_19_6608MHz / 4)
r29542	r29543
158	152	MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
159	153
160	154	MCFG_I8275_ADD ( "i8275", ipds_i8275_interface)
161		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	155	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	156	MCFG_GENERIC_KEYBOARD_CB(WRITE8(ipds_state, kbd_put))
162	157	MACHINE_CONFIG_END
163	158
164	159	/* ROM definition */

branches/new_menus/src/mess/drivers/rm380z.c
r29542	r29543
109	109	AM_RANGE(0xc5, 0xff) AM_READWRITE(rm380z_porthi_r, rm380z_porthi_w)
110	110	ADDRESS_MAP_END
111	111
112		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
113		{
114		DEVCB_DRIVER_MEMBER(rm380z_state, keyboard_put)
115		};
116
117	112	INPUT_PORTS_START( rm380z )
118	113	// PORT_START("additional_chars")
119	114	// PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Escape") PORT_CODE(KEYCODE_ESC) PORT_CODE(KEYCODE_ESC)
r29542	r29543
170	165	MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(rm380z_floppy_interface)
171	166
172	167	/* keyboard */
173		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	168	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	169	MCFG_GENERIC_KEYBOARD_CB(WRITE8(rm380z_state, keyboard_put))
174	170	MACHINE_CONFIG_END
175	171
176	172	/* ROM definition */

branches/new_menus/src/mess/drivers/llc.c
r29542	r29543
145	145	m_term_status = 0xff;
146	146	}
147	147
148		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
149		{
150		DEVCB_DRIVER_MEMBER(llc_state, kbd_put)
151		};
152
153	148	static const z80_daisy_config llc1_daisy_chain[] =
154	149	{
155	150	{ "z80ctc" },
r29542	r29543
225	220	MCFG_Z80PIO_ADD( "z80pio1", XTAL_3MHz, llc1_z80pio1_intf )
226	221	MCFG_Z80PIO_ADD( "z80pio2", XTAL_3MHz, llc1_z80pio2_intf )
227	222	MCFG_Z80CTC_ADD( "z80ctc", XTAL_3MHz, llc1_ctc_intf )
228		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	223	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	224	MCFG_GENERIC_KEYBOARD_CB(WRITE8(llc_state, kbd_put))
229	225	MACHINE_CONFIG_END
230	226
231	227	static MACHINE_CONFIG_START( llc2, llc_state )

branches/new_menus/src/mess/drivers/ipc.c
r29542	r29543
107	107	m_term_data = data;
108	108	}
109	109
110		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
111		{
112		DEVCB_DRIVER_MEMBER(ipc_state, kbd_put)
113		};
114
115	110	static MACHINE_CONFIG_START( ipc, ipc_state )
116	111	/* basic machine hardware */
117	112	MCFG_CPU_ADD("maincpu",I8085A, XTAL_19_6608MHz / 4)
r29542	r29543
119	114	MCFG_CPU_IO_MAP(ipc_io)
120	115
121	116	/* video hardware */
122		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	117	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	118	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(ipc_state, kbd_put))
123	119	MACHINE_CONFIG_END
124	120
125	121	/* ROM definition */

branches/new_menus/src/mess/drivers/pdp11.c
r29542	r29543
344	344	m_teletype_status \|= 0x80;
345	345	}
346	346
347		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
348		{
349		DEVCB_DRIVER_MEMBER(pdp11_state, kbd_put)
350		};
351
352	347	static MACHINE_CONFIG_START( pdp11, pdp11_state )
353	348	/* basic machine hardware */
354	349	MCFG_CPU_ADD("maincpu",T11, XTAL_4MHz) // Need proper CPU here
r29542	r29543
357	352
358	353
359	354	/* video hardware */
360		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	355	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	356	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(pdp11_state, kbd_put))
361	357
362	358	MCFG_RX01_ADD("rx01")
363	359	MACHINE_CONFIG_END

branches/new_menus/src/mess/drivers/ts802.c
r29542	r29543
223	223	m_term_data = data;
224	224	}
225	225
226		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
227		{
228		DEVCB_DRIVER_MEMBER(ts802_state, kbd_put)
229		};
230
231	226	#if 0
232	227	// not correct
233	228	static const z80_daisy_config daisy_chain_intf[] =
r29542	r29543
261	256	MCFG_MACHINE_RESET_OVERRIDE(ts802_state, ts802)
262	257
263	258	/* Devices */
264		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	259	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	260	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(ts802_state, kbd_put))
265	261	MCFG_Z80DMA_ADD("z80dma", XTAL_16MHz / 4, dma_intf)
266	262	MCFG_Z80DART_ADD("z80dart1", XTAL_16MHz / 4, dart0_intf )
267	263	MCFG_Z80DART_ADD("z80dart2", XTAL_16MHz / 4, dart1_intf )

branches/new_menus/src/mess/drivers/bigbord2.c
r29542	r29543
217	217	}
218	218	}
219	219
220		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
221		{
222		DEVCB_DRIVER_MEMBER(bigbord2_state, bigbord2_kbd_put)
223		};
224
225
226
227	220	/* Z80 DMA */
228	221
229	222
r29542	r29543
653	646	MCFG_FLOPPY_DRIVE_ADD("fdc:0", bigbord2_floppies, "525dd", floppy_image_device::default_floppy_formats)
654	647	MCFG_FLOPPY_DRIVE_ADD("fdc:1", bigbord2_floppies, "525dd", floppy_image_device::default_floppy_formats)
655	648	MCFG_MC6845_ADD("crtc", MC6845, SCREEN_TAG, XTAL_16MHz / 8, bigbord2_crtc)
656		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	649	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	650	MCFG_GENERIC_KEYBOARD_CB(WRITE8(bigbord2_state, bigbord2_kbd_put))
657	651
658	652	/* sound hardware */
659	653	MCFG_SPEAKER_STANDARD_MONO("mono")

branches/new_menus/src/mess/drivers/zexall.c
r29542	r29543
162	162	Machine Drivers
163	163	******************************************************************************/
164	164
165		static GENERIC_TERMINAL_INTERFACE( zexall_terminal_intf )
166		{
167		DEVCB_NULL
168		};
169
170	165	static MACHINE_CONFIG_START( zexall, zexall_state )
171	166	/* basic machine hardware */
172	167	MCFG_CPU_ADD("maincpu", Z80, XTAL_3_579545MHz*10)
r29542	r29543
175	170	MCFG_QUANTUM_TIME(attotime::from_hz(60))
176	171
177	172	/* video hardware */
178		MCFG_GE~~NER~~IC_TE~~RMINAL~~_ADD(TERMINAL_TAG, ~~zexall~~_~~terminal_intf~~)
	173	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
179	174	MACHINE_CONFIG_END
180	175
181	176

branches/new_menus/src/mess/drivers/mits680b.c
r29542	r29543
92	92	m_term_data = data;
93	93	}
94	94
95		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
96		{
97		DEVCB_DRIVER_MEMBER(mits680b_state, kbd_put)
98		};
99
100	95	static MACHINE_CONFIG_START( mits680b, mits680b_state )
101	96	/* basic machine hardware */
102	97	MCFG_CPU_ADD("maincpu",M6800, XTAL_1MHz / 2)
103	98	MCFG_CPU_PROGRAM_MAP(mits680b_mem)
104	99
105	100	/* video hardware */
106		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	101	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	102	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(mits680b_state, kbd_put))
107	103
108	104	/* acia */
109	105	//MCFG_ACIA6551_ADD("acia")

branches/new_menus/src/mess/drivers/phunsy.c
r29542	r29543
184	184	}
185	185
186	186
187		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
188		{
189		DEVCB_DRIVER_MEMBER(phunsy_state, kbd_put)
190		};
191
192
193	187	void phunsy_state::machine_reset()
194	188	{
195	189	membank("bankru")->set_entry(0); // point at ram
r29542	r29543
367	361	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
368	362
369	363	/* Devices */
370		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	364	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	365	MCFG_GENERIC_KEYBOARD_CB(WRITE8(phunsy_state, kbd_put))
371	366	MCFG_CASSETTE_ADD( "cassette", default_cassette_interface )
372	367
373	368	/* quickload */

branches/new_menus/src/mess/drivers/p8k.c
r29542	r29543
220	220	m_maincpu->set_state_int(Z80_PC, 0x078A);
221	221	}
222	222
223		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
224		{
225		DEVCB_DRIVER_MEMBER(p8k_state, kbd_put)
226		};
227
228
229	223	/***************************************************************************
230	224
231	225	P8000 8bit Peripherals
r29542	r29543
483	477	mem.write_byte(0x43a0, 1);
484	478	}
485	479
486		static GENERIC_TERMINAL_INTERFACE( terminal_intf_16 )
487		{
488		DEVCB_DRIVER_MEMBER(p8k_state, kbd_put_16)
489		};
490
491
492
493
494	480	MACHINE_RESET_MEMBER(p8k_state,p8k_16)
495	481	{
496	482	}
r29542	r29543
814	800	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
815	801
816	802	/* video hardware */
817		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	803	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	804	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(p8k_state, kbd_put))
818	805	MACHINE_CONFIG_END
819	806
820	807	static MACHINE_CONFIG_START( p8k_16, p8k_state )
r29542	r29543
841	828	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
842	829
843	830	/* video hardware */
844		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf_16)
	831	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	832	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(p8k_state, kbd_put_16))
845	833	MACHINE_CONFIG_END
846	834
847	835	/* ROM definition */

branches/new_menus/src/mess/drivers/tsispch.c
r29542	r29543
169	169	i8251_device *uart = machine().device<i8251_device>("i8251a_u15");
170	170	uart->receive_character(data);
171	171	}
172		static GENERIC_TERMINAL_INTERFACE( tsispch_terminal_intf )
173		{
174		DEVCB_DRIVER_MEMBER(tsispch_state, i8251_rxd)
175		};
176	172
177	173	/*****************************************************************************
178	174	PIC 8259 stuff
r29542	r29543
433	429	//MCFG_SOUND_ADD("dac", DAC, 0) /* TODO: correctly figure out how the DAC works; apparently it is connected to the serial output of the upd7720, which will be "fun" to connect up */
434	430	//MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
435	431
436		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG,tsispch_terminal_intf)
	432	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	433	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(tsispch_state, i8251_rxd))
437	434	MACHINE_CONFIG_END
438	435
439	436	/******************************************************************************

branches/new_menus/src/mess/drivers/jupiter.c
r29542	r29543
205	205	{ FLOPPY_0, FLOPPY_1, NULL, NULL }
206	206	};
207	207
208
209		//-------------------------------------------------
210		// GENERIC_TERMINAL_INTERFACE( terminal_intf )
211		//-------------------------------------------------
212
213		static GENERIC_TERMINAL_INTERFACE( jupiter2_terminal_intf )
214		{
215		DEVCB_NULL
216		};
217
218		static ASCII_KEYBOARD_INTERFACE( jupiter3_keyboard_intf )
219		{
220		DEVCB_DRIVER_MEMBER(jupiter3_state, kbd_put)
221		};
222
223
224
225	208	//**************************************************************************
226	209	// MACHINE INITIALIZATION
227	210	//**************************************************************************
r29542	r29543
264	247
265	248	// devices
266	249	MCFG_FD1771_ADD(INS1771N1_TAG, fdc_intf)
267		MCFG_GE~~NER~~IC_TE~~RMINAL~~_ADD(TERMINAL_TAG, ~~jupiter2~~_~~terminal_intf~~)
	250	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
268	251
269	252	// internal ram
270	253	MCFG_RAM_ADD(RAM_TAG)
r29542	r29543
296	279
297	280	// devices
298	281	MCFG_FD1771_ADD(INS1771N1_TAG, fdc_intf)
299		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, jupiter3_keyboard_intf)
	282	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	283	MCFG_GENERIC_KEYBOARD_CB(WRITE8(jupiter3_state, kbd_put))
300	284
301	285	// internal ram
302	286	MCFG_RAM_ADD(RAM_TAG)

branches/new_menus/src/mess/drivers/poly.c
r29542	r29543
154	154	m_acia->write_rxc(state);
155	155	}
156	156
157		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
158		{
159		DEVCB_DRIVER_MEMBER(poly_state, kbd_put)
160		};
161
162	157	static MACHINE_CONFIG_START( poly, poly_state )
163	158	/* basic machine hardware */
164	159	MCFG_CPU_ADD("maincpu", M6809E, XTAL_12MHz / 3) // 12.0576MHz
r29542	r29543
203	198
204	199	MCFG_MC6854_ADD("adlc", adlc_intf)
205	200
206		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	201	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	202	MCFG_GENERIC_KEYBOARD_CB(WRITE8(poly_state, kbd_put))
207	203	MACHINE_CONFIG_END
208	204
209	205	/* ROM definition */

branches/new_menus/src/mess/drivers/tk80bs.c
r29542	r29543
160	160	m_term_data = data;
161	161	}
162	162
163		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
164		{
165		DEVCB_DRIVER_MEMBER(tk80bs_state, kbd_put)
166		};
167
168
169	163	/* F4 Character Displayer */
170	164	static const gfx_layout tk80bs_charlayout =
171	165	{
r29542	r29543
202	196
203	197	/* Devices */
204	198	MCFG_I8255_ADD( "ppi", ppi_intf)
205		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	199	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	200	MCFG_GENERIC_KEYBOARD_CB(WRITE8(tk80bs_state, kbd_put))
206	201	MACHINE_CONFIG_END
207	202
208	203

branches/new_menus/src/mess/drivers/zrt80.c
r29542	r29543
282	282	m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
283	283	}
284	284
285		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
286		{
287		DEVCB_DRIVER_MEMBER(zrt80_state, kbd_put)
288		};
289
290
291	285	/* F4 Character Displayer */
292	286	static const gfx_layout zrt80_charlayout =
293	287	{
r29542	r29543
330	324	/* Devices */
331	325	MCFG_MC6845_ADD("crtc", MC6845, "screen", XTAL_20MHz / 8, zrt80_crtc6845_interface)
332	326	MCFG_INS8250_ADD( "ins8250", zrt80_com_interface, 2457600 )
333		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	327	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	328	MCFG_GENERIC_KEYBOARD_CB(WRITE8(zrt80_state, kbd_put))
334	329	MACHINE_CONFIG_END
335	330
336	331	/* ROM definition */

branches/new_menus/src/mess/drivers/swtpc.c
r29542	r29543
109	109	m_term_data = data;
110	110	}
111	111
112		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
113		{
114		DEVCB_DRIVER_MEMBER(swtpc_state, kbd_put)
115		};
116
117	112	static MACHINE_CONFIG_START( swtpc, swtpc_state )
118	113	/* basic machine hardware */
119	114	MCFG_CPU_ADD("maincpu", M6800, XTAL_1MHz)
r29542	r29543
121	116
122	117
123	118	/* video hardware */
124		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	119	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	120	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(swtpc_state, kbd_put))
125	121	MACHINE_CONFIG_END
126	122
127	123	/* ROM definition */

branches/new_menus/src/mess/drivers/h19.c
r29542	r29543
411	411	m_maincpu->set_input_line(0, HOLD_LINE);
412	412	}
413	413
414		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
415		{
416		DEVCB_DRIVER_MEMBER(h19_state, h19_kbd_put)
417		};
418
419	414	static MACHINE_CONFIG_START( h19, h19_state )
420	415	/* basic machine hardware */
421	416	MCFG_CPU_ADD("maincpu",Z80, H19_CLOCK) // From schematics
r29542	r29543
435	430
436	431	MCFG_MC6845_ADD("crtc", MC6845, "screen", XTAL_12_288MHz / 8, h19_crtc6845_interface) // clk taken from schematics
437	432	MCFG_INS8250_ADD( "ins8250", h19_ace_interface, XTAL_12_288MHz / 4) // 3.072mhz clock which gets divided down for the various baud rates
438		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	433	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	434	MCFG_GENERIC_KEYBOARD_CB(WRITE8(h19_state, h19_kbd_put))
439	435
440	436	/* sound hardware */
441	437	MCFG_SPEAKER_STANDARD_MONO("mono")

branches/new_menus/src/mess/drivers/v6809.c
r29542	r29543
254	254	m_pia0->cb1_w(1);
255	255	}
256	256
257		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
258		{
259		DEVCB_DRIVER_MEMBER(v6809_state, kbd_put)
260		};
261
262	257	WRITE_LINE_MEMBER( v6809_state::write_acia_clock )
263	258	{
264	259	m_acia0->write_txc(state);
r29542	r29543
359	354
360	355	/* Devices */
361	356	MCFG_MC6845_ADD("crtc", SY6545_1, "screen", XTAL_16MHz / 8, v6809_crtc)
362		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	357	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	358	MCFG_GENERIC_KEYBOARD_CB(WRITE8(v6809_state, kbd_put))
363	359
364	360	// port A = drive select and 2 control lines ; port B = keyboard
365	361	// CB2 connects to the interrupt pin of the RTC (the rtc code doesn't support it)

branches/new_menus/src/mess/drivers/ms9540.c
r29542	r29543
77	77	m_term_data = data;
78	78	}
79	79
80		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
81		{
82		DEVCB_DRIVER_MEMBER(ms9540_state, kbd_put)
83		};
84
85	80	static MACHINE_CONFIG_START( ms9540, ms9540_state )
86	81	/* basic machine hardware */
87	82	MCFG_CPU_ADD("maincpu", M68000, 8000000) // unknown clock
88	83	MCFG_CPU_PROGRAM_MAP(ms9540_mem)
89	84
90	85	/* video hardware */
91		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	86	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	87	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(ms9540_state, kbd_put))
	88
92	89	MACHINE_CONFIG_END
93	90
94	91	/* ROM definition */

branches/new_menus/src/mess/drivers/besta.c
r29542	r29543
128	128	m_maincpu->reset();
129	129	}
130	130
131		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
132		{
133		DEVCB_DRIVER_MEMBER(besta_state, kbd_put)
134		};
135
136
137	131	/* CP31 processor board */
138	132	static MACHINE_CONFIG_START( besta, besta_state )
139	133	/* basic machine hardware */
r29542	r29543
143	137	#if 0
144	138	MCFG_DEVICE_ADD("mpcc", MPCC68561, XTAL_25MHz); // confirm internal oscillator frequency
145	139	#endif
146		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	140	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	141	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(besta_state, kbd_put))
147	142	MACHINE_CONFIG_END
148	143
149	144	/* ROM definition */

branches/new_menus/src/mess/drivers/a6809.c
r29542	r29543
233	233	m_via->write_cb1(0);
234	234	}
235	235
236		static ASCII_KEYBOARD_INTERFACE( kb_intf )
237		{
238		DEVCB_DRIVER_MEMBER(a6809_state, kbd_put)
239		};
240
241	236	static MACHINE_CONFIG_START( a6809, a6809_state )
242	237	/* basic machine hardware */
243	238	MCFG_CPU_ADD("maincpu",M6809E, XTAL_4MHz)
r29542	r29543
270	265	MCFG_SAA5050_D_CALLBACK(READ8(a6809_state, videoram_r))
271	266	MCFG_SAA5050_SCREEN_SIZE(40, 25, 40)
272	267
273		MCFG_ASCII_KEYBOARD_ADD("keyboard", kb_intf)
	268	MCFG_DEVICE_ADD("keyboard", GENERIC_KEYBOARD, 0)
	269	MCFG_GENERIC_KEYBOARD_CB(WRITE8(a6809_state, kbd_put))
274	270	MCFG_CASSETTE_ADD( "cassette", default_cassette_interface )
275	271	MCFG_TIMER_DRIVER_ADD_PERIODIC("a6809_c", a6809_state, a6809_c, attotime::from_hz(4800))
276	272	MCFG_TIMER_DRIVER_ADD_PERIODIC("a6809_p", a6809_state, a6809_p, attotime::from_hz(40000))

branches/new_menus/src/mess/drivers/zsbc3.c
r29542	r29543
100	100	m_term_data = data;
101	101	}
102	102
103		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
104		{
105		DEVCB_DRIVER_MEMBER(zsbc3_state, kbd_put)
106		};
107	103
108
109	104	static MACHINE_CONFIG_START( zsbc3, zsbc3_state )
110	105	/* basic machine hardware */
111	106	MCFG_CPU_ADD("maincpu",Z80, XTAL_16MHz /4)
r29542	r29543
113	108	MCFG_CPU_IO_MAP(zsbc3_io)
114	109
115	110	/* video hardware */
116		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	111	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	112	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(zsbc3_state, kbd_put))
117	113	MACHINE_CONFIG_END
118	114
119	115	/* ROM definition */

branches/new_menus/src/mess/drivers/chaos.c
r29542	r29543
130	130	m_term_data = data;
131	131	}
132	132
133		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
134		{
135		DEVCB_DRIVER_MEMBER(chaos_state, kbd_put)
136		};
137
138	133	void chaos_state::machine_reset()
139	134	{
140	135	// copy the roms into ram
r29542	r29543
150	145	MCFG_CPU_IO_MAP(chaos_io)
151	146
152	147	/* video hardware */
153		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	148	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	149	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(chaos_state, kbd_put))
154	150	MACHINE_CONFIG_END
155	151
156	152	/* ROM definition */

branches/new_menus/src/mess/drivers/ravens.c
r29542	r29543
260	260	m_term_data = data;
261	261	}
262	262
263		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
264		{
265		DEVCB_DRIVER_MEMBER(ravens_state, kbd_put)
266		};
267
268	263	QUICKLOAD_LOAD_MEMBER( ravens_state, ravens )
269	264	{
270	265	address_space &space = m_maincpu->space(AS_PROGRAM);
r29542	r29543
359	354	MCFG_MACHINE_RESET_OVERRIDE(ravens_state, ravens2)
360	355
361	356	/* video hardware */
362		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	357	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	358	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(ravens_state, kbd_put))
363	359
364	360	/* quickload */
365	361	MCFG_QUICKLOAD_ADD("quickload", ravens_state, ravens, "pgm", 1)

branches/new_menus/src/mess/drivers/xerox820.c
r29542	r29543
520	520	m_kbpio->strobe_b(1);
521	521	}
522	522
523		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
524		{
525		DEVCB_DRIVER_MEMBER(xerox820_state, kbd_w)
526		};
527
528
529	523	/* Video */
530	524
531	525	UINT32 xerox820_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
r29542	r29543
719	713	MCFG_COM8116_FR_HANDLER(WRITELINE(xerox820_state, fr_w))
720	714	MCFG_COM8116_FT_HANDLER(DEVWRITELINE(Z80SIO_TAG, z80dart_device, rxtxcb_w))
721	715
722		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	716	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	717	MCFG_GENERIC_KEYBOARD_CB(WRITE8(xerox820_state, kbd_w))
723	718
724	719	/* internal ram */
725	720	MCFG_RAM_ADD(RAM_TAG)
r29542	r29543
780	775	MCFG_COM8116_FR_HANDLER(WRITELINE(xerox820_state, fr_w))
781	776	MCFG_COM8116_FT_HANDLER(DEVWRITELINE(Z80SIO_TAG, z80dart_device, rxtxcb_w))
782	777
783		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	778	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	779	MCFG_GENERIC_KEYBOARD_CB(WRITE8(xerox820_state, kbd_w))
784	780
785	781	// SASI bus
786	782	MCFG_SCSIBUS_ADD(SASIBUS_TAG)

branches/new_menus/src/mess/drivers/jade.c
r29542	r29543
80	80	m_term_data = data;
81	81	}
82	82
83		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
84		{
85		DEVCB_DRIVER_MEMBER(jade_state, kbd_put)
86		};
87
88	83	void jade_state::machine_reset()
89	84	{
90	85	m_term_data = 0;
r29542	r29543
97	92	MCFG_CPU_IO_MAP(jade_io)
98	93
99	94	/* video hardware */
100		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	95	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	96	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(jade_state, kbd_put))
101	97
102	98	/* Devices */
103	99	MCFG_DEVICE_ADD("uart", I8251, 0)

branches/new_menus/src/mess/drivers/cd2650.c
r29542	r29543
194	194	m_term_data = data;
195	195	}
196	196
197		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
198		{
199		DEVCB_DRIVER_MEMBER(cd2650_state, kbd_put)
200		};
201
202	197	QUICKLOAD_LOAD_MEMBER( cd2650_state, cd2650 )
203	198	{
204	199	int i, result = IMAGE_INIT_FAIL;
r29542	r29543
296	291	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
297	292
298	293	/* Devices */
299		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	294	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	295	MCFG_GENERIC_KEYBOARD_CB(WRITE8(cd2650_state, kbd_put))
300	296	MCFG_CASSETTE_ADD( "cassette", default_cassette_interface )
301	297	MACHINE_CONFIG_END
302	298

branches/new_menus/src/mess/drivers/ts816.c
r29542	r29543
80	80	m_status = 3;
81	81	}
82	82
83		static GENERIC_TERMINAL_INTERFACE( terminal_intf )
84		{
85		DEVCB_DRIVER_MEMBER(ts816_state, kbd_put)
86		};
87
88	83	void ts816_state::machine_reset()
89	84	{
90	85	m_term_data = 0;
r29542	r29543
98	93	MCFG_CPU_IO_MAP(ts816_io)
99	94
100	95	/* video hardware */
101		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
	96	MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
	97	MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(ts816_state, kbd_put))
102	98	MACHINE_CONFIG_END
103	99
104	100	/* ROM definition */

branches/new_menus/src/mess/drivers/m20.c
r29542	r29543
892	892	}
893	893	}
894	894
895		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
896		{
897		DEVCB_DRIVER_MEMBER(m20_state, kbd_put)
898		};
899
900	895	static SLOT_INTERFACE_START( m20_floppies )
901	896	SLOT_INTERFACE( "5dd", FLOPPY_525_DD )
902	897	SLOT_INTERFACE_END
r29542	r29543
957	952
958	953	MCFG_PIC8259_ADD("i8259", WRITELINE(m20_state, pic_irq_line_w), VCC, NULL)
959	954
960		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	955	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	956	MCFG_GENERIC_KEYBOARD_CB(WRITE8(m20_state, kbd_put))
961	957
962	958	MCFG_SOFTWARE_LIST_ADD("flop_list","m20")
963	959	MACHINE_CONFIG_END

branches/new_menus/src/mess/drivers/mx2178.c
r29542	r29543
96	96	m_maincpu->set_input_line(0, HOLD_LINE);
97	97	}
98	98
99		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
100		{
101		DEVCB_DRIVER_MEMBER(mx2178_state, kbd_put)
102		};
103
104	99	static MC6845_UPDATE_ROW( update_row )
105	100	{
106	101	mx2178_state *state = device->machine().driver_data<mx2178_state>();
r29542	r29543
196	191
197	192	/// TODO: hook up acia to keyboard and memory map
198	193
199		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	194	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	195	MCFG_GENERIC_KEYBOARD_CB(WRITE8(mx2178_state, kbd_put))
200	196
201	197	MCFG_DEVICE_ADD("acia_clock", CLOCK, 614400)
202	198	MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(mx2178_state, write_acia_clock))

branches/new_menus/src/mess/machine/teleprinter.c
r29542	r29543
203	203	return 0;
204	204	}
205	205
206		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
207		{
208		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, generic_terminal_device, kbd_put)
209		};
210
211	206	/***************************************************************************
212	207	VIDEO HARDWARE
213	208	***************************************************************************/
r29542	r29543
218	213	MCFG_SCREEN_SIZE(TELEPRINTER_WIDTH8, TELEPRINTER_HEIGHT8)
219	214	MCFG_SCREEN_VISIBLE_AREA(0, TELEPRINTER_WIDTH8-1, 0, TELEPRINTER_HEIGHT8-1)
220	215	MCFG_SCREEN_UPDATE_DEVICE(DEVICE_SELF, teleprinter_device, tp_update)
221		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	216	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	217	MCFG_GENERIC_KEYBOARD_CB(WRITE8(generic_terminal_device, kbd_put))
222	218	MACHINE_CONFIG_END
223	219
224	220	machine_config_constructor teleprinter_device::device_mconfig_additions() const

branches/new_menus/src/mess/machine/teleprinter.h
r29542	r29543
6	6	#define TELEPRINTER_WIDTH 80
7	7	#define TELEPRINTER_HEIGHT 50
8	8
9		#define GENERIC_TELEPRINTER_INTERFACE GENERIC_TERMINAL_INTERFACE
10	9
11	10	/***************************************************************************
12	11	DEVICE CONFIGURATION MACROS
r29542	r29543
14	13	#define TELEPRINTER_TAG "teleprinter"
15	14	#define TELEPRINTER_SCREEN_TAG "tty_screen"
16	15
17		#define MCFG_GENERIC_TELEPRINTER_ADD(_tag, _intrf) \
18		MCFG_DEVICE_ADD(_tag, TELEPRINTER, 0) \
19		MCFG_DEVICE_CONFIG(_intrf)
	16	#define MCFG_GENERIC_TELEPRINTER_KEYBOARD_CB(_devcb) \
	17	devcb = &generic_terminal_device::set_keyboard_callback(*device, DEVCB2_##_devcb);
20	18
21		#define MCFG_GENERIC_TELEPRINTER_REMOVE(_tag) \
22		MCFG_DEVICE_REMOVE(_tag)
23
24	19	/***************************************************************************
25	20	FUNCTION PROTOTYPES
26	21	***************************************************************************/

branches/new_menus/src/mame/drivers/rltennis.c
r29542	r29543
168	168	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb888_w)
169	169	ADDRESS_MAP_END
170	170
171		static RAMDAC_INTERFACE( ramdac_intf )
172		{
173		1
174		};
175
176	171	static MACHINE_CONFIG_START( rltennis, rltennis_state )
177	172
178	173	MCFG_CPU_ADD("maincpu", M68000, RLT_XTAL/2) /* 68000P8 ??? */
r29542	r29543
190	185
191	186	MCFG_NVRAM_ADD_0FILL("nvram")
192	187
193		MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map, "palette")
	188	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
	189	MCFG_RAMDAC_SPLIT_READ(1)
194	190
195	191	MCFG_SPEAKER_STANDARD_MONO("mono")
196	192

branches/new_menus/src/mame/drivers/globalvr.c
r29542	r29543
74	74
75	75
76	76	static ADDRESS_MAP_START( globalvr_map, AS_PROGRAM, 32, globalvr_state )
77		AM_RANGE(0x00000000, 0xffffffff) AM_RAM
	77	AM_RANGE(0x00000000, 0xffffff) AM_RAM
78	78	ADDRESS_MAP_END
79	79
80	80

branches/new_menus/src/mame/drivers/sfbonus.c
r29542	r29543
1349	1349	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
1350	1350	ADDRESS_MAP_END
1351	1351
1352		static RAMDAC_INTERFACE( ramdac_intf )
1353		{
1354		0
1355		};
1356	1352
1357
1358	1353	static MACHINE_CONFIG_START( sfbonus, sfbonus_state )
1359	1354	MCFG_CPU_ADD("maincpu", Z80, 6000000) // custom packaged z80 CPU ?? Mhz
1360	1355	MCFG_CPU_PROGRAM_MAP(sfbonus_map)
r29542	r29543
1377	1372
1378	1373	MCFG_PALETTE_ADD("palette", 0x1002) // 2 for priority workaraound / custom drawing
1379	1374
1380		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	1375	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
1381	1376
1382	1377
1383	1378	/* Parrot 3 seems fine at 1 Mhz, but Double Challenge isn't? */

branches/new_menus/src/mame/drivers/maygay1b.c
r29542	r29543
512	512	return (portnames[m_lamp_strobe&0x07])->read();
513	513	}
514	514
515		/*
516		static I8279_INTERFACE( m1_i8279_intf )
517		{
518		DEVCB_NULL, // irq
519		DEVCB_DRIVER_MEMBER(maygay1b_state, scanlines_w), // scan SL lines
520		DEVCB_DRIVER_MEMBER(maygay1b_state, lamp_data_w), // display A&B
521		DEVCB_NULL, // BD
522		DEVCB_DRIVER_MEMBER(maygay1b_state,kbd_r), // kbd RL lines
523		DEVCB_NULL, // Shift key
524		DEVCB_NULL // Ctrl-Strobe line
525		};
526		*/
527
528
529
530	515	WRITE8_MEMBER( maygay1b_state::lamp_data_2_w )
531	516	{
532	517	//The two A/B ports are merged back into one, to make one row of 8 lamps.
r29542	r29543
546	531
547	532	}
548	533
549		/*
550		static I8279_INTERFACE( m1_i8279_2_intf )
551		{
552		DEVCB_NULL, // irq
553		DEVCB_NULL, // scan SL lines
554		DEVCB_DRIVER_MEMBER(maygay1b_state, lamp_data_2_w), // display A&B
555		DEVCB_NULL, // BD
556		DEVCB_NULL, // kbd RL lines
557		DEVCB_NULL, // Shift key
558		DEVCB_NULL // Ctrl-Strobe line
559		};
560		*/
561
562	534	// machine driver for maygay m1 board /////////////////////////////////
563	535
564	536
r29542	r29543
589	561
590	562	MCFG_TIMER_DRIVER_ADD_PERIODIC("nmitimer", maygay1b_state, maygay1b_nmitimer_callback, attotime::from_hz(75)) // freq?
591	563	MCFG_DEVICE_ADD("i8279", I8279, M1_MASTER_CLOCK/4) // unknown clock
592		MCFG_DEVICE_ADD("i8279_2", I8279, M1_MASTER_CLOCK/4) // unknown clock
593
594		// MCFG_I8279_ADD("i8279", M1_MASTER_CLOCK/4, m1_i8279_intf) // unknown clock
595		// MCFG_I8279_ADD("i8279_2", M1_MASTER_CLOCK/4, m1_i8279_2_intf) // unknown clock
596
	564	MCFG_I8279_OUT_SL_CB(WRITE8(maygay1b_state, scanlines_w)) // scan SL lines
	565	MCFG_I8279_OUT_DISP_CB(WRITE8(maygay1b_state, lamp_data_w)) // display A&B
	566	MCFG_I8279_IN_RL_CB(READ8(maygay1b_state, kbd_r)) // kbd RL lines
	567	MCFG_DEVICE_ADD("i8279_2", I8279, M1_MASTER_CLOCK/4) // unknown clock
	568	MCFG_I8279_OUT_DISP_CB(WRITE8(maygay1b_state, lamp_data_2_w)) // display A&B
	569
597	570	MCFG_NVRAM_ADD_0FILL("nvram")
598	571
599	572	MCFG_DEFAULT_LAYOUT(layout_maygay1b)

branches/new_menus/src/mame/drivers/mazerbla.c
r29542	r29543
1466	1466	m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(mazerbla_state::irq_callback),this));
1467	1467	}
1468	1468
1469		static const mb_vcu_interface vcu_interface =
1470		{
1471		"sub2"
1472		};
1473
1474	1469	static MACHINE_CONFIG_START( mazerbla, mazerbla_state )
1475	1470
1476	1471	/* basic machine hardware */
r29542	r29543
1493	1488	MCFG_CPU_VBLANK_INT_DRIVER("screen", mazerbla_state, irq0_line_hold)
1494	1489
1495	1490	/* synchronization forced on the fly */
1496		MCFG_MB_VCU_ADD("vcu",SOUND_CLOCK/4,vcu_interface,"palette")
	1491	MCFG_DEVICE_ADD("vcu", MB_VCU, SOUND_CLOCK/4)
	1492	MCFG_MB_VCU_CPU("sub2")
	1493	MCFG_MB_VCU_PALETTE("palette")
1497	1494
1498	1495	/* video hardware */
1499	1496	MCFG_SCREEN_ADD("screen", RASTER)
r29542	r29543
1530	1527	*/
1531	1528	MCFG_CPU_VBLANK_INT_DRIVER("screen", mazerbla_state, irq0_line_hold)
1532	1529
1533		MCFG_MB_VCU_ADD("vcu",SOUND_CLOCK/4,vcu_interface,"palette")
	1530	MCFG_DEVICE_ADD("vcu", MB_VCU, SOUND_CLOCK/4)
	1531	MCFG_MB_VCU_CPU("sub2")
	1532	MCFG_MB_VCU_PALETTE("palette")
1534	1533
1535	1534	/* video hardware */
1536	1535	MCFG_SCREEN_ADD("screen", RASTER)

branches/new_menus/src/mame/drivers/sliver.c
r29542	r29543
454	454	AM_RANGE(0x000, 0x3ff) AM_RAM AM_SHARE("colorram")
455	455	ADDRESS_MAP_END
456	456
457		static RAMDAC_INTERFACE( ramdac_intf )
458		{
459		0
460		};
461
462	457	static TIMER_DEVICE_CALLBACK ( obj_irq_cb )
463	458	{
464	459	sliver_state *state = timer.machine().driver_data<sliver_state>();
r29542	r29543
485	480	MCFG_SCREEN_UPDATE_DRIVER(sliver_state, screen_update_sliver)
486	481
487	482	MCFG_PALETTE_ADD("palette", 0x100)
488		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	483	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
489	484
490	485
491	486	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")

branches/new_menus/src/mame/drivers/blitz68k.c
r29542	r29543
1716	1716	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
1717	1717	ADDRESS_MAP_END
1718	1718
1719		static RAMDAC_INTERFACE( ramdac_intf )
1720		{
1721		0
1722		};
1723
1724	1719	static MACHINE_CONFIG_START( ilpag, blitz68k_state )
1725	1720	MCFG_CPU_ADD("maincpu", M68000, 11059200 ) // ?
1726	1721	MCFG_CPU_PROGRAM_MAP(ilpag_map)
r29542	r29543
1739	1734
1740	1735	MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
1741	1736
1742		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	1737	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
1743	1738
1744	1739	MCFG_SPEAKER_STANDARD_MONO("mono")
1745	1740	MCFG_DAC_ADD("dac")
r29542	r29543
1812	1807	MCFG_PALETTE_ADD("palette", 0x100)
1813	1808
1814	1809	MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
1815		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	1810	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
1816	1811
1817	1812	MCFG_SPEAKER_STANDARD_MONO("mono")
1818	1813	MCFG_DAC_ADD("dac")
r29542	r29543
1844	1839	MCFG_PALETTE_ADD("palette", 0x100)
1845	1840
1846	1841	MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
1847		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	1842	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
1848	1843
1849	1844	MCFG_SPEAKER_STANDARD_MONO("mono")
1850	1845	MCFG_DAC_ADD("dac")
r29542	r29543
1874	1869	MCFG_PALETTE_ADD("palette", 0x100)
1875	1870
1876	1871	MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k_addr_factor1)
1877		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	1872	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
1878	1873
1879	1874	MCFG_SPEAKER_STANDARD_MONO("mono")
1880	1875	MCFG_DAC_ADD("dac")
r29542	r29543
1903	1898	MCFG_PALETTE_ADD("palette", 0x100)
1904	1899
1905	1900	MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
1906		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	1901	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
1907	1902
1908	1903	MCFG_SPEAKER_STANDARD_MONO("mono")
1909	1904	MCFG_DAC_ADD("dac")
r29542	r29543
1934	1929	MCFG_PALETTE_ADD("palette", 0x100)
1935	1930
1936	1931	MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
1937		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	1932	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
1938	1933
1939	1934	MCFG_SPEAKER_STANDARD_MONO("mono")
1940	1935	MCFG_DAC_ADD("dac")
r29542	r29543
1963	1958	MCFG_PALETTE_ADD("palette", 0x100)
1964	1959
1965	1960	MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
1966		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	1961	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
1967	1962
1968	1963	MCFG_SPEAKER_STANDARD_MONO("mono")
1969	1964	MCFG_DAC_ADD("dac")
r29542	r29543
1995	1990	MCFG_MC6845_ADD("crtc", H46505, "screen", XTAL_11_0592MHz/4, mc6845_intf_irq3)
1996	1991
1997	1992	MCFG_PALETTE_ADD("palette", 0x100)
1998		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	1993	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
1999	1994
2000	1995	MCFG_SPEAKER_STANDARD_MONO("mono")
2001	1996	MCFG_SAA1099_ADD("saa", XTAL_8MHz/2)

branches/new_menus/src/mame/drivers/konamigx.c
r29542	r29543
1651	1651	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
1652	1652
1653	1653	MCFG_DEVICE_MODIFY("dasp")
1654		MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
1655		MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
	1654	MCFG_SOUND_ROUTE(0, "lspeaker", 0.3)
	1655	MCFG_SOUND_ROUTE(1, "rspeaker", 0.3)
1656	1656
1657	1657	MCFG_K056800_ADD("k056800", XTAL_18_432MHz)
1658	1658	MCFG_K056800_INT_HANDLER(INPUTLINE("soundcpu", M68K_IRQ_1))
1659	1659
1660	1660	MCFG_K054539_ADD("k054539_1", XTAL_18_432MHz, k054539_config)
1661	1661	MCFG_K054539_TIMER_HANDLER(WRITELINE(konamigx_state, k054539_irq_gen))
1662		MCFG_SOUND_ROUTE_EX(0, "dasp", 0.9, 0)
1663		MCFG_SOUND_ROUTE_EX(1, "dasp", 0.9, 1)
	1662	MCFG_SOUND_ROUTE_EX(0, "dasp", 0.5, 0)
	1663	MCFG_SOUND_ROUTE_EX(1, "dasp", 0.5, 1)
1664	1664	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
1665	1665	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
1666	1666
1667	1667	MCFG_K054539_ADD("k054539_2", XTAL_18_432MHz, k054539_config)
1668		MCFG_SOUND_ROUTE_EX(0, "dasp", 0.9, 2)
1669		MCFG_SOUND_ROUTE_EX(1, "dasp", 0.9, 3)
	1668	MCFG_SOUND_ROUTE_EX(0, "dasp", 0.5, 2)
	1669	MCFG_SOUND_ROUTE_EX(1, "dasp", 0.5, 3)
1670	1670	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
1671	1671	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
1672	1672	MACHINE_CONFIG_END

branches/new_menus/src/mame/drivers/pinball2k.c
r29542	r29543
568	568	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
569	569	ADDRESS_MAP_END
570	570
571		static RAMDAC_INTERFACE( ramdac_intf )
572		{
573		0
574		};
575
576	571	static MACHINE_CONFIG_START( mediagx, pinball2k_state )
577	572
578	573	/* basic machine hardware */
r29542	r29543
588	583	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
589	584	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
590	585
591		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	586	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
592	587
593	588	/* video hardware */
594	589	MCFG_SCREEN_ADD("screen", RASTER)

branches/new_menus/src/mame/drivers/wildpkr.c
r29542	r29543
255	255
256	256	}
257	257
258		// static const hd63484_interface wildpkr_hd63484_intf = { 1 };
259	258
260
261	259	static ADDRESS_MAP_START( ramdac_map, AS_0, 8, wildpkr_state )
262	260	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
263	261	ADDRESS_MAP_END
264	262
265	263
266	264
267		static RAMDAC_INTERFACE( ramdac_intf )
268		{
269		0
270		};
271
272	265	/*************************
273	266	* Machine Drivers *
274	267	*************************/
r29542	r29543
289	282	MCFG_SCREEN_UPDATE_DRIVER(wildpkr_state, screen_update_wildpkr)
290	283	MCFG_SCREEN_PALETTE("palette")
291	284
292		// MCFG_HD63484_ADD("hd63484", wildpkr_hd63484_intf)
293		MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map, "palette")
	285	// MCFG_DEVICE_ADD("hd63484", HD63484, 0)
	286	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
294	287
295	288	MCFG_PALETTE_ADD("palette", 256)
296	289	MCFG_PALETTE_INIT_OWNER(wildpkr_state, wildpkr)

branches/new_menus/src/mame/drivers/mediagx.c
r29542	r29543
870	870	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
871	871	ADDRESS_MAP_END
872	872
873		static RAMDAC_INTERFACE( ramdac_intf )
874		{
875		0
876		};
877
878	873	static MACHINE_CONFIG_START( mediagx, mediagx_state )
879	874
880	875	/* basic machine hardware */
r29542	r29543
892	887
893	888	MCFG_TIMER_DRIVER_ADD("sound_timer", mediagx_state, sound_timer_callback)
894	889
895		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	890	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
896	891
897	892	/* video hardware */
898	893	MCFG_SCREEN_ADD("screen", RASTER)

branches/new_menus/src/mame/drivers/taito_b.c
r29542	r29543
2881	2881	MCFG_TC0140SYT_SLAVE_CPU("audiocpu")
2882	2882	MACHINE_CONFIG_END
2883	2883
2884		/* TODO: Properly hook up the HD63484 */
2885		static const hd63484_interface realpunc_hd63484_intf =
2886		{
2887		0
2888		};
2889
2890	2884	static MACHINE_CONFIG_START( realpunc, taitob_state )
2891	2885
2892	2886	/* basic machine hardware */
r29542	r29543
2921	2915
2922	2916	MCFG_VIDEO_START_OVERRIDE(taitob_state,realpunc)
2923	2917
2924		MCFG_HD63484_ADD("hd63484", realpunc_hd63484_intf)
	2918	// TODO: convert to use H63484 and hook it up properly
	2919	MCFG_DEVICE_ADD("hd63484", HD63484, 0)
2925	2920
2926	2921	MCFG_DEVICE_ADD("tc0180vcu", TC0180VCU, 0)
2927	2922	MCFG_TC0180VCU_BG_COLORBASE(0xc0)

branches/new_menus/src/mame/drivers/chsuper.c
r29542	r29543
195	195	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
196	196	ADDRESS_MAP_END
197	197
198		static RAMDAC_INTERFACE( ramdac_intf )
199		{
200		0
201		};
202
203	198	static MACHINE_CONFIG_START( chsuper, chsuper_state )
204	199
205	200	/* basic machine hardware */
r29542	r29543
222	217	MCFG_GFXDECODE_ADD("gfxdecode", "palette", chsuper)
223	218	MCFG_PALETTE_ADD("palette", 0x100)
224	219
225		MCFG_RAMDAC_ADD("ramdac", ramdac_~~intf, ramdac_~~map, "palette")
	220	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
226	221
227	222	/* sound hardware */
228	223	MCFG_SPEAKER_STANDARD_MONO("mono")

branches/new_menus/src/mame/drivers/shanghai.c
r29542	r29543
435	435	DEVCB_NULL, DEVCB_NULL, DEVCB_NULL
436	436	};
437	437
438		static const hd63484_interface shanghai_hd63484_intf = { 0 };
439
440	438	static MACHINE_CONFIG_START( shanghai, shanghai_state )
441	439
442	440	/* basic machine hardware */
r29542	r29543
457	455	MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
458	456	MCFG_PALETTE_INIT_OWNER(shanghai_state,shanghai)
459	457
460		MCFG_HD63484_ADD("hd63484", shanghai_hd63484_intf)
	458	// TODO: convert to use H63484
	459	MCFG_DEVICE_ADD("hd63484", HD63484, 0)
461	460
462	461	/* sound hardware */
463	462	MCFG_SPEAKER_STANDARD_MONO("mono")
r29542	r29543
490	489	MCFG_PALETTE_ADD("palette", 256)
491	490	MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
492	491
493		MCFG_HD63484_ADD("hd63484", shanghai_hd63484_intf)
	492	// TODO: convert to use H63484
	493	MCFG_DEVICE_ADD("hd63484", HD63484, 0)
494	494
495	495	/* sound hardware */
496	496	MCFG_SPEAKER_STANDARD_MONO("mono")
r29542	r29543
526	526	MCFG_PALETTE_ADD("palette", 256)
527	527	MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
528	528
529		MCFG_HD63484_ADD("hd63484", shanghai_hd63484_intf)
	529	// TODO: convert to use H63484
	530	MCFG_DEVICE_ADD("hd63484", HD63484, 0)
530	531
531	532	/* sound hardware */
532	533	MCFG_SPEAKER_STANDARD_MONO("mono")

branches/new_menus/src/mame/drivers/namcos12.c
r29542	r29543
1077	1077
1078	1078	int m_ttt_cnt;
1079	1079	UINT32 m_ttt_val[2];
1080		int m_s12_porta;
1081		int m_s12_lastpB;
	1080	UINT8 m_sub_porta;
	1081	UINT8 m_sub_portb;
1082	1082
1083	1083	DECLARE_WRITE16_MEMBER(sharedram_w);
1084	1084	DECLARE_READ16_MEMBER(sharedram_r);
r29542	r29543
1235	1235	{
1236	1236	m_sub->set_input_line(1, vblank_state ? ASSERT_LINE : CLEAR_LINE);
1237	1237	m_adc->adtrg_w(vblank_state);
1238		m_s12_~~last~~pB = (m_s12_~~last~~pB & 0x7f) \| (vblank_state << 7);
	1238	m_sub_portb = (m_sub_portb & 0x7f) \| (vblank_state << 7);
1239	1239	}
1240	1240
1241	1241	static ADDRESS_MAP_START( namcos12_map, AS_PROGRAM, 32, namcos12_state )
r29542	r29543
1473	1473
1474	1474	READ16_MEMBER(namcos12_state::s12_mcu_pa_r)
1475	1475	{
1476		return m_s12_porta;
	1476	return m_sub_porta;
1477	1477	}
1478	1478
1479	1479	WRITE16_MEMBER(namcos12_state::s12_mcu_pa_w)
1480	1480	{
1481	1481	logerror("pa_w %02x\n", data);
1482		m_s12_porta = data;
1483		m_rtc->ce_w((m_s12_lastpB & 0x20) && (m_s12_porta & 1));
1484		m_settings->ce_w((m_s12_lastpB & 0x20) && !(m_s12_porta & 1));
	1482	m_sub_porta = data;
	1483	m_rtc->ce_w((m_sub_portb & 0x20) && (m_sub_porta & 1));
	1484	m_settings->ce_w((m_sub_portb & 0x20) && !(m_sub_porta & 1));
1485	1485	}
1486	1486
1487	1487	READ16_MEMBER(namcos12_state::s12_mcu_portB_r)
1488	1488	{
1489		return m_s12_~~last~~pB;
	1489	return m_sub_portb;
1490	1490	}
1491	1491
1492	1492	WRITE16_MEMBER(namcos12_state::s12_mcu_portB_w)
1493	1493	{
1494		m_s12_lastpB = data;
1495		m_rtc->ce_w((m_s12_lastpB & 0x20) && (m_s12_porta & 1));
1496		m_settings->ce_w((m_s12_lastpB & 0x20) && !(m_s12_porta & 1));
	1494	m_sub_portb = (m_sub_portb & 0x80) \| (data & 0x7f);
	1495	m_rtc->ce_w((m_sub_portb & 0x20) && (m_sub_porta & 1));
	1496	m_settings->ce_w((m_sub_portb & 0x20) && !(m_sub_porta & 1));
1497	1497	}
1498	1498
1499	1499	static ADDRESS_MAP_START( s12h8iomap, AS_IO, 16, namcos12_state )
1500	1500	AM_RANGE(h8_device::PORT_7, h8_device::PORT_7) AM_READ_PORT("DSW")
1501		AM_RANGE(h8_device::PORT_8, h8_device::PORT_8) AM_READ(s12_mcu_p8_r ) AM_WRITENOP
1502		AM_RANGE(h8_device::PORT_A, h8_device::PORT_A) AM_READWRITE(s12_mcu_pa_r, s12_mcu_pa_w )
1503		AM_RANGE(h8_device::PORT_B, h8_device::PORT_B) AM_READWRITE(s12_mcu_portB_r, s12_mcu_portB_w )
	1501	AM_RANGE(h8_device::PORT_8, h8_device::PORT_8) AM_READ(s12_mcu_p8_r) AM_WRITENOP
	1502	AM_RANGE(h8_device::PORT_A, h8_device::PORT_A) AM_READWRITE(s12_mcu_pa_r, s12_mcu_pa_w)
	1503	AM_RANGE(h8_device::PORT_B, h8_device::PORT_B) AM_READWRITE(s12_mcu_portB_r, s12_mcu_portB_w)
1504	1504	AM_RANGE(h8_device::ADC_0, h8_device::ADC_0) AM_NOP
1505	1505	AM_RANGE(h8_device::ADC_1, h8_device::ADC_1) AM_NOP
1506	1506	AM_RANGE(h8_device::ADC_2, h8_device::ADC_2) AM_NOP
r29542	r29543
1508	1508	ADDRESS_MAP_END
1509	1509
1510	1510
1511		/* Golgo 13 lightgun inputs
1512		*
1513		* Note: The H8/3002's ADC is 10 bits wide, but
1514		* it expects the 10-bit value to be left-justified
1515		* within the 16-bit word.
1516		*/
	1511	// Golgo 13 lightgun inputs
1517	1512
1518	1513	READ16_MEMBER(namcos12_state::s12_mcu_gun_h_r)
1519	1514	{
1520		return ioport("LIGHT0_X")->read() ~~<< 2~~;
	1515	return ioport("LIGHT0_X")->read();
1521	1516	}
1522	1517
1523	1518	READ16_MEMBER(namcos12_state::s12_mcu_gun_v_r)
1524	1519	{
1525		return ioport("LIGHT0_Y")->read() ~~<< 2~~;
	1520	return ioport("LIGHT0_Y")->read();
1526	1521	}
1527	1522
1528	1523	static ADDRESS_MAP_START( golgo13_h8iomap, AS_IO, 16, namcos12_state )
1529		AM_RANGE(h8_device::ADC_1, h8_device::ADC_1) AM_READ(s12_mcu_gun_h_r )
1530		AM_RANGE(h8_device::ADC_2, h8_device::ADC_2) AM_READ(s12_mcu_gun_v_r )
	1524	AM_RANGE(h8_device::ADC_1, h8_device::ADC_1) AM_READ(s12_mcu_gun_h_r)
	1525	AM_RANGE(h8_device::ADC_2, h8_device::ADC_2) AM_READ(s12_mcu_gun_v_r)
1531	1526
1532	1527	AM_IMPORT_FROM( s12h8iomap )
1533	1528	ADDRESS_MAP_END
r29542	r29543
1537	1532	{
1538	1533	membank("bank1")->configure_entries(0, memregion( "user2" )->bytes() / 0x200000, memregion( "user2" )->base(), 0x200000 );
1539	1534
1540		m_s12_porta = 0;
1541		m_s12_lastpB = 0x50;
	1535	m_sub_porta = 0;
	1536	m_sub_portb = 0x50;
1542	1537
1543	1538	m_n_tektagdmaoffset = 0;
1544	1539	m_n_dmaoffset = 0;

branches/new_menus/src/mame/drivers/sigmab52.c
r29542	r29543
585	585	#endif
586	586	}
587	587
588		//static const hd63484_interface jwildb52_hd63484_intf = { 1 };
589
590
591	588	/*************************
592	589	* Machine Drivers *
593	590	*************************/

branches/new_menus/src/mame/drivers/maygayv1.c
r29542	r29543
535	535	return ioport(portnames[m_lamp_strobe&0x07])->read();
536	536	}
537	537
538		/*
539		static I8279_INTERFACE( v1_i8279_intf )
540		{
541		DEVCB_NULL, // irq
542		DEVCB_DRIVER_MEMBER(maygayv1_state, strobe_w), // scan SL lines
543		DEVCB_DRIVER_MEMBER(maygayv1_state, lamp_data_w), // display A&B
544		DEVCB_NULL, // BD
545		DEVCB_DRIVER_MEMBER(maygayv1_state,kbd_r), // kbd RL lines
546		DEVCB_NULL, // Shift key
547		DEVCB_NULL // Ctrl-Strobe line
548		};
549		*/
550
551
552	538	WRITE16_MEMBER(maygayv1_state::vsync_int_ctrl)
553	539	{
554	540	m_vsync_latch_preset = data & 0x0100;
r29542	r29543
911	897	MCFG_MC68681_A_TX_CALLBACK(WRITELINE(maygayv1_state, duart_txa))
912	898
913	899	MCFG_DEVICE_ADD("i8279", I8279, MASTER_CLOCK/4) // unknown clock
914		// MCFG_I8279_ADD("i8279", MASTER_CLOCK/4, v1_i8279_intf) // unknown clock
915
	900	MCFG_I8279_OUT_SL_CB(WRITE8(maygayv1_state, strobe_w)) // scan SL lines
	901	MCFG_I8279_OUT_DISP_CB(WRITE8(maygayv1_state, lamp_data_w)) // display A&B
	902	MCFG_I8279_IN_RL_CB(READ8(maygayv1_state, kbd_r)) // kbd RL lines
	903
916	904	MCFG_SPEAKER_STANDARD_MONO("mono")
917	905
918	906	MCFG_SOUND_ADD("ymsnd",YM2413, MASTER_CLOCK / 4)

branches/new_menus/src/mame/drivers/namcos23.c
r29542	r29543
1447	1447	UINT16 m_c435_buffer[256];
1448	1448	int m_c435_buffer_pos;
1449	1449
1450		int m_porta;
1451		int m_lastpb;
	1450	UINT8 m_sub_porta;
	1451	UINT8 m_sub_portb;
1452	1452	UINT8 m_tssio_port_4;
1453	1453
1454	1454	void update_main_interrupts(UINT32 cause);
r29542	r29543
1508	1508	UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
1509	1509	INTERRUPT_GEN_MEMBER(interrupt);
1510	1510	TIMER_CALLBACK_MEMBER(c361_timer_cb);
1511		void sub_irq(screen_device &screen, bool state);
	1511	void sub_irq(screen_device &screen, bool vblank_state);
1512	1512	UINT8 nthbyte(const UINT32 *pSource, int offs);
1513	1513	UINT16 nthword(const UINT32 *pSource, int offs);
1514	1514	inline INT32 u32_to_s24(UINT32 v);
r29542	r29543
2255	2255	m_render.count[m_render.cur] = 0;
2256	2256	}
2257	2257
2258		void namcos23_state::sub_irq(screen_device &screen, bool state)
	2258	void namcos23_state::sub_irq(screen_device &screen, bool vblank_state)
2259	2259	{
2260		m_subcpu->set_input_line(1, state ? ASSERT_LINE : CLEAR_LINE);
2261		m_adc->adtrg_w(state);
2262		m_lastpb = (m_lastpb & 0x7f) \| (state << 7);
	2260	m_subcpu->set_input_line(1, vblank_state ? ASSERT_LINE : CLEAR_LINE);
	2261	m_adc->adtrg_w(vblank_state);
	2262	m_sub_portb = (m_sub_portb & 0x7f) \| (vblank_state << 7);
2263	2263	}
2264	2264
2265	2265
r29542	r29543
2861	2861
2862	2862	READ16_MEMBER(namcos23_state::mcu_pa_r)
2863	2863	{
2864		return m_porta;
	2864	return m_sub_porta;
2865	2865	}
2866	2866
2867	2867	WRITE16_MEMBER(namcos23_state::mcu_pa_w)
2868	2868	{
2869	2869	m_rtc->ce_w(data & 1);
2870		m_porta = data;
2871		m_rtc->ce_w((m_lastpb & 0x20) && (m_porta & 1));
2872		m_settings->ce_w((m_lastpb & 0x20) && !(m_porta & 1));
	2870	m_sub_porta = data;
	2871	m_rtc->ce_w((m_sub_portb & 0x20) && (m_sub_porta & 1));
	2872	m_settings->ce_w((m_sub_portb & 0x20) && !(m_sub_porta & 1));
2873	2873	}
2874	2874
2875	2875
r29542	r29543
2878	2878
2879	2879	READ16_MEMBER(namcos23_state::mcu_pb_r)
2880	2880	{
2881		return m_lastpb;
	2881	return m_sub_portb;
2882	2882	}
2883	2883
2884	2884	WRITE16_MEMBER(namcos23_state::mcu_pb_w)
2885	2885	{
2886		m_lastpb = data;
2887		m_rtc->ce_w((m_lastpb & 0x20) && (m_porta & 1));
2888		m_settings->ce_w((m_lastpb & 0x20) && !(m_porta & 1));
	2886	m_sub_portb = (m_sub_portb & 0x80) \| (data & 0x7f);
	2887	m_rtc->ce_w((m_sub_portb & 0x20) && (m_sub_porta & 1));
	2888	m_settings->ce_w((m_sub_portb & 0x20) && !(m_sub_porta & 1));
2889	2889	}
2890	2890
2891	2891
r29542	r29543
3256	3256	m_jvssense = 1;
3257	3257	m_main_irqcause = 0;
3258	3258	m_ctl_vbl_active = false;
3259		m_lastpb = 0x50;
	3259	m_sub_portb = 0x50;
3260	3260	m_tssio_port_4 = 0;
3261		m_porta = 0;
	3261	m_sub_porta = 0;
3262	3262	m_subcpu_running = false;
3263	3263	m_render.count[0] = m_render.count[1] = 0;
3264	3264	m_render.cur = 0;

branches/new_menus/src/mame/audio/taitosnd.h
r29542	r29543
17	17	// TYPE DEFINITIONS
18	18	//**************************************************************************
19	19
20		struct tc0140syt_interface
21		{
22		const char *master;
23		const char *slave;
24		};
25
26
27	20	// ======================> tc0140syt_device
28	21
29	22	class tc0140syt_device : public device_t

branches/new_menus/src/mame/machine/inder_vid.c
r29542	r29543
109	109	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb888_w)
110	110	ADDRESS_MAP_END
111	111
112		static RAMDAC_INTERFACE( ramdac_intf )
113		{
114		1
115		};
116
117	112	static MACHINE_CONFIG_FRAGMENT( inder_vid )
118	113	MCFG_CPU_ADD("tms", TMS34010, XTAL_40MHz)
119	114	MCFG_CPU_CONFIG(tms_config_megaphx)
r29542	r29543
126	121
127	122	MCFG_PALETTE_ADD("palette", 256)
128	123
129		MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map, "palette")
	124	MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
	125	MCFG_RAMDAC_SPLIT_READ(1)
130	126
131
132	127	MACHINE_CONFIG_END
133	128
134	129	machine_config_constructor inder_vid_device::device_mconfig_additions() const

branches/new_menus/src/mame/video/namcona1.c
r29542	r29543
16	16	const UINT16 *tilemap_videoram,
17	17	bool use_4bpp_gfx )
18	18	{
19		UINT16 *source;
	19	//UINT16 *source;
20	20
21	21	int data = tilemap_videoram[tile_index];
22	22	int tile = data&0xfff;

branches/new_menus/src/emu/bus/ecbbus/grip.c
r29542	r29543
521	521	}
522	522	}
523	523
524		static ASCII_KEYBOARD_INTERFACE( kb_intf )
525		{
526		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, grip_device, kb_w)
527		};
528
529
530
531	524	//**************************************************************************
532	525	// MACHINE CONFIGURATION
533	526	//**************************************************************************
r29542	r29543
571	564
572	565	MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", CENTRONICS_TAG)
573	566
574		MCFG_ASCII_KEYBOARD_ADD("keyboard", kb_intf)
	567	MCFG_DEVICE_ADD("keyboard", GENERIC_KEYBOARD, 0)
	568	MCFG_GENERIC_KEYBOARD_CB(WRITE8(grip_device, kb_w))
575	569	MACHINE_CONFIG_END
576	570
577	571

branches/new_menus/src/emu/bus/snes/event.c
r29542	r29543
32	32
33	33	void sns_pfest94_device::device_start()
34	34	{
35		m_dsp_prg = auto_alloc_array(machine(), UINT32, 0x2000/4);
36		m_dsp_data = auto_alloc_array(machine(), UINT16, 0x800/2);
	35	m_dsp_prg.resize(0x2000/sizeof(UINT32));
	36	m_dsp_data.resize(0x800/sizeof(UINT16));
37	37	pfest94_timer = timer_alloc(TIMER_EVENT);
38	38	pfest94_timer->reset();
39	39

branches/new_menus/src/emu/bus/snes/event.h
r29542	r29543
41	41	UINT8 m_status;
42	42	UINT32 m_count;
43	43
44		UINT32 *m_dsp_prg;
45		UINT16 *m_dsp_data;
	44	dynamic_array<UINT32> m_dsp_prg;
	45	dynamic_array<UINT16> m_dsp_data;
46	46
47	47	static const device_timer_id TIMER_EVENT = 0;
48	48	emu_timer *pfest94_timer;

branches/new_menus/src/emu/bus/snes/upd.c
r29542	r29543
76	76
77	77	void sns_rom20_necdsp_device::device_start()
78	78	{
79		m_dsp_prg = auto_alloc_array(machine(), UINT32, 0x2000/4);
80		m_dsp_data = auto_alloc_array(machine(), UINT16, 0x800/2);
	79	m_dsp_prg.resize(0x2000/sizeof(UINT32));
	80	m_dsp_data.resize(0x800/sizeof(UINT16));
81	81	}
82	82
83	83	void sns_rom21_necdsp_device::device_start()
84	84	{
85		m_dsp_prg = auto_alloc_array(machine(), UINT32, 0x2000/4);
86		m_dsp_data = auto_alloc_array(machine(), UINT16, 0x800/2);
	85	m_dsp_prg.resize(0x2000/sizeof(UINT32));
	86	m_dsp_data.resize(0x800/sizeof(UINT16));
87	87	}
88	88
89	89	void sns_rom_setadsp_device::device_start()
90	90	{
91		m_dsp_prg = auto_alloc_array(machine(), UINT32, 0x10000/4);
92		m_dsp_data = auto_alloc_array(machine(), UINT16, 0x1000/2);
	91	m_dsp_prg.resize(0x10000/sizeof(UINT32));
	92	m_dsp_data.resize(0x1000/sizeof(UINT16));
93	93	}
94	94
95	95	/*-------------------------------------------------

branches/new_menus/src/emu/bus/snes/upd.h
r29542	r29543
29	29	virtual DECLARE_READ32_MEMBER(necdsp_prg_r);
30	30	virtual DECLARE_READ16_MEMBER(necdsp_data_r);
31	31
32		UINT32 *m_dsp_prg;
33		UINT16 *m_dsp_data;
	32	dynamic_array<UINT32> m_dsp_prg;
	33	dynamic_array<UINT16> m_dsp_data;
34	34	};
35	35
36	36	// ======================> sns_rom21_necdsp_device
r29542	r29543
56	56	virtual DECLARE_READ32_MEMBER(necdsp_prg_r);
57	57	virtual DECLARE_READ16_MEMBER(necdsp_data_r);
58	58
59		UINT32 *m_dsp_prg;
60		UINT16 *m_dsp_data;
	59	dynamic_array<UINT32> m_dsp_prg;
	60	dynamic_array<UINT16> m_dsp_data;
61	61	};
62	62
63	63	// ======================> sns_rom_setadsp_device
r29542	r29543
81	81	virtual DECLARE_READ32_MEMBER(setadsp_prg_r);
82	82	virtual DECLARE_READ16_MEMBER(setadsp_data_r);
83	83
84		UINT32 *m_dsp_prg;
85		UINT16 *m_dsp_data;
	84	dynamic_array<UINT32> m_dsp_prg;
	85	dynamic_array<UINT16> m_dsp_data;
86	86	};
87	87
88	88	// ======================> sns_rom_seta10dsp_device

branches/new_menus/src/emu/bus/isa/wdxt_gen.c
r29542	r29543
140	140	m_ram[offset] = data;
141	141	}
142	142
143		static WD11C00_17_INTERFACE( host_intf )
144		{
145		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, irq5_w),
146		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, drq3_w),
147		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, mr_w),
148		DEVCB_NULL,
149		DEVCB_NULL,
150		DEVCB_CPU_INPUT_LINE(WD1015_TAG, MCS48_INPUT_IRQ),
151		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, rd322_r),
152		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, ram_r),
153		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, wdxt_gen_device, ram_w),
154		DEVCB_DEVICE_MEMBER(WD2010A_TAG, wd2010_device, read),
155		DEVCB_DEVICE_MEMBER(WD2010A_TAG, wd2010_device, write)
156		};
157
158
159	143	//-------------------------------------------------
160	144	// MACHINE_DRIVER( wdxt_gen )
161	145	//-------------------------------------------------
r29542	r29543
164	148	MCFG_CPU_ADD(WD1015_TAG, I8049, 5000000)
165	149	MCFG_CPU_IO_MAP(wd1015_io)
166	150
167		MCFG_WD11C00_17_ADD(WD11C00_17_TAG, 5000000, host_intf)
	151	MCFG_DEVICE_ADD(WD11C00_17_TAG, WD11C00_17, 5000000)
	152	MCFG_WD11C00_17_OUT_IRQ5_CB(WRITELINE(wdxt_gen_device, irq5_w))
	153	MCFG_WD11C00_17_OUT_DRQ3_CB(WRITELINE(wdxt_gen_device, drq3_w))
	154	MCFG_WD11C00_17_OUT_MR_CB(WRITELINE(wdxt_gen_device, mr_w))
	155	MCFG_WD11C00_17_OUT_RA3_CB(INPUTLINE(WD1015_TAG, MCS48_INPUT_IRQ))
	156	MCFG_WD11C00_17_IN_RD322_CB(READ8(wdxt_gen_device, rd322_r))
	157	MCFG_WD11C00_17_IN_RAMCS_CB(READ8(wdxt_gen_device, ram_r))
	158	MCFG_WD11C00_17_OUT_RAMWR_CB(WRITE8(wdxt_gen_device, ram_w))
	159	MCFG_WD11C00_17_IN_CS1010_CB(DEVREAD8(WD2010A_TAG, wd2010_device, read))
	160	MCFG_WD11C00_17_OUT_CS1010_CB(DEVWRITE8(WD2010A_TAG, wd2010_device, write))
168	161	MCFG_DEVICE_ADD(WD2010A_TAG, WD2010, 5000000)
169	162	MCFG_WD2010_OUT_BCR_CB(DEVWRITELINE(WD11C00_17_TAG, wd11c00_17_device, clct_w))
170	163	MCFG_WD2010_IN_BCS_CB(DEVREAD8(WD11C00_17_TAG, wd11c00_17_device, read))

branches/new_menus/src/emu/bus/isa/ne2000.c
r29542	r29543
1	1	#include "emu.h"
2	2	#include "ne2000.h"
3	3
4		static const dp8390_interface ne2000_dp8390_interface = {
5		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ne2000_device, ne2000_irq_w),
6		DEVCB_NULL,
7		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, ne2000_device, ne2000_mem_read),
8		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, ne2000_device, ne2000_mem_write)
9		};
10	4
11	5	static MACHINE_CONFIG_FRAGMENT(ne2000_config)
12		MCFG_DP8390D_ADD("dp8390d", ne2000_dp8390_interface)
	6	MCFG_DEVICE_ADD("dp8390d", DP8390D, 0)
	7	MCFG_DP8390D_IRQ_CB(WRITELINE(ne2000_device, ne2000_irq_w))
	8	MCFG_DP8390D_MEM_READ_CB(READ8(ne2000_device, ne2000_mem_read))
	9	MCFG_DP8390D_MEM_WRITE_CB(WRITE8(ne2000_device, ne2000_mem_write))
13	10	MACHINE_CONFIG_END
14	11
15	12	const device_type NE2000 = &device_creator<ne2000_device>;

branches/new_menus/src/emu/bus/isa/3c503.c
r29542	r29543
3	3
4	4	#define SADDR 0xcc000
5	5
6		static const dp8390_interface el2_3c503_dp8390_interface = {
7		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, el2_3c503_device, el2_3c503_irq_w),
8		DEVCB_NULL,
9		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, el2_3c503_device, el2_3c503_mem_read),
10		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, el2_3c503_device, el2_3c503_mem_write)
11		};
12
13	6	static MACHINE_CONFIG_FRAGMENT(el2_3c503_config)
14		MCFG_DP8390D_ADD("dp8390d", el2_3c503_dp8390_interface)
	7	MCFG_DEVICE_ADD("dp8390d", DP8390D, 0)
	8	MCFG_DP8390D_IRQ_CB(WRITELINE(el2_3c503_device, el2_3c503_irq_w))
	9	MCFG_DP8390D_MEM_READ_CB(READ8(el2_3c503_device, el2_3c503_mem_read))
	10	MCFG_DP8390D_MEM_WRITE_CB(WRITE8(el2_3c503_device, el2_3c503_mem_write))
15	11	MACHINE_CONFIG_END
16	12
17	13	const device_type EL2_3C503 = &device_creator<el2_3c503_device>;

branches/new_menus/src/emu/bus/isa/gus.c
r29542	r29543
85	85	{
86	86	if(data & 0x80)
87	87	{
88		m_timer1_irq_func(0);
89		m_timer2_irq_func(0);
	88	m_timer1_irq_handler(0);
	89	m_timer2_irq_handler(0);
90	90	m_adlib_status &= ~0xe0;
91	91	logerror("GUS: Timer flags reset\n");
92	92	}
r29542	r29543
122	122	if(m_timer_ctrl & 0x02)
123	123	{
124	124	m_adlib_status \|= 0x01;
125		m_nmi_func(1);
	125	m_nmi_handler(1);
126	126	logerror("GUS: 2X9 Timer triggered!\n");
127	127	}
128	128	}
r29542	r29543
209	209	m_adlib_status \|= 0xc0;
210	210	m_timer1_count = m_timer1_value;
211	211	if(m_timer_ctrl & 0x04)
212		m_timer1_irq_func(1);
	212	m_timer1_irq_handler(1);
213	213	}
214	214	m_timer1_count++;
215	215	}
r29542	r29543
222	222	m_adlib_status \|= 0xa0;
223	223	m_timer2_count = m_timer2_value;
224	224	if(m_timer_ctrl & 0x08)
225		m_timer2_irq_func(1);
	225	m_timer2_irq_handler(1);
226	226	}
227	227	m_timer2_count++;
228	228	}
229	229	break;
230	230	case DMA_TIMER:
231		m_drq1(1);
	231	m_drq1_handler(1);
232	232	break;
233	233	case VOL_RAMP_TIMER:
234	234	update_volume_ramps();
r29542	r29543
352	352	acia6850_device(mconfig, GGF1, "Gravis GF1", tag, owner, clock, "gf1", __FILE__),
353	353	device_sound_interface( mconfig, *this ),
354	354	m_txirq_handler(*this),
355		m_rxirq_handler(*this)
	355	m_rxirq_handler(*this),
	356	m_wave_irq_handler(*this),
	357	m_ramp_irq_handler(*this),
	358	m_timer1_irq_handler(*this),
	359	m_timer2_irq_handler(*this),
	360	m_sb_irq_handler(*this),
	361	m_dma_irq_handler(*this),
	362	m_drq1_handler(*this),
	363	m_drq2_handler(*this),
	364	m_nmi_handler(*this)
356	365	{
357	366	}
358	367
359		void gf1_device::device_config_complete()
360		{
361		// inherit a copy of the static data
362		const gf1_interface intf = reinterpret_cast<const gf1_interface >(static_config());
363		if (intf != NULL)
364		static_cast<gf1_interface >(this) = *intf;
365
366		// or initialize to defaults if none provided
367		else
368		{
369		memset(&wave_irq_cb, 0, sizeof(wave_irq_cb));
370		memset(&ramp_irq_cb, 0, sizeof(ramp_irq_cb));
371		memset(&timer1_irq_cb, 0, sizeof(timer1_irq_cb));
372		memset(&timer2_irq_cb, 0, sizeof(timer2_irq_cb));
373		memset(&sb_irq_cb, 0, sizeof(sb_irq_cb));
374		memset(&dma_irq_cb, 0, sizeof(dma_irq_cb));
375		memset(&drq1_cb, 0, sizeof(drq1_cb));
376		memset(&drq2_cb, 0, sizeof(drq2_cb));
377		memset(&nmi_cb, 0, sizeof(nmi_cb));
378		}
379		}
380
381	368	//-------------------------------------------------
382	369	// device_start - device-specific startup
383	370	//-------------------------------------------------
r29542	r29543
391	378
392	379	m_txirq_handler.resolve_safe();
393	380	m_rxirq_handler.resolve_safe();
	381	m_wave_irq_handler.resolve_safe();
	382	m_ramp_irq_handler.resolve_safe();
	383	m_timer1_irq_handler.resolve_safe();
	384	m_timer2_irq_handler.resolve_safe();
	385	m_sb_irq_handler.resolve_safe();
	386	m_dma_irq_handler.resolve_safe();
	387	m_drq1_handler.resolve_safe();
	388	m_drq2_handler.resolve_safe();
	389	m_nmi_handler.resolve_safe();
394	390
395	391	// TODO: make DRAM size configurable. Can be 256k, 512k, 768k, or 1024k
396	392	m_wave_ram.resize_and_clear(1024*1024);
r29542	r29543
405	401
406	402	save_item(NAME(m_wave_ram));
407	403
408		m_wave_irq_func.resolve(wave_irq_cb, *this);
409		m_ramp_irq_func.resolve(ramp_irq_cb, *this);
410		m_timer1_irq_func.resolve(timer1_irq_cb, *this);
411		m_timer2_irq_func.resolve(timer2_irq_cb, *this);
412		m_sb_irq_func.resolve(sb_irq_cb, *this);
413		m_dma_irq_func.resolve(dma_irq_cb, *this);
414		m_drq1.resolve(drq1_cb,*this);
415		m_drq2.resolve(drq2_cb,*this);
416		m_nmi_func.resolve(nmi_cb, *this);
417
418	404	m_voice_irq_current = 0;
419	405	m_voice_irq_ptr = 0;
420	406	m_dma_channel1 = 0;
r29542	r29543
499	485	{
500	486	ret = m_dma_dram_ctrl;
501	487	m_dma_dram_ctrl &= ~0x40;
502		m_dma_irq_func(0);
	488	m_dma_irq_handler(0);
503	489	return ret;
504	490	}
505	491	case 0x45: // Timer control
r29542	r29543
595	581	m_voice_irq_current++;
596	582	else
597	583	ret = 0xe0;
598		m_wave_irq_func(0);
599		m_ramp_irq_func(0);
	584	m_wave_irq_handler(0);
	585	m_ramp_irq_handler(0);
600	586	return ret;
601	587	}
602	588	break;
r29542	r29543
799	785	if(!(data & 0x02))
800	786	m_adlib_status &= ~0x01;
801	787	if(!(m_adlib_status & 0x19))
802		m_sb_irq_func(0);
	788	m_sb_irq_handler(0);
803	789	if(!(data & 0x04))
804	790	{
805	791	m_adlib_status &= ~0x40;
806		m_timer1_irq_func(0);
	792	m_timer1_irq_handler(0);
807	793	}
808	794	if(!(data & 0x08))
809	795	{
810	796	m_adlib_status &= ~0x20;
811		m_timer2_irq_func(0);
	797	m_timer2_irq_handler(0);
812	798	}
813	799	if((m_adlib_status & 0x60) != 0)
814	800	m_adlib_status &= ~0x80;
r29542	r29543
1044	1030	break;
1045	1031	case 0x05:
1046	1032	m_statread = 0;
1047		//m_other_irq_func(0);
	1033	//m_other_irq_handler(0);
1048	1034	break;
1049	1035	case 0x06:
1050	1036	// TODO: Jumper register (joy/MIDI enable)
r29542	r29543
1093	1079	if(m_reg_ctrl & 0x80)
1094	1080	{
1095	1081	m_statread \|= 0x80;
1096		m_nmi_func(1);
	1082	m_nmi_handler(1);
1097	1083	}
1098	1084	return m_sb_data_2xe;
1099	1085	}
r29542	r29543
1108	1094	if(m_timer_ctrl & 0x20)
1109	1095	{
1110	1096	m_adlib_status \|= 0x10;
1111		m_nmi_func(1);
	1097	m_nmi_handler(1);
1112	1098	logerror("GUS: SB 0x2XC IRQ active\n");
1113	1099	}
1114	1100	break;
r29542	r29543
1128	1114	if(m_timer_ctrl & 0x20)
1129	1115	{
1130	1116	m_adlib_status \|= 0x08;
1131		m_nmi_func(1);
	1117	m_nmi_handler(1);
1132	1118	logerror("GUS: SB 0x2X6 IRQ active\n");
1133	1119	}
1134	1120	}
r29542	r29543
1153	1139	{
1154	1140	m_irq_source = 0xe0 \| (voice & 0x1f);
1155	1141	m_irq_source &= ~0x80;
1156		m_wave_irq_func(1);
	1142	m_wave_irq_handler(1);
1157	1143	m_voice_irq_fifo[m_voice_irq_ptr % 32] = m_irq_source;
1158	1144	m_voice_irq_ptr++;
1159	1145	m_voice[voice].voice_ctrl \|= 0x80;
r29542	r29543
1162	1148	{
1163	1149	m_irq_source = 0xe0 \| (voice & 0x1f);
1164	1150	m_irq_source &= ~0x40;
1165		m_ramp_irq_func(1);
	1151	m_ramp_irq_handler(1);
1166	1152	m_voice_irq_fifo[m_voice_irq_ptr % 32] = m_irq_source;
1167	1153	m_voice_irq_ptr++;
1168	1154	}
r29542	r29543
1173	1159	if(source & IRQ_WAVETABLE)
1174	1160	{
1175	1161	m_irq_source \|= 0x80;
1176		m_wave_irq_func(0);
	1162	m_wave_irq_handler(0);
1177	1163	}
1178	1164	if(source & IRQ_VOLUME_RAMP)
1179	1165	{
1180	1166	m_irq_source \|= 0x40;
1181		m_ramp_irq_func(0);
	1167	m_ramp_irq_handler(0);
1182	1168	}
1183	1169	}
1184	1170
r29542	r29543
1204	1190	}
1205	1191	m_wave_ram[m_dma_current & 0xfffff] = data;
1206	1192	m_dma_current++;
1207		m_drq1(0);
	1193	m_drq1_handler(0);
1208	1194	}
1209	1195
1210	1196	void gf1_device::eop_w(int state)
r29542	r29543
1212	1198	if(state == ASSERT_LINE) {
1213	1199	// end of transfer
1214	1200	m_dmatimer->reset();
1215		//m_drq1(0);
	1201	//m_drq1_handler(0);
1216	1202	if(m_dma_dram_ctrl & 0x20)
1217	1203	{
1218	1204	m_dma_dram_ctrl \|= 0x40;
1219		m_dma_irq_func(1);
	1205	m_dma_irq_handler(1);
1220	1206	}
1221	1207	logerror("GUS: End of transfer. (%05x)\n",m_dma_current);
1222	1208	}
r29542	r29543
1225	1211
1226	1212	/* 16-bit ISA card device implementation */
1227	1213
1228		static const gf1_interface gus_gf1_config =
1229		{
1230		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER,isa16_gus_device,wavetable_irq),
1231		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER,isa16_gus_device,volumeramp_irq),
1232		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER,isa16_gus_device,timer1_irq),
1233		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER,isa16_gus_device,timer2_irq),
1234		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER,isa16_gus_device,sb_irq),
1235		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER,isa16_gus_device,dma_irq),
1236		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER,isa16_gus_device,drq1_w),
1237		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER,isa16_gus_device,drq2_w),
1238		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER,isa16_gus_device,nmi_w)
1239		};
1240
1241	1214	static MACHINE_CONFIG_FRAGMENT( gus_config )
1242	1215	MCFG_SPEAKER_STANDARD_STEREO("lspeaker","rspeaker")
1243	1216	MCFG_SOUND_ADD("gf1",GGF1,GF1_CLOCK)
1244		MCFG_SOUND_CONFIG(gus_gf1_config)
1245	1217	MCFG_SOUND_ROUTE(0,"lspeaker",0.50)
1246	1218	MCFG_SOUND_ROUTE(1,"rspeaker",0.50)
1247	1219
1248	1220	MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("mdout", midi_port_device, write_txd))
1249	1221	MCFG_GF1_TXIRQ_HANDLER(WRITELINE(isa16_gus_device, midi_txirq))
1250	1222	MCFG_GF1_RXIRQ_HANDLER(WRITELINE(isa16_gus_device, midi_txirq))
	1223	MCFG_GF1_WAVE_IRQ_HANDLER(WRITELINE(isa16_gus_device, wavetable_irq))
	1224	MCFG_GF1_RAMP_IRQ_HANDLER(WRITELINE(isa16_gus_device, volumeramp_irq))
	1225	MCFG_GF1_TIMER1_IRQ_HANDLER(WRITELINE(isa16_gus_device, timer1_irq))
	1226	MCFG_GF1_TIMER2_IRQ_HANDLER(WRITELINE(isa16_gus_device, timer2_irq))
	1227	MCFG_GF1_SB_IRQ_HANDLER(WRITELINE(isa16_gus_device, sb_irq))
	1228	MCFG_GF1_DMA_IRQ_HANDLER(WRITELINE(isa16_gus_device, dma_irq))
	1229	MCFG_GF1_DRQ1_HANDLER(WRITELINE(isa16_gus_device, drq1_w))
	1230	MCFG_GF1_DRQ2_HANDLER(WRITELINE(isa16_gus_device, drq2_w))
	1231	MCFG_GF1_NMI_HANDLER(WRITELINE(isa16_gus_device, nmi_w))
1251	1232
1252	1233	MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin")
1253	1234	MCFG_MIDI_RX_HANDLER(DEVWRITELINE("gf1", acia6850_device, write_rxd))

branches/new_menus/src/emu/bus/isa/gus.h
r29542	r29543
50	50	#define MCFG_GF1_RXIRQ_HANDLER(_devcb) \
51	51	devcb = &gf1_device::set_rxirq_handler(*device, DEVCB2_##_devcb);
52	52
	53	#define MCFG_GF1_WAVE_IRQ_HANDLER(_devcb) \
	54	devcb = &gf1_device::set_wave_irq_handler(*device, DEVCB2_##_devcb);
	55
	56	#define MCFG_GF1_RAMP_IRQ_HANDLER(_devcb) \
	57	devcb = &gf1_device::set_ramp_irq_handler(*device, DEVCB2_##_devcb);
	58
	59	#define MCFG_GF1_TIMER1_IRQ_HANDLER(_devcb) \
	60	devcb = &gf1_device::set_timer1_irq_handler(*device, DEVCB2_##_devcb);
	61
	62	#define MCFG_GF1_TIMER2_IRQ_HANDLER(_devcb) \
	63	devcb = &gf1_device::set_timer2_irq_handler(*device, DEVCB2_##_devcb);
	64
	65	#define MCFG_GF1_SB_IRQ_HANDLER(_devcb) \
	66	devcb = &gf1_device::set_sb_irq_handler(*device, DEVCB2_##_devcb);
	67
	68	#define MCFG_GF1_DMA_IRQ_HANDLER(_devcb) \
	69	devcb = &gf1_device::set_dma_irq_handler(*device, DEVCB2_##_devcb);
	70
	71	#define MCFG_GF1_DRQ1_HANDLER(_devcb) \
	72	devcb = &gf1_device::set_drq1_handler(*device, DEVCB2_##_devcb);
	73
	74	#define MCFG_GF1_DRQ2_HANDLER(_devcb) \
	75	devcb = &gf1_device::set_drq2_handler(*device, DEVCB2_##_devcb);
	76
	77	#define MCFG_GF1_NMI_HANDLER(_devcb) \
	78	devcb = &gf1_device::set_nmi_handler(*device, DEVCB2_##_devcb);
	79
53	80	//**************************************************************************
54	81	// TYPE DEFINITIONS
55	82	//**************************************************************************
r29542	r29543
86	113	INT16 sample; // current sample data
87	114	};
88	115
89		struct gf1_interface
90		{
91		devcb_write_line wave_irq_cb;
92		devcb_write_line ramp_irq_cb;
93		devcb_write_line timer1_irq_cb;
94		devcb_write_line timer2_irq_cb;
95		devcb_write_line sb_irq_cb;
96		devcb_write_line dma_irq_cb;
97		devcb_write_line drq1_cb;
98		devcb_write_line drq2_cb;
99		devcb_write_line nmi_cb;
100		};
101
102	116	class gf1_device :
103	117	public acia6850_device,
104		public device_sound_interface,
105		public gf1_interface
	118	public device_sound_interface
106	119	{
107	120	public:
108	121	// construction/destruction
r29542	r29543
110	123
111	124	template<class _Object> static devcb2_base &set_txirq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_txirq_handler.set_callback(object); }
112	125	template<class _Object> static devcb2_base &set_rxirq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_rxirq_handler.set_callback(object); }
	126	template<class _Object> static devcb2_base &set_wave_irq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_wave_irq_handler.set_callback(object); }
	127	template<class _Object> static devcb2_base &set_ramp_irq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_ramp_irq_handler.set_callback(object); }
	128	template<class _Object> static devcb2_base &set_timer1_irq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_timer1_irq_handler.set_callback(object); }
	129	template<class _Object> static devcb2_base &set_timer2_irq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_timer2_irq_handler.set_callback(object); }
	130	template<class _Object> static devcb2_base &set_sb_irq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_sb_irq_handler.set_callback(object); }
	131	template<class _Object> static devcb2_base &set_dma_irq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_dma_irq_handler.set_callback(object); }
	132	template<class _Object> static devcb2_base &set_drq1_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_drq1_handler.set_callback(object); }
	133	template<class _Object> static devcb2_base &set_drq2_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_drq2_handler.set_callback(object); }
	134	template<class _Object> static devcb2_base &set_nmi_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_nmi_handler.set_callback(object); }
113	135
114	136	// current IRQ/DMA channel getters
115	137	UINT8 gf1_irq() { if(m_gf1_irq != 0) return m_gf1_irq; else return m_midi_irq; } // workaround for win95 loading dumb values
r29542	r29543
143	165	// optional information overrides
144	166	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
145	167	virtual void sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples);
146		virtual void device_config_complete();
147	168
148	169	// voice-specific registers
149	170	gus_voice m_voice[32];
r29542	r29543
178	199
179	200	virtual void update_irq();
180	201
181		devcb_resolved_write_line m_wave_irq_func;
182		devcb_resolved_write_line m_ramp_irq_func;
183		devcb_resolved_write_line m_timer1_irq_func;
184		devcb_resolved_write_line m_timer2_irq_func;
185		devcb_resolved_write_line m_sb_irq_func;
186		devcb_resolved_write_line m_dma_irq_func;
187		devcb_resolved_write_line m_drq1;
188		devcb_resolved_write_line m_drq2;
189		devcb_resolved_write_line m_nmi_func;
190
191	202	private:
192	203	// internal state
193	204	sound_stream* m_stream;
r29542	r29543
238	249
239	250	devcb2_write_line m_txirq_handler;
240	251	devcb2_write_line m_rxirq_handler;
	252	devcb2_write_line m_wave_irq_handler;
	253	devcb2_write_line m_ramp_irq_handler;
	254	devcb2_write_line m_timer1_irq_handler;
	255	devcb2_write_line m_timer2_irq_handler;
	256	devcb2_write_line m_sb_irq_handler;
	257	devcb2_write_line m_dma_irq_handler;
	258	devcb2_write_line m_drq1_handler;
	259	devcb2_write_line m_drq2_handler;
	260	devcb2_write_line m_nmi_handler;
241	261	};
242	262
243	263	class isa16_gus_device :

branches/new_menus/src/emu/bus/isa/ega.c
r29542	r29543
449	449	#define EGA_SCREEN_NAME "ega_screen"
450	450	#define EGA_CRTC_NAME "crtc_ega_ega"
451	451
	452
	453	#define EGA_MODE_GRAPHICS 1
	454	#define EGA_MODE_TEXT 2
	455
	456
452	457	/*
453	458	Prototypes
454	459	*/
455		static CRTC_EGA_UPDATE_ROW( ega_update_row );
456	460
457		static CRTC_EGA_INTERFACE( crtc_ega_ega_intf )
458		{
459		8, /* numbers of pixels per video memory address */
460		NULL, /* begin_update */
461		ega_update_row, /* update_row */
462		NULL, /* end_update */
463		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, isa8_ega_device, de_changed), /* on_de_chaged */
464		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, isa8_ega_device, hsync_changed), /* on_hsync_changed */
465		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, isa8_ega_device, vsync_changed), /* on vsync_changed */
466		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, isa8_ega_device, vblank_changed) /* on_vblank_changed */
467		};
468
469
470	461	MACHINE_CONFIG_FRAGMENT( pcvideo_ega )
471	462	MCFG_SCREEN_ADD(EGA_SCREEN_NAME, RASTER)
472	463	MCFG_SCREEN_RAW_PARAMS(16257000,912,0,640,262,0,200)
r29542	r29543
474	465	MCFG_SCREEN_PALETTE("palette")
475	466
476	467	MCFG_PALETTE_ADD( "palette", 64 )
477		MCFG_CRTC_EGA_ADD(EGA_CRTC_NAME, 16257000/8, crtc_ega_ega_intf)
	468
	469	MCFG_DEVICE_ADD(EGA_CRTC_NAME, CRTC_EGA, 16257000/8)
478	470	MCFG_CRTC_EGA_SET_SCREEN(EGA_SCREEN_NAME)
	471	MCFG_CRTC_EGA_HPIXELS_PER_COLUMN(8)
	472	MCFG_CRTC_EGA_ROW_UPDATE_CB(isa8_ega_device, ega_update_row)
	473	MCFG_CRTC_EGA_RES_OUT_DE_CB(WRITELINE(isa8_ega_device, de_changed))
	474	MCFG_CRTC_EGA_RES_OUT_HSYNC_CB(WRITELINE(isa8_ega_device, hsync_changed))
	475	MCFG_CRTC_EGA_RES_OUT_VSYNC_CB(WRITELINE(isa8_ega_device, vsync_changed))
	476	MCFG_CRTC_EGA_RES_OUT_VBLANK_CB(WRITELINE(isa8_ega_device, vblank_changed))
479	477	MACHINE_CONFIG_END
480	478
481	479	ROM_START( ega )
r29542	r29543
664	662
665	663	install_banks();
666	664
667		m_update_row = NULL;
668	665	m_misc_output = 0;
669	666	m_attribute.index_write = 1;
670	667
r29542	r29543
686	683	m_attribute.data[14] = 0x3E;
687	684	m_attribute.data[15] = 0x3F;
688	685
	686	m_video_mode = 0;
689	687	}
690	688
691	689	void isa8_ega_device::install_banks()
r29542	r29543
746	744	}
747	745	}
748	746
749		~~static~~ CRTC_EGA_UPDATE~~_ROW~~( ega_update_row )
	747	CRTC_EGA_ROW_UPDATE( isa8_ega_device::ega_update_row )
750	748	{
751		isa8_ega_device ega = dynamic_cast<isa8_ega_device>(device->owner());
752		if ( ega->m_update_row )
753		{
754		ega->m_update_row( device, bitmap, cliprect, ma, ra, y, x_count, cursor_x, param );
755		}
	749	if (m_video_mode == EGA_MODE_GRAPHICS)
	750	pc_ega_graphics(bitmap, cliprect, ma, ra, y, x_count, cursor_x);
	751	else if (m_video_mode == EGA_MODE_TEXT)
	752	pc_ega_text(bitmap, cliprect, ma, ra, y, x_count, cursor_x);
756	753	}
757	754
758	755
r29542	r29543
784	781	}
785	782
786	783
787		~~static~~ CRTC_EGA_UPDATE~~_ROW~~( pc_ega_graphics )
	784	CRTC_EGA_ROW_UPDATE( isa8_ega_device::pc_ega_graphics )
788	785	{
789		isa8_ega_device ega = dynamic_cast<isa8_ega_device>(device->owner());
790	786	UINT16 *p = &bitmap.pix16(y);
791	787
792	788	// logerror( "pc_ega_graphics: y = %d, x_count = %d, ma = %d, ra = %d\n", y, x_count, ma, ra );
793	789
794		if ( ~~ega->~~m_graphics_controller.data[5] & 0x10 )
	790	if ( m_graphics_controller.data[5] & 0x10 )
795	791	{
796	792	// Odd/Even mode (CGA compatible)
797	793
798	794	for ( int i = 0; i < x_count; i++ )
799	795	{
800	796	UINT16 offset = ( ( ma + i ) & 0x1fff ) \| ( ( y & 1 ) << 12 );
801		UINT8 data = ~~ega->~~m_plane[0][offset];
	797	UINT8 data = m_plane[0][offset];
802	798
803		*p = ega->m_attribute.data[ ( data >> 6 ) ]; p++;
804		*p = ega->m_attribute.data[ ( data >> 4 ) & 0x03 ]; p++;
805		*p = ega->m_attribute.data[ ( data >> 2 ) & 0x03 ]; p++;
806		*p = ega->m_attribute.data[ data & 0x03 ]; p++;
	799	*p = m_attribute.data[ ( data >> 6 ) ]; p++;
	800	*p = m_attribute.data[ ( data >> 4 ) & 0x03 ]; p++;
	801	*p = m_attribute.data[ ( data >> 2 ) & 0x03 ]; p++;
	802	*p = m_attribute.data[ data & 0x03 ]; p++;
807	803
808		data = ~~ega->~~m_plane[1][offset];
	804	data = m_plane[1][offset];
809	805
810		*p = ega->m_attribute.data[ ( data >> 6 ) ]; p++;
811		*p = ega->m_attribute.data[ ( data >> 4 ) & 0x03 ]; p++;
812		*p = ega->m_attribute.data[ ( data >> 2 ) & 0x03 ]; p++;
813		*p = ega->m_attribute.data[ data & 0x03 ]; p++;
	806	*p = m_attribute.data[ ( data >> 6 ) ]; p++;
	807	*p = m_attribute.data[ ( data >> 4 ) & 0x03 ]; p++;
	808	*p = m_attribute.data[ ( data >> 2 ) & 0x03 ]; p++;
	809	*p = m_attribute.data[ data & 0x03 ]; p++;
814	810	}
815	811	}
816	812	else
817	813	{
818	814	// EGA mode
819	815
820		UINT8 mask = ~~ega->~~m_attribute.data[0x12] & 0x0f;
	816	UINT8 mask = m_attribute.data[0x12] & 0x0f;
821	817
822	818	for ( int i = 0; i < x_count; i++ )
823	819	{
824	820	UINT16 offset = ma + i;
825		UINT16 data0 = ega->m_plane[0][offset];
826		UINT16 data1 = ega->m_plane[1][offset] << 1;
827		UINT16 data2 = ega->m_plane[2][offset] << 2;
828		UINT16 data3 = ega->m_plane[3][offset] << 3;
	821	UINT16 data0 = m_plane[0][offset];
	822	UINT16 data1 = m_plane[1][offset] << 1;
	823	UINT16 data2 = m_plane[2][offset] << 2;
	824	UINT16 data3 = m_plane[3][offset] << 3;
829	825
830	826	for ( int j = 7; j >= 0; j-- )
831	827	{
r29542	r29543
833	829
834	830	col &= mask;
835	831
836		p[j] = ~~ega->~~m_attribute.data[col];
	832	p[j] = m_attribute.data[col];
837	833
838	834	data0 >>= 1;
839	835	data1 >>= 1;
r29542	r29543
846	842	}
847	843
848	844
849		~~static~~ CRTC_EGA_UPDATE~~_ROW~~( pc_ega_text )
	845	CRTC_EGA_ROW_UPDATE( isa8_ega_device::pc_ega_text )
850	846	{
851		isa8_ega_device ega = dynamic_cast<isa8_ega_device>(device->owner());
852	847	UINT16 *p = &bitmap.pix16(y);
853	848	int i;
854	849
r29542	r29543
857	852	for ( i = 0; i < x_count; i++ )
858	853	{
859	854	UINT16 offset = ma + i;
860		UINT8 chr = ega->m_plane[0][ offset ];
861		UINT8 attr = ega->m_plane[1][ offset ];
	855	UINT8 chr = m_plane[0][ offset ];
	856	UINT8 attr = m_plane[1][ offset ];
862	857	UINT8 data = 0;
863		UINT16 fg = ega->m_attribute.data[ attr & 0x07 ];
864		UINT16 bg = ega->m_attribute.data[ ( attr >> 4 ) & 0x07 ];
	858	UINT16 fg = m_attribute.data[ attr & 0x07 ];
	859	UINT16 bg = m_attribute.data[ ( attr >> 4 ) & 0x07 ];
865	860
866	861	/* If character set A and B are equal attribute bit 3 is used as intensity */
867		if ( ~~ega->~~m_charA == ~~ega->~~m_charB )
	862	if ( m_charA == m_charB )
868	863	{
869	864	/* intensity selector */
870		data = ~~ega->~~m_charB[ chr * 32 + ra ];
	865	data = m_charB[ chr * 32 + ra ];
871	866	fg += ( attr & 0x08 ) ? 0x38 : 0x00;
872	867	}
873	868	else
874	869	{
875	870	/* character set selector */
876		data = ( attr & 0x08 ) ? ~~ega->~~m_charA[ chr * 32 + ra ] : ~~ega->~~m_charB[ chr * 32 + ra ];
	871	data = ( attr & 0x08 ) ? m_charA[ chr * 32 + ra ] : m_charB[ chr * 32 + ra ];
877	872	}
878	873
879	874	if ( i == cursor_x )
880	875	{
881		if ( ~~ega->~~m_frame_cnt & 0x08 )
	876	if ( m_frame_cnt & 0x08 )
882	877	{
883	878	data = 0xFF;
884	879	}
r29542	r29543
886	881	else
887	882	{
888	883	/* Check for blinking */
889		if ( ( ~~ega->~~m_attribute.data[0x10] & 0x08 ) && ( attr & 0x80 ) && ( ~~ega->~~m_frame_cnt & 0x10 ) )
	884	if ( ( m_attribute.data[0x10] & 0x08 ) && ( attr & 0x80 ) && ( m_frame_cnt & 0x10 ) )
890	885	{
891	886	data = 0x00;
892	887	}
r29542	r29543
908	903	{
909	904	int clock, pixels;
910	905
911		m_update_row = ~~NULL~~;
	906	m_video_mode = 0;
912	907
913	908	/* Check for graphics mode */
914	909	if ( ( m_attribute.data[0x10] & 0x01 ) &&
r29542	r29543
920	915	logerror("change_mode(): Switch to graphics mode\n");
921	916	}
922	917
923		m_update_row = pc_~~ega~~_~~graphics~~;
	918	m_video_mode = EGA_MODE_GRAPHICS;
924	919	}
925	920
926	921	/* Check for text mode */
r29542	r29543
933	928	logerror("chnage_mode(): Switching to text mode\n");
934	929	}
935	930
936		m_update_row = pc_~~ega~~_~~text~~;
	931	m_video_mode = EGA_MODE_TEXT;
937	932
938	933	/* Set character maps */
939	934	if ( m_sequencer.data[0x04] & 0x02 )
r29542	r29543
959	954	m_crtc_ega->set_clock( clock / pixels );
960	955	m_crtc_ega->set_hpixels_per_column( pixels );
961	956
962		if ( ! m_update_row )
963		logerror("unknown video mode\n");
	957	if (!m_video_mode)
	958	logerror("unknown video mode\n");
964	959	}
965	960
966	961

branches/new_menus/src/emu/bus/isa/ega.h
r29542	r29543
40	40	DECLARE_WRITE_LINE_MEMBER(vsync_changed);
41	41	DECLARE_WRITE_LINE_MEMBER(vblank_changed);
42	42
	43	CRTC_EGA_ROW_UPDATE(ega_update_row);
	44	CRTC_EGA_ROW_UPDATE(pc_ega_graphics);
	45	CRTC_EGA_ROW_UPDATE(pc_ega_text);
	46
43	47	protected:
44	48	// device-level overrides
45	49	virtual void device_start();
r29542	r29543
55	59	DECLARE_WRITE8_MEMBER(pc_ega8_3X0_w);
56	60	DECLARE_READ8_MEMBER(pc_ega8_3X0_r);
57	61
58		crtc_ega_update_row_func m_update_row;
59
60	62	/* Video memory and related variables */
61	63	memory_region *m_vram;
62	64	UINT8 *m_plane[4];
r29542	r29543
96	98	UINT8 m_vsync;
97	99	UINT8 m_vblank;
98	100	UINT8 m_display_enable;
	101	int m_video_mode;
99	102	required_device<palette_device> m_palette;
100	103	};
101	104

branches/new_menus/src/emu/bus/isa/ne1000.c
r29542	r29543
1	1	#include "emu.h"
2	2	#include "ne1000.h"
3	3
4		static const dp8390_interface ne1000_dp8390_interface = {
5		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ne1000_device, ne1000_irq_w),
6		DEVCB_NULL,
7		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, ne1000_device, ne1000_mem_read),
8		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, ne1000_device, ne1000_mem_write)
9		};
10
11	4	static MACHINE_CONFIG_FRAGMENT(ne1000_config)
12		MCFG_DP8390D_ADD("dp8390d", ne1000_dp8390_interface)
	5	MCFG_DEVICE_ADD("dp8390d", DP8390D, 0)
	6	MCFG_DP8390D_IRQ_CB(WRITELINE(ne1000_device, ne1000_irq_w))
	7	MCFG_DP8390D_MEM_READ_CB(READ8(ne1000_device, ne1000_mem_read))
	8	MCFG_DP8390D_MEM_WRITE_CB(WRITE8(ne1000_device, ne1000_mem_write))
13	9	MACHINE_CONFIG_END
14	10
15	11	const device_type NE1000 = &device_creator<ne1000_device>;

branches/new_menus/src/emu/bus/nubus/nubus_asntmc3b.c
r29542	r29543
16	16	#define MAC8390_ROM_REGION "asntm3b_rom"
17	17	#define MAC8390_839X "dp83902"
18	18
19		static const dp8390_interface dp8390_interface =
20		{
21		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, nubus_mac8390_device, dp_irq_w),
22		DEVCB_NULL,
23		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, nubus_mac8390_device, dp_mem_read),
24		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, nubus_mac8390_device, dp_mem_write)
25		};
26	19
27	20	MACHINE_CONFIG_FRAGMENT( asntm3b )
28		MCFG_DP8390D_ADD(MAC8390_839X, dp8390_interface)
	21	MCFG_DEVICE_ADD(MAC8390_839X, DP8390D, 0)
	22	MCFG_DP8390D_IRQ_CB(WRITELINE(nubus_mac8390_device, dp_irq_w))
	23	MCFG_DP8390D_MEM_READ_CB(READ8(nubus_mac8390_device, dp_mem_read))
	24	MCFG_DP8390D_MEM_WRITE_CB(WRITE8(nubus_mac8390_device, dp_mem_write))
29	25	MACHINE_CONFIG_END
30	26
31	27	ROM_START( asntm3nb )

branches/new_menus/src/emu/bus/vip/vp620.c
r29542	r29543
34	34	m_keystb = ASSERT_LINE;
35	35	}
36	36
37		static ASCII_KEYBOARD_INTERFACE( kb_intf )
38		{
39		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, vp620_device, kb_w)
40		};
41
42
43	37	//-------------------------------------------------
44	38	// MACHINE_CONFIG_FRAGMENT( vp620 )
45	39	//-------------------------------------------------
46	40
47	41	static MACHINE_CONFIG_FRAGMENT( vp620 )
48		MCFG_ASCII_KEYBOARD_ADD("keyboard", kb_intf)
	42	MCFG_DEVICE_ADD("keyboard", GENERIC_KEYBOARD, 0)
	43	MCFG_GENERIC_KEYBOARD_CB(WRITE8(vp620_device, kb_w))
49	44	MACHINE_CONFIG_END
50	45
51	46

branches/new_menus/src/emu/bus/x68k/x68k_neptunex.c
r29542	r29543
13	13
14	14	const device_type X68K_NEPTUNEX = &device_creator<x68k_neptune_device>;
15	15
16		static const dp8390_interface neptune_dp8390_interface = {
17		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, x68k_neptune_device, x68k_neptune_irq_w),
18		DEVCB_NULL,
19		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, x68k_neptune_device, x68k_neptune_mem_read),
20		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, x68k_neptune_device, x68k_neptune_mem_write)
21		};
22
23
24	16	// device machine config
25	17	static MACHINE_CONFIG_FRAGMENT( x68k_neptunex )
26		MCFG_DP8390D_ADD("dp8390d", neptune_dp8390_interface)
	18	MCFG_DEVICE_ADD("dp8390d", DP8390D, 0)
	19	MCFG_DP8390D_IRQ_CB(WRITELINE(x68k_neptune_device, x68k_neptune_irq_w))
	20	MCFG_DP8390D_MEM_READ_CB(READ8(x68k_neptune_device, x68k_neptune_mem_read))
	21	MCFG_DP8390D_MEM_WRITE_CB(WRITE8(x68k_neptune_device, x68k_neptune_mem_write))
27	22	MACHINE_CONFIG_END
28	23
29	24	machine_config_constructor x68k_neptune_device::device_mconfig_additions() const
r29542	r29543
85	80	m_dp8390->dp8390_reset(CLEAR_LINE);
86	81	return 0;
87	82	default:
88		logerror("ne~~2000~~: invalid register read %02X\n", offset);
	83	logerror("x68k_neptune: invalid register read %02X\n", offset);
89	84	}
90	85	return 0;
91	86	}
r29542	r29543
118	113	m_dp8390->dp8390_reset(ASSERT_LINE);
119	114	return;
120	115	default:
121		logerror("ne~~2000~~: invalid register write %02X\n", offset);
	116	logerror("x68k_neptune: invalid register write %02X\n", offset);
122	117	}
123	118	return;
124	119	}
r29542	r29543
128	123	if(offset < 32) return m_prom[offset>>1];
129	124	if((offset < (161024)) \|\| (offset >= (321024)))
130	125	{
131		logerror("ne~~2000~~: invalid memory read %04X\n", offset);
	126	logerror("x68k_neptune: invalid memory read %04X\n", offset);
132	127	return 0xff;
133	128	}
134	129	return m_board_ram[offset - (16*1024)];
r29542	r29543
138	133	{
139	134	if((offset < (161024)) \|\| (offset >= (321024)))
140	135	{
141		logerror("ne~~2000~~: invalid memory write %04X\n", offset);
	136	logerror("x68k_neptune: invalid memory write %04X\n", offset);
142	137	return;
143	138	}
144	139	m_board_ram[offset - (16*1024)] = data;

branches/new_menus/src/emu/ui/viewgfx.c
r29542	r29543
621	621	break;
622	622	xcells--;
623	623	}
	624	info.columns[set] = xcells;
624	625
625	626	// worst case, we need a pixel scale of 1
626	627	pixelscale = MAX(1, pixelscale);
r29542	r29543
770	771	// clamp within range
771	772	if (info.columns[set] < 2)
772	773	{ info.columns[set] = 2; state.bitmap_dirty = true; }
773		if (info.columns[set] > 32)
774		{ info.columns[set] = 32; state.bitmap_dirty = true; }
	774	if (info.columns[set] > 128)
	775	{ info.columns[set] = 128; state.bitmap_dirty = true; }
775	776
776	777	// handle rotation (R)
777	778	if (ui_input_pressed(machine, IPT_UI_ROTATE))

branches/new_menus/src/emu/machine/keyboard.c
r29542	r29543
8	8	Example of usage in a driver.
9	9
10	10	In MACHINE_CONFIG
11		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	11
	12	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	13	MCFG_GENERIC_KEYBOARD_CB(WRITE8(xxx_state, kbd_put))
12	14
13	15	In the code:
14	16
r29542	r29543
17	19	(code to capture the key as it is pressed)
18	20	}
19	21
20		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
21		{
22		DEVCB_DRIVER_MEMBER(xxx_state, kbd_put)
23		};
24
25	22	***************************************************************************/
26	23
27	24	#include "machine/keyboard.h"
r29542	r29543
41	38	m_io_kbd5(*this, "TERM_LINE5"),
42	39	m_io_kbd6(*this, "TERM_LINE6"),
43	40	m_io_kbd7(*this, "TERM_LINE7"),
44		m_io_kbdc(*this, "TERM_LINEC")
	41	m_io_kbdc(*this, "TERM_LINEC"),
	42	m_keyboard_cb(*this)
45	43	{
46	44	}
47	45
r29542	r29543
55	53	m_io_kbd5(*this, "TERM_LINE5"),
56	54	m_io_kbd6(*this, "TERM_LINE6"),
57	55	m_io_kbd7(*this, "TERM_LINE7"),
58		m_io_kbdc(*this, "TERM_LINEC")
	56	m_io_kbdc(*this, "TERM_LINEC"),
	57	m_keyboard_cb(*this)
59	58	{
60	59	}
61	60
r29542	r29543
209	208
210	209	void generic_keyboard_device::device_start()
211	210	{
212		m_keyboard_~~fun~~c.resolve(m_~~keyboard_cb, *thi~~s);
	211	m_keyboard_cb.resolve_safe();
213	212	m_timer = timer_alloc();
214	213	}
215	214
216		void generic_keyboard_device::device_config_complete()
217		{
218		const keyboard_interface intf = reinterpret_cast<const keyboard_interface >(static_config());
219		if(intf != NULL)
220		{
221		static_cast<keyboard_interface >(this) = *intf;
222		}
223		else
224		{
225		memset(&m_keyboard_cb, 0, sizeof(m_keyboard_cb));
226		}
227		}
228
229	215	void generic_keyboard_device::device_reset()
230	216	{
231	217	m_last_code = 0;

branches/new_menus/src/emu/machine/keyboard.h
r29542	r29543
4	4	#include "emu.h"
5	5
6	6	/***************************************************************************
7		TYPE DEFINITIONS
8		***************************************************************************/
9
10		struct keyboard_interface
11		{
12		devcb_write8 m_keyboard_cb;
13		};
14
15		#define ASCII_KEYBOARD_INTERFACE(name) const keyboard_interface (name) =
16
17		/***************************************************************************
18	7	DEVICE CONFIGURATION MACROS
19	8	***************************************************************************/
20	9
21		#define MCFG_ASCII_KEYBOARD_ADD(_tag, _intrf) \
22		MCFG_DEVICE_ADD(_tag, GENERIC_KEYBOARD, 0) \
23		MCFG_DEVICE_CONFIG(_intrf)
	10	#define MCFG_GENERIC_KEYBOARD_CB(_devcb) \
	11	devcb = &generic_keyboard_device::set_keyboard_callback(*device, DEVCB2_##_devcb);
24	12
25	13	/***************************************************************************
26	14	FUNCTION PROTOTYPES
r29542	r29543
28	16
29	17	INPUT_PORTS_EXTERN( generic_keyboard );
30	18
31		class generic_keyboard_device :
32		public device_t,
33		public keyboard_interface
	19	class generic_keyboard_device : public device_t
34	20	{
35	21	public:
36	22	generic_keyboard_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, const char shortname, const char *source);
37	23	generic_keyboard_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	24
	25	template<class _Object> static devcb2_base &set_keyboard_callback(device_t &device, _Object object) { return downcast<generic_keyboard_device &>(device).m_keyboard_cb.set_callback(object); }
38	26
39	27	virtual ioport_constructor device_input_ports() const;
40	28	virtual machine_config_constructor device_mconfig_additions() const;
r29542	r29543
52	40	virtual void device_start();
53	41	virtual void device_reset();
54	42	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
55		virtual void device_config_complete();
56		virtual void send_key(UINT8 code) { m_keyboard_func(0, code); }
	43	virtual void send_key(UINT8 code) { m_keyboard_cb((offs_t)0, code); }
57	44	emu_timer *m_timer;
58	45	private:
59	46	virtual UINT8 keyboard_handler(UINT8 last_code, UINT8 *scan_line);
r29542	r29543
61	48	UINT8 m_last_code;
62	49	UINT8 m_scan_line;
63	50
64		devcb_~~resolved_~~write8 m_keyboard_~~fun~~c;
	51	devcb2_write8 m_keyboard_cb;
65	52	};
66	53
67	54	extern const device_type GENERIC_KEYBOARD;

branches/new_menus/src/emu/machine/wd11c00_17.c
r29542	r29543
42	42	const device_type WD11C00_17 = &device_creator<wd11c00_17_device>;
43	43
44	44
45		//-------------------------------------------------
46		// device_config_complete - perform any
47		// operations now that the configuration is
48		// complete
49		//-------------------------------------------------
50
51		void wd11c00_17_device::device_config_complete()
52		{
53		// inherit a copy of the static data
54		const wd11c00_17_interface intf = reinterpret_cast<const wd11c00_17_interface >(static_config());
55		if (intf != NULL)
56		static_cast<wd11c00_17_interface >(this) = *intf;
57
58		// or initialize to defaults if none provided
59		else
60		{
61		memset(&m_out_irq5_cb, 0, sizeof(m_out_irq5_cb));
62		memset(&m_out_drq3_cb, 0, sizeof(m_out_drq3_cb));
63		memset(&m_out_mr_cb, 0, sizeof(m_out_mr_cb));
64		memset(&m_out_busy_cb, 0, sizeof(m_out_busy_cb));
65		memset(&m_out_req_cb, 0, sizeof(m_out_req_cb));
66		memset(&m_out_ra3_cb, 0, sizeof(m_out_ra3_cb));
67		memset(&m_in_rd322_cb, 0, sizeof(m_in_rd322_cb));
68		memset(&m_in_ramcs_cb, 0, sizeof(m_in_ramcs_cb));
69		memset(&m_out_ramwr_cb, 0, sizeof(m_out_ramwr_cb));
70		memset(&m_in_cs1010_cb, 0, sizeof(m_in_cs1010_cb));
71		memset(&m_out_cs1010_cb, 0, sizeof(m_out_cs1010_cb));
72		}
73		}
74
75
76
77	45	//**************************************************************************
78	46	// INLINE HELPERS
79	47	//**************************************************************************
r29542	r29543
93	61
94	62	if (m_ra3 != ra3)
95	63	{
96		m_out_ra3_~~fun~~c(ra3 ? ASSERT_LINE : CLEAR_LINE);
	64	m_out_ra3_cb(ra3 ? ASSERT_LINE : CLEAR_LINE);
97	65	m_ra3 = ra3;
98	66	}
99	67
r29542	r29543
101	69
102	70	if (m_irq5 != irq5)
103	71	{
104		m_out_irq5_~~fun~~c(irq5);
	72	m_out_irq5_cb(irq5);
105	73	m_irq5 = irq5;
106	74	}
107	75
r29542	r29543
109	77
110	78	if (m_drq3 != drq3)
111	79	{
112		m_out_drq3_~~fun~~c(drq3);
	80	m_out_drq3_cb(drq3);
113	81	m_drq3 = drq3;
114	82	}
115	83
r29542	r29543
117	85
118	86	if (m_busy != busy)
119	87	{
120		m_out_busy_~~fun~~c(busy);
	88	m_out_busy_cb(busy);
121	89	m_busy = busy;
122	90	}
123	91
r29542	r29543
125	93
126	94	if (m_req != req)
127	95	{
128		m_out_req_~~fun~~c(req);
	96	m_out_req_cb(req);
129	97	m_req = req;
130	98	}
131	99	}
r29542	r29543
152	120
153	121	if (m_status & STATUS_BUSY)
154	122	{
155		data = m_in_ramcs_~~fun~~c(m_ra & 0x7ff);
	123	data = m_in_ramcs_cb(m_ra & 0x7ff);
156	124
157	125	increment_address();
158	126	}
r29542	r29543
169	137	{
170	138	if (m_status & STATUS_BUSY)
171	139	{
172		m_out_ramwr_~~fun~~c(m_ra & 0x7ff, data);
	140	m_out_ramwr_cb(m_ra & 0x7ff, data);
173	141
174	142	increment_address();
175	143	}
r29542	r29543
182	150
183	151	inline void wd11c00_17_device::software_reset()
184	152	{
185		m_out_mr_func(ASSERT_LINE);
186		m_out_mr_func(CLEAR_LINE);
	153	m_out_mr_cb(ASSERT_LINE);
	154	m_out_mr_cb(CLEAR_LINE);
187	155
188	156	device_reset();
189	157	}
r29542	r29543
212	180
213	181	wd11c00_17_device::wd11c00_17_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
214	182	: device_t(mconfig, WD11C00_17, "Western Digital WD11C00-17", tag, owner, clock, "wd11c00_17", __FILE__),
	183	m_out_irq5_cb(*this),
	184	m_out_drq3_cb(*this),
	185	m_out_mr_cb(*this),
	186	m_out_busy_cb(*this),
	187	m_out_req_cb(*this),
	188	m_out_ra3_cb(*this),
	189	m_in_rd322_cb(*this),
	190	m_in_ramcs_cb(*this),
	191	m_out_ramwr_cb(*this),
	192	m_in_cs1010_cb(*this),
	193	m_out_cs1010_cb(*this),
215	194	m_status(0),
216	195	m_ra(0),
217	196	m_irq5(CLEAR_LINE),
r29542	r29543
230	209	void wd11c00_17_device::device_start()
231	210	{
232	211	// resolve callbacks
233		m_out_irq5_func.resolve(m_out_irq5_cb, *this);
234		m_out_drq3_func.resolve(m_out_drq3_cb, *this);
235		m_out_mr_func.resolve(m_out_mr_cb, *this);
236		m_out_busy_func.resolve(m_out_busy_cb, *this);
237		m_out_req_func.resolve(m_out_req_cb, *this);
238		m_out_ra3_func.resolve(m_out_ra3_cb, *this);
239		m_in_rd322_func.resolve(m_in_rd322_cb, *this);
240		m_in_ramcs_func.resolve(m_in_ramcs_cb, *this);
241		m_out_ramwr_func.resolve(m_out_ramwr_cb, *this);
242		m_in_cs1010_func.resolve(m_in_cs1010_cb, *this);
243		m_out_cs1010_func.resolve(m_out_cs1010_cb, *this);
	212	m_out_irq5_cb.resolve_safe();
	213	m_out_drq3_cb.resolve_safe();
	214	m_out_mr_cb.resolve_safe();
	215	m_out_busy_cb.resolve_safe();
	216	m_out_req_cb.resolve_safe();
	217	m_out_ra3_cb.resolve_safe();
	218	m_in_rd322_cb.resolve_safe(0);
	219	m_in_ramcs_cb.resolve_safe(0);
	220	m_out_ramwr_cb.resolve_safe();
	221	m_in_cs1010_cb.resolve_safe(0);
	222	m_out_cs1010_cb.resolve_safe();
244	223	}
245	224
246	225
r29542	r29543
280	259	break;
281	260
282	261	case 2: // Read Drive Configuration Information
283		data = m_in_rd322_~~fun~~c(0);
	262	data = m_in_rd322_cb(0);
284	263	break;
285	264
286	265	case 3: // Not Used
r29542	r29543
361	340	break;
362	341
363	342	case 0x20:
364		data = m_in_cs1010_~~fun~~c(m_ra >> 8);
	343	data = m_in_cs1010_cb(m_ra >> 8);
365	344	break;
366	345	}
367	346
r29542	r29543
384	363	break;
385	364
386	365	case 0x20:
387		m_out_cs1010_~~fun~~c(m_ra >> 8, data);
	366	m_out_cs1010_cb(m_ra >> 8, data);
388	367	break;
389	368
390	369	case 0x60:

branches/new_menus/src/emu/machine/wd11c00_17.h
r29542	r29543
23	23	// INTERFACE CONFIGURATION MACROS
24	24	//**************************************************************************
25	25
26		#define MCFG_WD11C00_17_ADD(_tag, _clock, _config) \
27		MCFG_DEVICE_ADD(_tag, WD11C00_17, _clock) \
28		MCFG_DEVICE_CONFIG(_config)
	26	#define MCFG_WD11C00_17_OUT_IRQ5_CB(_devcb) \
	27	devcb = &wd11c00_17_device::set_out_irq5_callback(*device, DEVCB2_##_devcb);
29	28
	29	#define MCFG_WD11C00_17_OUT_DRQ3_CB(_devcb) \
	30	devcb = &wd11c00_17_device::set_out_drq3_callback(*device, DEVCB2_##_devcb);
30	31
31		#define WD11C00_17_INTERFACE(_name) \
32		const wd11c00_17_interface (_name) =
	32	#define MCFG_WD11C00_17_OUT_MR_CB(_devcb) \
	33	devcb = &wd11c00_17_device::set_out_mr_callback(*device, DEVCB2_##_devcb);
33	34
	35	#define MCFG_WD11C00_17_OUT_BUSY_CB(_devcb) \
	36	devcb = &wd11c00_17_device::set_out_busy_callback(*device, DEVCB2_##_devcb);
34	37
	38	#define MCFG_WD11C00_17_OUT_REQ_CB(_devcb) \
	39	devcb = &wd11c00_17_device::set_out_req_callback(*device, DEVCB2_##_devcb);
35	40
	41	#define MCFG_WD11C00_17_OUT_RA3_CB(_devcb) \
	42	devcb = &wd11c00_17_device::set_out_ra3_callback(*device, DEVCB2_##_devcb);
	43
	44	#define MCFG_WD11C00_17_IN_RD322_CB(_devcb) \
	45	devcb = &wd11c00_17_device::set_in_rd322_callback(*device, DEVCB2_##_devcb);
	46
	47	#define MCFG_WD11C00_17_IN_RAMCS_CB(_devcb) \
	48	devcb = &wd11c00_17_device::set_in_ramcs_callback(*device, DEVCB2_##_devcb);
	49
	50	#define MCFG_WD11C00_17_OUT_RAMWR_CB(_devcb) \
	51	devcb = &wd11c00_17_device::set_out_ramwr_callback(*device, DEVCB2_##_devcb);
	52
	53	#define MCFG_WD11C00_17_IN_CS1010_CB(_devcb) \
	54	devcb = &wd11c00_17_device::set_in_cs1010_callback(*device, DEVCB2_##_devcb);
	55
	56	#define MCFG_WD11C00_17_OUT_CS1010_CB(_devcb) \
	57	devcb = &wd11c00_17_device::set_out_cs1010_callback(*device, DEVCB2_##_devcb);
	58
36	59	//**************************************************************************
37	60	// TYPE DEFINITIONS
38	61	//**************************************************************************
39	62
40		// ======================> wd11c00_17_interface
41
42		struct wd11c00_17_interface
43		{
44		devcb_write_line m_out_irq5_cb;
45		devcb_write_line m_out_drq3_cb;
46		devcb_write_line m_out_mr_cb;
47		devcb_write_line m_out_busy_cb;
48		devcb_write_line m_out_req_cb;
49		devcb_write_line m_out_ra3_cb;
50		devcb_read8 m_in_rd322_cb;
51		devcb_read8 m_in_ramcs_cb;
52		devcb_write8 m_out_ramwr_cb;
53		devcb_read8 m_in_cs1010_cb;
54		devcb_write8 m_out_cs1010_cb;
55		};
56
57
58	63	// ======================> wd11c00_17_device
59	64
60		class wd11c00_17_device : public device_t,
61		public wd11c00_17_interface
	65	class wd11c00_17_device : public device_t
62	66	{
63	67	public:
64	68	// construction/destruction
65	69	wd11c00_17_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
66	70
	71	template<class _Object> static devcb2_base &set_out_irq5_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_irq5_cb.set_callback(object); }
	72	template<class _Object> static devcb2_base &set_out_drq3_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_drq3_cb.set_callback(object); }
	73	template<class _Object> static devcb2_base &set_out_mr_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_mr_cb.set_callback(object); }
	74	template<class _Object> static devcb2_base &set_out_busy_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_busy_cb.set_callback(object); }
	75	template<class _Object> static devcb2_base &set_out_req_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_req_cb.set_callback(object); }
	76	template<class _Object> static devcb2_base &set_out_ra3_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_ra3_cb.set_callback(object); }
	77	template<class _Object> static devcb2_base &set_in_rd322_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_in_rd322_cb.set_callback(object); }
	78	template<class _Object> static devcb2_base &set_in_ramcs_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_in_ramcs_cb.set_callback(object); }
	79	template<class _Object> static devcb2_base &set_out_ramwr_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_ramwr_cb.set_callback(object); }
	80	template<class _Object> static devcb2_base &set_in_cs1010_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_in_cs1010_cb.set_callback(object); }
	81	template<class _Object> static devcb2_base &set_out_cs1010_callback(device_t &device, _Object object) { return downcast<wd11c00_17_device &>(device).m_out_cs1010_cb.set_callback(object); }
	82
67	83	DECLARE_READ8_MEMBER( io_r );
68	84	DECLARE_WRITE8_MEMBER( io_w );
69	85
r29542	r29543
86	102	// device-level overrides
87	103	virtual void device_start();
88	104	virtual void device_reset();
89		virtual void device_config_complete();
90	105
91	106	private:
92	107	inline void check_interrupt();
r29542	r29543
96	111	inline void software_reset();
97	112	inline void select();
98	113
99		devcb_resolved_write_line m_out_irq5_func;
100		devcb_resolved_write_line m_out_drq3_func;
101		devcb_resolved_write_line m_out_mr_func;
102		devcb_resolved_write_line m_out_busy_func;
103		devcb_resolved_write_line m_out_req_func;
104		devcb_resolved_write_line m_out_ra3_func;
105		devcb_resolved_read8 m_in_rd322_func;
106		devcb_resolved_read8 m_in_ramcs_func;
107		devcb_resolved_write8 m_out_ramwr_func;
108		devcb_resolved_read8 m_in_cs1010_func;
109		devcb_resolved_write8 m_out_cs1010_func;
	114	devcb2_write_line m_out_irq5_cb;
	115	devcb2_write_line m_out_drq3_cb;
	116	devcb2_write_line m_out_mr_cb;
	117	devcb2_write_line m_out_busy_cb;
	118	devcb2_write_line m_out_req_cb;
	119	devcb2_write_line m_out_ra3_cb;
	120	devcb2_read8 m_in_rd322_cb;
	121	devcb2_read8 m_in_ramcs_cb;
	122	devcb2_write8 m_out_ramwr_cb;
	123	devcb2_read8 m_in_cs1010_cb;
	124	devcb2_write8 m_out_cs1010_cb;
110	125
111	126	UINT8 m_status;
112	127	UINT8 m_mask;

branches/new_menus/src/emu/machine/terminal.c
r29542	r29543
141	141	generic_terminal_device::generic_terminal_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, const char shortname, const char *source)
142	142	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
143	143	m_palette(*this, "palette"),
144		m_io_term_conf(*this, "TERM_CONF")
	144	m_io_term_conf(*this, "TERM_CONF"),
	145	m_keyboard_cb(*this)
145	146	{
146	147	}
147	148
148	149	generic_terminal_device::generic_terminal_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
149	150	: device_t(mconfig, GENERIC_TERMINAL, "Generic Terminal", tag, owner, clock, "generic_terminal", __FILE__),
150	151	m_palette(*this, "palette"),
151		m_io_term_conf(*this, "TERM_CONF")
	152	m_io_term_conf(*this, "TERM_CONF"),
	153	m_keyboard_cb(*this)
152	154	{
153	155	}
154	156
r29542	r29543
304	306	send_key(data);
305	307	}
306	308
307		static ASCII_KEYBOARD_INTERFACE( keyboard_intf )
308		{
309		DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, generic_terminal_device, kbd_put)
310		};
311
312	309	/***************************************************************************
313	310	VIDEO HARDWARE
314	311	***************************************************************************/
r29542	r29543
323	320
324	321	MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
325	322
326		MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)
	323	MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
	324	MCFG_GENERIC_KEYBOARD_CB(WRITE8(generic_terminal_device, kbd_put))
327	325	MACHINE_CONFIG_END
328	326
329	327	machine_config_constructor generic_terminal_device::device_mconfig_additions() const
r29542	r29543
333	331
334	332	void generic_terminal_device::device_start()
335	333	{
336		m_keyboard_~~fun~~c.resolve(m_~~keyboard_cb, *thi~~s);
	334	m_keyboard_cb.resolve_safe();
337	335	}
338	336
339		void generic_terminal_device::device_config_complete()
340		{
341		const terminal_interface intf = reinterpret_cast<const terminal_interface >(static_config());
342		if(intf != NULL)
343		{
344		static_cast<terminal_interface >(this) = *intf;
345		}
346		else
347		{
348		memset(&m_keyboard_cb, 0, sizeof(m_keyboard_cb));
349		}
350		}
351
352	337	void generic_terminal_device::device_reset()
353	338	{
354	339	clear();

branches/new_menus/src/emu/machine/terminal.h
r29542	r29543
6	6	#define TERMINAL_SCREEN_TAG "terminal_screen"
7	7
8	8	/***************************************************************************
9		TYPE DEFINITIONS
10		***************************************************************************/
11
12		struct terminal_interface
13		{
14		devcb_write8 m_keyboard_cb;
15		};
16
17		#define GENERIC_TERMINAL_INTERFACE(name) const terminal_interface (name) =
18
19		/***************************************************************************
20	9	DEVICE CONFIGURATION MACROS
21	10	***************************************************************************/
22	11
23		#define MCFG_GENERIC_TERMINAL_ADD(_tag, _intrf) \
24		MCFG_DEVICE_ADD(_tag, GENERIC_TERMINAL, 0) \
25		MCFG_DEVICE_CONFIG(_intrf)
	12	#define MCFG_GENERIC_TERMINAL_KEYBOARD_CB(_devcb) \
	13	devcb = &generic_terminal_device::set_keyboard_callback(*device, DEVCB2_##_devcb);
26	14
27		#define MCFG_GENERIC_TERMINAL_REMOVE(_tag) \
28		MCFG_DEVICE_REMOVE(_tag)
29
30	15	/***************************************************************************
31	16	FUNCTION PROTOTYPES
32	17	***************************************************************************/
r29542	r29543
36	21
37	22	INPUT_PORTS_EXTERN( generic_terminal );
38	23
39		class generic_terminal_device :
40		public device_t,
41		public terminal_interface
	24	class generic_terminal_device : public device_t
42	25	{
43	26	public:
44	27	generic_terminal_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, const char shortname, const char *source);
45	28	generic_terminal_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	29
	30	template<class _Object> static devcb2_base &set_keyboard_callback(device_t &device, _Object object) { return downcast<generic_terminal_device &>(device).m_keyboard_cb.set_callback(object); }
	31
46	32	DECLARE_WRITE8_MEMBER(write) { term_write(data); }
47	33	DECLARE_WRITE8_MEMBER(kbd_put);
48	34	UINT32 update(screen_device &device, bitmap_rgb32 &bitmap, const rectangle &cliprect);
r29542	r29543
56	42	virtual void term_write(UINT8 data);
57	43	virtual void device_start();
58	44	virtual void device_reset();
59		virtual void device_config_complete();
60		virtual void send_key(UINT8 code) { m_keyboard_func(0, code); }
	45	virtual void send_key(UINT8 code) { m_keyboard_cb((offs_t)0, code); }
61	46	UINT8 m_buffer[TERMINAL_WIDTH*50]; // make big enough for teleprinter
62	47	UINT8 m_x_pos;
63	48	private:
r29542	r29543
68	53	UINT8 m_framecnt;
69	54	UINT8 m_y_pos;
70	55
71		devcb_~~resolved_~~write8 m_keyboard_~~fun~~c;
	56	devcb2_write8 m_keyboard_cb;
72	57	};
73	58
74	59	extern const device_type GENERIC_TERMINAL;

branches/new_menus/src/emu/machine/dp8390.c
r29542	r29543
7	7	const device_type DP8390D = &device_creator<dp8390d_device>;
8	8	const device_type RTL8019A = &device_creator<rtl8019a_device>;
9	9
10		void dp8390_device::device_config_complete() {
11		const dp8390_interface intf = reinterpret_cast<const dp8390_interface >(static_config());
12		if(intf != NULL)
13		static_cast<dp8390_interface >(this) = *intf;
14		else {
15		memset(&irq_cb, 0, sizeof(irq_cb));
16		memset(&breq_cb, 0, sizeof(breq_cb));
17		memset(&mem_read_cb, 0, sizeof(mem_read_cb));
18		memset(&mem_write_cb, 0, sizeof(mem_write_cb));
19		}
20		}
21
22	10	dp8390d_device::dp8390d_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
23	11	: dp8390_device(mconfig, DP8390D, "DP8390D", tag, owner, clock, 10.0f, "dp8390d", __FILE__) {
24	12	m_type = TYPE_DP8390D;
r29542	r29543
31	19
32	20	dp8390_device::dp8390_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, float bandwidth, const char shortname, const char *source)
33	21	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
34		device_network_interface(mconfig, *this, bandwidth) {
	22	device_network_interface(mconfig, *this, bandwidth),
	23	m_irq_cb(*this),
	24	m_breq_cb(*this),
	25	m_mem_read_cb(*this),
	26	m_mem_write_cb(*this)
	27	{
35	28	}
36	29
37	30	void dp8390_device::device_start() {
38		irq_func.resolve(irq_cb, *this);
39		breq_func.resolve(breq_cb, *this);
40		mem_read.resolve(mem_read_cb, *this);
41		mem_write.resolve(mem_write_cb, *this);
	31	m_irq_cb.resolve_safe();
	32	m_breq_cb.resolve_safe();
	33	m_mem_read_cb.resolve_safe(0);
	34	m_mem_write_cb.resolve_safe();
42	35	}
43	36
44	37	void dp8390_device::stop() {
45	38	m_regs.isr = 0x80; // is this right?
46	39	m_regs.cr \|= 1;
47		irq_~~fun~~c(CLEAR_LINE);
	40	m_irq_cb(CLEAR_LINE);
48	41	m_reset = 1;
49	42	}
50	43
r29542	r29543
56	49	memset(&m_8019regs, 0, sizeof(m_8019regs));
57	50	m_8019regs.config1 = 0x80;
58	51	m_8019regs.config3 = 0x01;
59		irq_~~fun~~c(CLEAR_LINE);
	52	m_irq_cb(CLEAR_LINE);
60	53
61	54	m_reset = 1;
62	55	}
r29542	r29543
83	76	}
84	77
85	78	buf.resize(m_regs.tbcr);
86		for(i = 0; i < m_regs.tbcr; i++) buf[i] = mem_read(high16 + (m_regs.tpsr << 8) + i);
	79	for(i = 0; i < m_regs.tbcr; i++) buf[i] = m_mem_read_cb(high16 + (m_regs.tpsr << 8) + i);
87	80
88	81	if(send(buf, m_regs.tbcr)) {
89	82	m_regs.tsr = 1;
r29542	r29543
139	132	len &= 0xffff;
140	133
141	134	for(i = 0; i < len; i++) {
142		mem_write(high16 + offset, buf[i]);
	135	m_mem_write_cb(high16 + offset, buf[i]);
143	136	offset++;
144	137	if(!(offset & 0xff)) {
145	138	if((offset >> 8) == m_regs.pstop) offset = m_regs.pstart << 8;
r29542	r29543
149	142	if(len < 60) {
150	143	// this can't pass to the next page
151	144	for(; i < 60; i++) {
152		mem_write(high16 + offset, 0);
	145	m_mem_write_cb(high16 + offset, 0);
153	146	offset++;
154	147	}
155	148	len = 60;
r29542	r29543
160	153	m_regs.curr = (offset >> 8) + ((offset & 0xff)?1:0);
161	154	if(m_regs.curr == m_regs.pstop) m_regs.curr = m_regs.pstart;
162	155	len += 4;
163		mem_write(start, m_regs.rsr);
164		mem_write(start+1, m_regs.curr);
165		mem_write(start+2, len & 0xff);
166		mem_write(start+3, len >> 8);
	156	m_mem_write_cb((offs_t)start, m_regs.rsr);
	157	m_mem_write_cb((offs_t)start+1, m_regs.curr);
	158	m_mem_write_cb((offs_t)start+2, len & 0xff);
	159	m_mem_write_cb((offs_t)start+3, len >> 8);
167	160	check_irq();
168	161	}
169	162
r29542	r29543
185	178	UINT32 high16 = (m_regs.dcr & 4)?m_regs.rsar<<16:0;
186	179	if(m_regs.dcr & 1) {
187	180	m_regs.crda &= ~1;
188		data = mem_read(high16 + m_regs.crda++);
189		data \|= mem_read(high16 + m_regs.crda++) << 8;
	181	data = m_mem_read_cb(high16 + m_regs.crda++);
	182	data \|= m_mem_read_cb(high16 + m_regs.crda++) << 8;
190	183	m_regs.rbcr -= (m_regs.rbcr < 2)?m_regs.rbcr:2;
191	184	check_dma_complete();
192	185	return DP8390_BYTE_ORDER(data);
193	186	} else {
194	187	m_regs.rbcr -= (m_regs.rbcr)?1:0;
195		data = mem_read(high16 + m_regs.crda++);
	188	data = m_mem_read_cb(high16 + m_regs.crda++);
196	189	check_dma_complete();
197	190	return data;
198	191	}
r29542	r29543
355	348	if(m_regs.dcr & 1) {
356	349	data = DP8390_BYTE_ORDER(data);
357	350	m_regs.crda &= ~1;
358		mem_write(high16 + m_regs.crda++, data & 0xff);
359		mem_write(high16 + m_regs.crda++, data >> 8);
	351	m_mem_write_cb(high16 + m_regs.crda++, data & 0xff);
	352	m_mem_write_cb(high16 + m_regs.crda++, data >> 8);
360	353	m_regs.rbcr -= (m_regs.rbcr < 2)?m_regs.rbcr:2;
361	354	check_dma_complete();
362	355	} else {
363	356	data &= 0xff;
364		mem_write(high16 + m_regs.crda++, data);
	357	m_mem_write_cb(high16 + m_regs.crda++, data);
365	358	m_regs.rbcr -= (m_regs.rbcr)?1:0;
366	359	check_dma_complete();
367	360	}

branches/new_menus/src/emu/machine/dp8390.h
r29542	r29543
3	3
4	4	#include "emu.h"
5	5
6		struct dp8390_interface
7		{
8		devcb_write_line irq_cb;
9		devcb_write_line breq_cb;
10		devcb_read8 mem_read_cb;
11		devcb_write8 mem_write_cb;
12		};
13	6
14	7	// device stuff
15		#define MCFG_DP8390D_ADD(_tag, _intrf) \
16		MCFG_DEVICE_ADD(_tag, DP8390D, 0) \
17		MCFG_DEVICE_CONFIG(_intrf)
18	8
19		#define MCFG_RTL8019A_ADD(_tag, _intrf) \
20		MCFG_DEVICE_ADD(_tag, RTL8019A, 0) \
21		MCFG_DEVICE_CONFIG(_intrf)
	9	#define MCFG_DP8390D_IRQ_CB(_devcb) \
	10	devcb = &dp8390d_device::set_irq_callback(*device, DEVCB2_##_devcb);
22	11
	12	#define MCFG_DP8390D_BREQ_CB(_devcb) \
	13	devcb = &dp8390d_device::set_breq_callback(*device, DEVCB2_##_devcb);
	14
	15	#define MCFG_DP8390D_MEM_READ_CB(_devcb) \
	16	devcb = &dp8390d_device::set_mem_read_callback(*device, DEVCB2_##_devcb);
	17
	18	#define MCFG_DP8390D_MEM_WRITE_CB(_devcb) \
	19	devcb = &dp8390d_device::set_mem_write_callback(*device, DEVCB2_##_devcb);
	20
	21	#define MCFG_RTL8019A_IRQ_CB(_devcb) \
	22	devcb = &rtl8019a_device::set_irq_callback(*device, DEVCB2_##_devcb);
	23
	24	#define MCFG_RTL8019A_BREQ_CB(_devcb) \
	25	devcb = &rtl8019a_device::set_breq_callback(*device, DEVCB2_##_devcb);
	26
	27	#define MCFG_RTL8019A_MEM_READ_CB(_devcb) \
	28	devcb = &rtl8019a_device::set_mem_read_callback(*device, DEVCB2_##_devcb);
	29
	30	#define MCFG_RTL8019A_MEM_WRITE_CB(_devcb) \
	31	devcb = &rtl8019a_device::set_mem_write_callback(*device, DEVCB2_##_devcb);
	32
	33
23	34	class dp8390_device : public device_t,
24		public device_network_interface,
25		public dp8390_interface
	35	public device_network_interface
26	36	{
27	37	public:
28	38	// construction/destruction
29	39	dp8390_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, float bandwidth, const char shortname, const char *source);
	40
	41	template<class _Object> static devcb2_base &set_irq_callback(device_t &device, _Object object) { return downcast<dp8390_device &>(device).m_irq_cb.set_callback(object); }
	42	template<class _Object> static devcb2_base &set_breq_callback(device_t &device, _Object object) { return downcast<dp8390_device &>(device).m_breq_cb.set_callback(object); }
	43	template<class _Object> static devcb2_base &set_mem_read_callback(device_t &device, _Object object) { return downcast<dp8390_device &>(device).m_mem_read_cb.set_callback(object); }
	44	template<class _Object> static devcb2_base &set_mem_write_callback(device_t &device, _Object object) { return downcast<dp8390_device &>(device).m_mem_write_cb.set_callback(object); }
30	45
31	46	DECLARE_WRITE16_MEMBER( dp8390_w );
32	47	DECLARE_READ16_MEMBER( dp8390_r );
r29542	r29543
38	53	// device-level overrides
39	54	virtual void device_start();
40	55	virtual void device_reset();
41		~~virtual void device_config_complete();~~
	56
42	57	int m_type;
43	58
44	59	enum {
r29542	r29543
47	62	};
48	63
49	64	private:
50		devcb_resolved_write_line irq_func;
51		devcb_resolved_write_line breq_func;
52		devcb_resolved_read8 mem_read;
53		devcb_resolved_write8 mem_write;
	65	devcb2_write_line m_irq_cb;
	66	devcb2_write_line m_breq_cb;
	67	devcb2_read8 m_mem_read_cb;
	68	devcb2_write8 m_mem_write_cb;
54	69
55	70	void set_cr(UINT8 newcr);
56	71	void check_dma_complete();
57	72	void do_tx();
58	73	bool mcast_ck(const UINT8 *buf, int len);
59		void check_irq() { irq_~~fun~~c((m_regs.imr & m_regs.isr & 0x7f)?ASSERT_LINE:CLEAR_LINE); }
	74	void check_irq() { m_irq_cb((m_regs.imr & m_regs.isr & 0x7f)?ASSERT_LINE:CLEAR_LINE); }
60	75	void recv_overflow();
61	76	void stop();
62	77	void recv(UINT8 *buf, int len);

branches/new_menus/src/emu/machine/aakart.c
r29542	r29543
138	138	m_rx = m_keyb_row;
139	139	m_out_tx_func(ASSERT_LINE);
140	140	}
	141
141	142	break;
142	143	case 0x3f:
143	144	if(m_keyb_enable & 1 && m_keyb_state & 1)
r29542	r29543
147	148	m_out_tx_func(ASSERT_LINE);
148	149	m_keyb_state = 0;
149	150	}
	151
	152
150	153	break;
151	154	case 0xfd:
152	155	m_rx = 0xfd;

branches/new_menus/src/emu/machine/hd63450.c
r29542	r29543
308	308	m_reg[channel].csr &= ~0x08; // channel no longer active
309	309	m_reg[channel].cer = 0x11;
310	310	m_reg[channel].ccr &= ~0xc0;
311		m_dma_error((offs_t)3, 1);
	311	m_dma_error((offs_t)3, m_reg[channel].ccr & 0x08);
312	312	}
313	313
314	314	void hd63450_device::dma_transfer_halt(int channel)

branches/new_menus/src/emu/cpu/arm/arm.h
r29542	r29543
14	14	* PUBLIC FUNCTIONS
15	15	***************************************************************************************************/
16	16
	17	enum
	18	{
	19	ARM_COPRO_TYPE_UNKNOWN_CP15 = 0,
	20	ARM_COPRO_TYPE_VL86C020
	21	};
17	22
	23	struct arm_interface
	24	{
	25	UINT8 coprotype;
	26	};
	27
	28	#define ARM_INTERFACE(name) \
	29	const arm_interface (name) =
	30
	31
18	32	enum
19	33	{
20	34	ARM32_PC=0,
r29542	r29543
25	39	};
26	40
27	41
28		class arm_cpu_device : public cpu_device
	42	class arm_cpu_device : public cpu_device,
	43	public arm_interface
29	44	{
30	45	public:
31	46	// construction/destruction
r29542	r29543
34	49
35	50	protected:
36	51	// device-level overrides
	52	virtual void device_config_complete();
37	53	virtual void device_start();
38	54	virtual void device_reset();
39	55
r29542	r29543
80	96	void HandleMemSingle(UINT32 insn);
81	97	void HandleMemBlock(UINT32 insn);
82	98	void HandleCoPro(UINT32 insn);
	99	void HandleCoProVL86C020(UINT32 insn);
83	100	UINT32 decodeShift(UINT32 insn, UINT32 *pCarry);
84	101	void arm_check_irq_state();
85	102	int loadInc(UINT32 pat, UINT32 rbv, UINT32 s);

branches/new_menus/src/emu/cpu/arm/arm.c
r29542	r29543
248	248	}
249	249
250	250
	251
251	252	void arm_cpu_device::cpu_write32( int addr, UINT32 data )
252	253	{
253	254	/* Unaligned writes are treated as normal writes */
r29542	r29543
309	310
310	311	/***************************************************************************/
311	312
	313	void arm_cpu_device::device_config_complete()
	314	{
	315	// inherit a copy of the static data
	316	const arm_interface intf = reinterpret_cast<const arm_interface >(static_config());
	317	if (intf != NULL)
	318	static_cast<arm_interface >(this) = *intf;
	319
	320	// or set default if none provided
	321	else
	322	{
	323	coprotype = ARM_COPRO_TYPE_UNKNOWN_CP15;
	324	}
	325	}
	326
312	327	void arm_cpu_device::device_reset()
313	328	{
314	329	for ( int i = 0; i < 27; i++ )
r29542	r29543
413	428	}
414	429	else if ((insn & 0x0f000000u) == 0x0e000000u) /* Coprocessor */
415	430	{
416		HandleCoPro(insn);
	431	if(coprotype == 1)
	432	HandleCoProVL86C020(insn);
	433	else
	434	HandleCoPro(insn);
	435
417	436	R15 += 4;
418	437	}
419	438	else if ((insn & 0x0f000000u) == 0x0f000000u) /* Software interrupt */
r29542	r29543
1363	1382	return accumulator;
1364	1383	}
1365	1384
	1385	void arm_cpu_device::HandleCoProVL86C020( UINT32 insn )
	1386	{
	1387	UINT32 rn=(insn>>12)&0xf;
	1388	UINT32 crn=(insn>>16)&0xf;
1366	1389
	1390	m_icount -= S_CYCLE;
	1391
	1392	/* MRC - transfer copro register to main register */
	1393	if( (insn&0x0f100010)==0x0e100010 )
	1394	{
	1395	if(crn == 0) // ID, read only
	1396	{
	1397	/*
	1398	0x41<<24 <- Designer code, Acorn Computer Ltd.
	1399	0x56<<16 <- Manufacturer code, VLSI Technology Inc.
	1400	0x03<<8 <- Part type, VLC86C020
	1401	0x00<<0 <- Revision number, 0
	1402	*/
	1403	SetRegister(rn, 0x41560300);
	1404	debugger_break(machine());
	1405	}
	1406	else
	1407	SetRegister(rn, m_coproRegister[crn]);
	1408
	1409	}
	1410	/* MCR - transfer main register to copro register */
	1411	else if( (insn&0x0f100010)==0x0e000010 )
	1412	{
	1413	if(crn != 0)
	1414	m_coproRegister[crn]=GetRegister(rn);
	1415
	1416	printf("%08x: VL86C020 copro instruction write %08x %d %d\n", R15 & 0x3ffffff, insn,rn,crn);
	1417	}
	1418	else
	1419	{
	1420	printf("%08x: Unimplemented VL86C020 copro instruction %08x %d %d\n", R15 & 0x3ffffff, insn,rn,crn);
	1421	debugger_break(machine());
	1422	}
	1423	}
	1424
1367	1425	void arm_cpu_device::HandleCoPro( UINT32 insn )
1368	1426	{
1369	1427	UINT32 rn=(insn>>12)&0xf;

branches/new_menus/src/emu/video/ramdac.c
r29542	r29543
43	43	: device_t(mconfig, RAMDAC, "ramdac", tag, owner, clock, "ramdac", __FILE__),
44	44	device_memory_interface(mconfig, *this),
45	45	m_space_config("videoram", ENDIANNESS_LITTLE, 8, 10, 0, NULL, *ADDRESS_MAP_NAME(ramdac_palram)),
46		m_palette(*this)
	46	m_palette(*this),
	47	m_split_read_reg(0)
47	48	{
48	49	}
49	50
r29542	r29543
87	88	}
88	89
89	90	//-------------------------------------------------
90		// device_config_complete - perform any
91		// operations now that the configuration is
92		// complete
93		//-------------------------------------------------
94
95		void ramdac_device::device_config_complete()
96		{
97		// inherit a copy of the static data
98		const ramdac_interface intf = reinterpret_cast<const ramdac_interface >(static_config());
99		if (intf != NULL)
100		static_cast<ramdac_interface >(this) = *intf;
101
102		// or initialize to defaults if none provided
103		else
104		{
105		// ...
106		}
107		}
108
109
110		//-------------------------------------------------
111	91	// device_validity_check - perform validity checks
112	92	// on this device
113	93	//-------------------------------------------------

branches/new_menus/src/emu/video/ramdac.h
r29542	r29543
16	16	// INTERFACE CONFIGURATION MACROS
17	17	//**************************************************************************
18	18
19		#define MCFG_RAMDAC_ADD(_tag,_~~config,_~~map,_palette_tag) \
	19	#define MCFG_RAMDAC_ADD(_tag, _map, _palette_tag) \
20	20	MCFG_DEVICE_ADD(_tag, RAMDAC, 0) \
21		MCFG_DEVICE_CONFIG(_config) \
22	21	MCFG_DEVICE_ADDRESS_MAP(AS_0, _map) \
23	22	ramdac_device::static_set_palette_tag(*device, "^" _palette_tag);
24	23
25		#define RAMDAC_INTERFACE(name) \
26		const ramdac_interface (name) =
	24	#define MCFG_RAMDAC_SPLIT_READ(_split) \
	25	ramdac_device::set_split_read(*device, _split);
27	26
28		// ======================> ramdac_interface
29	27
30		struct ramdac_interface
31		{
32		UINT8 m_split_read_reg; // read register index is separated, seen in rltennis
33		};
34
35	28	//**************************************************************************
36	29	// TYPE DEFINITIONS
37	30	//**************************************************************************
r29542	r29543
39	32	// ======================> ramdac_device
40	33
41	34	class ramdac_device : public device_t,
42		public device_memory_interface,
43		public ramdac_interface
	35	public device_memory_interface
44	36	{
45	37	public:
46	38	// construction/destruction
r29542	r29543
48	40
49	41	// static configuration
50	42	static void static_set_palette_tag(device_t &device, const char *tag);
	43	static void set_split_read(device_t &device, int split) { downcast<ramdac_device &>(device).m_split_read_reg = split; }
51	44
52	45	// I/O operations
53	46	DECLARE_READ8_MEMBER( index_r );
r29542	r29543
68	61	virtual void device_validity_check(validity_checker &valid) const;
69	62	virtual void device_start();
70	63	virtual void device_reset();
71		virtual void device_config_complete();
72	64	inline UINT8 readbyte(offs_t address);
73	65	inline void writebyte(offs_t address, UINT8 data);
74	66	inline void reg_increment(UINT8 inc_type);
r29542	r29543
81	73
82	74	const address_space_config m_space_config;
83	75	required_device<palette_device> m_palette;
	76
	77	UINT8 m_split_read_reg; // read register index is separated, seen in rltennis
84	78	};
85	79
86	80
r29542	r29543
88	82	extern const device_type RAMDAC;
89	83
90	84
91
92		//**************************************************************************
93		// GLOBAL VARIABLES
94		//**************************************************************************
95
96
97
98	85	#endif

branches/new_menus/src/emu/video/t6a04.c
r29542	r29543
18	18	const device_type T6A04 = &device_creator<t6a04_device>;
19	19
20	20	//-------------------------------------------------
21		// device_config_complete - perform any
22		// operations now that the configuration is
23		// complete
24		//-------------------------------------------------
25
26		void t6a04_device::device_config_complete()
27		{
28		// inherit a copy of the static data
29		const t6a04_interface intf = reinterpret_cast<const t6a04_interface >(static_config());
30
31		if (intf != NULL)
32		{
33		static_cast<t6a04_interface >(this) = *intf;
34		}
35		// or initialize to defaults if none provided
36		else
37		{
38		height = width = 0;
39		}
40		}
41
42		//-------------------------------------------------
43	21	// device_validity_check - perform validity checks
44	22	// on this device
45	23	//-------------------------------------------------
46	24
47	25	void t6a04_device::device_validity_check(validity_checker &valid) const
48	26	{
49		if (height == 0 \|\| width == 0)
	27	if (m_height == 0 \|\| m_width == 0)
50	28	mame_printf_error("Configured with invalid parameter\n");
51	29	}
52	30
r29542	r29543
59	37	//-------------------------------------------------
60	38
61	39	t6a04_device::t6a04_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock) :
62		device_t(mconfig, T6A04, "T6A04", tag, owner, clock, "t6a04", __FILE__)
	40	device_t(mconfig, T6A04, "T6A04", tag, owner, clock, "t6a04", __FILE__),
	41	m_height(0),
	42	m_width(0)
63	43	{
64	44	}
65	45
r29542	r29543
115	95
116	96	UINT32 t6a04_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
117	97	{
118		UINT8 ypages = width>>3;
119		UINT8 last_line = m_zpos + height;
	98	UINT8 ypages = m_width>>3;
	99	UINT8 last_line = m_zpos + m_height;
120	100
121	101	if (m_display_on)
122	102	{

branches/new_menus/src/emu/video/t6a04.h
r29542	r29543
11	11	#ifndef __T6A04_H__
12	12	#define __T6A04_H__
13	13
14		#define MCFG_T6A04_ADD( _tag, _config ) \
15		MCFG_DEVICE_ADD( _tag, T6A04, 0 ) \
16		MCFG_DEVICE_CONFIG(_config)
17
18	14	//**************************************************************************
19	15	// TYPE DEFINITIONS
20	16	//**************************************************************************
21	17
22		// ======================> t6a04_interface
23
24		struct t6a04_interface
25		{
26		UINT8 height; // number of lines
27		UINT8 width; // pixels for line
28		};
29
30	18	// ======================> t6a04_device
31	19
32		class t6a04_device : public device_t,
33		public t6a04_interface
	20	class t6a04_device : public device_t
34	21	{
35	22	public:
36	23	// construction/destruction
37	24	t6a04_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
38	25
	26	static void set_size(device_t &device, int w, int h)
	27	{
	28	t6a04_device &dev = downcast<t6a04_device &>(device);
	29	dev.m_width = w;
	30	dev.m_height = h;
	31	}
	32
39	33	// device interface
40	34	DECLARE_WRITE8_MEMBER(control_write);
41	35	DECLARE_READ8_MEMBER(control_read);
r29542	r29543
48	42	// device-level overrides
49	43	virtual void device_start();
50	44	virtual void device_reset();
51		virtual void device_config_complete();
52	45	virtual void device_validity_check(validity_checker &valid) const;
53	46
54	47	private:
r29542	r29543
65	58	UINT8 m_opa1;
66	59	UINT8 m_opa2;
67	60	UINT8 m_output_reg;
	61
	62	UINT8 m_height; // number of lines
	63	UINT8 m_width; // pixels for line
68	64	};
69	65
70	66	// device type definition
71	67	extern const device_type T6A04;
72	68
	69	#define MCFG_T6A04_SIZE(_width, _height) \
	70	t6a04_device::set_size(*device, _width, _height);
	71
73	72	#endif

branches/new_menus/src/emu/video/psx.c
r29542	r29543
3800	3800	MACHINE_CONFIG_FRAGMENT( psxgpu )
3801	3801	MCFG_SCREEN_ADD("screen", RASTER)
3802	3802	MCFG_SCREEN_REFRESH_RATE( 60 )
3803		MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC( 0 ))
	3803	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
3804	3804	MCFG_SCREEN_SIZE( 1024, 1024 )
3805	3805	MCFG_SCREEN_VISIBLE_AREA( 0, 639, 0, 479 )
3806	3806	MCFG_SCREEN_UPDATE_DEVICE( DEVICE_SELF, psxgpu_device, update_screen )

branches/new_menus/src/emu/video/crtc_ega.c
r29542	r29543
16	16	const device_type CRTC_EGA = &device_creator<crtc_ega_device>;
17	17
18	18
19		void crtc_ega_device::device_config_complete()
20		{
21		const crtc_ega_interface intf = reinterpret_cast<const crtc_ega_interface >(static_config());
22
23		if ( intf != NULL )
24		{
25		static_cast<crtc_ega_interface >(this) = *intf;
26		}
27		else
28		{
29		m_hpixels_per_column = 0;
30		m_begin_update = NULL;
31		m_update_row = NULL;
32		m_end_update = NULL;
33		memset(&m_out_de_func, 0, sizeof(m_out_de_func));
34		memset(&m_out_hsync_func, 0, sizeof(m_out_hsync_func));
35		memset(&m_out_vsync_func, 0, sizeof(m_out_vsync_func));
36		memset(&m_out_vblank_func, 0, sizeof(m_out_vblank_func));
37		}
38		}
39
40
41	19	crtc_ega_device::crtc_ega_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
42	20	: device_t(mconfig, CRTC_EGA, "crtc_EGA", tag, owner, clock, "crtc_ega", __FILE__),
43		device_video_interface(mconfig, *this, false)
	21	device_video_interface(mconfig, *this, false),
	22	m_res_out_de_cb(*this),
	23	m_res_out_hsync_cb(*this),
	24	m_res_out_vsync_cb(*this),
	25	m_res_out_vblank_cb(*this),
	26	m_hpixels_per_column(0)
44	27	{
45	28	}
46	29
r29542	r29543
239	222
240	223	void crtc_ega_device::set_de(int state)
241	224	{
242		if ( m_de != state )
	225	if (m_de != state)
243	226	{
244	227	m_de = state;
245	228
246		if ( !m_res_out_de_func.isnull() )
247		m_res_out_de_func( m_de );
	229	if (!m_res_out_de_cb.isnull())
	230	m_res_out_de_cb(m_de);
248	231	}
249	232	}
250	233
251	234
252	235	void crtc_ega_device::set_hsync(int state)
253	236	{
254		if ( m_hsync != state )
	237	if (m_hsync != state)
255	238	{
256	239	m_hsync = state;
257	240
258		if ( !m_res_out_hsync_func.isnull() )
259		m_res_out_hsync_func( m_hsync );
	241	if (!m_res_out_hsync_cb.isnull())
	242	m_res_out_hsync_cb(m_hsync);
260	243	}
261	244	}
262	245
263	246
264	247	void crtc_ega_device::set_vsync(int state)
265	248	{
266		if ( m_vsync != state )
	249	if (m_vsync != state)
267	250	{
268	251	m_vsync = state;
269	252
270		if ( !m_res_out_vsync_func.isnull() )
271		m_res_out_vsync_func( m_vsync );
	253	if (!m_res_out_vsync_cb.isnull())
	254	m_res_out_vsync_cb(m_vsync);
272	255	}
273	256	}
274	257
275	258
276	259	void crtc_ega_device::set_vblank(int state)
277	260	{
278		if ( m_vblank != state )
	261	if (m_vblank != state)
279	262	{
280	263	m_vblank = state;
281	264
282		if ( !m_res_out_vblank_func.isnull() )
283		m_res_out_vblank_func( m_vblank );
	265	if (!m_res_out_vblank_cb.isnull())
	266	m_res_out_vblank_cb(m_vblank);
284	267	}
285	268	}
286	269
287	270
288	271	void crtc_ega_device::set_cur(int state)
289	272	{
290		if ( m_cur != state )
	273	if (m_cur != state)
291	274	{
292	275	m_cur = state;
293	276
294		// if ( !m_res_out_cur_func.isnull() )
295		// m_res_out_cur_func( m_cur );
	277	// if (!m_res_out_cur_cb.isnull())
	278	// m_res_out_cur_cb(m_cur);
296	279	}
297	280	}
298	281
r29542	r29543
538	521	{
539	522	UINT16 y;
540	523
541		~~void *p~~aram = NULL;
	524	assert(!m_row_update_cb.isnull() != NULL);
542	525
543		assert(m_update_row != NULL);
544
545	526	/* call the set up function if any */
546		if (m_begin_update != NULL)
547		param = m_begin_update(this, bitmap, cliprect);
	527	if (!m_begin_update_cb.isnull())
	528	m_begin_update_cb(bitmap, cliprect);
548	529
549	530	if (cliprect.min_y == 0)
550	531	{
r29542	r29543
569	550	INT8 cursor_x = cursor_visible ? (m_cursor_addr - m_current_disp_addr) : -1;
570	551
571	552	/* call the external system to draw it */
572		m_update_~~row~~(~~this,~~ bitmap, cliprect, m_current_disp_addr, ra, y, m_horiz_disp + 1, cursor_x~~, param~~);
	553	m_row_update_cb(bitmap, cliprect, m_current_disp_addr, ra, y, m_horiz_disp + 1, cursor_x);
573	554
574	555	/* update MA if the last raster address */
575	556	if (ra == m_max_ras_addr)
r29542	r29543
577	558	}
578	559
579	560	/* call the tear down function if any */
580		if (m_end_update != NULL)
581		m_end_update(this, bitmap, cliprect, param);
	561	if (!m_end_update_cb.isnull())
	562	m_end_update_cb(bitmap, cliprect);
582	563	}
583	564	else
584	565	logerror("Invalid crtc_ega screen parameters - display disabled!!!\n");
r29542	r29543
595	576	assert(m_hpixels_per_column > 0);
596	577
597	578	/* resolve callbacks */
598		m_res_out_de_func.resolve(m_out_de_func, *this);
599		m_res_out_hsync_func.resolve(m_out_hsync_func, *this);
600		m_res_out_vsync_func.resolve(m_out_vsync_func, *this);
601		m_res_out_vblank_func.resolve(m_out_vblank_func, *this);
	579	m_res_out_de_cb.resolve();
	580	m_res_out_hsync_cb.resolve();
	581	m_res_out_vsync_cb.resolve();
	582	m_res_out_vblank_cb.resolve();
602	583
	584	/* bind delegates */
	585	m_begin_update_cb.bind_relative_to(*owner());
	586	m_row_update_cb.bind_relative_to(*owner());
	587	m_end_update_cb.bind_relative_to(*owner());
	588
603	589	/* create the timers */
604	590	m_line_timer = timer_alloc(TIMER_LINE);
605	591	m_de_off_timer = timer_alloc(TIMER_DE_OFF);
r29542	r29543
699	685	void crtc_ega_device::device_reset()
700	686	{
701	687	/* internal registers other than status remain unchanged, all outputs go low */
702		if ( !m_res_out_de_func.isnull() )
703		m_res_out_de_func( FALSE );
	688	if (!m_res_out_de_cb.isnull())
	689	m_res_out_de_cb(false);
704	690
705		if ( !m_res_out_hsync_func.isnull() )
706		m_res_out_hsync_func( FALSE );
	691	if (!m_res_out_hsync_cb.isnull())
	692	m_res_out_hsync_cb(false);
707	693
708		if ( !m_res_out_vsync_func.isnull() )
709		m_res_out_vsync_func( FALSE );
	694	if (!m_res_out_vsync_cb.isnull())
	695	m_res_out_vsync_cb(false);
710	696
711		if ( !m_res_out_vblank_func.isnull() )
712		m_res_out_vblank_func( FALSE );
	697	if (!m_res_out_vblank_cb.isnull())
	698	m_res_out_vblank_cb(false);
713	699
714		if ( ! m_line_timer->enabled( ) )
	700	if (!m_line_timer->enabled())
715	701	{
716	702	m_line_timer->adjust( attotime::from_ticks( m_horiz_char_total + 2, m_clock ) );
717	703	}

branches/new_menus/src/emu/video/crtc_ega.h
r29542	r29543
9	9
10	10	#include "emu.h"
11	11
12		#define CRTC_EGA_INTERFACE(name) \
13		const crtc_ega_interface (name) =
	12	/* callback definitions */
	13	typedef device_delegate<void (bitmap_ind16 &bitmap, const rectangle &cliprect)> crtc_ega_begin_update_delegate;
14	14
15		#define MCFG_CRTC_EGA_ADD(_tag, _clock, _intrf) \
16		MCFG_DEVICE_ADD(_tag, CRTC_EGA, _clock) \
17		MCFG_DEVICE_CONFIG(_intrf)
	15	typedef device_delegate<void (bitmap_ind16 &bitmap, const rectangle &cliprect, UINT16 ma, UINT8 ra,
	16	UINT16 y, UINT8 x_count, INT8 cursor_x)> crtc_ega_row_update_delegate;
18	17
19		#define ~~MCFG~~_~~CRTC_EGA_SET_SCREEN~~ ~~MCFG~~_~~VIDEO~~_~~SET~~_~~SCREEN~~
	18	typedef device_delegate<void (bitmap_ind16 &bitmap, const rectangle &cliprect)> crtc_ega_end_update_delegate;
20	19
21	20
22		class crtc_ega_device;
	21	#define CRTC_EGA_BEGIN_UPDATE(_name) void _name(bitmap_ind16 &bitmap, const rectangle &cliprect)
	22	#define CRTC_EGA_ROW_UPDATE(_name) void _name(bitmap_ind16 &bitmap, \
	23	const rectangle &cliprect, UINT16 ma, UINT8 ra, \
	24	UINT16 y, UINT8 x_count, INT8 cursor_x)
	25	#define CRTC_EGA_END_UPDATE(_name) void _name(bitmap_ind16 &bitmap, const rectangle &cliprect)
23	26
24		/* callback definitions */
25		typedef void * (crtc_ega_begin_update_func)(crtc_ega_device device, bitmap_ind16 &bitmap, const rectangle &cliprect);
26		#define CRTC_EGA_BEGIN_UPDATE(name) void name(crtc_ega_device device, bitmap_ind16 &bitmap, const rectangle &cliprect)
27	27
28		typedef void (crtc_ega_update_row_func)(crtc_ega_device device, bitmap_ind16 &bitmap,
29		const rectangle &cliprect, UINT16 ma, UINT8 ra,
30		UINT16 y, UINT8 x_count, INT8 cursor_x, void *param);
31		#define CRTC_EGA_UPDATE_ROW(name) void name(crtc_ega_device *device, bitmap_ind16 &bitmap, \
32		const rectangle &cliprect, UINT16 ma, UINT8 ra, \
33		UINT16 y, UINT8 x_count, INT8 cursor_x, void *param)
34	28
35		typedef void (crtc_ega_end_update_func)(crtc_ega_device device, bitmap_ind16 &bitmap, const rectangle &cliprect, void *param);
36		#define CRTC_EGA_END_UPDATE(name) void name(crtc_ega_device device, bitmap_ind16 &bitmap, const rectangle &cliprect, void param)
	29	#define MCFG_CRTC_EGA_SET_SCREEN MCFG_VIDEO_SET_SCREEN
37	30
	31	#define MCFG_CRTC_EGA_BEGIN_UPDATE_CB(_class, _method) \
	32	crtc_ega_device::set_begin_update_callback(device, crtc_ega_begin_update_delegate(&_class::_method, #_class "::" #_method, downcast<_class >(owner)));
38	33
39		/* interface */
40		struct crtc_ega_interface
41		{
42		int m_hpixels_per_column; /* number of pixels per video memory address */
	34	#define MCFG_CRTC_EGA_ROW_UPDATE_CB(_class, _method) \
	35	crtc_ega_device::set_row_update_callback(device, crtc_ega_row_update_delegate(&_class::_method, #_class "::" #_method, downcast<_class >(owner)));
43	36
44		/* if specified, this gets called before any pixel update,
45		optionally return a pointer that will be passed to the
46		update and tear down callbacks */
47		crtc_ega_begin_update_func m_begin_update;
	37	#define MCFG_CRTC_EGA_END_UPDATE_CB(_class, _method) \
	38	crtc_ega_device::set_end_update_callback(device, crtc_ega_end_update_delegate(&_class::_method, #_class "::" #_method, downcast<_class >(owner)));
48	39
49		/* this gets called for every row, the driver must output
50		x_count * hpixels_per_column pixels.
51		cursor_x indicates the character position where the cursor is, or -1
52		if there is no cursor on this row */
53		crtc_ega_update_row_func m_update_row;
	40	#define MCFG_CRTC_EGA_HPIXELS_PER_COLUMN(_pix) \
	41	crtc_ega_device::set_hpixels_per_column(*device, _pix);
54	42
55		/* if specified, this gets called after all row updating is complete */
56		crtc_ega_end_update_func m_end_update;
	43	#define MCFG_CRTC_EGA_RES_OUT_DE_CB(_devcb) \
	44	devcb = &crtc_ega_device::set_res_out_de_callback(*device, DEVCB2_##_devcb);
57	45
58		/* if specified, this gets called for every change of the disply enable signal */
59		devcb_write_line m_out_de_func;
	46	#define MCFG_CRTC_EGA_RES_OUT_HSYNC_CB(_devcb) \
	47	devcb = &crtc_ega_device::set_res_out_hsync_callback(*device, DEVCB2_##_devcb);
60	48
61		/* if specified, this gets called for every change of the HSYNC signal */
62		devcb_write_line m_out_hsync_func;
	49	#define MCFG_CRTC_EGA_RES_OUT_VSYNC_CB(_devcb) \
	50	devcb = &crtc_ega_device::set_res_out_vsync_callback(*device, DEVCB2_##_devcb);
63	51
64		/* if specified, this gets called for every change of the VSYNC signal */
65		devcb_write_line m_out_vsync_func;
	52	#define MCFG_CRTC_EGA_RES_OUT_VBLANK_CB(_devcb) \
	53	devcb = &crtc_ega_device::set_res_out_vblank_callback(*device, DEVCB2_##_devcb);
66	54
67		devcb_write_line m_out_vblank_func;
68		};
69	55
70
71	56	class crtc_ega_device : public device_t,
72		public device_video_interface,
73		public crtc_ega_interface
	57	public device_video_interface
74	58	{
75	59	public:
76	60	crtc_ega_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
77	61
	62	template<class _Object> static devcb2_base &set_res_out_de_callback(device_t &device, _Object object)
	63	{ return downcast<crtc_ega_device &>(device).m_res_out_de_cb.set_callback(object); }
	64	template<class _Object> static devcb2_base &set_res_out_hsync_callback(device_t &device, _Object object)
	65	{ return downcast<crtc_ega_device &>(device).m_res_out_hsync_cb.set_callback(object); }
	66	template<class _Object> static devcb2_base &set_res_out_vsync_callback(device_t &device, _Object object)
	67	{ return downcast<crtc_ega_device &>(device).m_res_out_vsync_cb.set_callback(object); }
	68	template<class _Object> static devcb2_base &set_res_out_vblank_callback(device_t &device, _Object object)
	69	{ return downcast<crtc_ega_device &>(device).m_res_out_vblank_cb.set_callback(object); }
	70
	71	static void set_begin_update_callback(device_t &device, crtc_ega_begin_update_delegate callback) { downcast<crtc_ega_device &>(device).m_begin_update_cb = callback; }
	72	static void set_row_update_callback(device_t &device, crtc_ega_row_update_delegate callback) { downcast<crtc_ega_device &>(device).m_row_update_cb = callback; }
	73	static void set_end_update_callback(device_t &device, crtc_ega_end_update_delegate callback) { downcast<crtc_ega_device &>(device).m_end_update_cb = callback; }
	74	static void set_hpixels_per_column(device_t &device, int hpixels_per_column) { downcast<crtc_ega_device &>(device).m_hpixels_per_column = hpixels_per_column; }
	75
78	76	/* select one of the registers for reading or writing */
79	77	DECLARE_WRITE8_MEMBER( address_w );
80	78
r29542	r29543
106	104
107	105	protected:
108	106	// device-level overrides
109		virtual void device_config_complete();
110	107	virtual void device_start();
111	108	virtual void device_reset();
112	109	virtual void device_post_load();
113	110	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
114	111
115	112	private:
116		devcb_resolved_write_line m_res_out_de_func;
117		devcb_resolved_write_line m_res_out_cur_func;
118		devcb_resolved_write_line m_res_out_hsync_func;
119		devcb_resolved_write_line m_res_out_vsync_func;
120		devcb_resolved_write_line m_res_out_vblank_func;
	113	devcb2_write_line m_res_out_de_cb;
	114	devcb2_write_line m_res_out_hsync_cb;
	115	devcb2_write_line m_res_out_vsync_cb;
	116	devcb2_write_line m_res_out_vblank_cb;
121	117
	118	/* if specified, this gets called before any pixel update,
	119	optionally return a pointer that will be passed to the
	120	update and tear down callbacks */
	121	crtc_ega_begin_update_delegate m_begin_update_cb;
	122
	123	/* this gets called for every row, the driver must output
	124	x_count * hpixels_per_column pixels.
	125	cursor_x indicates the character position where the cursor is, or -1
	126	if there is no cursor on this row */
	127	crtc_ega_row_update_delegate m_row_update_cb;
	128
	129	/* if specified, this gets called after all row updating is complete */
	130	crtc_ega_end_update_delegate m_end_update_cb;
	131
122	132	/* ega/vga register file */
123	133	UINT8 m_horiz_char_total; /* 0x00 */
124	134	UINT8 m_horiz_disp; /* 0x01 */
r29542	r29543
157	167	UINT8 m_register_address_latch;
158	168	bool m_cursor_state; /* 0 = off, 1 = on */
159	169	UINT8 m_cursor_blink_count;
	170	int m_hpixels_per_column; /* number of pixels per video memory address */
160	171
161	172	/* output signals */
162	173	int m_cur;

branches/new_menus/src/emu/video/hd63484.c
r29542	r29543
58	58	m_rwp_dn(0),
59	59	m_cpx(0),
60	60	m_cpy(0),
61		m_regno(0)
	61	m_regno(0),
	62	m_skattva_hack(0)
62	63	{
63	64	}
64	65
65	66	//-------------------------------------------------
66		// device_config_complete - perform any
67		// operations now that the configuration is
68		// complete
69		//-------------------------------------------------
70
71		void hd63484_device::device_config_complete()
72		{
73		// inherit a copy of the static data
74		const hd63484_interface intf = reinterpret_cast<const hd63484_interface >(static_config());
75		if (intf != NULL)
76		static_cast<hd63484_interface >(this) = *intf;
77
78		// or initialize to defaults if none provided
79		else
80		{
81		m_skattva_hack = 0;
82		}
83		}
84
85		//-------------------------------------------------
86	67	// device_start - device-specific startup
87	68	//-------------------------------------------------
88	69
r29542	r29543
122	103	save_item(NAME(m_cpx));
123	104	save_item(NAME(m_cpy));
124	105	save_item(NAME(m_regno));
125		save_item(NAME(m_skattva_hack));
126	106	}
127	107
128	108	//-------------------------------------------------

branches/new_menus/src/emu/video/hd63484.h
r29542	r29543
21	21	TYPE DEFINITIONS
22	22	***************************************************************************/
23	23
24		~~stru~~ct hd63484_inte~~rfa~~ce
	24	class hd63484_device : public device_t
25	25	{
26		int m_skattva_hack;
27		};
28
29		class hd63484_device : public device_t,
30		public hd63484_interface
31		{
32	26	public:
33	27	hd63484_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
34	28	~hd63484_device() {}
r29542	r29543
45	39
46	40	protected:
47	41	// device-level overrides
48		virtual void device_config_complete();
49	42	virtual void device_start();
50	43	virtual void device_reset();
51	44
r29542	r29543
64	57	INT16 m_cpx, m_cpy;
65	58
66	59	int m_regno;
	60	int m_skattva_hack;
67	61
68	62	void doclr16( int opcode, UINT16 fill, int *dst, INT16 _ax, INT16 _ay );
69	63	void docpy16( int opcode, int src, int *dst, INT16 _ax, INT16 _ay );
r29542	r29543
78	72	void paint( int sx, int sy, int col );
79	73
80	74	void command_w(UINT16 cmd);
81
82	75	};
83	76
84	77	extern ATTR_DEPRECATED const device_type HD63484;
85	78
86
87		/***************************************************************************
88		DEVICE CONFIGURATION MACROS
89		***************************************************************************/
90
91		#define MCFG_HD63484_ADD(_tag, _interface) \
92		MCFG_DEVICE_ADD(_tag, HD63484, 0) \
93		MCFG_DEVICE_CONFIG(_interface)
94
95	79	#endif /* __HD63484_H__ */

branches/new_menus/src/emu/video/mb_vcu.c
r29542	r29543
156	156	device_video_interface(mconfig, *this),
157	157	m_videoram_space_config("videoram", ENDIANNESS_LITTLE, 8, 19, 0, NULL, *ADDRESS_MAP_NAME(mb_vcu_vram)),
158	158	m_paletteram_space_config("palram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(mb_vcu_pal_ram)),
	159	m_cpu(*this),
159	160	m_palette(*this)
160	161	{
161	162	}
162	163
163	164	//-------------------------------------------------
164		// device_config_complete - perform any
165		// operations now that the configuration is
166		// complete
167		//-------------------------------------------------
168
169		void mb_vcu_device::device_config_complete()
170		{
171		// inherit a copy of the static data
172		const mb_vcu_interface intf = reinterpret_cast<const mb_vcu_interface >(static_config());
173		if (intf != NULL)
174		{
175		static_cast<mb_vcu_interface >(this) = *intf;
176		}
177
178		// or initialize to defaults if none provided
179		else
180		{
181		m_cpu_tag = NULL;
182		//m_screen_tag = NULL;
183		}
184		}
185
186		//-------------------------------------------------
187	165	// device_validity_check - perform validity checks
188	166	// on this device
189	167	//-------------------------------------------------
r29542	r29543
200	178	void mb_vcu_device::device_start()
201	179	{
202	180	// TODO: m_screen_tag
203		m_cpu = machine().device<cpu_device>(m_cpu_tag);
204	181	m_ram = auto_alloc_array_clear(machine(), UINT8, 0x800);
205	182	m_palram = auto_alloc_array_clear(machine(), UINT8, 0x100);
206	183

branches/new_menus/src/emu/video/mb_vcu.h
r29542	r29543
1	1	// license: ?
2	2	// copyright-holders: Angelo Salese
3		/***************************************************************************
4
5		Template for skeleton device
6
7		***************************************************************************/
8
9	3	#pragma once
10	4
11	5	#ifndef __MB_VCUDEV_H__
12	6	#define __MB_VCUDEV_H__
13	7
14	8
15
16	9	//**************************************************************************
17		// INTERFACE CONFIGURATION MACROS
18		//**************************************************************************
19
20		#define MCFG_MB_VCU_ADD(_tag,_freq,_config, _palette_tag) \
21		MCFG_DEVICE_ADD(_tag, MB_VCU, _freq) \
22		MCFG_DEVICE_CONFIG(_config) \
23		mb_vcu_device::static_set_palette_tag(*device, "^" _palette_tag);
24
25		//**************************************************************************
26	10	// TYPE DEFINITIONS
27	11	//**************************************************************************
28	12
29		// ======================> mb_vcu_interface
30
31		struct mb_vcu_interface
32		{
33		const char *m_cpu_tag;
34		};
35
36	13	// ======================> mb_vcu_device
37	14
38	15	class mb_vcu_device : public device_t,
39	16	public device_memory_interface,
40		public device_video_interface,
41		public mb_vcu_interface
	17	public device_video_interface
42	18	{
43	19	public:
44	20	// construction/destruction
r29542	r29543
46	22
47	23	// static configuration
48	24	static void static_set_palette_tag(device_t &device, const char *tag);
	25	static void set_cpu_tag(device_t &device, const char *tag) { downcast<mb_vcu_device &>(device).m_cpu.set_tag(tag); }
49	26
50	27	// I/O operations
51	28	DECLARE_WRITE8_MEMBER( write_vregs );
r29542	r29543
65	42
66	43	protected:
67	44	// device-level overrides
68		virtual void device_config_complete();
69	45	virtual void device_validity_check(validity_checker &valid) const;
70	46	virtual void device_start();
71	47	virtual void device_reset();
r29542	r29543
81	57	UINT8 m_status;
82	58	UINT8 *m_ram;
83	59	UINT8 *m_palram;
84		cpu_device *m_cpu;
85	60	UINT16 m_param_offset_latch;
86	61
87	62	INT16 m_xpos, m_ypos;
r29542	r29543
95	70	double m_weights_r[2];
96	71	double m_weights_g[3];
97	72	double m_weights_b[3];
	73	required_device<cpu_device> m_cpu;
98	74	required_device<palette_device> m_palette;
99	75	};
100	76
r29542	r29543
103	79	extern const device_type MB_VCU;
104	80
105	81
106
107	82	//**************************************************************************
108		// ~~GLOB~~AL VARIA~~BLE~~S
	83	// INTERFACE CONFIGURATION MACROS
109	84	//**************************************************************************
110	85
	86	#define MCFG_MB_VCU_CPU(_tag) \
	87	mb_vcu_device::set_cpu_tag(*device, "^"_tag);
111	88
	89	#define MCFG_MB_VCU_PALETTE(_palette_tag) \
	90	mb_vcu_device::static_set_palette_tag(*device, "^" _palette_tag);
112	91
113	92	#endif

branches/new_menus/src/lib/formats/td0_dsk.c
r29542	r29543
823	823	dynamic_buffer imagebuf(max_size);
824	824	UINT8 header[12];
825	825
826		try
	826	io_generic_read(io, header, 0, 12);
	827	head_count = header[9];
	828
	829	if(header[0] == 't')
827	830	{
828		io_generic_read(io, header, 0, 12);
829		head_count = header[9];
	831	td0dsk_t disk_decode;
830	832
831		if(header[0] == 't')
832		{
833		td0dsk_t disk_decode;
	833	disk_decode.floppy_file = io;
	834	disk_decode.init_Decode();
	835	disk_decode.floppy_file_offset = 12;
	836	disk_decode.Decode(imagebuf, max_size);
	837	}
	838	else
	839	io_generic_read(io, imagebuf, 12, io_generic_size(io));
834	840
835		disk_decode.floppy_file = io;
836		disk_decode.init_Decode();
837		disk_decode.floppy_file_offset = 12;
838		disk_decode.Decode(imagebuf, max_size);
839		}
840		else
841		io_generic_read(io, imagebuf, 12, io_generic_size(io));
	841	if(header[7] & 0x80)
	842	offset = 10 + imagebuf[2] + (imagebuf[3] << 8);
842	843
843		if(header[7] & 0x80)
844		offset = 10 + imagebuf[2] + (imagebuf[3] << 8);
	844	track_spt = imagebuf[offset];
	845	if(track_spt == 255) // Empty file?
	846	return false;
845	847
846		track_spt = imagebuf[offset];
847		if(track_spt == 255) // Empty file?
848		throw false;
849
850		switch(header[6])
851		{
852		case 2:
853		if((imagebuf[offset + 2] & 0x7f) == 2) // ?
854		{
855		if(head_count == 2)
856		image->set_variant(floppy_image::DSHD);
857		else
858		throw false; // single side hd?
859		break;
860		}
861		/* no break; could be qd, won't know until tracks are counted */
862		case 1:
	848	switch(header[6])
	849	{
	850	case 2:
	851	if((imagebuf[offset + 2] & 0x7f) == 2) // ?
	852	{
863	853	if(head_count == 2)
864		image->set_variant(floppy_image::DSDD);
	854	image->set_variant(floppy_image::DSHD);
865	855	else
866		~~imag~~e~~->se~~t~~_va~~riant(fl~~oppy_~~image~~::SSDD);~~
	856	return false; // single side hd?
867	857	break;
868		case 4:
869		if((imagebuf[offset + 2] & 0x7f) == 2) // ?
870		{
871		if(head_count == 2)
872		image->set_variant(floppy_image::DSHD);
873		else
874		throw false; // single side 3.5?
875		break;
876		}
877		/* no break */
878		case 3:
	858	}
	859	/* no break; could be qd, won't know until tracks are counted */
	860	case 1:
	861	if(head_count == 2)
	862	image->set_variant(floppy_image::DSDD);
	863	else
	864	image->set_variant(floppy_image::SSDD);
	865	break;
	866	case 4:
	867	if((imagebuf[offset + 2] & 0x7f) == 2) // ?
	868	{
879	869	if(head_count == 2)
880		{
881		if(form_factor == floppy_image::FF_525)
882		image->set_variant(floppy_image::DSQD);
883		else
884		image->set_variant(floppy_image::DSDD);
885		}
	870	image->set_variant(floppy_image::DSHD);
886	871	else
887		{
888		if(form_factor == floppy_image::FF_525)
889		image->set_variant(floppy_image::SSQD);
890		else
891		throw false; // single side 3.5?
892		}
	872	return false; // single side 3.5?
893	873	break;
894		}
	874	}
	875	/* no break */
	876	case 3:
	877	if(head_count == 2)
	878	{
	879	if(form_factor == floppy_image::FF_525)
	880	image->set_variant(floppy_image::DSQD);
	881	else
	882	image->set_variant(floppy_image::DSDD);
	883	}
	884	else
	885	{
	886	if(form_factor == floppy_image::FF_525)
	887	image->set_variant(floppy_image::SSQD);
	888	else
	889	return false; // single side 3.5?
	890	}
	891	break;
	892	}
895	893
896		static const int rates[3] = { 250000, 300000, 500000 };
897		int rate = (header[5] & 0x7f) >= 3 ? 500000 : rates[header[5] & 0x7f];
898		int rpm = form_factor == floppy_image::FF_8 \|\| (form_factor == floppy_image::FF_525 && rate >= 300000) ? 360 : 300;
899		int base_cell_count = rate*60/rpm;
	894	static const int rates[3] = { 250000, 300000, 500000 };
	895	int rate = (header[5] & 0x7f) >= 3 ? 500000 : rates[header[5] & 0x7f];
	896	int rpm = form_factor == floppy_image::FF_8 \|\| (form_factor == floppy_image::FF_525 && rate >= 300000) ? 360 : 300;
	897	int base_cell_count = rate*60/rpm;
900	898
901		while(track_spt != 255)
	899	while(track_spt != 255)
	900	{
	901	desc_pc_sector sects[256];
	902	UINT8 sect_data[65536];
	903	int sdatapos = 0;
	904	int track = imagebuf[offset + 1];
	905	int head = imagebuf[offset + 2] & 1;
	906	bool fm = (header[5] & 0x80) \|\| (imagebuf[offset + 2] & 0x80); // ?
	907	offset += 4;
	908	for(int i = 0; i < track_spt; i++)
902	909	{
903		desc_pc_sector sects[256];
904		UINT8 sect_data[65536];
905		int sdatapos = 0;
906		int track = imagebuf[offset + 1];
907		int head = imagebuf[offset + 2] & 1;
908		bool fm = (header[5] & 0x80) \|\| (imagebuf[offset + 2] & 0x80); // ?
909		offset += 4;
910		for(int i = 0; i < track_spt; i++)
911		{
912		UINT8 *hs = &imagebuf[offset];
913		UINT16 size;
914		offset += 6;
	910	UINT8 *hs = &imagebuf[offset];
	911	UINT16 size;
	912	offset += 6;
915	913
916		sects[i].track = hs[0];
917		sects[i].head = hs[1];
918		sects[i].sector = hs[2];
919		sects[i].size = hs[3];
920		sects[i].deleted = (hs[4] & 4) == 4;
921		sects[i].bad_crc = (hs[4] & 2) == 2;
	914	sects[i].track = hs[0];
	915	sects[i].head = hs[1];
	916	sects[i].sector = hs[2];
	917	sects[i].size = hs[3];
	918	sects[i].deleted = (hs[4] & 4) == 4;
	919	sects[i].bad_crc = (hs[4] & 2) == 2;
922	920
923		if(hs[4] & 0x30)
924		size = 0;
925		else
	921	if(hs[4] & 0x30)
	922	size = 0;
	923	else
	924	{
	925	offset += 3;
	926	size = 128 << hs[3];
	927	int j, k;
	928	switch(hs[8])
926	929	{
927		offset += 3;
928		size = 128 << hs[3];
929		int j, k;
930		switch(hs[8])
931		{
932		default:
933		throw false;
934		case 0:
935		memcpy(&sect_data[sdatapos], &imagebuf[offset], size);
936		offset += size;
937		break;
938		case 1:
939		offset += 4;
940		k = (hs[9] + (hs[10] << 8)) * 2;
941		k = (k <= size) ? k : size;
942		for(j = 0; j < k; j += 2)
	930	default:
	931	return false;
	932	case 0:
	933	memcpy(&sect_data[sdatapos], &imagebuf[offset], size);
	934	offset += size;
	935	break;
	936	case 1:
	937	offset += 4;
	938	k = (hs[9] + (hs[10] << 8)) * 2;
	939	k = (k <= size) ? k : size;
	940	for(j = 0; j < k; j += 2)
	941	{
	942	sect_data[sdatapos + j] = hs[11];
	943	sect_data[sdatapos + j + 1] = hs[12];
	944	}
	945	if(k < size)
	946	memset(&sect_data[sdatapos + k], '\0', size - k);
	947	break;
	948	case 2:
	949	k = 0;
	950	while(k < size)
	951	{
	952	UINT16 len = imagebuf[offset];
	953	UINT16 rep = imagebuf[offset + 1];
	954	offset += 2;
	955	if(!len)
943	956	{
944		sect_data[sdatapos + j] = hs[11];
945		sect_data[sdatapos + j + 1] = hs[12];
	957	memcpy(&sect_data[sdatapos + k], &imagebuf[offset], rep);
	958	offset += rep;
	959	k += rep;
946	960	}
947		if(k < size)
948		memset(&sect_data[sdatapos + k], '\0', size - k);
949		break;
950		case 2:
951		k = 0;
952		while(k < size)
	961	else
953	962	{
954		UINT16 len = imagebuf[offset];
955		UINT16 rep = imagebuf[offset + 1];
956		offset += 2;
957		if(!len)
958		{
959		memcpy(&sect_data[sdatapos + k], &imagebuf[offset], rep);
960		offset += rep;
961		k += rep;
962		}
963		else
964		{
965		len = (1 << len);
966		rep = len * rep;
967		rep = ((rep + k) <= size) ? rep : (size - k);
968		for(j = 0; j < rep; j += len)
969		memcpy(&sect_data[sdatapos + j + k], &imagebuf[offset], len);
970		k += rep;
971		offset += len;
972		}
	963	len = (1 << len);
	964	rep = len * rep;
	965	rep = ((rep + k) <= size) ? rep : (size - k);
	966	for(j = 0; j < rep; j += len)
	967	memcpy(&sect_data[sdatapos + j + k], &imagebuf[offset], len);
	968	k += rep;
	969	offset += len;
973	970	}
974		break;
975		}
	971	}
	972	break;
976	973	}
	974	}
977	975
978		sects[i].actual_size = size;
	976	sects[i].actual_size = size;
979	977
980		if(size)
981		{
982		sects[i].data = &sect_data[sdatapos];
983		sdatapos += size;
984		}
985		else
986		sects[i].data = NULL;
	978	if(size)
	979	{
	980	sects[i].data = &sect_data[sdatapos];
	981	sdatapos += size;
987	982	}
988		track_count = track;
989
990		if(fm)
991		build_pc_track_fm(track, head, image, base_cell_count, track_spt, sects, calc_default_pc_gap3_size(form_factor, sects[0].actual_size));
992	983	else
993		build_pc_track_mfm(track, head, image, base_cell_count*2, track_spt, sects, calc_default_pc_gap3_size(form_factor, sects[0].actual_size));
994
995		track_spt = imagebuf[offset];
	984	sects[i].data = NULL;
996	985	}
997		if((track_count > 50) && (form_factor == floppy_image::FF_525)) // ?
998		{
999		if(image->get_variant() == floppy_image::DSDD)
1000		image->set_variant(floppy_image::DSQD);
1001		else if(image->get_variant() == floppy_image::SSDD)
1002		image->set_variant(floppy_image::SSQD);
1003		}
1004		throw true;
	986	track_count = track;
	987
	988	if(fm)
	989	build_pc_track_fm(track, head, image, base_cell_count, track_spt, sects, calc_default_pc_gap3_size(form_factor, sects[0].actual_size));
	990	else
	991	build_pc_track_mfm(track, head, image, base_cell_count*2, track_spt, sects, calc_default_pc_gap3_size(form_factor, sects[0].actual_size));
	992
	993	track_spt = imagebuf[offset];
1005	994	}
1006		catch(bool ret)
	995	if((track_count > 50) && (form_factor == floppy_image::FF_525)) // ?
1007	996	{
1008		return ret;
	997	if(image->get_variant() == floppy_image::DSDD)
	998	image->set_variant(floppy_image::DSQD);
	999	else if(image->get_variant() == floppy_image::SSDD)
	1000	image->set_variant(floppy_image::SSQD);
1009	1001	}
1010		return ~~fals~~e;
	1002	return true;
1011	1003	}
1012	1004
1013	1005

branches/new_menus/hash/gameboy.xml
r29542	r29543
15933	15933	<part name="cart" interface="gameboy_cart">
15934	15934	<feature name="slot" value="rom_mbc1" />
15935	15935	<dataarea name="rom" size="65536">
15936		<rom name="power racer (~~usa,~~ europe).bin" size="65536" crc="cf8aeee8" sha1="6e10f59bb4090c0d0e79b57a2e39d9577ce0282e" offset="000000" />
	15936	<rom name="power racer (europe).bin" size="65536" crc="cf8aeee8" sha1="6e10f59bb4090c0d0e79b57a2e39d9577ce0282e" offset="000000" />
15937	15937	</dataarea>
15938	15938	</part>
15939	15939	</software>
r29542	r29543
15946	15946	<part name="cart" interface="gameboy_cart">
15947	15947	<feature name="slot" value="rom_mbc1" />
15948	15948	<dataarea name="rom" size="65536">
15949		<rom name="power racer (usa~~, europe~~).bin" size="65536" crc="afc6a949" sha1="c0c8f28a9b66b6c08a0ed4d31a186c3382160c3d" offset="000000" />
	15949	<rom name="power racer (usa).bin" size="65536" crc="afc6a949" sha1="c0c8f28a9b66b6c08a0ed4d31a186c3382160c3d" offset="000000" />
15950	15950	</dataarea>
15951	15951	</part>
15952	15952	</software>

Property changes on: branches/new_menus
Modified: svn:mergeinfo Merged /trunk:r29483-29505

199869 Revisions