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r29439 Tuesday 8th April, 2014 at 09:28:25 UTC by Fabio Priuli
nes ppu: converted to use inline config + removed some unused config values. nw. vsnes/playch10: reduce tagmap lookups at runtime. nw.

[src/mame/drivers]	cham24.c famibox.c multigam.c playch10.c vsnes.c
[src/mame/includes]	playch10.h vsnes.h
[src/mame/machine]	playch10.c vsnes.c
[src/mame/video]	playch10.c ppu2c0x.c ppu2c0x.h vsnes.c
[src/mess/drivers]	nes.c

trunk/src/mess/drivers/nes.c

r29438	r29439
652	652	}
653	653
654	654
655		static const ppu2c0x_interface nes_ppu_interface =
656		{
657		"maincpu",
658		0,
659		0,
660		PPU_MIRROR_NONE
661		};
662
663	655	static const floppy_interface nes_floppy_interface =
664	656	{
665	657	DEVCB_NULL,
r29438	r29439
710	702	MCFG_PALETTE_ADD("palette", 4*16*8)
711	703	MCFG_PALETTE_INIT_OWNER(nes_state, nes)
712	704
713		MCFG_PPU2C02_ADD("ppu", nes_ppu_interface)
	705	MCFG_PPU2C02_ADD("ppu")
	706	MCFG_PPU2C0X_CPU("maincpu")
714	707	MCFG_PPU2C0X_SET_NMI(nes_state, ppu_nmi)
715	708
716	709	/* sound hardware */
r29438	r29439
734	727	MCFG_CPU_CLOCK(PAL_CLOCK)
735	728
736	729	MCFG_DEVICE_REMOVE("ppu")
737		MCFG_PPU2C07_ADD("ppu", nes_ppu_interface)
	730	MCFG_PPU2C07_ADD("ppu")
	731	MCFG_PPU2C0X_CPU("maincpu")
738	732	MCFG_PPU2C0X_SET_NMI(nes_state, ppu_nmi)
739	733
740	734	/* video hardware */
r29438	r29439
757	751	MCFG_CPU_CLOCK( 26601712/15 ) /* 26.601712MHz / 15 == 1.77344746666... MHz */
758	752
759	753	MCFG_DEVICE_REMOVE("ppu")
760		MCFG_PPU2C07_ADD("ppu", nes_ppu_interface)
	754	MCFG_PPU2C07_ADD("ppu")
	755	MCFG_PPU2C0X_CPU("maincpu")
761	756	MCFG_PPU2C0X_SET_NMI(nes_state, ppu_nmi)
762	757
763	758	/* video hardware */

trunk/src/mame/includes/vsnes.h

r29438	r29439
128	128
129	129	DECLARE_READ8_MEMBER( vsnes_bootleg_z80_latch_r );
130	130	};
131
132		/*----------- defined in video/vsnes.c -----------*/
133		extern const ppu2c0x_interface vsnes_ppu_interface_1;
134		extern const ppu2c0x_interface vsnes_ppu_interface_2;

trunk/src/mame/includes/playch10.h

r29438	r29439
142	142	void ppu_irq(int *ppu_regs);
143	143	void mapper9_latch(offs_t offset);
144	144	};
145
146		/*----------- defined in video/playch10.c -----------*/
147		extern const ppu2c0x_interface playch10_ppu_interface;

trunk/src/mame/video/ppu2c0x.c

r29438	r29439
111	111
112	112	void ppu2c0x_device::device_config_complete()
113	113	{
114		const ppu2c0x_interface *config = reinterpret_cast<const ppu2c0x_interface *>(static_config());
115		assert(config);
116
117	114	/* reset the callbacks */
118	115	m_latch = ppu2c0x_latch_delegate();
119	116	m_scanline_callback_proc = ppu2c0x_scanline_delegate();
120	117	m_hblank_callback_proc = ppu2c0x_hblank_delegate();
121	118	m_vidaccess_callback_proc = ppu2c0x_vidaccess_delegate();
122
123		m_color_base = config->color_base;
124
125		m_cpu_tag = config->cpu_tag;
126	119	}
127	120
128	121	ppu2c0x_device::ppu2c0x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
r29438	r29439
130	123	device_memory_interface(mconfig, *this),
131	124	device_video_interface(mconfig, *this),
132	125	m_space_config("videoram", ENDIANNESS_LITTLE, 8, 17, 0, NULL, *ADDRESS_MAP_NAME(ppu2c0x)),
	126	m_cpu(*this),
133	127	m_scanline(0),  // reset the scanline count
134	128	m_refresh_data(0),
135	129	m_refresh_latch(0),
r29438	r29439
142	136	m_tile_page(0),
143	137	m_sprite_page(0),
144	138	m_back_color(0),
	139	m_color_base(0),
145	140	m_scan_scale(1), // set the scan scale (this is for dual monitor vertical setups)
146	141	m_tilecount(0),
147	142	m_draw_phase(0)
r29438	r29439
210	205
211	206	void ppu2c0x_device::device_start()
212	207	{
213		m_cpu = machine().device<cpu_device>( m_cpu_tag );
214
215		assert(m_cpu);
216
217	208	// bind our handler
218	209	m_nmi_callback_proc.bind_relative_to(*owner());
219	210

trunk/src/mame/video/ppu2c0x.h

r29438	r29439
83	83	//  INTERFACE CONFIGURATION MACROS
84	84	///*************************************************************************
85	85
86		#define MCFG_PPU2C0X_ADD(_tag, _type, _intrf)   \
87		MCFG_DEVICE_ADD(_tag, _type, 0) \
88		MCFG_DEVICE_CONFIG(_intrf)
	86	#define MCFG_PPU2C0X_ADD(_tag, _type)   \
	87	MCFG_DEVICE_ADD(_tag, _type, 0)
89	88
90		#define MCFG_PPU2C02_ADD(_tag, _intrf)   \
91		MCFG_PPU2C0X_ADD(_tag, PPU_2C02, _intrf)
92		#define MCFG_PPU2C03B_ADD(_tag, _intrf)   \
93		MCFG_PPU2C0X_ADD(_tag, PPU_2C03B, _intrf)
94		#define MCFG_PPU2C04_ADD(_tag, _intrf)   \
95		MCFG_PPU2C0X_ADD(_tag, PPU_2C04, _intrf)
96		#define MCFG_PPU2C07_ADD(_tag, _intrf)   \
97		MCFG_PPU2C0X_ADD(_tag, PPU_2C07, _intrf)
98		#define MCFG_PPU2C05_01_ADD(_tag, _intrf)   \
99		MCFG_PPU2C0X_ADD(_tag, PPU_2C05_01, _intrf)
100		#define MCFG_PPU2C05_02_ADD(_tag, _intrf)   \
101		MCFG_PPU2C0X_ADD(_tag, PPU_2C05_02, _intrf)
102		#define MCFG_PPU2C05_03_ADD(_tag, _intrf)   \
103		MCFG_PPU2C0X_ADD(_tag, PPU_2C05_03, _intrf)
104		#define MCFG_PPU2C05_04_ADD(_tag, _intrf)   \
105		MCFG_PPU2C0X_ADD(_tag, PPU_2C05_04, _intrf)
	89	#define MCFG_PPU2C02_ADD(_tag)   \
	90	MCFG_PPU2C0X_ADD(_tag, PPU_2C02)
	91	#define MCFG_PPU2C03B_ADD(_tag)   \
	92	MCFG_PPU2C0X_ADD(_tag, PPU_2C03B)
	93	#define MCFG_PPU2C04_ADD(_tag)   \
	94	MCFG_PPU2C0X_ADD(_tag, PPU_2C04)
	95	#define MCFG_PPU2C07_ADD(_tag)   \
	96	MCFG_PPU2C0X_ADD(_tag, PPU_2C07)
	97	#define MCFG_PPU2C05_01_ADD(_tag)   \
	98	MCFG_PPU2C0X_ADD(_tag, PPU_2C05_01)
	99	#define MCFG_PPU2C05_02_ADD(_tag)   \
	100	MCFG_PPU2C0X_ADD(_tag, PPU_2C05_02)
	101	#define MCFG_PPU2C05_03_ADD(_tag)   \
	102	MCFG_PPU2C0X_ADD(_tag, PPU_2C05_03)
	103	#define MCFG_PPU2C05_04_ADD(_tag)   \
	104	MCFG_PPU2C0X_ADD(_tag, PPU_2C05_04)
106	105
107	106	#define MCFG_PPU2C0X_SET_SCREEN MCFG_VIDEO_SET_SCREEN
108	107
109		#define MCFG_PPU2C0X_SET_NMI( _class, _method) \
	108	#define MCFG_PPU2C0X_CPU(_tag) \
	109	ppu2c0x_device::set_cpu_tag(*device, "^"_tag);
	110
	111	#define MCFG_PPU2C0X_COLORBASE(_color) \
	112	ppu2c0x_device::set_color_base(*device, _color);
	113
	114	#define MCFG_PPU2C0X_SET_NMI(_class, _method) \
110	115	ppu2c0x_device::set_nmi_delegate(*device, ppu2c0x_nmi_delegate(&_class::_method, #_class "::" #_method, NULL, (_class *)0));
111	116
	117
112	118	///*************************************************************************
113	119	//  TYPE DEFINITIONS
114	120	///*************************************************************************
r29438	r29439
119	125	typedef device_delegate<void (offs_t offset)> ppu2c0x_latch_delegate;
120	126
121	127
122		// ======================> ppu2c0x_interface
123
124		struct ppu2c0x_interface
125		{
126		const char        *cpu_tag;
127		int               gfx_layout_number;        /* gfx layout number used by each chip */
128		int               color_base;               /* color base to use per ppu */
129		int               mirroring;                /* mirroring options (PPU_MIRROR_* flag) */
130		};
131
132
133	128	// ======================> ppu2c0x_device
134	129
135	130	class ppu2c0x_device :  public device_t,
136	131	public device_memory_interface,
137		public device_video_interface,
138		public ppu2c0x_interface
	132	public device_video_interface
139	133	{
140	134	public:
141	135	// construction/destruction
r29438	r29439
154	148	// address space configurations
155	149	const address_space_config      m_space_config;
156	150
	151	static void set_cpu_tag(device_t &device, const char *tag) { downcast<ppu2c0x_device &>(device).m_cpu.set_tag(tag); }
	152	static void set_color_base(device_t &device, int colorbase) { downcast<ppu2c0x_device &>(device).m_color_base = colorbase; }
	153	static void set_nmi_delegate(device_t &device, ppu2c0x_nmi_delegate cb);
157	154
158	155	/* routines */
159	156	void init_palette( palette_device &palette, int first_entry );
r29438	r29439
173	170	void set_scanline_callback( ppu2c0x_scanline_delegate cb ) { m_scanline_callback_proc = cb; m_scanline_callback_proc.bind_relative_to(*owner()); };
174	171	void set_hblank_callback( ppu2c0x_hblank_delegate cb ) { m_hblank_callback_proc = cb; m_hblank_callback_proc.bind_relative_to(*owner()); };
175	172	void set_vidaccess_callback( ppu2c0x_vidaccess_delegate cb ) { m_vidaccess_callback_proc = cb; m_vidaccess_callback_proc.bind_relative_to(*owner()); };
176		static void set_nmi_delegate(device_t &device,ppu2c0x_nmi_delegate cb);
177	173	void set_scanlines_per_frame( int scanlines ) { m_scanlines_per_frame = scanlines; };
178	174
179	175	// MMC5 has to be able to check this
r29438	r29439
186	182
187	183	//  void update_screen(bitmap_t &bitmap, const rectangle &cliprect);
188	184
189		cpu_device                  *m_cpu;
	185	required_device<cpu_device> m_cpu;
	186
190	187	bitmap_ind16                *m_bitmap;          /* target bitmap */
191	188	UINT8                       *m_spriteram;           /* sprite ram */
192	189	pen_t                       *m_colortable;          /* color table modified at run time */
r29438	r29439
222	219	emu_timer                   *m_nmi_timer;           /* NMI timer */
223	220	emu_timer                   *m_scanline_timer;      /* scanline timer */
224	221
225		const char        *m_cpu_tag;
226
227	222	private:
228	223	static const device_timer_id TIMER_HBLANK = 0;
229	224	static const device_timer_id TIMER_NMI = 1;

trunk/src/mame/video/playch10.c

r29438	r29439
17	17	PALETTE_INIT_MEMBER(playch10_state, playch10)
18	18	{
19	19	const UINT8 *color_prom = memregion("proms")->base();
20		ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
21		int i;
22	20
23		for (i = 0; i < 256; i++)
	21	for (int i = 0; i < 256; i++)
24	22	{
25	23	int bit0, bit1, bit2, bit3, r, g, b;
26	24
r29438	r29439
55	53	color_prom++;
56	54	}
57	55
58		ppu->init_palette_rgb(palette, 256);
	56	m_ppu->init_palette_rgb(palette, 256);
59	57	}
60	58
61	59	void playch10_state::ppu_irq(int *ppu_regs)
r29438	r29439
64	62	m_pc10_int_detect = 1;
65	63	}
66	64
67		/* our ppu interface                                           */
68		/* things like mirroring and whether to use vrom or vram       */
69		/* can be set by calling 'ppu2c0x_override_hardware_options'   */
70
71		const ppu2c0x_interface playch10_ppu_interface =
72		{
73		"cart",
74		1,                  /* gfxlayout num */
75		256,                /* color base */
76		PPU_MIRROR_NONE     /* mirroring */
77		};
78
79	65	TILE_GET_INFO_MEMBER(playch10_state::get_bg_tile_info)
80	66	{
81	67	UINT8 *videoram = m_videoram;
r29438	r29439
112	98
113	99	UINT32 playch10_state::screen_update_playch10_single(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
114	100	{
115		ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
116
117	101	rectangle top_monitor = screen.visible_area();
118	102
119		top_monitor.max_y = ( top_monitor.max_y - top_monitor.min_y ) / 2;
	103	top_monitor.max_y = (top_monitor.max_y - top_monitor.min_y) / 2;
120	104
121		if(m_pc10_dispmask_old != m_pc10_dispmask)
	105	if (m_pc10_dispmask_old != m_pc10_dispmask)
122	106	{
123	107	m_pc10_dispmask_old = m_pc10_dispmask;
124	108
125		if(m_pc10_dispmask)
	109	if (m_pc10_dispmask)
126	110	m_pc10_game_mode ^= 1;
127	111	}
128	112
129		if ( m_pc10_game_mode )
	113	if (m_pc10_game_mode)
130	114	/* render the ppu */
131		ppu->render(bitmap, 0, 0, 0, 0 );
	115	m_ppu->render(bitmap, 0, 0, 0, 0);
132	116	else
133	117	{
134	118	/* When the bios is accessing vram, the video circuitry can't access it */
135		if ( !m_pc10_sdcs )
	119	if (!m_pc10_sdcs)
136	120	m_bg_tilemap->draw(screen, bitmap, top_monitor, 0, 0);
137	121	}
138	122	return 0;
r29438	r29439
140	124
141	125	UINT32 playch10_state::screen_update_playch10_top(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
142	126	{
143		ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
144
145	127	/* Single Monitor version */
146	128	if (m_pc10_bios != 1)
147	129	return screen_update_playch10_single(screen, bitmap, cliprect);
148	130
149	131	if (!m_pc10_dispmask)
150	132	/* render the ppu */
151		ppu->render(bitmap, 0, 0, 0, 0);
	133	m_ppu->render(bitmap, 0, 0, 0, 0);
152	134	else
153	135	bitmap.fill(0, cliprect);
154	136
r29438	r29439
162	144	return screen_update_playch10_single(screen, bitmap, cliprect);
163	145
164	146	/* When the bios is accessing vram, the video circuitry can't access it */
165
166		if ( !m_pc10_sdcs )
	147	if (!m_pc10_sdcs)
167	148	m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
168	149	else
169	150	bitmap.fill(0, cliprect);

trunk/src/mame/video/vsnes.c

r29438	r29439
5	5
6	6	PALETTE_INIT_MEMBER(vsnes_state,vsnes)
7	7	{
8		ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu1");
9		ppu->init_palette_rgb(palette, 0 );
	8	m_ppu1->init_palette_rgb(palette, 0);
10	9	}
11	10
12	11	PALETTE_INIT_MEMBER(vsnes_state,vsdual)
13	12	{
14		ppu2c0x_device *ppu1 = machine().device<ppu2c0x_device>("ppu1");
15		ppu2c0x_device *ppu2 = machine().device<ppu2c0x_device>("ppu2");
16		ppu1->init_palette_rgb(palette, 0 );
17		ppu2->init_palette_rgb(palette, 8*4*16 );
	13	m_ppu1->init_palette_rgb(palette, 0);
	14	m_ppu2->init_palette_rgb(palette, 8 * 4 * 16);
18	15	}
19	16
20	17	void vsnes_state::ppu_irq_1(int *ppu_regs)
21	18	{
22		m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE );
	19	m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
23	20	}
24	21
25	22	void vsnes_state::ppu_irq_2(int *ppu_regs)
26	23	{
27		m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE );
	24	m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
28	25	}
29	26
30		/* our ppu interface                                            */
31		const ppu2c0x_interface vsnes_ppu_interface_1 =
32		{
33		"maincpu",
34		0,                  /* gfxlayout num */
35		0,                  /* color base */
36		PPU_MIRROR_NONE     /* mirroring */
37		};
38
39		/* our ppu interface for dual games                             */
40		const ppu2c0x_interface vsnes_ppu_interface_2 =
41		{
42		"sub",
43		1,                  /* gfxlayout num */
44		512,                /* color base */
45		PPU_MIRROR_NONE     /* mirroring */
46		};
47
48	27	VIDEO_START_MEMBER(vsnes_state,vsnes )
49	28	{
50	29	}
r29438	r29439
58	37	Display refresh
59	38
60	39	***************************************************************************/
	40
61	41	UINT32 vsnes_state::screen_update_vsnes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
62	42	{
63	43	/* render the ppu */
64		ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu1");
65		ppu->render(bitmap, 0, 0, 0, 0);
	44	m_ppu1->render(bitmap, 0, 0, 0, 0);
66	45	return 0;
67	46	}
68	47
69	48	UINT32 vsnes_state::screen_update_vsnes_bottom(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
70	49	{
71		ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu2");
72		ppu->render(bitmap, 0, 0, 0, 0);
	50	m_ppu2->render(bitmap, 0, 0, 0, 0);
73	51	return 0;
74	52	}

trunk/src/mame/drivers/cham24.c

r29438	r29439
291	291	m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
292	292	}
293	293
294		/* our ppu interface                                            */
295		static const ppu2c0x_interface ppu_interface =
296		{
297		"maincpu",
298		0,                  /* gfxlayout num */
299		0,                  /* color base */
300		PPU_MIRROR_NONE     /* mirroring */
301		};
302
303	294	void cham24_state::video_start()
304	295	{
305	296	}
r29438	r29439
362	353	MCFG_PALETTE_ADD("palette", 8*4*16)
363	354	MCFG_PALETTE_INIT_OWNER(cham24_state, cham24)
364	355
365		MCFG_PPU2C04_ADD("ppu", ppu_interface)
	356	MCFG_PPU2C04_ADD("ppu")
	357	MCFG_PPU2C0X_CPU("maincpu")
366	358	MCFG_PPU2C0X_SET_NMI(cham24_state, ppu_irq)
367	359
368	360	/* sound hardware */

trunk/src/mame/drivers/famibox.c

r29438	r29439
526	526	m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
527	527	}
528	528
529		/* our ppu interface                                            */
530		static const ppu2c0x_interface ppu_interface =
531		{
532		"maincpu",
533		0,                  /* gfxlayout num */
534		0,                  /* color base */
535		PPU_MIRROR_NONE     /* mirroring */
536		};
537
538	529	void famibox_state::video_start()
539	530	{
540	531	}
r29438	r29439
596	587	MCFG_PALETTE_ADD("palette", 8*4*16)
597	588	MCFG_PALETTE_INIT_OWNER(famibox_state, famibox)
598	589
599
600		MCFG_PPU2C04_ADD("ppu", ppu_interface)
	590	MCFG_PPU2C04_ADD("ppu")
	591	MCFG_PPU2C0X_CPU("maincpu")
601	592	MCFG_PPU2C0X_SET_NMI(famibox_state, ppu_irq)
602	593
603	594	/* sound hardware */

trunk/src/mame/drivers/playch10.c

r29438	r29439
665	665	"cart"
666	666	};
667	667
668
669	668	static MACHINE_CONFIG_START( playch10, playch10_state )
670	669	// basic machine hardware
671	670	MCFG_CPU_ADD("maincpu", Z80, 8000000/2) // 4 MHz
r29438	r29439
697	696	MCFG_SCREEN_UPDATE_DRIVER(playch10_state, screen_update_playch10_bottom)
698	697	MCFG_SCREEN_PALETTE("palette")
699	698
700
701		MCFG_PPU2C03B_ADD("ppu", playch10_ppu_interface)
	699	MCFG_PPU2C03B_ADD("ppu")
702	700	MCFG_PPU2C0X_SET_SCREEN("bottom")
	701	MCFG_PPU2C0X_CPU("cart")
	702	MCFG_PPU2C0X_COLORBASE(256)
703	703	MCFG_PPU2C0X_SET_NMI(playch10_state, ppu_irq)
704	704
705	705	// sound hardware

trunk/src/mame/drivers/vsnes.c

r29438	r29439
1728	1728	MCFG_PALETTE_INIT_OWNER(vsnes_state,vsnes)
1729	1729	MCFG_VIDEO_START_OVERRIDE(vsnes_state,vsnes)
1730	1730
1731		MCFG_PPU2C04_ADD("ppu1", vsnes_ppu_interface_1)
	1731	MCFG_PPU2C04_ADD("ppu1")
1732	1732	MCFG_PPU2C0X_SET_SCREEN("screen1")
	1733	MCFG_PPU2C0X_CPU("maincpu")
1733	1734	MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
1734	1735
1735	1736	/* sound hardware */
r29438	r29439
1746	1747	static MACHINE_CONFIG_DERIVED( jajamaru, vsnes )
1747	1748
1748	1749	MCFG_DEVICE_REMOVE( "ppu1" )
1749		MCFG_PPU2C05_01_ADD("ppu1", vsnes_ppu_interface_1)
	1750	MCFG_PPU2C05_01_ADD("ppu1")
1750	1751	MCFG_PPU2C0X_SET_SCREEN("screen1")
	1752	MCFG_PPU2C0X_CPU("maincpu")
1751	1753	MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
1752	1754	MACHINE_CONFIG_END
1753	1755
1754	1756	static MACHINE_CONFIG_DERIVED( mightybj, vsnes )
1755	1757
1756	1758	MCFG_DEVICE_REMOVE( "ppu1" )
1757		MCFG_PPU2C05_02_ADD("ppu1", vsnes_ppu_interface_1)
	1759	MCFG_PPU2C05_02_ADD("ppu1")
1758	1760	MCFG_PPU2C0X_SET_SCREEN("screen1")
	1761	MCFG_PPU2C0X_CPU("maincpu")
1759	1762	MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
1760	1763	MACHINE_CONFIG_END
1761	1764
1762	1765	static MACHINE_CONFIG_DERIVED( vsgshoe, vsnes )
1763	1766
1764	1767	MCFG_DEVICE_REMOVE( "ppu1" )
1765		MCFG_PPU2C05_03_ADD("ppu1", vsnes_ppu_interface_1)
	1768	MCFG_PPU2C05_03_ADD("ppu1")
1766	1769	MCFG_PPU2C0X_SET_SCREEN("screen1")
	1770	MCFG_PPU2C0X_CPU("maincpu")
1767	1771	MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
1768	1772	MACHINE_CONFIG_END
1769	1773
1770	1774	static MACHINE_CONFIG_DERIVED( topgun, vsnes )
1771	1775
1772	1776	MCFG_DEVICE_REMOVE( "ppu1" )
1773		MCFG_PPU2C05_04_ADD("ppu1", vsnes_ppu_interface_1)
	1777	MCFG_PPU2C05_04_ADD("ppu1")
1774	1778	MCFG_PPU2C0X_SET_SCREEN("screen1")
	1779	MCFG_PPU2C0X_CPU("maincpu")
1775	1780	MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
1776	1781	MACHINE_CONFIG_END
1777	1782
r29438	r29439
1809	1814
1810	1815	MCFG_VIDEO_START_OVERRIDE(vsnes_state,vsdual)
1811	1816
1812		MCFG_PPU2C04_ADD("ppu1", vsnes_ppu_interface_1)
	1817	MCFG_PPU2C04_ADD("ppu1")
1813	1818	MCFG_PPU2C0X_SET_SCREEN("screen1")
	1819	MCFG_PPU2C0X_CPU("maincpu")
1814	1820	MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
1815		MCFG_PPU2C04_ADD("ppu2", vsnes_ppu_interface_2)
	1821
	1822	MCFG_PPU2C04_ADD("ppu2")
1816	1823	MCFG_PPU2C0X_SET_SCREEN("screen2")
	1824	MCFG_PPU2C0X_CPU("sub")
	1825	MCFG_PPU2C0X_COLORBASE(512)
1817	1826	MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_2)
1818	1827
1819	1828	/* sound hardware */
r29438	r29439
1848	1857	MCFG_CPU_PROGRAM_MAP(vsnes_bootleg_z80_map)
1849	1858	MCFG_CPU_VBLANK_INT_DRIVER("screen1", vsnes_state,  irq0_line_hold)
1850	1859
1851
1852
1853	1860	/* video hardware */
1854	1861	MCFG_SCREEN_ADD("screen1", RASTER)
1855	1862	MCFG_SCREEN_REFRESH_RATE(60)
r29438	r29439
1863	1870	MCFG_PALETTE_INIT_OWNER(vsnes_state,vsnes)
1864	1871	MCFG_VIDEO_START_OVERRIDE(vsnes_state,vsnes)
1865	1872
1866		MCFG_PPU2C04_ADD("ppu1", vsnes_ppu_interface_1)
	1873	MCFG_PPU2C04_ADD("ppu1")
	1874	MCFG_PPU2C0X_CPU("maincpu")
1867	1875	MCFG_PPU2C0X_SET_SCREEN("screen1")
1868	1876	MCFG_PPU2C0X_SET_NMI(vsnes_state, ppu_irq_1)
1869	1877

trunk/src/mame/drivers/multigam.c

r29438	r29439
1155	1155	m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
1156	1156	}
1157	1157
1158		/* our ppu interface                                            */
1159		static const ppu2c0x_interface ppu_interface =
1160		{
1161		"maincpu",
1162		0,                  /* gfxlayout num */
1163		0,                  /* color base */
1164		PPU_MIRROR_NONE     /* mirroring */
1165		};
1166
1167	1158	void multigam_state::video_start()
1168	1159	{
1169	1160	}
r29438	r29439
1263	1254	MCFG_PALETTE_ADD("palette", 8*4*16)
1264	1255	MCFG_PALETTE_INIT_OWNER(multigam_state, multigam)
1265	1256
1266		MCFG_PPU2C04_ADD("ppu", ppu_interface)
	1257	MCFG_PPU2C04_ADD("ppu")
	1258	MCFG_PPU2C0X_CPU("maincpu")
1267	1259	MCFG_PPU2C0X_SET_NMI(multigam_state, ppu_irq)
1268	1260
1269	1261	/* sound hardware */

trunk/src/mame/machine/playch10.c

r29438	r29439
237	237	/* do the gun thing */
238	238	if (m_pc10_gun_controller)
239	239	{
240		ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
241	240	int trigger = ioport("P1")->read();
242	241	int x = ioport("GUNX")->read();
243	242	int y = ioport("GUNY")->read();
r29438	r29439
247	246	ret |= 0x08;
248	247
249	248	/* get the pixel at the gun position */
250		pix = ppu->get_pixel(x, y);
	249	pix = m_ppu->get_pixel(x, y);
251	250
252	251	/* get the color base from the ppu */
253		color_base = ppu->get_colorbase();
	252	color_base = m_ppu->get_colorbase();
254	253
255	254	/* look at the screen and see if the cursor is over a bright pixel */
256	255	if ((pix == color_base + 0x20) || (pix == color_base + 0x30) ||

trunk/src/mame/machine/vsnes.c

r29438	r29439
343	343
344	344	WRITE8_MEMBER(vsnes_state::gun_in0_w)
345	345	{
346		ppu2c0x_device *ppu1 = machine().device<ppu2c0x_device>("ppu1");
347
348	346	if (m_do_vrom_bank)
349	347	{
350	348	/* switch vrom */
r29438	r29439
363	361	UINT32 pix, color_base;
364	362
365	363	/* get the pixel at the gun position */
366		pix = ppu1->get_pixel(x, y);
	364	pix = m_ppu1->get_pixel(x, y);
367	365
368	366	/* get the color base from the ppu */
369		color_base = ppu1->get_colorbase();
	367	color_base = m_ppu1->get_colorbase();
370	368
371	369	/* look at the screen and see if the cursor is over a bright pixel */
372	370	if ((pix == color_base + 0x20 ) || (pix == color_base + 0x30) ||
r29438	r29439
669	667
670	668	WRITE8_MEMBER(vsnes_state::mapper4_w)
671	669	{
672		ppu2c0x_device *ppu1 = machine().device<ppu2c0x_device>("ppu1");
673	670	UINT8 MMC3_helper, cmd;
674	671
675	672	switch (offset & 0x6001)
r29438	r29439
718	715
719	716	case 0x2001: /* $a001 - extra RAM enable/disable */
720	717	/* ignored - we always enable it */
721
722	718	break;
	719
723	720	case 0x4000: /* $c000 - IRQ scanline counter */
724	721	m_IRQ_count = data;
725
726	722	break;
727	723
728	724	case 0x4001: /* $c001 - IRQ scanline latch */
729	725	m_IRQ_count_latch = data;
730
731	726	break;
732	727
733	728	case 0x6000: /* $e000 - Disable IRQs */
734	729	m_IRQ_enable = 0;
735	730	m_IRQ_count = m_IRQ_count_latch;
736
737		ppu1->set_scanline_callback(ppu2c0x_scanline_delegate());
738
	731	m_ppu1->set_scanline_callback(ppu2c0x_scanline_delegate());
739	732	break;
740	733
741	734	case 0x6001: /* $e001 - Enable IRQs */
742	735	m_IRQ_enable = 1;
743		ppu1->set_scanline_callback(ppu2c0x_scanline_delegate(FUNC(vsnes_state::mapper4_irq),this));
744
	736	m_ppu1->set_scanline_callback(ppu2c0x_scanline_delegate(FUNC(vsnes_state::mapper4_irq), this));
745	737	break;
746	738
747	739	default:

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