MAME SVN History

199869 Revisions

r29438 Tuesday 8th April, 2014 at 09:18:41 UTC by Nathan Woods
Merge branch 'master' of ssh://mess.org/mame into new_menus

[/branches/new_menus/hash]	snes.xml tandy2k.xml
[/branches/new_menus/src/emu/bus/pci]	southbridge.c
[/branches/new_menus/src/emu/machine]	at_keybc.c at_keybc.h
[/branches/new_menus/src/emu/video]	huc6202.c huc6202.h
[/branches/new_menus/src/mame/drivers]	backfire.c boogwing.c cbuster.c cninja.c cobra.c darkseal.c dassault.c dblewing.c deco156.c deco32.c dietgo.c dreambal.c funkyjet.c ggconnie.c gticlub.c mirage.c nwk-tr.c pktgaldx.c rohga.c simpl156.c sshangha.c supbtime.c tumblep.c vaportra.c zr107.c
[/branches/new_menus/src/mame/includes]	boogwing.h cbuster.h cninja.h darkseal.h dassault.h deco32.h dietgo.h pktgaldx.h rohga.h simpl156.h sshangha.h vaportra.h
[/branches/new_menus/src/mame/video]	deco16ic.c deco16ic.h k001604.c k001604.h
[/branches/new_menus/src/mess/drivers]	at.c ct486.c pce.c

branches/new_menus/hash/snes.xml
r29437	r29438
23	23	<Japan>
24	24	o PCB pic Clock Tower / Prototype with 3 sample games
25	25	o PCB pic Dai-3-Ji Super Robot Taisen / Revision C / C2941881
26		o PCB pic Doraemon - Nobita to Yousei no Kuni / Revision A / 55E44983
27	26	? Dragon Slayer - Eiyuu Densetsu II / Prototype
28	27	x n/a Eiga Shoukai Soft - Mizu no Tabinin
29	28	o Wii VC Gakkou de Atta Kowai Hanashi / Revision A
r29437	r29438
402	401	</part>
403	402	</software>
404	403
405		<software name="doraemonra" cloneof="doraemon">
406		<description>Doraemon - Nobita to Yousei no Kuni (Jpn, Rev. A)</description>
407		<year>1993</year>
408		<publisher>Epoch</publisher>
409		<info name="serial" value="SHVC-DR" />
410		<info name="release" value="19930219" />
411		<info name="alt_title" value="ドラえもんのび太と妖精の国" />
412		<part name="cart" interface="snes_cart">
413		<feature name="pcb" value="SHVC-1J0N-01" />
414		<feature name="u1" value="U1 MASK ROM(N)" />
415		<feature name="u2" value="U2 CIC" />
416		<feature name="lockout" value="" />
417		<feature name="cart_revision" value="A" />
418		<feature name="cart_model" value="SHVC-006" />
419		<feature name="cart_back_label" value="920214" />
420		<dataarea name="rom" size="524288">
421		<rom name="shvc-dr-1.u1" size="524288" crc="55e44983" offset="0x000000" />
422		</dataarea>
423		</part>
424		</software>
425
426	404	<software name="ggoemon3ra" cloneof="ggoemon3">
427	405	<description>Ganbare Goemon 3 - Shishi Juurokubee no Karakuri Manjigatame (Jpn, Rev. A)</description>
428	406	<year>1994</year>
r29437	r29438
1376	1354	</part>
1377	1355	</software>
1378	1356
	1357	<software name="hebepopnjp" cloneof="hebepopn">
	1358	<!-- lytron -->
	1359	<description>Hebereke no Popoon (Jpn, Prototype 19931101)</description>
	1360	<year>1993</year>
	1361	<publisher>Sunsoft</publisher>
	1362	<info name="serial" value="37" />
	1363	<info name="alt_title" value="へべれけのぽぷーん" />
	1364	<part name="cart" interface="snes_cart">
	1365	<feature name="cart_model" value="SHVC-006" />
	1366	<feature name="slot" value="lorom" />
	1367	<dataarea name="rom" size="1048576">
	1368	<rom name="s931101-037.u1" size="524288" crc="da56ab79" sha1="1b12feb8c6863d94ec077c8d52cab2bc35f72956" offset="0x000000" />
	1369	<rom name="u2" size="524288" crc="b6cec398" sha1="6cf5153a056240b37f2ebfcaccf9828be9f55c87" offset="0x080000" />
	1370	</dataarea>
	1371	</part>
	1372	</software>
	1373
1379	1374	<software name="humangp2p" cloneof="f1polep2">
1380	1375	<!-- snescentral.com -->
1381	1376	<description>Human Grand Prix II (Jpn, Prototype)</description>
r29437	r29438
3266	3261	</part>
3267	3262	</software>
3268	3263
	3264	<software name="contra3p" cloneof="sprobot">
	3265	<!-- Notes: this rom image was released in 2014 without any documentation, despite its name, it is a prototype of Contra III
	3266	the rom was overdumped to 4MiB likely due to header based dumping tools, the right size "should be" 1MiB -->
	3267	<description>Contra IV - The Alien Wars (USA, Prototype)</description>
	3268	<year>1992</year>
	3269	<publisher>Konami</publisher>
	3270	<part name="cart" interface="snes_cart">
	3271	<feature name="slot" value="lorom" />
	3272	<dataarea name="rom" size="4194304">
	3273	<rom name="contra iv - the alien wars (prototype).sfc" size="4194304" crc="8f3deca5" sha1="daba9ebb5162fc4631d663ab5681c2518f6311e5" offset="0x000000" status="baddump" />
	3274	</dataarea>
	3275	<dataarea name="nvram" size="2048">
	3276	</dataarea>
	3277	</part>
	3278	</software>
	3279
3269	3280	<software name="cybernatup" cloneof="cybernat">
3270	3281	<!-- Notes: this rom image was released by retrology with only a picture of the cartridge (model SNS-006) -->
3271	3282	<description>Cybernator (USA, Prototype 199211)</description>
r29437	r29438
10901	10912	</part>
10902	10913	</software>
10903	10914
10904		<software name="doraemon">
	10915	<software name="doraemona" cloneof="doraemon">
10905	10916	<description>Doraemon - Nobita to Yousei no Kuni (Jpn)</description>
10906	10917	<year>1993</year>
10907	10918	<publisher>Epoch</publisher>
r29437	r29438
26165	26176	</part>
26166	26177	</software>
26167	26178
26168		<software name="sjinsei3">
	26179	<software name="sjinsei3a" cloneof="sjinsei3">
26169	26180	<description>Super Jinsei Game 3 (Jpn)</description>
26170	26181	<year>1996</year>
26171	26182	<publisher>Takara</publisher>
r29437	r29438
28817	28828	</software>
28818	28829
28819	28830	<software name="swordwl2a" cloneof="swordwl2">
28820		<!-- Notes: Revision A (firmware update? initial cart unknown) -->
28821	28831	<description>Sword World SFC 2 - Inishie no Kyojin Densetsu (Jpn)</description>
28822	28832	<year>1994</year>
28823	28833	<publisher>T&E Soft</publisher>
r29437	r29438
28831	28841	<feature name="u2" value="U2 64K SRAM" />
28832	28842	<feature name="u3" value="U3 MAD-1" />
28833	28843	<feature name="u4" value="U4 CIC" />
28834		<feature name="lockout" value="D411A (CB)" />
	28844	<feature name="lockout" value="D411A 9353 CB" />
28835	28845	<feature name="battery" value="BATT CR2032" />
28836	28846	<feature name="cart_model" value="SHVC-006" />
28837		<feature name="cart_revision" value="A" />
	28847	<!--feature name="cart_revision" value="A" factory issue? /-->
28838	28848	<feature name="cart_back_label" value="901121" />
28839	28849	<feature name="slot" value="lorom" />
28840	28850	<dataarea name="rom" size="2097152">
r29437	r29438
32197	32207	</part>
32198	32208	</software>
32199	32209
	32210	<software name="doraemon">
	32211	<!-- single cartridge source: ototo -->
	32212	<description>Doraemon - Nobita to Yousei no Kuni (Jpn, Rev. A)</description>
	32213	<year>1993</year>
	32214	<publisher>Epoch</publisher>
	32215	<info name="serial" value="SHVC-DR" />
	32216	<info name="release" value="19930219" />
	32217	<info name="alt_title" value="ドラえもんのび太と妖精の国" />
	32218	<part name="cart" interface="snes_cart">
	32219	<feature name="pcb" value="SHVC-1J0N-01" />
	32220	<feature name="u1" value="U1 MASK ROM(N)" />
	32221	<feature name="u2" value="U2 CIC" />
	32222	<feature name="lockout" value="" />
	32223	<feature name="cart_revision" value="A" />
	32224	<feature name="cart_model" value="SHVC-006" />
	32225	<feature name="cart_back_label" value="920214" />
	32226	<dataarea name="rom" size="524288">
	32227	<rom name="shvc-dr-1.u1" size="524288" crc="55e44983" sha1="95b8e45c194618fc122ca10d5af5dbf9b9077aac" offset="0x000000" />
	32228	</dataarea>
	32229	</part>
	32230	</software>
	32231
32200	32232	<software name="estpolisa" cloneof="lufia">
32201	32233	<!-- single cartridge source: eyedunno -->
32202	32234	<description>Estpolis Denki (Jpn, Rev. A)</description>
r29437	r29438
32294	32326	</part>
32295	32327	</software>
32296	32328
	32329	<software name="granhist">
	32330	<!-- single cartridge source: bigfred -->
	32331	<description>Granhistoria - Genshi Sekaiki (Jpn, Rev. A)</description>
	32332	<year>1995</year>
	32333	<publisher>Banpresto</publisher>
	32334	<info name="serial" value="SHVC-AIRJ-JPN" />
	32335	<info name="release" value="19950630" />
	32336	<info name="alt_title" value="グランヒストリア~幻史世界記~" />
	32337	<part name="cart" interface="snes_cart">
	32338	<feature name="pcb" value="SHVC-1A3M-30" />
	32339	<feature name="u1" value="U1 MASK ROM(N)" />
	32340	<feature name="u2" value="U2 64K SRAM" />
	32341	<feature name="u3" value="U3 MAD-1" />
	32342	<feature name="u4" value="U4 CIC" />
	32343	<feature name="lockout" value="D411B 9527 B" />
	32344	<feature name="battery" value="BATT CR2032" />
	32345	<feature name="cart_revision" value="A" />
	32346	<feature name="cart_model" value="SHVC-006" />
	32347	<feature name="cart_back_label" value="" />
	32348	<feature name="slot" value="lorom" />
	32349	<dataarea name="rom" size="2097152">
	32350	<rom name="shvc-airj-1.u1" size="2097152" crc="27eb2cf0" sha1="d75bf1b46b8ac90e773ddf20e3e8abd38f0d4dc5" offset="0x000000" />
	32351	</dataarea>
	32352	<dataarea name="nvram" size="8192">
	32353	</dataarea>
	32354	</part>
	32355	</software>
	32356
32297	32357	<software name="hakprogl" cloneof="extrainn">
32298	32358	<!-- single cartridge source: Yakushi~Kabuto -->
32299	32359	<description>Hakunetsu Pro Yakyuu - Ganba League (Jpn, Rev. A)</description>
r29437	r29438
32908	32968	</part>
32909	32969	</software>
32910	32970
	32971	<software name="shinmomo">
	32972	<!-- single cartridge source: bigfred -->
	32973	<!-- Notes: Also re-released through Nintendo Power -->
	32974	<description>Shin Momotarou Densetsu (Jpn, Rev. A)</description>
	32975	<year>1992</year>
	32976	<publisher>Hudson</publisher>
	32977	<info name="serial" value="SHVC-M5-1" />
	32978	<info name="release" value="19931224" />
	32979	<info name="alt_title" value="新桃太郎伝説" />
	32980	<part name="cart" interface="snes_cart">
	32981	<feature name="pcb" value="SHVC-1J3M-20" />
	32982	<feature name="u1" value="U1 MASK ROM(N)" />
	32983	<feature name="u2" value="U2 64K SRAM" />
	32984	<feature name="u3" value="U3 MAD-1" />
	32985	<feature name="u4" value="U4 CIC" />
	32986	<feature name="lockout" value="D411B 9512 B" />
	32987	<feature name="battery" value="BATT CR2032" />
	32988	<feature name="cart_revision" value="A" />
	32989	<feature name="cart_model" value="SHVC-006" />
	32990	<feature name="cart_back_label" value="" />
	32991	<feature name="slot" value="hirom" />
	32992	<dataarea name="rom" size="2097152">
	32993	<rom name="shvc-m5-1.u1" size="2097152" crc="4a653411" sha1="a9e0b5e6b0479871792f8b44f032b71fdb8f12b4" offset="0x000000" />
	32994	</dataarea>
	32995	<dataarea name="nvram" size="8192">
	32996	</dataarea>
	32997	</part>
	32998	</software>
	32999
32911	33000	<software name="sf2tu" cloneof="sf2t">
32912	33001	<!-- single cartridge source: nitro322 -->
32913	33002	<description>Street Fighter II Turbo - Hyper Fighting (USA, Rev. A)</description>
r29437	r29438
33178	33267	</part>
33179	33268	</software>
33180	33269
	33270	<software name="swordwl2">
	33271	<!-- single cartridge source: bigfred -->
	33272	<description>Sword World SFC 2 - Inishie no Kyojin Densetsu (Jpn, Rev. A)</description>
	33273	<year>1994</year>
	33274	<publisher>T&E Soft</publisher>
	33275	<info name="serial" value="SHVC-7M" />
	33276	<info name="release" value="19940715" />
	33277	<info name="alt_title" value="ソードワールドSFC2 いにしえの巨人伝説" />
	33278	<sharedfeat name="compatibility" value="NTSC"/>
	33279	<part name="cart" interface="snes_cart">
	33280	<feature name="pcb" value="SHVC-1A3M-21" />
	33281	<feature name="u1" value="U1 MASK ROM(N)" />
	33282	<feature name="u2" value="U2 64K SRAM" />
	33283	<feature name="u3" value="U3 MAD-1" />
	33284	<feature name="u4" value="U4 CIC" />
	33285	<feature name="lockout" value="D411A 9440 CB" />
	33286	<feature name="battery" value="BATT CR2032" />
	33287	<feature name="cart_revision" value="A" />
	33288	<feature name="cart_model" value="SHVC-006" />
	33289	<feature name="cart_back_label" value="" />
	33290	<feature name="slot" value="lorom" />
	33291	<dataarea name="rom" size="2097152">
	33292	<rom name="shvc-7m-1.u1" size="2097152" crc="cb148365" sha1="a90412a32828fdf02968bf7b1f2efd57453ef031" offset="0x000000" />
	33293	</dataarea>
	33294	<dataarea name="nvram" size="8192">
	33295	</dataarea>
	33296	</part>
	33297	</software>
	33298
33181	33299	<software name="turnburns" cloneof="turnburn">
33182	33300	<!-- single cartridge source: Zidanax -->
33183	33301	<description>Turn and Burn - No-Fly Zone (Spa)</description>
r29437	r29438
33302	33420
33303	33421	-->
33304	33422
33305		<software name="granhist">
33306		<description>Granhistoria - Genshi Sekaiki (Jpn, Rev. A)</description>
33307		<year>1995</year>
33308		<publisher>Banpresto</publisher>
33309		<info name="serial" value="SHVC-AIRJ-JPN" />
33310		<info name="release" value="19950630" />
33311		<info name="alt_title" value="グランヒストリア~幻史世界記~" />
33312		<part name="cart" interface="snes_cart">
33313		<feature name="slot" value="lorom" />
33314		<dataarea name="rom" size="2097152">
33315		<rom name="granhistoria - genshi sekaiki (japan) (rev 1).sfc" size="2097152" crc="27eb2cf0" sha1="d75bf1b46b8ac90e773ddf20e3e8abd38f0d4dc5" offset="0x000000" />
33316		</dataarea>
33317		<dataarea name="nvram" size="8192">
33318		</dataarea>
33319		</part>
33320		</software>
33321
33322	33423	<software name="mechwarri" cloneof="mechwarr">
33323	33424	<description>MechWarrior (Ita)</description>
33324	33425	<year>1993</year>
r29437	r29438
33333	33434	</part>
33334	33435	</software>
33335	33436
33336		<software name="shinmomo">
33337		<!-- Notes: Also re-released through Nintendo Power -->
33338		<description>Shin Momotarou Densetsu (Jpn, Rev. A)</description>
33339		<year>1992</year>
33340		<publisher>Hudson</publisher>
33341		<info name="serial" value="SHVC-M5" />
33342		<info name="release" value="19931224" />
33343		<info name="alt_title" value="新桃太郎伝説" />
33344		<part name="cart" interface="snes_cart">
33345		<feature name="slot" value="hirom" />
33346		<dataarea name="rom" size="2097152">
33347		<rom name="shin momotarou densetsu (japan) (rev 1).sfc" size="2097152" crc="4a653411" sha1="a9e0b5e6b0479871792f8b44f032b71fdb8f12b4" offset="0x000000" />
33348		</dataarea>
33349		<dataarea name="nvram" size="8192">
33350		</dataarea>
33351		</part>
33352		</software>
33353
33354	33437	<software name="starfoxj" cloneof="starwing">
33355	33438	<!-- Notes: dumped from a Super Famicom Box, CONFIRMATION NEEDED on a retail cartridge -->
33356	33439	<description>Star Fox (Jpn, v1.1, Super Famicom Box)</description>
r29437	r29438
33379	33462	</part>
33380	33463	</software>
33381	33464
33382		<software name="swordwl2">
33383		<description>Sword World SFC 2 - Inishie no Kyojin Densetsu (Jpn, Rev. A)</description>
33384		<year>1994</year>
33385		<publisher>T&E Soft</publisher>
33386		<info name="serial" value="SHVC-7M" />
33387		<info name="release" value="19940715" />
33388		<info name="alt_title" value="ソードワールドSFC2 いにしえの巨人伝説" />
33389		<sharedfeat name="compatibility" value="NTSC"/>
33390		<part name="cart" interface="snes_cart">
33391		<feature name="slot" value="lorom" />
33392		<dataarea name="rom" size="2097152">
33393		<rom name="sword world sfc 2 - inishie no kyojin densetsu (japan) (rev 1).sfc" size="2097152" crc="cb148365" sha1="a90412a32828fdf02968bf7b1f2efd57453ef031" offset="0x000000" />
33394		</dataarea>
33395		<dataarea name="nvram" size="8192">
33396		</dataarea>
33397		</part>
33398		</software>
33399
33400	33465	<!--
33401	33466
33402	33467	[/L08] End of unconfirmed retail images
r29437	r29438
57021	57086	</part>
57022	57087	</software>
57023	57088
	57089	<software name="sjinsei3">
	57090	<description>Super Jinsei Game 3 (Jpn, Rev. A)</description>
	57091	<year>1996</year>
	57092	<publisher>Takara</publisher>
	57093	<info name="serial" value="SHVC-A3XJ-JPN" />
	57094	<info name="release" value="19961129" />
	57095	<info name="alt_title" value="スーパー人生ゲーム3" />
	57096	<part name="cart" interface="snes_cart">
	57097	<feature name="slot" value="lorom" />
	57098	<dataarea name="rom" size="2097152">
	57099	<rom name="super jinsei game 3 (japan) (rev 1).sfc" size="2097152" crc="61b947e2" sha1="99780e28af77452f00108e5c33966e7a372fe6b0" offset="0x000000" />
	57100	</dataarea>
	57101	<dataarea name="nvram" size="8192">
	57102	</dataarea>
	57103	</part>
	57104	</software>
	57105
57024	57106	<software name="skeirin">
57025	57107	<description>Super Keirin (Jpn)</description>
57026	57108	<year>1995</year>
r29437	r29438
62732	62814	</part>
62733	62815	</software>
62734	62816
62735		<software name="yokozuna">
	62817	<software name="yokozunaa" cloneof="yokozuna">
62736	62818	<description>Yokozuna Monogatari (Jpn)</description>
62737	62819	<year>1994</year>
62738	62820	<publisher>KSS</publisher>
r29437	r29438
62749	62831	</part>
62750	62832	</software>
62751	62833
	62834	<software name="yokozuna">
	62835	<description>Yokozuna Monogatari (Jpn, Rev. A)</description>
	62836	<year>1994</year>
	62837	<publisher>KSS</publisher>
	62838	<info name="serial" value="SHVC-5U" />
	62839	<info name="release" value="19940825" />
	62840	<info name="alt_title" value="横綱物語" />
	62841	<part name="cart" interface="snes_cart">
	62842	<feature name="slot" value="lorom" />
	62843	<dataarea name="rom" size="1048576">
	62844	<rom name="yokozuna monogatari (japan) (rev 1).sfc" size="1048576" crc="b5084d76" sha1="dda5b613f4dbc639719a99e35e6bb48e2fa24dfc" offset="0x000000" />
	62845	</dataarea>
	62846	<dataarea name="nvram" size="8192">
	62847	</dataarea>
	62848	</part>
	62849	</software>
	62850
62752	62851	<software name="yoshicokj" cloneof="yoshicok">
62753	62852	<description>Yoshi no Cookie (Jpn)</description>
62754	62853	<year>1993</year>

branches/new_menus/hash/tandy2k.xml
r29437	r29438
2	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3	3	<softwarelist name="tandy2k" description="Tandy 2000 disk images">
4	4
	5	<!--
	6
	7	Undumped and most wanted:
	8
	9	#700-2611 Driver disk for Windows 1.03
	10
	11	-->
	12
5	13	<software name="lotus123">
6	14	<description>Lotus 1-2-3</description>
7	15	<year>1983</year>

branches/new_menus/src/emu/machine/at_keybc.c
r29437	r29438
49	49
50	50	at_keyboard_controller_device::at_keyboard_controller_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
51	51	: device_t(mconfig, AT_KEYBOARD_CONTROLLER, "AT Keyboard Controller", tag, owner, clock, "at_keybc", __FILE__),
52		m_cpu(NULL)
	52	m_cpu(NULL),
	53	m_system_reset_cb(*this),
	54	m_gate_a20_cb(*this),
	55	m_input_buffer_full_cb(*this),
	56	m_output_buffer_empty_cb(*this),
	57	m_keyboard_clock_cb(*this),
	58	m_keyboard_data_cb(*this)
53	59	{
54	60	}
55	61
r29437	r29438
73	79	return MACHINE_CONFIG_NAME(at_keybc);
74	80	}
75	81
76		//-------------------------------------------------
77		// device_config_complete - perform any
78		// operations now that the configuration is
79		// complete
80		//-------------------------------------------------
81
82		void at_keyboard_controller_device::device_config_complete()
83		{
84		// inherit a copy of the static data
85		const at_keyboard_controller_interface intf = reinterpret_cast<const at_keyboard_controller_interface >(static_config());
86
87		if (intf != NULL)
88		{
89		static_cast<at_keyboard_controller_interface >(this) = *intf;
90		}
91
92		// or initialize to defaults if none provided
93		else
94		{
95		memset(&m_system_reset_cb, 0, sizeof(m_system_reset_cb));
96		memset(&m_gate_a20_cb, 0, sizeof(m_gate_a20_cb));
97		memset(&m_input_buffer_full_cb, 0, sizeof(m_input_buffer_full_cb));
98		memset(&m_output_buffer_empty_cb, 0, sizeof(m_output_buffer_empty_cb));
99		memset(&m_keyboard_clock_cb, 0, sizeof(m_keyboard_clock_cb));
100		memset(&m_keyboard_data_cb, 0, sizeof(m_keyboard_data_cb));
101		}
102		}
103
104	82	/*-------------------------------------------------
105	83	device_start - device-specific startup
106	84	-------------------------------------------------*/
r29437	r29438
111	89	m_cpu = downcast<upi41_cpu_device *>(subdevice("at_keybc"));
112	90
113	91	// resolve callbacks
114		m_system_reset_func.resolve(m_system_reset_cb, *this);
115		m_gate_a20_func.resolve(m_gate_a20_cb, *this);
116		m_input_buffer_full_func.resolve(m_input_buffer_full_cb, *this);
117		m_output_buffer_empty_func.resolve(m_output_buffer_empty_cb, *this);
118		m_keyboard_clock_func.resolve(m_keyboard_clock_cb, *this);
119		m_keyboard_data_func.resolve(m_keyboard_data_cb, *this);
	92	m_system_reset_cb.resolve_safe();
	93	m_gate_a20_cb.resolve_safe();
	94	m_input_buffer_full_cb.resolve_safe();
	95	m_output_buffer_empty_cb.resolve_safe();
	96	m_keyboard_clock_cb.resolve_safe();
	97	m_keyboard_data_cb.resolve_safe();
120	98
121	99	// register for save states
122	100	save_item(NAME(m_clock_signal));
r29437	r29438
180	158	*/
181	159	WRITE8_MEMBER( at_keyboard_controller_device::p2_w )
182	160	{
183		m_system_reset_func(BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE);
184		m_gate_a20_func(BIT(data, 1) ? ASSERT_LINE : CLEAR_LINE);
185		m_input_buffer_full_func(BIT(data, 4) ? ASSERT_LINE : CLEAR_LINE);
186		m_output_buffer_empty_func(BIT(data, 5) ? ASSERT_LINE : CLEAR_LINE);
	161	m_system_reset_cb(BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE);
	162	m_gate_a20_cb(BIT(data, 1) ? ASSERT_LINE : CLEAR_LINE);
	163	m_input_buffer_full_cb(BIT(data, 4) ? ASSERT_LINE : CLEAR_LINE);
	164	m_output_buffer_empty_cb(BIT(data, 5) ? ASSERT_LINE : CLEAR_LINE);
187	165
188	166	m_clock_signal = !BIT(data, 6);
189	167	m_data_signal = BIT(data, 7);
190	168
191		m_keyboard_data_func(m_data_signal);
192		m_keyboard_clock_func(m_clock_signal);
	169	m_keyboard_data_cb(m_data_signal);
	170	m_keyboard_clock_cb(m_clock_signal);
193	171	}
194	172
195	173

branches/new_menus/src/emu/machine/at_keybc.h
r29437	r29438
17	17	// INTERFACE CONFIGURATION MACROS
18	18	//**************************************************************************
19	19
20		#define MCFG_AT_KEYBOARD_CONTROLLER_ADD(_tag, _clock, _interface) \
21		MCFG_DEVICE_ADD(_tag, AT_KEYBOARD_CONTROLLER, _clock) \
22		MCFG_DEVICE_CONFIG(_interface)
	20	#define MCFG_AT_KEYBOARD_CONTROLLER_SYSTEM_RESET_CB(_devcb) \
	21	devcb = &at_keyboard_controller_device::set_system_reset_callback(*device, DEVCB2_##_devcb);
23	22
	23	#define MCFG_AT_KEYBOARD_CONTROLLER_GATE_A20_CB(_devcb) \
	24	devcb = &at_keyboard_controller_device::set_gate_a20_callback(*device, DEVCB2_##_devcb);
24	25
	26	#define MCFG_AT_KEYBOARD_CONTROLLER_INPUT_BUFFER_FULL_CB(_devcb) \
	27	devcb = &at_keyboard_controller_device::set_input_buffer_full_callback(*device, DEVCB2_##_devcb);
	28
	29	#define MCFG_AT_KEYBOARD_CONTROLLER_OUTPUT_BUFFER_EMPTY_CB(_devcb) \
	30	devcb = &at_keyboard_controller_device::set_output_buffer_empty_callback(*device, DEVCB2_##_devcb);
	31
	32	#define MCFG_AT_KEYBOARD_CONTROLLER_KEYBOARD_CLOCK_CB(_devcb) \
	33	devcb = &at_keyboard_controller_device::set_keyboard_clock_callback(*device, DEVCB2_##_devcb);
	34
	35	#define MCFG_AT_KEYBOARD_CONTROLLER_KEYBOARD_DATA_CB(_devcb) \
	36	devcb = &at_keyboard_controller_device::set_keyboard_data_callback(*device, DEVCB2_##_devcb);
	37
25	38	//**************************************************************************
26	39	// TYPE DEFINITIONS
27	40	//**************************************************************************
28	41
29		// ======================> at_keyboard_controller_interface
30
31		struct at_keyboard_controller_interface
32		{
33		// interface to the host pc
34		devcb_write_line m_system_reset_cb;
35		devcb_write_line m_gate_a20_cb;
36		devcb_write_line m_input_buffer_full_cb;
37		devcb_write_line m_output_buffer_empty_cb;
38
39		// interface to the keyboard
40		devcb_write_line m_keyboard_clock_cb;
41		devcb_write_line m_keyboard_data_cb;
42		};
43
44	42	// ======================> at_keyboard_controller_device
45	43
46		class at_keyboard_controller_device : public device_t,
47		public at_keyboard_controller_interface
	44	class at_keyboard_controller_device : public device_t
48	45	{
49	46	public:
50	47	// construction/destruction
51	48	at_keyboard_controller_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
52	49
	50	template<class _Object> static devcb2_base &set_system_reset_callback(device_t &device, _Object object) { return downcast<at_keyboard_controller_device &>(device).m_system_reset_cb.set_callback(object); }
	51	template<class _Object> static devcb2_base &set_gate_a20_callback(device_t &device, _Object object) { return downcast<at_keyboard_controller_device &>(device).m_gate_a20_cb.set_callback(object); }
	52	template<class _Object> static devcb2_base &set_input_buffer_full_callback(device_t &device, _Object object) { return downcast<at_keyboard_controller_device &>(device).m_input_buffer_full_cb.set_callback(object); }
	53	template<class _Object> static devcb2_base &set_output_buffer_empty_callback(device_t &device, _Object object) { return downcast<at_keyboard_controller_device &>(device).m_output_buffer_empty_cb.set_callback(object); }
	54	template<class _Object> static devcb2_base &set_keyboard_clock_callback(device_t &device, _Object object) { return downcast<at_keyboard_controller_device &>(device).m_keyboard_clock_cb.set_callback(object); }
	55	template<class _Object> static devcb2_base &set_keyboard_data_callback(device_t &device, _Object object) { return downcast<at_keyboard_controller_device &>(device).m_keyboard_data_cb.set_callback(object); }
	56
53	57	// internal 8042 interface
54	58	DECLARE_READ8_MEMBER( t0_r );
55	59	DECLARE_READ8_MEMBER( t1_r );
r29437	r29438
71	75	// device-level overrides
72	76	virtual void device_start();
73	77	virtual void device_reset();
74		virtual void device_config_complete();
75	78
76	79	virtual const rom_entry *device_rom_region() const;
77	80	virtual machine_config_constructor device_mconfig_additions() const;
	81
78	82	private:
79	83	// internal state
80	84	upi41_cpu_device *m_cpu;
81	85
82		devcb_resolved_write_line m_system_reset_func;
83		devcb_resolved_write_line m_gate_a20_func;
84		devcb_resolved_write_line m_input_buffer_full_func;
85		devcb_resolved_write_line m_output_buffer_empty_func;
86		devcb_resolved_write_line m_keyboard_clock_func;
87		devcb_resolved_write_line m_keyboard_data_func;
	86	// interface to the host pc
	87	devcb2_write_line m_system_reset_cb;
	88	devcb2_write_line m_gate_a20_cb;
	89	devcb2_write_line m_input_buffer_full_cb;
	90	devcb2_write_line m_output_buffer_empty_cb;
88	91
	92	// interface to the keyboard
	93	devcb2_write_line m_keyboard_clock_cb;
	94	devcb2_write_line m_keyboard_data_cb;
	95
89	96	UINT8 m_clock_signal;
90	97	UINT8 m_data_signal;
91	98	};

branches/new_menus/src/emu/bus/pci/southbridge.c
r29437	r29438
33	33	{ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack4_w), DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack5_w), DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack6_w), DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack7_w) }
34	34	};
35	35
36		static const at_keyboard_controller_interface keyboard_controller_intf =
37		{
38		DEVCB_CPU_INPUT_LINE(":maincpu", INPUT_LINE_RESET),
39		DEVCB_CPU_INPUT_LINE(":maincpu", INPUT_LINE_A20),
40		DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir1_w),
41		DEVCB_NULL,
42		DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, clock_write_from_mb),
43		DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, data_write_from_mb)
44		};
45
46	36	static const pc_kbdc_interface pc_kbdc_intf =
47	37	{
48	38	DEVCB_DEVICE_LINE_MEMBER("keybc", at_keyboard_controller_device, keyboard_clock_w),
r29437	r29438
97	87	MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE(":maincpu", 0), VCC, READ8(southbridge_device, get_slave_ack) )
98	88	MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL )
99	89
100		MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keyboard_controller_intf)
	90	MCFG_DEVICE_ADD("keybc", AT_KEYBOARD_CONTROLLER, XTAL_12MHz)
	91	MCFG_AT_KEYBOARD_CONTROLLER_SYSTEM_RESET_CB(INPUTLINE(":maincpu", INPUT_LINE_RESET))
	92	MCFG_AT_KEYBOARD_CONTROLLER_GATE_A20_CB(INPUTLINE(":maincpu", INPUT_LINE_A20))
	93	MCFG_AT_KEYBOARD_CONTROLLER_INPUT_BUFFER_FULL_CB(DEVWRITELINE("pic8259_master", pic8259_device, ir1_w))
	94	MCFG_AT_KEYBOARD_CONTROLLER_KEYBOARD_CLOCK_CB(DEVWRITELINE("pc_kbdc", pc_kbdc_device, clock_write_from_mb))
	95	MCFG_AT_KEYBOARD_CONTROLLER_KEYBOARD_DATA_CB(DEVWRITELINE("pc_kbdc", pc_kbdc_device, data_write_from_mb))
101	96	MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
102	97	MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
103	98

branches/new_menus/src/emu/video/huc6202.c
r29437	r29438
12	12	const device_type HUC6202 = &device_creator<huc6202_device>;
13	13
14	14
15		void huc6202_device::device_config_complete()
16		{
17		const huc6202_interface intf = reinterpret_cast<const huc6202_interface >(static_config());
18
19		if ( intf != NULL )
20		{
21		static_cast<huc6202_interface >(this) = *intf;
22		}
23		else
24		{
25		memset(&m_next_pixel_0, 0, sizeof(m_next_pixel_0));
26		memset(&m_get_time_til_next_event_0, 0, sizeof(m_get_time_til_next_event_0));
27		memset(&m_hsync_changed_0, 0, sizeof(m_hsync_changed_0));
28		memset(&m_vsync_changed_0, 0, sizeof(m_vsync_changed_0));
29		memset(&m_read_0, 0, sizeof(m_read_0));
30		memset(&m_write_0, 0, sizeof(m_write_0));
31		memset(&m_next_pixel_1, 0, sizeof(m_next_pixel_1));
32		memset(&m_get_time_til_next_event_1, 0, sizeof(m_get_time_til_next_event_1));
33		memset(&m_hsync_changed_1, 0, sizeof(m_hsync_changed_1));
34		memset(&m_vsync_changed_1, 0, sizeof(m_vsync_changed_1));
35		memset(&m_read_1, 0, sizeof(m_read_1));
36		memset(&m_write_1, 0, sizeof(m_write_1));
37		}
38		}
39
40
41	15	huc6202_device::huc6202_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
42		: device_t(mconfig, HUC6202, "HuC6202 VPC", tag, owner, clock, "huc6202", __FILE__)
	16	: device_t(mconfig, HUC6202, "HuC6202 VPC", tag, owner, clock, "huc6202", __FILE__),
	17	m_next_pixel_0_cb(*this),
	18	m_time_til_next_event_0_cb(*this),
	19	m_vsync_changed_0_cb(*this),
	20	m_hsync_changed_0_cb(*this),
	21	m_read_0_cb(*this),
	22	m_write_0_cb(*this),
	23	m_next_pixel_1_cb(*this),
	24	m_time_til_next_event_1_cb(*this),
	25	m_vsync_changed_1_cb(*this),
	26	m_hsync_changed_1_cb(*this),
	27	m_read_1_cb(*this),
	28	m_write_1_cb(*this)
43	29	{
44	30	}
45	31
r29437	r29438
48	34	{
49	35	UINT16 data = huc6270_device::HUC6270_BACKGROUND;
50	36
51		UINT16 data_0 = m_next_pixel_0( 0, 0xffff );
52		UINT16 data_1 = m_next_pixel_1( 0, 0xffff );
	37	UINT16 data_0 = m_next_pixel_0_cb( 0, 0xffff );
	38	UINT16 data_1 = m_next_pixel_1_cb( 0, 0xffff );
53	39
54	40	if ( data_0 == huc6270_device::HUC6270_SPRITE && data_1 == huc6270_device::HUC6270_SPRITE )
55	41	{
r29437	r29438
164	150
165	151	READ16_MEMBER( huc6202_device::time_until_next_event )
166	152	{
167		UINT16 next_event_clocks_0 = m_get_time_til_next_event_0( 0, 0xffff );
168		UINT16 next_event_clocks_1 = m_get_time_til_next_event_1( 0, 0xffff );
	153	UINT16 next_event_clocks_0 = m_time_til_next_event_0_cb( 0, 0xffff );
	154	UINT16 next_event_clocks_1 = m_time_til_next_event_1_cb( 0, 0xffff );
169	155
170	156	return MIN( next_event_clocks_0, next_event_clocks_1 );
171	157	}
r29437	r29438
173	159
174	160	WRITE_LINE_MEMBER( huc6202_device::vsync_changed )
175	161	{
176		m_vsync_changed_0( state );
177		m_vsync_changed_1( state );
	162	m_vsync_changed_0_cb( state );
	163	m_vsync_changed_1_cb( state );
178	164	}
179	165
180	166
181	167	WRITE_LINE_MEMBER( huc6202_device::hsync_changed )
182	168	{
183		m_hsync_changed_0( state );
184		m_hsync_changed_1( state );
	169	m_hsync_changed_0_cb( state );
	170	m_hsync_changed_1_cb( state );
185	171	}
186	172
187	173
r29437	r29438
283	269	{
284	270	if ( m_io_device )
285	271	{
286		return m_read_1( offset );
	272	return m_read_1_cb( offset );
287	273	}
288	274	else
289	275	{
290		return m_read_0( offset );
	276	return m_read_0_cb( offset );
291	277	}
292	278	}
293	279
r29437	r29438
296	282	{
297	283	if ( m_io_device )
298	284	{
299		m_write_1( offset, data );
	285	m_write_1_cb( offset, data );
300	286	}
301	287	else
302	288	{
303		m_write_0( offset, data );
	289	m_write_0_cb( offset, data );
304	290	}
305	291	}
306	292
r29437	r29438
308	294	void huc6202_device::device_start()
309	295	{
310	296	/* Resolve callbacks */
311		m_next_pixel_0.resolve( device_0_next_pixel, *this );
312		m_get_time_til_next_event_0.resolve( get_time_til_next_event_0, *this );
313		m_hsync_changed_0.resolve( hsync_0_changed, *this );
314		m_vsync_changed_0.resolve( vsync_0_changed, *this );
315		m_read_0.resolve( read_0, *this );
316		m_write_0.resolve( write_0, *this );
	297	m_next_pixel_0_cb.resolve();
	298	m_time_til_next_event_0_cb.resolve();
	299	m_hsync_changed_0_cb.resolve();
	300	m_vsync_changed_0_cb.resolve();
	301	m_read_0_cb.resolve();
	302	m_write_0_cb.resolve();
317	303
318		m_next_pixel_1.resolve( device_1_next_pixel, *this );
319		m_get_time_til_next_event_1.resolve( get_time_til_next_event_1, *this );
320		m_hsync_changed_1.resolve( hsync_1_changed, *this );
321		m_vsync_changed_1.resolve( vsync_1_changed, *this );
322		m_read_1.resolve( read_1, *this );
323		m_write_1.resolve( write_1, *this );
	304	m_next_pixel_1_cb.resolve();
	305	m_time_til_next_event_1_cb.resolve();
	306	m_hsync_changed_1_cb.resolve();
	307	m_vsync_changed_1_cb.resolve();
	308	m_read_1_cb.resolve();
	309	m_write_1_cb.resolve();
324	310
325	311	/* We want all our callbacks to be resolved */
326		assert( ! m_next_pixel_0.isnull() );
327		assert( ! m_get_time_til_next_event_0.isnull() );
328		assert( ! m_hsync_changed_0.isnull() );
329		assert( ! m_vsync_changed_0.isnull() );
330		assert( ! m_read_0.isnull() );
331		assert( ! m_write_0.isnull() );
332		assert( ! m_next_pixel_1.isnull() );
333		assert( ! m_get_time_til_next_event_1.isnull() );
334		assert( ! m_hsync_changed_1.isnull() );
335		assert( ! m_vsync_changed_1.isnull() );
336		assert( ! m_read_1.isnull() );
337		assert( ! m_write_1.isnull() );
	312	assert( ! m_next_pixel_0_cb.isnull() );
	313	assert( ! m_time_til_next_event_0_cb.isnull() );
	314	assert( ! m_hsync_changed_0_cb.isnull() );
	315	assert( ! m_vsync_changed_0_cb.isnull() );
	316	assert( ! m_read_0_cb.isnull() );
	317	assert( ! m_write_0_cb.isnull() );
	318	assert( ! m_next_pixel_1_cb.isnull() );
	319	assert( ! m_time_til_next_event_1_cb.isnull() );
	320	assert( ! m_hsync_changed_1_cb.isnull() );
	321	assert( ! m_vsync_changed_1_cb.isnull() );
	322	assert( ! m_read_1_cb.isnull() );
	323	assert( ! m_write_1_cb.isnull() );
338	324
339	325	/* Register save items */
340	326	save_item(NAME(m_prio[0].prio_type));

branches/new_menus/src/emu/video/huc6202.h
r29437	r29438
10	10	#include "emu.h"
11	11
12	12
13		#define MCFG_HUC6202_ADD( _tag, _intrf ) \
14		MCFG_DEVICE_ADD( _tag, HUC6202, 0 ) \
15		MCFG_DEVICE_CONFIG( _intrf )
	13	#define MCFG_HUC6202_NEXT_PIXEL_0_CB(_devcb) \
	14	devcb = &huc6202_device::set_next_pixel_0_callback(*device, DEVCB2_##_devcb);
16	15
	16	#define MCFG_HUC6202_TIME_TIL_NEXT_EVENT_0_CB(_devcb) \
	17	devcb = &huc6202_device::set_time_til_next_event_0_callback(*device, DEVCB2_##_devcb);
17	18
18		struct huc6202_interface
19		{
20		/* First gfx input device */
21		devcb_read16 device_0_next_pixel;
	19	#define MCFG_HUC6202_VSYNC_CHANGED_0_CB(_devcb) \
	20	devcb = &huc6202_device::set_vsync_changed_0_callback(*device, DEVCB2_##_devcb);
22	21
23		/* TODO: Choose proper types */
24		/* Callback function to get time until next event */
25		devcb_read16 get_time_til_next_event_0;
	22	#define MCFG_HUC6202_HSYNC_CHANGED_0_CB(_devcb) \
	23	devcb = &huc6202_device::set_hsync_changed_0_callback(*device, DEVCB2_##_devcb);
26	24
27		devcb_write_line vsync_0_changed;
28		devcb_write_line hsync_0_changed;
29		devcb_read8 read_0;
30		devcb_write8 write_0;
	25	#define MCFG_HUC6202_READ_0_CB(_devcb) \
	26	devcb = &huc6202_device::set_read_0_callback(*device, DEVCB2_##_devcb);
31	27
	28	#define MCFG_HUC6202_WRITE_0_CB(_devcb) \
	29	devcb = &huc6202_device::set_write_0_callback(*device, DEVCB2_##_devcb);
32	30
33		/* Second gfx input device */
34		devcb_read16 device_1_next_pixel;
	31	#define MCFG_HUC6202_NEXT_PIXEL_1_CB(_devcb) \
	32	devcb = &huc6202_device::set_next_pixel_1_callback(*device, DEVCB2_##_devcb);
35	33
36		/* TODO: Choose proper types */
37		/* Callback function to get time until next event */
38		devcb_read16 get_time_til_next_event_1;
	34	#define MCFG_HUC6202_TIME_TIL_NEXT_EVENT_1_CB(_devcb) \
	35	devcb = &huc6202_device::set_time_til_next_event_1_callback(*device, DEVCB2_##_devcb);
39	36
40		devcb_write_line vsync_1_changed;
41		devcb_write_line hsync_1_changed;
42		devcb_read8 read_1;
43		devcb_write8 write_1;
44		};
	37	#define MCFG_HUC6202_VSYNC_CHANGED_1_CB(_devcb) \
	38	devcb = &huc6202_device::set_vsync_changed_1_callback(*device, DEVCB2_##_devcb);
45	39
	40	#define MCFG_HUC6202_HSYNC_CHANGED_1_CB(_devcb) \
	41	devcb = &huc6202_device::set_hsync_changed_1_callback(*device, DEVCB2_##_devcb);
46	42
47		class huc6202_device : public device_t,
48		public huc6202_interface
	43	#define MCFG_HUC6202_READ_1_CB(_devcb) \
	44	devcb = &huc6202_device::set_read_1_callback(*device, DEVCB2_##_devcb);
	45
	46	#define MCFG_HUC6202_WRITE_1_CB(_devcb) \
	47	devcb = &huc6202_device::set_write_1_callback(*device, DEVCB2_##_devcb);
	48
	49
	50	class huc6202_device : public device_t
49	51	{
50	52	public:
51	53	// construction/destruction
52	54	huc6202_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	55
	56	template<class _Object> static devcb2_base &set_next_pixel_0_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_next_pixel_0_cb.set_callback(object); }
	57	template<class _Object> static devcb2_base &set_time_til_next_event_0_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_time_til_next_event_0_cb.set_callback(object); }
	58	template<class _Object> static devcb2_base &set_vsync_changed_0_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_vsync_changed_0_cb.set_callback(object); }
	59	template<class _Object> static devcb2_base &set_hsync_changed_0_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_hsync_changed_0_cb.set_callback(object); }
	60	template<class _Object> static devcb2_base &set_read_0_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_read_0_cb.set_callback(object); }
	61	template<class _Object> static devcb2_base &set_write_0_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_write_0_cb.set_callback(object); }
	62	template<class _Object> static devcb2_base &set_next_pixel_1_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_next_pixel_1_cb.set_callback(object); }
	63	template<class _Object> static devcb2_base &set_time_til_next_event_1_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_time_til_next_event_1_cb.set_callback(object); }
	64	template<class _Object> static devcb2_base &set_vsync_changed_1_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_vsync_changed_1_cb.set_callback(object); }
	65	template<class _Object> static devcb2_base &set_hsync_changed_1_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_hsync_changed_1_cb.set_callback(object); }
	66	template<class _Object> static devcb2_base &set_read_1_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_read_1_cb.set_callback(object); }
	67	template<class _Object> static devcb2_base &set_write_1_callback(device_t &device, _Object object) { return downcast<huc6202_device &>(device).m_write_1_cb.set_callback(object); }
	68
53	69	DECLARE_READ8_MEMBER( read );
54	70	DECLARE_WRITE8_MEMBER( write );
55	71	DECLARE_READ8_MEMBER( io_read );
r29437	r29438
61	77
62	78	protected:
63	79	// device-level overrides
64		virtual void device_config_complete();
65	80	virtual void device_start();
66	81	virtual void device_reset();
67	82
68	83	private:
69	84	/* callbacks */
70		devcb_resolved_read16 m_next_pixel_0;
71		devcb_resolved_read16 m_get_time_til_next_event_0;
72		devcb_resolved_write_line m_hsync_changed_0;
73		devcb_resolved_write_line m_vsync_changed_0;
74		devcb_resolved_read8 m_read_0;
75		devcb_resolved_write8 m_write_0;
76		devcb_resolved_read16 m_next_pixel_1;
77		devcb_resolved_read16 m_get_time_til_next_event_1;
78		devcb_resolved_write_line m_hsync_changed_1;
79		devcb_resolved_write_line m_vsync_changed_1;
80		devcb_resolved_read8 m_read_1;
81		devcb_resolved_write8 m_write_1;
	85	/* First gfx input device */
	86	devcb2_read16 m_next_pixel_0_cb;
82	87
	88	/* TODO: Choose proper types */
	89	/* Callback function to get time until next event */
	90	devcb2_read16 m_time_til_next_event_0_cb;
	91
	92	devcb2_write_line m_vsync_changed_0_cb;
	93	devcb2_write_line m_hsync_changed_0_cb;
	94	devcb2_read8 m_read_0_cb;
	95	devcb2_write8 m_write_0_cb;
	96
	97
	98	/* Second gfx input device */
	99	devcb2_read16 m_next_pixel_1_cb;
	100
	101	/* TODO: Choose proper types */
	102	/* Callback function to get time until next event */
	103	devcb2_read16 m_time_til_next_event_1_cb;
	104
	105	devcb2_write_line m_vsync_changed_1_cb;
	106	devcb2_write_line m_hsync_changed_1_cb;
	107	devcb2_read8 m_read_1_cb;
	108	devcb2_write8 m_write_1_cb;
	109
83	110	struct {
84	111	UINT8 prio_type;
85	112	UINT8 dev0_enabled;

branches/new_menus/src/mess/drivers/at.c
r29437	r29438
273	273	PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
274	274	INPUT_PORTS_END
275	275
276		static const at_keyboard_controller_interface keyboard_controller_intf =
277		{
278		DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET),
279		DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20),
280		DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir1_w),
281		DEVCB_NULL,
282		DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, clock_write_from_mb),
283		DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, data_write_from_mb)
284		};
285
286	276	static const pc_kbdc_interface pc_kbdc_intf =
287	277	{
288	278	DEVCB_DEVICE_LINE_MEMBER("keybc", at_keyboard_controller_device, keyboard_clock_w),
r29437	r29438
349	339	MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(at_state, get_slave_ack) )
350	340	MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL )
351	341
352		MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keyboard_controller_intf)
	342	MCFG_DEVICE_ADD("keybc", AT_KEYBOARD_CONTROLLER, XTAL_12MHz)
	343	MCFG_AT_KEYBOARD_CONTROLLER_SYSTEM_RESET_CB(INPUTLINE("maincpu", INPUT_LINE_RESET))
	344	MCFG_AT_KEYBOARD_CONTROLLER_GATE_A20_CB(INPUTLINE("maincpu", INPUT_LINE_A20))
	345	MCFG_AT_KEYBOARD_CONTROLLER_INPUT_BUFFER_FULL_CB(DEVWRITELINE("pic8259_master", pic8259_device, ir1_w))
	346	MCFG_AT_KEYBOARD_CONTROLLER_KEYBOARD_CLOCK_CB(DEVWRITELINE("pc_kbdc", pc_kbdc_device, clock_write_from_mb))
	347	MCFG_AT_KEYBOARD_CONTROLLER_KEYBOARD_DATA_CB(DEVWRITELINE("pc_kbdc", pc_kbdc_device, data_write_from_mb))
353	348	MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
354	349
355	350	MCFG_MC146818_ADD( "rtc", XTAL_32_768kHz )

branches/new_menus/src/mess/drivers/pce.c
r29437	r29438
302	302	}
303	303
304	304
305		static const huc6202_interface sgx_huc6202_config =
306		{
307		DEVCB_DEVICE_MEMBER16( "huc6270_0", huc6270_device, next_pixel ),
308		DEVCB_DEVICE_MEMBER16( "huc6270_0", huc6270_device, time_until_next_event ),
309		DEVCB_DEVICE_LINE_MEMBER( "huc6270_0", huc6270_device, vsync_changed ),
310		DEVCB_DEVICE_LINE_MEMBER( "huc6270_0", huc6270_device, hsync_changed ),
311		DEVCB_DEVICE_MEMBER( "huc6270_0", huc6270_device, read ),
312		DEVCB_DEVICE_MEMBER( "huc6270_0", huc6270_device, write ),
313		DEVCB_DEVICE_MEMBER16( "huc6270_1", huc6270_device, next_pixel ),
314		DEVCB_DEVICE_MEMBER16( "huc6270_1", huc6270_device, time_until_next_event ),
315		DEVCB_DEVICE_LINE_MEMBER( "huc6270_1", huc6270_device, vsync_changed ),
316		DEVCB_DEVICE_LINE_MEMBER( "huc6270_1", huc6270_device, hsync_changed ),
317		DEVCB_DEVICE_MEMBER( "huc6270_1", huc6270_device, read ),
318		DEVCB_DEVICE_MEMBER( "huc6270_1", huc6270_device, write ),
319		};
320
321
322	305	static SLOT_INTERFACE_START(pce_cart)
323	306	SLOT_INTERFACE_INTERNAL("rom", PCE_ROM_STD)
324	307	SLOT_INTERFACE_INTERNAL("cdsys3u", PCE_ROM_CDSYS3)
r29437	r29438
403	386	MCFG_DEVICE_ADD( "huc6270_1", HUC6270, 0 )
404	387	MCFG_HUC6270_VRAM_SIZE(0x10000)
405	388	MCFG_HUC6270_IRQ_CHANGED_CB(WRITELINE(pce_state, pce_irq_changed))
406		MCFG_HUC6202_ADD( "huc6202", sgx_huc6202_config )
	389	MCFG_DEVICE_ADD( "huc6202", HUC6202, 0 )
	390	MCFG_HUC6202_NEXT_PIXEL_0_CB(DEVREAD16("huc6270_0", huc6270_device, next_pixel))
	391	MCFG_HUC6202_TIME_TIL_NEXT_EVENT_0_CB(DEVREAD16("huc6270_0", huc6270_device, time_until_next_event))
	392	MCFG_HUC6202_VSYNC_CHANGED_0_CB(DEVWRITELINE("huc6270_0", huc6270_device, vsync_changed))
	393	MCFG_HUC6202_HSYNC_CHANGED_0_CB(DEVWRITELINE("huc6270_0", huc6270_device, hsync_changed))
	394	MCFG_HUC6202_READ_0_CB(DEVREAD8("huc6270_0", huc6270_device, read))
	395	MCFG_HUC6202_WRITE_0_CB(DEVWRITE8("huc6270_0", huc6270_device, write))
	396	MCFG_HUC6202_NEXT_PIXEL_1_CB(DEVREAD16("huc6270_1", huc6270_device, next_pixel))
	397	MCFG_HUC6202_TIME_TIL_NEXT_EVENT_1_CB(DEVREAD16("huc6270_1", huc6270_device, time_until_next_event))
	398	MCFG_HUC6202_VSYNC_CHANGED_1_CB(DEVWRITELINE("huc6270_1", huc6270_device, vsync_changed))
	399	MCFG_HUC6202_HSYNC_CHANGED_1_CB(DEVWRITELINE("huc6270_1", huc6270_device, hsync_changed))
	400	MCFG_HUC6202_READ_1_CB(DEVREAD8("huc6270_1", huc6270_device, read))
	401	MCFG_HUC6202_WRITE_1_CB(DEVWRITE8("huc6270_1", huc6270_device, write))
407	402
408	403	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
409	404	MCFG_SOUND_ADD(C6280_TAG, C6280, MAIN_CLOCK/6)

branches/new_menus/src/mess/drivers/ct486.c
r29437	r29438
102	102	// MACHINE DRIVERS
103	103	//**************************************************************************
104	104
105		static const at_keyboard_controller_interface keybc_intf =
106		{
107		DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, kbrst_w),
108		DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, gatea20_w),
109		DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq01_w),
110		DEVCB_NULL,
111		DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, clock_write_from_mb),
112		DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, data_write_from_mb)
113		};
114
115	105	static const pc_kbdc_interface pc_kbdc_intf =
116	106	{
117	107	DEVCB_DEVICE_LINE_MEMBER("keybc", at_keyboard_controller_device, keyboard_clock_w),
r29437	r29438
163	153	MCFG_RAM_DEFAULT_SIZE("4M")
164	154	MCFG_RAM_EXTRA_OPTIONS("1M,2M,8M,16M,32M,64M")
165	155
166		MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keybc_intf)
	156	MCFG_DEVICE_ADD("keybc", AT_KEYBOARD_CONTROLLER, XTAL_12MHz)
	157	MCFG_AT_KEYBOARD_CONTROLLER_SYSTEM_RESET_CB(DEVWRITELINE("cs4031", cs4031_device, kbrst_w))
	158	MCFG_AT_KEYBOARD_CONTROLLER_GATE_A20_CB(DEVWRITELINE("cs4031", cs4031_device, gatea20_w))
	159	MCFG_AT_KEYBOARD_CONTROLLER_INPUT_BUFFER_FULL_CB(DEVWRITELINE("cs4031", cs4031_device, irq01_w))
	160	MCFG_AT_KEYBOARD_CONTROLLER_KEYBOARD_CLOCK_CB(DEVWRITELINE("pc_kbdc", pc_kbdc_device, clock_write_from_mb))
	161	MCFG_AT_KEYBOARD_CONTROLLER_KEYBOARD_DATA_CB(DEVWRITELINE("pc_kbdc", pc_kbdc_device, data_write_from_mb))
167	162	MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
168	163	MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
169	164

branches/new_menus/src/mame/includes/vaportra.h
r29437	r29438
50	50	virtual void machine_reset();
51	51	UINT32 screen_update_vaportra(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
52	52	void update_24bitcol( int offset );
	53	int bank_callback(int bank);
53	54	};

branches/new_menus/src/mame/includes/sshangha.h
r29437	r29438
45	45	optional_device<decospr_device> m_sprgen2;
46	46
47	47	int m_video_control;
	48	int bank_callback(int bank);
48	49
49	50	DECLARE_READ16_MEMBER( sshangha_protection_region_8_146_r );
50	51	DECLARE_WRITE16_MEMBER( sshangha_protection_region_8_146_w );

branches/new_menus/src/mame/includes/cninja.h
r29437	r29438
17	17	public:
18	18	cninja_state(const machine_config &mconfig, device_type type, const char *tag)
19	19	: driver_device(mconfig, type, tag),
20		m_maincpu(*this, "maincpu"),
21		m_audiocpu(*this, "audiocpu"),
22		m_deco146(*this, "ioprot"),
23		m_deco104(*this, "ioprot104"),
24		m_decocomn(*this, "deco_common"),
25		m_deco_tilegen1(*this, "tilegen1"),
26		m_deco_tilegen2(*this, "tilegen2"),
27		m_raster_irq_timer(*this, "raster_timer"),
28		m_oki2(*this, "oki2"),
29		m_spriteram(*this, "spriteram"),
30		m_spriteram2(*this, "spriteram2") ,
	20	m_maincpu(*this, "maincpu"),
	21	m_audiocpu(*this, "audiocpu"),
	22	m_deco146(*this, "ioprot"),
	23	m_deco104(*this, "ioprot104"),
	24	m_decocomn(*this, "deco_common"),
	25	m_deco_tilegen1(*this, "tilegen1"),
	26	m_deco_tilegen2(*this, "tilegen2"),
	27	m_raster_irq_timer(*this, "raster_timer"),
	28	m_oki2(*this, "oki2"),
	29	m_spriteram(*this, "spriteram"),
	30	m_spriteram2(*this, "spriteram2") ,
31	31	m_pf1_rowscroll(*this, "pf1_rowscroll"),
32	32	m_pf2_rowscroll(*this, "pf2_rowscroll"),
33	33	m_pf3_rowscroll(*this, "pf3_rowscroll"),
r29437	r29438
92	92	TIMER_DEVICE_CALLBACK_MEMBER(interrupt_gen);
93	93	void cninjabl_draw_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect );
94	94
	95	int cninja_bank_callback(int bank);
	96	int robocop2_bank_callback(int bank);
	97	int mutantf_1_bank_callback(int bank);
	98	int mutantf_2_bank_callback(int bank);
	99
95	100	DECLARE_READ16_MEMBER( sshangha_protection_region_6_146_r );
96	101	DECLARE_WRITE16_MEMBER( sshangha_protection_region_6_146_w );
97	102	DECLARE_READ16_MEMBER( sshangha_protection_region_8_146_r );

branches/new_menus/src/mame/includes/dietgo.h
r29437	r29438
41	41	DECLARE_DRIVER_INIT(dietgo);
42	42	virtual void machine_start();
43	43	UINT32 screen_update_dietgo(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	44	int bank_callback(int bank);
44	45
45	46	DECLARE_READ16_MEMBER( dietgo_protection_region_0_104_r );
46	47	DECLARE_WRITE16_MEMBER( dietgo_protection_region_0_104_w );

branches/new_menus/src/mame/includes/dassault.h
r29437	r29438
70	70	virtual void video_start();
71	71	UINT32 screen_update_dassault(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
72	72	void mixdassaultlayer(bitmap_rgb32 &bitmap, bitmap_ind16* sprite_bitmap, const rectangle &cliprect, UINT16 pri, UINT16 primask, UINT16 penbase, UINT8 alpha);
	73	int dassault_bank_callback( const int bank );
73	74	};

branches/new_menus/src/mame/includes/boogwing.h
r29437	r29438
27	27	m_oki2(*this, "oki2"),
28	28	m_spriteram(*this, "spriteram"),
29	29	m_spriteram2(*this, "spriteram2") ,
30		m_pf1_rowscroll(*this, "pf1_rowscroll"),
31		m_pf2_rowscroll(*this, "pf2_rowscroll"),
32		m_pf3_rowscroll(*this, "pf3_rowscroll"),
33		m_pf4_rowscroll(*this, "pf4_rowscroll"),
34		m_sprgen1(*this, "spritegen1"),
35		m_sprgen2(*this, "spritegen2"),
36		m_palette(*this, "palette")
	30	m_pf1_rowscroll(*this, "pf1_rowscroll"),
	31	m_pf2_rowscroll(*this, "pf2_rowscroll"),
	32	m_pf3_rowscroll(*this, "pf3_rowscroll"),
	33	m_pf4_rowscroll(*this, "pf4_rowscroll"),
	34	m_sprgen1(*this, "spritegen1"),
	35	m_sprgen2(*this, "spritegen2"),
	36	m_palette(*this, "palette")
37	37	{ }
38	38
39	39	/* devices */
r29437	r29438
63	63	void mix_boogwing(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
64	64	DECLARE_READ16_MEMBER( boogwing_protection_region_0_104_r );
65	65	DECLARE_WRITE16_MEMBER( boogwing_protection_region_0_104_w );
66
	66
	67	int bank_callback(int bank);
	68	int bank_callback2(int bank);
67	69	};

branches/new_menus/src/mame/includes/pktgaldx.h
r29437	r29438
58	58
59	59	READ16_MEMBER( pktgaldx_protection_region_f_104_r );
60	60	WRITE16_MEMBER( pktgaldx_protection_region_f_104_w );
	61
	62	int bank_callback(int bank);
61	63	};

branches/new_menus/src/mame/includes/cbuster.h
r29437	r29438
57	57	virtual void video_start();
58	58	UINT32 screen_update_twocrude(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
59	59	void update_24bitcol( int offset );
	60	int bank_callback(int bank);
60	61	};

branches/new_menus/src/mame/includes/rohga.h
r29437	r29438
17	17	public:
18	18	rohga_state(const machine_config &mconfig, device_type type, const char *tag)
19	19	: driver_device(mconfig, type, tag),
20		m_maincpu(*this, "maincpu"),
21		m_audiocpu(*this, "audiocpu"),
22		m_deco146(*this, "ioprot"),
23		m_deco104(*this, "ioprot104"),
24		m_decocomn(*this, "deco_common"),
25		m_deco_tilegen1(*this, "tilegen1"),
26		m_deco_tilegen2(*this, "tilegen2"),
27		m_oki1(*this, "oki1"),
28		m_oki2(*this, "oki2"),
29		m_spriteram(*this, "spriteram"),
30		m_spriteram2(*this, "spriteram2") ,
	20	m_maincpu(*this, "maincpu"),
	21	m_audiocpu(*this, "audiocpu"),
	22	m_deco146(*this, "ioprot"),
	23	m_deco104(*this, "ioprot104"),
	24	m_decocomn(*this, "deco_common"),
	25	m_deco_tilegen1(*this, "tilegen1"),
	26	m_deco_tilegen2(*this, "tilegen2"),
	27	m_oki1(*this, "oki1"),
	28	m_oki2(*this, "oki2"),
	29	m_spriteram(*this, "spriteram"),
	30	m_spriteram2(*this, "spriteram2") ,
31	31	m_pf1_rowscroll(*this, "pf1_rowscroll"),
32	32	m_pf2_rowscroll(*this, "pf2_rowscroll"),
33	33	m_pf3_rowscroll(*this, "pf3_rowscroll"),
r29437	r29438
76	76	UINT32 screen_update_wizdfire(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
77	77	UINT32 screen_update_nitrobal(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
78	78	void mixwizdfirelayer(bitmap_rgb32 &bitmap, const rectangle &cliprect, int gfxregion, UINT16 pri, UINT16 primask);
	79	int bank_callback(int bank);
79	80
80	81	READ16_MEMBER( nb_protection_region_0_146_r );
81	82	WRITE16_MEMBER( nb_protection_region_0_146_w );

branches/new_menus/src/mame/includes/simpl156.h
r29437	r29438
14	14	public:
15	15	simpl156_state(const machine_config &mconfig, device_type type, const char *tag)
16	16	: driver_device(mconfig, type, tag),
17		m_maincpu(*this, "maincpu"),
18		m_deco_tilegen1(*this, "tilegen1"),
19		m_eeprom(*this, "eeprom"),
20		m_okimusic(*this, "okimusic") ,
	17	m_maincpu(*this, "maincpu"),
	18	m_deco_tilegen1(*this, "tilegen1"),
	19	m_eeprom(*this, "eeprom"),
	20	m_okimusic(*this, "okimusic") ,
21	21	m_mainram(*this, "mainram"),
22	22	m_systemram(*this, "systemram"),
23	23	m_sprgen(*this, "spritegen"),
r29437	r29438
38	38	required_device<palette_device> m_palette;
39	39	UINT16 *m_spriteram;
40	40	size_t m_spriteram_size;
	41	int bank_callback(int bank);
41	42
42	43	DECLARE_READ32_MEMBER(simpl156_inputs_read);
43	44	DECLARE_READ32_MEMBER(simpl156_palette_r);

branches/new_menus/src/mame/includes/deco32.h
r29437	r29438
168	168	UINT16 port_b_tattass(int unused);
169	169	void tattass_sound_cb( address_space &space, UINT16 data, UINT16 mem_mask );
170	170
	171	int fghthist_bank_callback( int bank );
	172	int captaven_bank_callback( int bank );
	173	int tattass_bank_callback( int bank );
171	174	};
172	175
173	176	class dragngun_state : public deco32_state
r29437	r29438
202	205	void screen_eof_dragngun(screen_device &screen, bool state);
203	206	void dragngun_draw_sprites( bitmap_rgb32 &bitmap, const rectangle &cliprect, const UINT32 *spritedata);
204	207	READ32_MEMBER( dragngun_unk_video_r );
	208
	209	int bank_1_callback( int bank );
	210	int bank_2_callback( int bank );
205	211	};

branches/new_menus/src/mame/includes/darkseal.h
r29437	r29438
7	7	public:
8	8	darkseal_state(const machine_config &mconfig, device_type type, const char *tag)
9	9	: driver_device(mconfig, type, tag),
10		m_deco_tilegen1(*this, "tilegen1"),
11		m_deco_tilegen2(*this, "tilegen2"),
12		m_spriteram(*this, "spriteram") ,
	10	m_deco_tilegen1(*this, "tilegen1"),
	11	m_deco_tilegen2(*this, "tilegen2"),
	12	m_spriteram(*this, "spriteram") ,
13	13	m_ram(*this, "ram"),
14	14	m_pf1_rowscroll(*this, "pf1_rowscroll"),
15	15	m_pf3_rowscroll(*this, "pf3_rowscroll"),

branches/new_menus/src/mame/video/k001604.c
r29437	r29438
17	17
18	18	k001604_device::k001604_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
19	19	: device_t(mconfig, K001604, "Konami 001604", tag, owner, clock, "k001604", __FILE__),
	20	m_gfx_index_1(0),
	21	m_gfx_index_2(0),
	22	m_layer_size(0),
	23	m_roz_size(0),
	24	m_txt_mem_offset(0),
	25	m_roz_mem_offset(0),
20	26	m_tile_ram(NULL),
21	27	m_char_ram(NULL),
22	28	m_reg(NULL),
r29437	r29438
38	44	}
39	45
40	46	//-------------------------------------------------
41		// device_config_complete - perform any
42		// operations now that the configuration is
43		// complete
44		//-------------------------------------------------
45
46		void k001604_device::device_config_complete()
47		{
48		// inherit a copy of the static data
49		const k001604_interface intf = reinterpret_cast<const k001604_interface >(static_config());
50		if (intf != NULL)
51		static_cast<k001604_interface >(this) = *intf;
52
53		// or initialize to defaults if none provided
54		else
55		{
56		m_gfx_index_1 = 0;
57		m_gfx_index_2 = 0;
58		m_layer_size = 0;
59		m_roz_size = 0;
60		m_txt_mem_offset = 0;
61		m_roz_mem_offset = 0;
62		}
63		}
64
65		//-------------------------------------------------
66	47	// device_start - device-specific startup
67	48	//-------------------------------------------------
68	49

branches/new_menus/src/mame/video/k001604.h
r29437	r29438
3	3	#define __K001604_H__
4	4
5	5
6		~~stru~~ct k001604_inte~~rfa~~ce
	6	class k001604_device : public device_t
7	7	{
8		int m_gfx_index_1;
9		int m_gfx_index_2;
10		int m_layer_size; // 0 -> width = 128 tiles, 1 -> width = 256 tiles
11		int m_roz_size; // 0 -> 8x8, 1 -> 16x16
12		int m_txt_mem_offset;
13		int m_roz_mem_offset;
14		};
15
16
17		class k001604_device : public device_t,
18		public k001604_interface
19		{
20	8	public:
21	9	k001604_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
22	10	~k001604_device() {}
r29437	r29438
24	12	// static configuration
25	13	static void static_set_gfxdecode_tag(device_t &device, const char *tag);
26	14	static void static_set_palette_tag(device_t &device, const char *tag);
27
	15	static void set_gfx_index_1(device_t &device, int idx) { downcast<k001604_device &>(device).m_gfx_index_1 = idx; }
	16	static void set_gfx_index_2(device_t &device, int idx) { downcast<k001604_device &>(device).m_gfx_index_2 = idx; }
	17	static void set_layer_size(device_t &device, int size) { downcast<k001604_device &>(device).m_layer_size = size; }
	18	static void set_roz_size(device_t &device, int size) { downcast<k001604_device &>(device).m_roz_size = size; }
	19	static void set_txt_mem_offset(device_t &device, int offs) { downcast<k001604_device &>(device).m_txt_mem_offset = offs; }
	20	static void set_roz_mem_offset(device_t &device, int offs) { downcast<k001604_device &>(device).m_roz_mem_offset = offs; }
	21
28	22	void draw_back_layer( bitmap_rgb32 &bitmap, const rectangle &cliprect );
29	23	void draw_front_layer( screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect );
30	24	DECLARE_WRITE32_MEMBER( tile_w );
r29437	r29438
36	30
37	31	protected:
38	32	// device-level overrides
39		virtual void device_config_complete();
40	33	virtual void device_start();
41	34	virtual void device_reset();
42	35	private:
43	36	// internal state
44		tilemap_t *m_layer_8x8[2];
45		tilemap_t *m_layer_roz;
	37	int m_gfx_index_1;
	38	int m_gfx_index_2;
	39	int m_layer_size; // 0 -> width = 128 tiles, 1 -> width = 256 tiles
	40	int m_roz_size; // 0 -> 8x8, 1 -> 16x16
	41	int m_txt_mem_offset;
	42	int m_roz_mem_offset;
	43
	44	tilemap_t *m_layer_8x8[2];
	45	tilemap_t *m_layer_roz;
46	46	int m_gfx_index[2];
47	47
48	48	UINT32 * m_tile_ram;
r29437	r29438
64	64	extern const device_type K001604;
65	65
66	66
67		#define MCFG_K001604_ADD(_tag, _interface) \
68		MCFG_DEVICE_ADD(_tag, K001604, 0) \
69		MCFG_DEVICE_CONFIG(_interface)
	67	#define MCFG_K001604_GFX_INDEX1(_idx) \
	68	k001604_device::set_gfx_index_1(*device, _idx);
70	69
71		#define MCFG_K001604_MODIFY(_tag, _interface) \
72		MCFG_DEVICE_MODIFY(_tag) \
73		MCFG_DEVICE_CONFIG(_interface)
	70	#define MCFG_K001604_GFX_INDEX2(_idx) \
	71	k001604_device::set_gfx_index_2(*device, _idx);
74	72
	73	#define MCFG_K001604_LAYER_SIZE(_size) \
	74	k001604_device::set_layer_size(*device, _size);
	75
	76	#define MCFG_K001604_ROZ_SIZE(_size) \
	77	k001604_device::set_roz_size(*device, _size);
	78
	79	#define MCFG_K001604_TXT_OFFSET(_offs) \
	80	k001604_device::set_txt_mem_offset(*device, _offs);
	81
	82	#define MCFG_K001604_ROZ_OFFSET(_offs) \
	83	k001604_device::set_roz_mem_offset(*device, _offs);
	84
75	85	#define MCFG_K001604_GFXDECODE(_gfxtag) \
76	86	k001604_device::static_set_gfxdecode_tag(*device, "^" _gfxtag);
77	87

branches/new_menus/src/mame/video/deco16ic.c
r29437	r29438
169	169	deco16ic_device::deco16ic_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
170	170	: device_t(mconfig, DECO16IC, "Data East IC 55 / 56 / 74 / 141", tag, owner, clock, "deco16ic", __FILE__),
171	171	device_video_interface(mconfig, *this),
172		m_pf1_data(NULL),
173		m_pf2_data(NULL),
174		m_pf12_control(NULL),
175		m_pf1_rowscroll_ptr(NULL),
176		m_pf2_rowscroll_ptr(NULL),
177		m_use_custom_pf1(0),
178		m_use_custom_pf2(0),
179		m_pf1_bank(0),
180		m_pf2_bank(0),
181		m_pf12_last_small(0),
182		m_pf12_last_big(0),
183		m_pf1_8bpp_mode(0),
184		m_gfxdecode(*this),
185		m_palette(*this)
	172	m_pf1_data(NULL),
	173	m_pf2_data(NULL),
	174	m_pf12_control(NULL),
	175	m_pf1_rowscroll_ptr(NULL),
	176	m_pf2_rowscroll_ptr(NULL),
	177	m_use_custom_pf1(0),
	178	m_use_custom_pf2(0),
	179	m_pf1_bank(0),
	180	m_pf2_bank(0),
	181	m_pf12_last_small(0),
	182	m_pf12_last_big(0),
	183	m_pf1_8bpp_mode(0),
	184	m_split(0),
	185	m_full_width12(1),
	186	m_pf1_trans_mask(0xf),
	187	m_pf2_trans_mask(0xf),
	188	m_pf1_colour_bank(0),
	189	m_pf2_colour_bank(0),
	190	m_pf1_colourmask(0xf),
	191	m_pf2_colourmask(0xf),
	192	m_pf12_8x8_gfx_bank(0),
	193	m_pf12_16x16_gfx_bank(0),
	194	m_gfxdecode(*this),
	195	m_palette(*this)
186	196	{
187	197	}
188	198
r29437	r29438
197	207	}
198	208
199	209	//-------------------------------------------------
200		// device_config_complete - perform any
201		// operations now that the configuration is
202		// complete
203		//-------------------------------------------------
204
205		void deco16ic_device::device_config_complete()
206		{
207		// inherit a copy of the static data
208		const deco16ic_interface intf = reinterpret_cast<const deco16ic_interface >(static_config());
209		if (intf != NULL)
210		static_cast<deco16ic_interface >(this) = *intf;
211
212		// or initialize to defaults if none provided
213		else
214		{
215		m_bank_cb0 = NULL;
216		m_bank_cb1 = NULL;
217		}
218		}
219
220		//-------------------------------------------------
221	210	// device_start - device-specific startup
222	211	//-------------------------------------------------
223	212
r29437	r29438
226	215	if(!m_gfxdecode->started())
227	216	throw device_missing_dependencies();
228	217
229		m_bank_cb_func[0] = m_bank_cb0;
230		m_bank_cb_func[1] = m_bank_cb1;
	218	m_bank1_cb.bind_relative_to(*owner());
	219	m_bank2_cb.bind_relative_to(*owner());
231	220
232	221	int fullheight = 0;
233	222	int fullwidth = 0;
r29437	r29438
832	821	m_use_custom_pf1 = deco16_pf_update(m_pf1_tilemap_8x8, m_pf1_tilemap_16x16, rowscroll_1_ptr, m_pf12_control[1], m_pf12_control[2], m_pf12_control[5] & 0xff, m_pf12_control[6] & 0xff);
833	822
834	823	/* Update banking and global flip state */
835		if (m_bank_cb~~_fu~~n~~c[0]~~)
	824	if (!m_bank1_cb.isnull())
836	825	{
837		bank1 = m_bank_cb~~_func[0]~~(m_pf12_control[7] & 0xff);
	826	bank1 = m_bank1_cb(m_pf12_control[7] & 0xff);
838	827
839	828	if (bank1 != m_pf1_bank)
840	829	{
r29437	r29438
847	836	}
848	837	}
849	838
850		if (m_bank_cb~~_fu~~n~~c[1]~~)
	839	if (!m_bank2_cb.isnull())
851	840	{
852		bank2 = m_bank_cb~~_func[1]~~(m_pf12_control[7] >> 8);
	841	bank2 = m_bank2_cb(m_pf12_control[7] >> 8);
853	842
854	843	if (bank2 != m_pf2_bank)
855	844	{

branches/new_menus/src/mame/video/deco16ic.h
r29437	r29438
17	17	TYPE DEFINITIONS
18	18	***************************************************************************/
19	19
20		typedef int (*deco16_bank_cb~~)( const int b~~a~~nk )~~;
	20	typedef device_delegate<int (int bank)> deco16_bank_cb_delegate;
21	21
22
23		struct deco16ic_interface
24		{
25		int m_split;
26		int m_full_width12;
27
28		int m_pf1_trans_mask, m_pf2_trans_mask;
29		int m_pf1_colour_bank, m_pf2_colour_bank;
30		int m_pf1_colourmask, m_pf2_colourmask;
31		deco16_bank_cb m_bank_cb0, m_bank_cb1;
32		int m_pf12_8x8_gfx_bank, m_pf12_16x16_gfx_bank;
33		};
34
35	22	class deco16ic_device : public device_t,
36		public device_video_interface,
37		public deco16ic_interface
	23	public device_video_interface
38	24	{
39	25	public:
40	26	deco16ic_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
r29437	r29438
43	29	// static configuration
44	30	static void static_set_gfxdecode_tag(device_t &device, const char *tag);
45	31	static void static_set_palette_tag(device_t &device, const char *tag);
	32	static void set_bank1_callback(device_t &device, deco16_bank_cb_delegate callback) { downcast<deco16ic_device &>(device).m_bank1_cb = callback; }
	33	static void set_bank2_callback(device_t &device, deco16_bank_cb_delegate callback) { downcast<deco16ic_device &>(device).m_bank2_cb = callback; }
	34	static void set_split(device_t &device, int split) { downcast<deco16ic_device &>(device).m_split = split; }
	35	static void set_full_width(device_t &device, int width) { downcast<deco16ic_device &>(device).m_full_width12 = width; }
	36	static void set_pf1_trans_mask(device_t &device, int mask) { downcast<deco16ic_device &>(device).m_pf1_trans_mask = mask; }
	37	static void set_pf2_trans_mask(device_t &device, int mask) { downcast<deco16ic_device &>(device).m_pf2_trans_mask = mask; }
	38	static void set_pf1_col_mask(device_t &device, int mask) { downcast<deco16ic_device &>(device).m_pf1_colourmask = mask; }
	39	static void set_pf2_col_mask(device_t &device, int mask) { downcast<deco16ic_device &>(device).m_pf2_colourmask = mask; }
	40	static void set_pf1_col_bank(device_t &device, int bank) { downcast<deco16ic_device &>(device).m_pf1_colour_bank = bank; }
	41	static void set_pf2_col_bank(device_t &device, int bank) { downcast<deco16ic_device &>(device).m_pf2_colour_bank = bank; }
	42	static void set_pf12_8x8_bank(device_t &device, int bank) { downcast<deco16ic_device &>(device).m_pf12_8x8_gfx_bank = bank; }
	43	static void set_pf12_16x16_bank(device_t &device, int bank) { downcast<deco16ic_device &>(device).m_pf12_16x16_gfx_bank = bank; }
	44
46	45
47
48	46	DECLARE_WRITE16_MEMBER( pf1_data_w );
49	47	DECLARE_WRITE16_MEMBER( pf2_data_w );
50	48
r29437	r29438
119	117
120	118	protected:
121	119	// device-level overrides
122		virtual void device_config_complete();
123	120	virtual void device_start();
124	121	virtual void device_reset();
125	122
r29437	r29438
133	130	tilemap_t m_pf1_tilemap_16x16, m_pf2_tilemap_16x16;
134	131	tilemap_t m_pf1_tilemap_8x8, m_pf2_tilemap_8x8;
135	132
136		deco16_bank_cb m_bank_cb_func[2];
	133	deco16_bank_cb_delegate m_bank1_cb;
	134	deco16_bank_cb_delegate m_bank2_cb;
137	135
138	136	int m_use_custom_pf1, m_use_custom_pf2;
139
140	137	int m_pf1_bank, m_pf2_bank;
141
142	138	int m_pf12_last_small, m_pf12_last_big;
143
144	139	int m_pf1_8bpp_mode;
145	140
	141	int m_split;
	142	int m_full_width12;
	143	int m_pf1_trans_mask, m_pf2_trans_mask;
	144	int m_pf1_colour_bank, m_pf2_colour_bank;
	145	int m_pf1_colourmask, m_pf2_colourmask;
	146	int m_pf12_8x8_gfx_bank, m_pf12_16x16_gfx_bank;
	147
146	148	TILEMAP_MAPPER_MEMBER(deco16_scan_rows);
147	149	TILE_GET_INFO_MEMBER(get_pf2_tile_info);
148	150	TILE_GET_INFO_MEMBER(get_pf1_tile_info);
r29437	r29438
160	162	DEVICE CONFIGURATION MACROS
161	163	***************************************************************************/
162	164
163		#define MCFG_DECO16IC_ADD(_tag, _interface) \
164		MCFG_DEVICE_ADD(_tag, DECO16IC, 0) \
165		MCFG_DEVICE_CONFIG(_interface)
166
167	165	#define MCFG_DECO16IC_SET_SCREEN MCFG_VIDEO_SET_SCREEN
168	166
	167	#define MCFG_DECO16IC_BANK1_CB(_class, _method) \
	168	deco16ic_device::set_bank1_callback(device, deco16_bank_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class >(owner)));
	169
	170	#define MCFG_DECO16IC_BANK2_CB(_class, _method) \
	171	deco16ic_device::set_bank2_callback(device, deco16_bank_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class >(owner)));
	172
	173	#define MCFG_DECO16IC_SPLIT(_split) \
	174	deco16ic_device::set_split(*device, _split);
	175
	176	#define MCFG_DECO16IC_WIDTH12(_width) \
	177	deco16ic_device::set_full_width(*device, _width);
	178
	179	#define MCFG_DECO16IC_PF1_TRANS_MASK(_mask) \
	180	deco16ic_device::set_pf1_trans_mask(*device, _mask);
	181
	182	#define MCFG_DECO16IC_PF2_TRANS_MASK(_mask) \
	183	deco16ic_device::set_pf2_trans_mask(*device, _mask);
	184
	185	#define MCFG_DECO16IC_PF1_COL_MASK(_mask) \
	186	deco16ic_device::set_pf1_col_mask(*device, _mask);
	187
	188	#define MCFG_DECO16IC_PF2_COL_MASK(_mask) \
	189	deco16ic_device::set_pf2_col_mask(*device, _mask);
	190
	191	#define MCFG_DECO16IC_PF1_COL_BANK(_bank) \
	192	deco16ic_device::set_pf1_col_bank(*device, _bank);
	193
	194	#define MCFG_DECO16IC_PF2_COL_BANK(_bank) \
	195	deco16ic_device::set_pf2_col_bank(*device, _bank);
	196
	197	#define MCFG_DECO16IC_PF12_8X8_BANK(_bank) \
	198	deco16ic_device::set_pf12_8x8_bank(*device, _bank);
	199
	200	#define MCFG_DECO16IC_PF12_16X16_BANK(_bank) \
	201	deco16ic_device::set_pf12_16x16_bank(*device, _bank);
	202
169	203	#define MCFG_DECO16IC_GFXDECODE(_gfxtag) \
170	204	deco16ic_device::static_set_gfxdecode_tag(*device, "^" _gfxtag);
171	205

branches/new_menus/src/mame/drivers/sshangha.c
r29437	r29438
379	379	DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL
380	380	};
381	381
382		~~stat~~i~~c i~~nt sshangha_bank_callback( int bank )
	382	int sshangha_state::bank_callback( int bank )
383	383	{
384		bank = bank >> 4;
385		return bank * 0x1000;
	384	return (bank >> 4) * 0x1000;
386	385	}
387	386
388		static const deco16ic_interface sshangha_deco16ic_tilegen1_intf =
389		{
390		0, 1,
391		0x0f, 0x0f, /* trans masks (default values) */
392		0x10, 0x00, /* color base */
393		0x0f, 0x0f, /* color masks (default values) */
394		sshangha_bank_callback,
395		sshangha_bank_callback,
396		0,1
397		};
398
399
400	387	static MACHINE_CONFIG_START( sshangha, sshangha_state )
401	388
402	389	/* basic machine hardware */
r29437	r29438
420	407	MCFG_GFXDECODE_ADD("gfxdecode", "palette", sshangha)
421	408	MCFG_PALETTE_ADD("palette", 0x4000)
422	409
423		MCFG_DECO16IC_ADD("tilegen1", sshangha_deco16ic_tilegen1_intf)
	410	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	411	MCFG_DECO16IC_SPLIT(0)
	412	MCFG_DECO16IC_WIDTH12(1)
	413	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	414	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	415	MCFG_DECO16IC_PF1_COL_BANK(0x10)
	416	MCFG_DECO16IC_PF2_COL_BANK(0x00)
	417	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	418	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	419	MCFG_DECO16IC_BANK1_CB(sshangha_state, bank_callback)
	420	MCFG_DECO16IC_BANK2_CB(sshangha_state, bank_callback)
	421	MCFG_DECO16IC_PF12_8X8_BANK(0)
	422	MCFG_DECO16IC_PF12_16X16_BANK(1)
424	423	MCFG_DECO16IC_GFXDECODE("gfxdecode")
425	424	MCFG_DECO16IC_PALETTE("palette")
426	425

branches/new_menus/src/mame/drivers/zr107.c
r29437	r29438
800	800	MACHINE_CONFIG_END
801	801
802	802
803		static const k001604_interface jetwave_k001604_intf =
804		{
805		0, 1, /* gfx index 1 & 2 */
806		0, 0, /* layer_size, roz_size */
807		0, /* text layer mem offset */
808		16384, /* roz layer mem offset */
809		};
810
811	803	static MACHINE_CONFIG_START( jetwave, zr107_state )
812	804
813	805	/* basic machine hardware */
r29437	r29438
841	833
842	834	MCFG_GFXDECODE_ADD("gfxdecode", "palette", empty)
843	835
844		MCFG_K001604_ADD("k001604", jetwave_k001604_intf)
	836	MCFG_DEVICE_ADD("k001604", K001604, 0)
	837	MCFG_K001604_GFX_INDEX1(0)
	838	MCFG_K001604_GFX_INDEX2(1)
	839	MCFG_K001604_LAYER_SIZE(0)
	840	MCFG_K001604_ROZ_SIZE(0)
	841	MCFG_K001604_TXT_OFFSET(0)
	842	MCFG_K001604_ROZ_OFFSET(16384)
845	843	MCFG_K001604_GFXDECODE("gfxdecode")
846	844	MCFG_K001604_PALETTE("palette")
847	845

branches/new_menus/src/mame/drivers/gticlub.c
r29437	r29438
792	792	1
793	793	};
794	794
795		static const k001604_interface gticlub_k001604_intf =
796		{
797		1, 2, /* gfx index 1 & 2 */
798		1, 1, /* layer_size, roz_size */
799		0, /* text layer mem offset */
800		0, /* roz layer mem offset */
801		};
802	795
803		static const k001604_interface slrasslt_k001604_intf =
804		{
805		1, 2, /* gfx index 1 & 2 */
806		0, 0, /* layer_size, roz_size */
807		16384, /* text layer mem offset */
808		0, /* roz layer mem offset */
809		};
810
811		static const k001604_interface hangplt_k001604_intf_l =
812		{
813		1, 2, /* gfx index 1 & 2 */
814		0, 1, /* layer_size, roz_size */
815		0, /* text layer mem offset */
816		16384, /* roz layer mem offset */
817		};
818
819		static const k001604_interface hangplt_k001604_intf_r =
820		{
821		3, 4, /* gfx index 1 & 2 */
822		0, 1, /* layer_size, roz_size */
823		0, /* text layer mem offset */
824		16384, /* roz layer mem offset */
825		};
826
827
828	796	MACHINE_RESET_MEMBER(gticlub_state,gticlub)
829	797	{
830	798	m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
r29437	r29438
986	954	MCFG_VIDEO_START_OVERRIDE(gticlub_state,gticlub)
987	955
988	956	MCFG_GFXDECODE_ADD("gfxdecode", "palette", empty)
989		MCFG_K001604_ADD("k001604_1", gticlub_k001604_intf)
	957	MCFG_DEVICE_ADD("k001604_1", K001604, 0)
	958	MCFG_K001604_GFX_INDEX1(1)
	959	MCFG_K001604_GFX_INDEX2(2)
	960	MCFG_K001604_LAYER_SIZE(1)
	961	MCFG_K001604_ROZ_SIZE(1)
	962	MCFG_K001604_TXT_OFFSET(0)
	963	MCFG_K001604_ROZ_OFFSET(0)
990	964	MCFG_K001604_GFXDECODE("gfxdecode")
991	965	MCFG_K001604_PALETTE("palette")
992	966
r29437	r29438
1015	989	MCFG_ADC1038_ADD("adc1038", thunderh_adc1038_intf)
1016	990
1017	991	MCFG_DEVICE_REMOVE("k001604_1")
1018		MCFG_K001604_ADD("k001604_1", slrasslt_k001604_intf)
	992	MCFG_DEVICE_ADD("k001604_1", K001604, 0)
	993	MCFG_K001604_GFX_INDEX1(1)
	994	MCFG_K001604_GFX_INDEX2(2)
	995	MCFG_K001604_LAYER_SIZE(0)
	996	MCFG_K001604_ROZ_SIZE(0)
	997	MCFG_K001604_TXT_OFFSET(16384)
	998	MCFG_K001604_ROZ_OFFSET(0)
1019	999	MCFG_K001604_GFXDECODE("gfxdecode")
1020	1000	MCFG_K001604_PALETTE("palette")
1021	1001	MACHINE_CONFIG_END
r29437	r29438
1109	1089
1110	1090	MCFG_GFXDECODE_ADD("gfxdecode", "palette", empty)
1111	1091
1112		MCFG_K001604_ADD("k001604_1", hangplt_k001604_intf_l)
	1092	MCFG_DEVICE_ADD("k001604_1", K001604, 0)
	1093	MCFG_K001604_GFX_INDEX1(1)
	1094	MCFG_K001604_GFX_INDEX2(2)
	1095	MCFG_K001604_LAYER_SIZE(0)
	1096	MCFG_K001604_ROZ_SIZE(1)
	1097	MCFG_K001604_TXT_OFFSET(0)
	1098	MCFG_K001604_ROZ_OFFSET(16384)
1113	1099	MCFG_K001604_GFXDECODE("gfxdecode")
1114	1100	MCFG_K001604_PALETTE("palette")
1115	1101
1116		MCFG_K001604_ADD("k001604_2", hangplt_k001604_intf_r)
	1102	MCFG_DEVICE_ADD("k001604_2", K001604, 0)
	1103	MCFG_K001604_GFX_INDEX1(3)
	1104	MCFG_K001604_GFX_INDEX2(4)
	1105	MCFG_K001604_LAYER_SIZE(0)
	1106	MCFG_K001604_ROZ_SIZE(1)
	1107	MCFG_K001604_TXT_OFFSET(0)
	1108	MCFG_K001604_ROZ_OFFSET(16384)
1117	1109	MCFG_K001604_GFXDECODE("gfxdecode")
1118	1110	MCFG_K001604_PALETTE("palette")
1119	1111

branches/new_menus/src/mame/drivers/dassault.c
r29437	r29438
450	450
451	451	/**********************************************************************************/
452	452
453		~~stat~~i~~c i~~nt dassault_bank_callback( const int bank )
	453	int dassault_state::dassault_bank_callback( const int bank )
454	454	{
455	455	return ((bank >> 4) & 0xf) << 12;
456	456	}
457	457
458		static const deco16ic_interface dassault_deco16ic_tilegen1_intf =
459		{
460		0, 1,
461		0x0f, 0x0f, /* trans masks (default values) */
462		0, 16, /* color base (default values) */
463		0x0f, 0x0f, /* color masks (default values) */
464		dassault_bank_callback,
465		dassault_bank_callback,
466		0,1,
467		};
468
469		static const deco16ic_interface dassault_deco16ic_tilegen2_intf =
470		{
471		0, 1,
472		0x0f, 0x0f, /* trans masks (default values) */
473		0, 16, /* color base (default values) */
474		0x0f, 0x0f, /* color masks (default values) */
475		dassault_bank_callback,
476		dassault_bank_callback,
477		0,2,
478		};
479
480
481	458	static MACHINE_CONFIG_START( dassault, dassault_state )
482	459
483	460	/* basic machine hardware */
r29437	r29438
513	490	MCFG_DECOCOMN_ADD("deco_common")
514	491	MCFG_DECOCOMN_PALETTE("palette")
515	492
516		MCFG_DECO16IC_ADD("tilegen1", dassault_deco16ic_tilegen1_intf)
	493	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	494	MCFG_DECO16IC_SPLIT(0)
	495	MCFG_DECO16IC_WIDTH12(1)
	496	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	497	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	498	MCFG_DECO16IC_PF1_COL_BANK(0)
	499	MCFG_DECO16IC_PF2_COL_BANK(16)
	500	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	501	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	502	MCFG_DECO16IC_BANK1_CB(dassault_state, dassault_bank_callback)
	503	MCFG_DECO16IC_BANK2_CB(dassault_state, dassault_bank_callback)
	504	MCFG_DECO16IC_PF12_8X8_BANK(0)
	505	MCFG_DECO16IC_PF12_16X16_BANK(1)
	506
517	507	MCFG_DECO16IC_GFXDECODE("gfxdecode")
518	508	MCFG_DECO16IC_PALETTE("palette")
519	509
520		MCFG_DECO16IC_ADD("tilegen2", dassault_deco16ic_tilegen2_intf)
	510	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	511	MCFG_DECO16IC_SPLIT(0)
	512	MCFG_DECO16IC_WIDTH12(1)
	513	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	514	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	515	MCFG_DECO16IC_PF1_COL_BANK(0)
	516	MCFG_DECO16IC_PF2_COL_BANK(16)
	517	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	518	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	519	MCFG_DECO16IC_BANK1_CB(dassault_state, dassault_bank_callback)
	520	MCFG_DECO16IC_BANK2_CB(dassault_state, dassault_bank_callback)
	521	MCFG_DECO16IC_PF12_8X8_BANK(0)
	522	MCFG_DECO16IC_PF12_16X16_BANK(2)
	523
521	524	MCFG_DECO16IC_GFXDECODE("gfxdecode")
522	525	MCFG_DECO16IC_PALETTE("palette")
523	526

branches/new_menus/src/mame/drivers/supbtime.c
r29437	r29438
306	306
307	307	/******************************************************************************/
308	308
309		static const deco16ic_interface supbtime_deco16ic_tilegen1_intf =
310		{
311		0, 1,
312		0x0f, 0x0f, /* trans masks (default values) */
313		0, 16, /* color base (default values) */
314		0x0f, 0x0f, /* color masks (default values) */
315		NULL, NULL,
316		0,1
317		};
318
319	309	void supbtime_state::machine_start()
320	310	{
321	311	}
r29437	r29438
345	335	MCFG_PALETTE_ADD("palette", 1024)
346	336	MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
347	337
348		MCFG_DECO16IC_ADD("tilegen1", supbtime_deco16ic_tilegen1_intf)
	338	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	339	MCFG_DECO16IC_SPLIT(0)
	340	MCFG_DECO16IC_WIDTH12(1)
	341	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	342	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	343	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	344	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	345	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	346	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	347	MCFG_DECO16IC_PF12_8X8_BANK(0)
	348	MCFG_DECO16IC_PF12_16X16_BANK(1)
349	349	MCFG_DECO16IC_GFXDECODE("gfxdecode")
350	350	MCFG_DECO16IC_PALETTE("palette")
351	351
r29437	r29438
377	377	MCFG_CPU_ADD("audiocpu", H6280, 32220000/8) /* Custom chip 45, audio section crystal is 32.220 MHz */
378	378	MCFG_CPU_PROGRAM_MAP(sound_map)
379	379
380
381	380	/* video hardware */
382	381	MCFG_SCREEN_ADD("screen", RASTER)
383	382	MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
r29437	r29438
392	391	MCFG_PALETTE_ADD("palette", 1024)
393	392	MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
394	393
395		MCFG_DECO16IC_ADD("tilegen1", supbtime_deco16ic_tilegen1_intf)
	394	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	395	MCFG_DECO16IC_SPLIT(0)
	396	MCFG_DECO16IC_WIDTH12(1)
	397	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	398	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	399	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	400	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	401	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	402	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	403	MCFG_DECO16IC_PF12_8X8_BANK(0)
	404	MCFG_DECO16IC_PF12_16X16_BANK(1)
396	405	MCFG_DECO16IC_GFXDECODE("gfxdecode")
397	406	MCFG_DECO16IC_PALETTE("palette")
398	407

branches/new_menus/src/mame/drivers/ggconnie.c
r29437	r29438
180	180	"maincpu"
181	181	};
182	182
183		static const huc6202_interface sgx_huc6202_config =
184		{
185		DEVCB_DEVICE_MEMBER16( "huc6270_0", huc6270_device, next_pixel ),
186		DEVCB_DEVICE_MEMBER16( "huc6270_0", huc6270_device, time_until_next_event ),
187		DEVCB_DEVICE_LINE_MEMBER( "huc6270_0", huc6270_device, vsync_changed ),
188		DEVCB_DEVICE_LINE_MEMBER( "huc6270_0", huc6270_device, hsync_changed ),
189		DEVCB_DEVICE_MEMBER( "huc6270_0", huc6270_device, read ),
190		DEVCB_DEVICE_MEMBER( "huc6270_0", huc6270_device, write ),
191		DEVCB_DEVICE_MEMBER16( "huc6270_1", huc6270_device, next_pixel ),
192		DEVCB_DEVICE_MEMBER16( "huc6270_1", huc6270_device, time_until_next_event ),
193		DEVCB_DEVICE_LINE_MEMBER( "huc6270_1", huc6270_device, vsync_changed ),
194		DEVCB_DEVICE_LINE_MEMBER( "huc6270_1", huc6270_device, hsync_changed ),
195		DEVCB_DEVICE_MEMBER( "huc6270_1", huc6270_device, read ),
196		DEVCB_DEVICE_MEMBER( "huc6270_1", huc6270_device, write ),
197		};
198
199
200	183	static MACHINE_CONFIG_START( ggconnie, ggconnie_state )
201	184	/* basic machine hardware */
202	185	MCFG_CPU_ADD("maincpu", H6280, PCE_MAIN_CLOCK/3)
r29437	r29438
220	203	MCFG_DEVICE_ADD( "huc6270_1", HUC6270, 0 )
221	204	MCFG_HUC6270_VRAM_SIZE(0x10000)
222	205	MCFG_HUC6270_IRQ_CHANGED_CB(WRITELINE(pce_common_state, pce_irq_changed))
223		MCFG_HUC6202_ADD( "huc6202", sgx_huc6202_config )
	206	MCFG_DEVICE_ADD( "huc6202", HUC6202, 0 )
	207	MCFG_HUC6202_NEXT_PIXEL_0_CB(DEVREAD16("huc6270_0", huc6270_device, next_pixel))
	208	MCFG_HUC6202_TIME_TIL_NEXT_EVENT_0_CB(DEVREAD16("huc6270_0", huc6270_device, time_until_next_event))
	209	MCFG_HUC6202_VSYNC_CHANGED_0_CB(DEVWRITELINE("huc6270_0", huc6270_device, vsync_changed))
	210	MCFG_HUC6202_HSYNC_CHANGED_0_CB(DEVWRITELINE("huc6270_0", huc6270_device, hsync_changed))
	211	MCFG_HUC6202_READ_0_CB(DEVREAD8("huc6270_0", huc6270_device, read))
	212	MCFG_HUC6202_WRITE_0_CB(DEVWRITE8("huc6270_0", huc6270_device, write))
	213	MCFG_HUC6202_NEXT_PIXEL_1_CB(DEVREAD16("huc6270_1", huc6270_device, next_pixel))
	214	MCFG_HUC6202_TIME_TIL_NEXT_EVENT_1_CB(DEVREAD16("huc6270_1", huc6270_device, time_until_next_event))
	215	MCFG_HUC6202_VSYNC_CHANGED_1_CB(DEVWRITELINE("huc6270_1", huc6270_device, vsync_changed))
	216	MCFG_HUC6202_HSYNC_CHANGED_1_CB(DEVWRITELINE("huc6270_1", huc6270_device, hsync_changed))
	217	MCFG_HUC6202_READ_1_CB(DEVREAD8("huc6270_1", huc6270_device, read))
	218	MCFG_HUC6202_WRITE_1_CB(DEVWRITE8("huc6270_1", huc6270_device, write))
224	219
225	220	MCFG_DEVICE_ADD("rtc", MSM6242, XTAL_32_768kHz)
226	221

branches/new_menus/src/mame/drivers/cbuster.c
r29437	r29438
258	258
259	259	/******************************************************************************/
260	260
261		~~stat~~i~~c i~~nt ~~two~~crude_bank_callback( ~~const~~ int bank )
	261	int cbuster_state::bank_callback( int bank )
262	262	{
263	263	return ((bank >> 4) & 0x7) * 0x1000;
264	264	}
265	265
266		static const deco16ic_interface twocrude_deco16ic_tilegen1_intf =
267		{
268		0, 1,
269		0x0f, 0x0f, /* trans masks (default values) */
270		0x00, 0x20, /* color base (default values) */
271		0x0f, 0x0f, /* color masks (default values) */
272		twocrude_bank_callback,
273		twocrude_bank_callback,
274		0,1,
275		};
276
277		static const deco16ic_interface twocrude_deco16ic_tilegen2_intf =
278		{
279		0, 1,
280		0x0f, 0x0f, /* trans masks (default values) */
281		0x30, 0x40, /* color base (default values) */
282		0x0f, 0x0f, /* color masks (default values) */
283		twocrude_bank_callback,
284		twocrude_bank_callback,
285		0,2,
286		};
287
288	266	void cbuster_state::machine_start()
289	267	{
290	268	save_item(NAME(m_prot));
r29437	r29438
319	297	MCFG_GFXDECODE_ADD("gfxdecode", "palette", cbuster)
320	298	MCFG_PALETTE_ADD("palette", 2048)
321	299
322		MCFG_DECO16IC_ADD("tilegen1", twocrude_deco16ic_tilegen1_intf)
	300	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	301	MCFG_DECO16IC_SPLIT(0)
	302	MCFG_DECO16IC_WIDTH12(1)
	303	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	304	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	305	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	306	MCFG_DECO16IC_PF2_COL_BANK(0x20)
	307	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	308	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	309	MCFG_DECO16IC_BANK1_CB(cbuster_state, bank_callback)
	310	MCFG_DECO16IC_BANK2_CB(cbuster_state, bank_callback)
	311	MCFG_DECO16IC_PF12_8X8_BANK(0)
	312	MCFG_DECO16IC_PF12_16X16_BANK(1)
323	313	MCFG_DECO16IC_GFXDECODE("gfxdecode")
324	314	MCFG_DECO16IC_PALETTE("palette")
325	315
326		MCFG_DECO16IC_ADD("tilegen2", twocrude_deco16ic_tilegen2_intf)
	316	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	317	MCFG_DECO16IC_SPLIT(0)
	318	MCFG_DECO16IC_WIDTH12(1)
	319	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	320	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	321	MCFG_DECO16IC_PF1_COL_BANK(0x30)
	322	MCFG_DECO16IC_PF2_COL_BANK(0x40)
	323	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	324	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	325	MCFG_DECO16IC_BANK1_CB(cbuster_state, bank_callback)
	326	MCFG_DECO16IC_BANK2_CB(cbuster_state, bank_callback)
	327	MCFG_DECO16IC_PF12_8X8_BANK(0)
	328	MCFG_DECO16IC_PF12_16X16_BANK(2)
327	329	MCFG_DECO16IC_GFXDECODE("gfxdecode")
328	330	MCFG_DECO16IC_PALETTE("palette")
329	331

branches/new_menus/src/mame/drivers/boogwing.c
r29437	r29438
296	296	}
297	297
298	298
299		~~stat~~i~~c i~~nt boogwing_bank_callback( ~~const~~ int bank )
	299	int boogwing_state::bank_callback( int bank )
300	300	{
301	301	return ((bank >> 4) & 0x7) * 0x1000;
302	302	}
303	303
304		~~stat~~i~~c i~~nt boogwing_bank_callback2( ~~const~~ int bank )
	304	int boogwing_state::bank_callback2( int bank )
305	305	{
306	306	int offset = ((bank >> 4) & 0x7) * 0x1000;
307	307	if ((bank & 0xf) == 0xa)
r29437	r29438
310	310	return offset;
311	311	}
312	312
313		static const deco16ic_interface boogwing_deco16ic_tilegen1_intf =
314		{
315		0, 1,
316		0x0f, 0x1f, /* trans masks (pf2 has 5bpp graphics) */
317		0, 0, /* color base (pf2 is non default) */
318		0x0f, 0x0f, /* color masks (default values) */
319		NULL,
320		boogwing_bank_callback,
321		0, 1
322		};
323
324		static const deco16ic_interface boogwing_deco16ic_tilegen2_intf =
325		{
326		0, 1,
327		0x0f, 0x0f,
328		0, 16,
329		0x0f, 0x0f,
330		boogwing_bank_callback2,
331		boogwing_bank_callback2,
332		0, 2
333		};
334
335
336	313	static MACHINE_CONFIG_START( boogwing, boogwing_state )
337	314
338	315	/* basic machine hardware */
r29437	r29438
361	338	MCFG_DECOCOMN_ADD("deco_common")
362	339	MCFG_DECOCOMN_PALETTE("palette")
363	340
364		MCFG_DECO16IC_ADD("tilegen1", boogwing_deco16ic_tilegen1_intf)
	341	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	342	MCFG_DECO16IC_SPLIT(0)
	343	MCFG_DECO16IC_WIDTH12(1)
	344	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	345	MCFG_DECO16IC_PF2_TRANS_MASK(0x1f) // pf2 has 5bpp graphics
	346	MCFG_DECO16IC_PF1_COL_BANK(0)
	347	MCFG_DECO16IC_PF2_COL_BANK(0) // pf2 is non default
	348	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	349	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	350	// no bank1 callback
	351	MCFG_DECO16IC_BANK2_CB(boogwing_state, bank_callback)
	352	MCFG_DECO16IC_PF12_8X8_BANK(0)
	353	MCFG_DECO16IC_PF12_16X16_BANK(1)
365	354	MCFG_DECO16IC_GFXDECODE("gfxdecode")
366	355	MCFG_DECO16IC_PALETTE("palette")
367	356
368		MCFG_DECO16IC_ADD("tilegen2", boogwing_deco16ic_tilegen2_intf)
	357	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	358	MCFG_DECO16IC_SPLIT(0)
	359	MCFG_DECO16IC_WIDTH12(1)
	360	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	361	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	362	MCFG_DECO16IC_PF1_COL_BANK(0)
	363	MCFG_DECO16IC_PF2_COL_BANK(16)
	364	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	365	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	366	MCFG_DECO16IC_BANK1_CB(boogwing_state, bank_callback2)
	367	MCFG_DECO16IC_BANK2_CB(boogwing_state, bank_callback2)
	368	MCFG_DECO16IC_PF12_8X8_BANK(0)
	369	MCFG_DECO16IC_PF12_16X16_BANK(2)
369	370	MCFG_DECO16IC_GFXDECODE("gfxdecode")
370	371	MCFG_DECO16IC_PALETTE("palette")
371	372

branches/new_menus/src/mame/drivers/tumblep.c
r29437	r29438
271	271
272	272	/***************************************************************************/
273	273
274		static const deco16ic_interface tumblep_deco16ic_tilegen1_intf =
275		{
276		0, 1,
277		0x0f, 0x0f, /* trans masks (default values) */
278		0, 16, /* color base (default values) */
279		0x0f, 0x0f, /* color masks (default values) */
280		NULL, NULL,
281		0,1
282		};
283
284	274	void tumblep_state::machine_start()
285	275	{
286	276	}
r29437	r29438
309	299	MCFG_PALETTE_ADD("palette", 1024)
310	300	MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
311	301
312		MCFG_DECO16IC_ADD("tilegen1", tumblep_deco16ic_tilegen1_intf)
	302	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	303	MCFG_DECO16IC_SPLIT(0)
	304	MCFG_DECO16IC_WIDTH12(1)
	305	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	306	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	307	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	308	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	309	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	310	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	311	MCFG_DECO16IC_PF12_8X8_BANK(0)
	312	MCFG_DECO16IC_PF12_16X16_BANK(1)
313	313	MCFG_DECO16IC_GFXDECODE("gfxdecode")
314	314	MCFG_DECO16IC_PALETTE("palette")
315	315

branches/new_menus/src/mame/drivers/backfire.c
r29437	r29438
96	96	UINT32 screen_update_backfire_right(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
97	97	INTERRUPT_GEN_MEMBER(deco32_vbl_interrupt);
98	98	void descramble_sound();
	99	int bank_callback(int bank);
99	100
100	101	required_ioport m_io_in0;
101	102	required_ioport m_io_in1;
r29437	r29438
447	448
448	449
449	450
450		~~stat~~i~~c i~~nt backfire_bank_callback( int bank )
	451	int backfire_state::bank_callback( int bank )
451	452	{
452	453	// mame_printf_debug("bank callback %04x\n",bank); // bit 1 gets set too?
453	454	bank = bank >> 4;
r29437	r29438
456	457	return bank * 0x1000;
457	458	}
458	459
459		static const deco16ic_interface backfire_deco16ic_tilegen1_intf =
460		{
461		0, 1,
462		0x0f, 0x0f, /* trans masks (default values) */
463		0x00, 0x40, /* color base */
464		0x0f, 0x0f, /* color masks (default values) */
465		backfire_bank_callback,
466		backfire_bank_callback,
467		0,1
468		};
469
470		static const deco16ic_interface backfire_deco16ic_tilegen2_intf =
471		{
472		0, 1,
473		0x0f, 0x0f, /* trans masks (default values) */
474		0x10, 0x50, /* color base */
475		0x0f, 0x0f, /* color masks (default values) */
476		backfire_bank_callback,
477		backfire_bank_callback,
478		2,3
479		};
480
481	460	void backfire_state::machine_start()
482	461	{
483	462	}
r29437	r29438
525	504	MCFG_SCREEN_UPDATE_DRIVER(backfire_state, screen_update_backfire_right)
526	505	MCFG_SCREEN_PALETTE("palette")
527	506
528
529		MCFG_DECO16IC_ADD("tilegen1", backfire_deco16ic_tilegen1_intf)
	507	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
530	508	MCFG_DECO16IC_SET_SCREEN("lscreen")
	509	MCFG_DECO16IC_SPLIT(0)
	510	MCFG_DECO16IC_WIDTH12(1)
	511	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	512	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	513	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	514	MCFG_DECO16IC_PF2_COL_BANK(0x40)
	515	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	516	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	517	MCFG_DECO16IC_BANK1_CB(backfire_state, bank_callback)
	518	MCFG_DECO16IC_BANK2_CB(backfire_state, bank_callback)
	519	MCFG_DECO16IC_PF12_8X8_BANK(0)
	520	MCFG_DECO16IC_PF12_16X16_BANK(1)
531	521	MCFG_DECO16IC_GFXDECODE("gfxdecode")
532	522	MCFG_DECO16IC_PALETTE("palette")
533	523
534		MCFG_DE~~CO16~~IC_ADD("tilegen2", ~~backfire_deco~~16~~ic_tilegen2_intf~~)
	524	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
535	525	MCFG_DECO16IC_SET_SCREEN("lscreen")
	526	MCFG_DECO16IC_SPLIT(0)
	527	MCFG_DECO16IC_WIDTH12(1)
	528	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	529	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	530	MCFG_DECO16IC_PF1_COL_BANK(0x10)
	531	MCFG_DECO16IC_PF2_COL_BANK(0x50)
	532	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	533	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	534	MCFG_DECO16IC_BANK1_CB(backfire_state, bank_callback)
	535	MCFG_DECO16IC_BANK2_CB(backfire_state, bank_callback)
	536	MCFG_DECO16IC_PF12_8X8_BANK(2)
	537	MCFG_DECO16IC_PF12_16X16_BANK(3)
536	538	MCFG_DECO16IC_GFXDECODE("gfxdecode")
537	539	MCFG_DECO16IC_PALETTE("palette")
538	540

branches/new_menus/src/mame/drivers/simpl156.c
r29437	r29438
387	387	}
388	388
389	389
390		~~stat~~i~~c i~~nt simpl156_bank_callback(~~const~~ int bank)
	390	int simpl156_state::bank_callback(int bank)
391	391	{
392	392	return ((bank >> 4) & 0x7) * 0x1000;
393	393	}
394	394
395		static const deco16ic_interface simpl156_deco16ic_tilegen1_intf =
396		{
397		0, 1,
398		0x0f, 0x0f, /* trans masks (default values) */
399		0, 16,/* color base (default values) */
400		0x0f, 0x0f, /* color masks (default values) */
401		simpl156_bank_callback,
402		simpl156_bank_callback,
403		0,1,
404		};
405
406	395	UINT16 simpl156_pri_callback(UINT16 x)
407	396	{
408	397	switch (x & 0xc000)
r29437	r29438
438	427	MCFG_PALETTE_ADD("palette", 4096)
439	428	MCFG_GFXDECODE_ADD("gfxdecode", "palette", simpl156)
440	429
441		MCFG_DECO16IC_ADD("tilegen1", simpl156_deco16ic_tilegen1_intf)
	430	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	431	MCFG_DECO16IC_SPLIT(0)
	432	MCFG_DECO16IC_WIDTH12(1)
	433	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	434	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	435	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	436	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	437	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	438	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	439	MCFG_DECO16IC_BANK1_CB(simpl156_state, bank_callback)
	440	MCFG_DECO16IC_BANK2_CB(simpl156_state, bank_callback)
	441	MCFG_DECO16IC_PF12_8X8_BANK(0)
	442	MCFG_DECO16IC_PF12_16X16_BANK(1)
442	443	MCFG_DECO16IC_GFXDECODE("gfxdecode")
443	444	MCFG_DECO16IC_PALETTE("palette")
444	445

branches/new_menus/src/mame/drivers/mirage.c
r29437	r29438
46	46	public:
47	47	miragemi_state(const machine_config &mconfig, device_type type, const char *tag)
48	48	: driver_device(mconfig, type, tag),
49		m_maincpu(*this, "maincpu"),
50		m_deco_tilegen1(*this, "tilegen1"),
51		m_oki_sfx(*this, "oki_sfx"),
52		m_oki_bgm(*this, "oki_bgm"),
53		m_spriteram(*this, "spriteram") ,
	49	m_maincpu(*this, "maincpu"),
	50	m_deco_tilegen1(*this, "tilegen1"),
	51	m_oki_sfx(*this, "oki_sfx"),
	52	m_oki_bgm(*this, "oki_bgm"),
	53	m_spriteram(*this, "spriteram") ,
54	54	m_pf1_rowscroll(*this, "pf1_rowscroll"),
55	55	m_pf2_rowscroll(*this, "pf2_rowscroll"),
56	56	m_sprgen(*this, "spritegen")
r29437	r29438
80	80	virtual void machine_reset();
81	81	virtual void video_start();
82	82	UINT32 screen_update_mirage(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
	83	int bank_callback(int bank);
83	84	};
84	85
85	86	void miragemi_state::video_start()
r29437	r29438
286	287	GFXDECODE_END
287	288
288	289
289		~~stat~~i~~c i~~nt mirage_bank_callback( ~~const~~ int bank )
	290	int miragemi_state::bank_callback( int bank )
290	291	{
291	292	return ((bank >> 4) & 0x7) * 0x1000;
292	293	}
293	294
294		static const deco16ic_interface mirage_deco16ic_tilegen1_intf =
295		{
296		0, 1,
297		0x0f, 0x0f, /* trans masks (default values) */
298		0, 16, /* color base (default values) */
299		0x0f, 0x0f, /* color masks (default values) */
300		mirage_bank_callback,
301		mirage_bank_callback,
302		0,1,
303		};
304
305
306	295	void miragemi_state::machine_start()
307	296	{
308	297	save_item(NAME(m_mux_data));
r29437	r29438
337	326	MCFG_PALETTE_ADD("palette", 1024)
338	327	MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
339	328
340		MCFG_DECO16IC_ADD("tilegen1", mirage_deco16ic_tilegen1_intf)
	329	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	330	MCFG_DECO16IC_SPLIT(0)
	331	MCFG_DECO16IC_WIDTH12(1)
	332	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	333	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	334	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	335	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	336	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	337	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	338	MCFG_DECO16IC_BANK1_CB(miragemi_state, bank_callback)
	339	MCFG_DECO16IC_BANK2_CB(miragemi_state, bank_callback)
	340	MCFG_DECO16IC_PF12_8X8_BANK(0)
	341	MCFG_DECO16IC_PF12_16X16_BANK(1)
341	342	MCFG_DECO16IC_GFXDECODE("gfxdecode")
342	343	MCFG_DECO16IC_PALETTE("palette")
343	344

branches/new_menus/src/mame/drivers/dietgo.c
r29437	r29438
189	189	GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 512, 16 ) /* Sprites (16x16) */
190	190	GFXDECODE_END
191	191
192		~~stat~~i~~c i~~nt dietgo_bank_callback(~~const~~ int bank)
	192	int dietgo_state::bank_callback(int bank)
193	193	{
194	194	return ((bank >> 4) & 0x7) * 0x1000;
195	195	}
196	196
197		static const deco16ic_interface dietgo_deco16ic_tilegen1_intf =
198		{
199		0, 1,
200		0x0f, 0x0f, /* trans masks (default values) */
201		0, 16, /* color base (default values) */
202		0x0f, 0x0f, /* color masks (default values) */
203		dietgo_bank_callback,
204		dietgo_bank_callback,
205		0,1,
206		};
207
208
209	197	void dietgo_state::machine_start()
210	198	{
211	199	}
r29437	r29438
236	224	MCFG_DECOCOMN_ADD("deco_common")
237	225	MCFG_DECOCOMN_PALETTE("palette")
238	226
239		MCFG_DECO16IC_ADD("tilegen1", dietgo_deco16ic_tilegen1_intf)
	227	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	228	MCFG_DECO16IC_SPLIT(0)
	229	MCFG_DECO16IC_WIDTH12(1)
	230	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	231	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	232	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	233	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	234	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	235	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	236	MCFG_DECO16IC_BANK1_CB(dietgo_state, bank_callback)
	237	MCFG_DECO16IC_BANK2_CB(dietgo_state, bank_callback)
	238	MCFG_DECO16IC_PF12_8X8_BANK(0)
	239	MCFG_DECO16IC_PF12_16X16_BANK(1)
240	240	MCFG_DECO16IC_GFXDECODE("gfxdecode")
241	241	MCFG_DECO16IC_PALETTE("palette")
242	242

branches/new_menus/src/mame/drivers/nwk-tr.c
r29437	r29438
714	714	"voodoo"
715	715	};
716	716
717		static const k001604_interface racingj_k001604_intf =
718		{
719		0, 1, /* gfx index 1 & 2 */
720		0, 1, /* layer_size, roz_size */
721		0 /* slrasslt hack */
722		};
723
724		static const k001604_interface thrilld_k001604_intf =
725		{
726		0, 1, /* gfx index 1 & 2 */
727		1, 1, /* layer_size, roz_size */
728		0 /* slrasslt hack */
729		};
730
731	717	void nwktr_state::machine_reset()
732	718	{
733	719	m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
r29437	r29438
776	762
777	763	MCFG_GFXDECODE_ADD("gfxdecode", "palette", empty)
778	764
779		MCFG_K001604_ADD("k001604", racingj_k001604_intf)
	765	MCFG_DEVICE_ADD("k001604", K001604, 0)
	766	MCFG_K001604_GFX_INDEX1(0)
	767	MCFG_K001604_GFX_INDEX2(1)
	768	MCFG_K001604_LAYER_SIZE(0)
	769	MCFG_K001604_ROZ_SIZE(1)
	770	MCFG_K001604_TXT_OFFSET(0) // correct?
	771	MCFG_K001604_ROZ_OFFSET(0) // correct?
780	772	MCFG_K001604_GFXDECODE("gfxdecode")
781	773	MCFG_K001604_PALETTE("palette")
782	774
r29437	r29438
793	785	static MACHINE_CONFIG_DERIVED( thrilld, nwktr )
794	786
795	787	MCFG_DEVICE_REMOVE("k001604")
796		MCFG_K001604_ADD("k001604", thrilld_k001604_intf)
	788	MCFG_DEVICE_ADD("k001604", K001604, 0)
	789	MCFG_K001604_GFX_INDEX1(0)
	790	MCFG_K001604_GFX_INDEX2(1)
	791	MCFG_K001604_LAYER_SIZE(1)
	792	MCFG_K001604_ROZ_SIZE(1)
	793	MCFG_K001604_TXT_OFFSET(0) // correct?
	794	MCFG_K001604_ROZ_OFFSET(0) // correct?
797	795	MCFG_K001604_GFXDECODE("gfxdecode")
798	796	MCFG_K001604_PALETTE("palette")
799	797	MACHINE_CONFIG_END

branches/new_menus/src/mame/drivers/funkyjet.c
r29437	r29438
300	300
301	301	/******************************************************************************/
302	302
303		static const deco16ic_interface funkyjet_deco16ic_tilegen1_intf =
304		{
305		0, 1,
306		0x0f, 0x0f, /* trans masks (default values) */
307		0, 16, /* color base (default values) */
308		0x0f, 0x0f, /* color masks (default values) */
309		NULL, NULL,
310		0,1,
311		};
312
313	303	void funkyjet_state::machine_start()
314	304	{
315	305	}
r29437	r29438
342	332	MCFG_PALETTE_ADD("palette", 1024)
343	333	MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
344	334
345		MCFG_DECO16IC_ADD("tilegen1", funkyjet_deco16ic_tilegen1_intf)
	335	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	336	MCFG_DECO16IC_SPLIT(0)
	337	MCFG_DECO16IC_WIDTH12(1)
	338	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	339	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	340	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	341	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	342	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	343	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	344	MCFG_DECO16IC_PF12_8X8_BANK(0)
	345	MCFG_DECO16IC_PF12_16X16_BANK(1)
346	346	MCFG_DECO16IC_GFXDECODE("gfxdecode")
347	347	MCFG_DECO16IC_PALETTE("palette")
348	348

branches/new_menus/src/mame/drivers/dreambal.c
r29437	r29438
50	50	virtual void machine_start();
51	51	virtual void machine_reset();
52	52	UINT32 screen_update_dreambal(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	53	int bank_callback(int bank);
53	54
54	55	DECLARE_READ16_MEMBER( dreambal_protection_region_0_104_r );
55	56	DECLARE_WRITE16_MEMBER( dreambal_protection_region_0_104_w );
r29437	r29438
285	286	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
286	287	INPUT_PORTS_END
287	288
288		~~stat~~i~~c i~~nt dreambal_bank_callback( ~~const~~ int bank )
	289	int dreambal_state::bank_callback( int bank )
289	290	{
290	291	return ((bank >> 4) & 0x7) * 0x1000;
291	292	}
292	293
293		static const deco16ic_interface dreambal_deco16ic_tilegen1_intf =
294		{
295		0, 1,
296		0x0f, 0x0f, /* trans masks (default values) */
297		0, 16, /* color base (default values) */
298		0x0f, 0x0f, /* color masks (default values) */
299		dreambal_bank_callback,
300		dreambal_bank_callback,
301		0,1,
302		};
303
304	294	void dreambal_state::machine_start()
305	295	{
306	296	}
r29437	r29438
334	324
335	325	MCFG_DECO104_ADD("ioprot104")
336	326
337		MCFG_DECO16IC_ADD("tilegen1", dreambal_deco16ic_tilegen1_intf)
	327	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	328	MCFG_DECO16IC_SPLIT(0)
	329	MCFG_DECO16IC_WIDTH12(1)
	330	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	331	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	332	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	333	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	334	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	335	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	336	MCFG_DECO16IC_BANK1_CB(dreambal_state, bank_callback)
	337	MCFG_DECO16IC_BANK2_CB(dreambal_state, bank_callback)
	338	MCFG_DECO16IC_PF12_8X8_BANK(0)
	339	MCFG_DECO16IC_PF12_16X16_BANK(1)
338	340	MCFG_DECO16IC_GFXDECODE("gfxdecode")
339	341	MCFG_DECO16IC_PALETTE("palette")
340	342

branches/new_menus/src/mame/drivers/deco32.c
r29437	r29438
238	238	/**********************************************************************************/
239	239
240	240
241		static int fghthist_bank_callback( int bank )
242		{
243		bank = bank >> 4;
244		bank = (bank & 1) \| ((bank & 4) >> 1) \| ((bank & 2) << 1);
245
246		return bank * 0x1000;
247		}
248
249		static const deco16ic_interface fghthist_deco16ic_tilegen1_intf =
250		{
251		0, 1,
252		0x0f, 0x0f, /* trans masks (default values) */
253		0x00, 0x10, /* color base */
254		0x0f, 0x0f, /* color masks (default values) */
255		fghthist_bank_callback,
256		fghthist_bank_callback,
257		0,1
258		};
259
260		static const deco16ic_interface fghthist_deco16ic_tilegen2_intf =
261		{
262		0, 1,
263		0x0f, 0x0f, /* trans masks (default values) */
264		0x20, 0x30, /* color base */
265		0x0f, 0x0f, /* color masks (default values) */
266		fghthist_bank_callback,
267		fghthist_bank_callback,
268		0,2
269		};
270
271
272
273
274
275	241	TIMER_DEVICE_CALLBACK_MEMBER(deco32_state::interrupt_gen)
276	242	{
277	243	m_maincpu->set_input_line(ARM_IRQ_LINE, HOLD_LINE);
r29437	r29438
1699	1665	}
1700	1666	}
1701	1667
1702		~~stat~~i~~c i~~nt captaven_bank_callback( int bank )
	1668	int deco32_state::captaven_bank_callback( int bank )
1703	1669	{
1704	1670	bank = bank >> 4;
1705	1671	bank = (bank & 2) >> 1;
r29437	r29438
1707	1673	return bank * 0x4000;
1708	1674	}
1709	1675
1710		// pf4 not used (pf3 is in 8bpp mode)
1711		static const deco16ic_interface captaven_deco16ic_tilegen1_intf =
1712		{
1713		0, 1, // pf12only, split, fullwidth12 / fullwidth34
1714		0x0f, 0x0f, /* trans masks (default values) */
1715		0x20, 0x30, /* color base */
1716		0x0f, 0x0f, /* color masks (default values) */
1717		NULL,
1718		NULL,
1719		0,1
1720		};
1721
1722		static const deco16ic_interface captaven_deco16ic_tilegen2_intf =
1723		{
1724		0, 0, // pf12only, split, fullwidth12 / fullwidth34
1725		0xff, 0x00, /* trans masks (default values) */
1726		0x10, 0x00, /* color base */
1727		0x0f, 0x00, /* color masks (default values) */
1728		captaven_bank_callback,
1729		NULL,
1730		0,2,
1731		};
1732
1733
1734	1676	static MACHINE_CONFIG_START( captaven, deco32_state )
1735	1677
1736	1678	/* basic machine hardware */
r29437	r29438
1756	1698	MCFG_GFXDECODE_ADD("gfxdecode", "palette", captaven)
1757	1699	MCFG_PALETTE_ADD("palette", 2048)
1758	1700
1759		MCFG_DECO16IC_ADD("tilegen1", captaven_deco16ic_tilegen1_intf)
	1701	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	1702	MCFG_DECO16IC_SPLIT(0)
	1703	MCFG_DECO16IC_WIDTH12(1)
	1704	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1705	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1706	MCFG_DECO16IC_PF1_COL_BANK(0x20)
	1707	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	1708	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1709	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1710	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1711	MCFG_DECO16IC_PF12_16X16_BANK(1)
1760	1712	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1761	1713	MCFG_DECO16IC_PALETTE("palette")
1762	1714
1763		MCFG_DECO16IC_ADD("tilegen2", captaven_deco16ic_tilegen2_intf)
	1715	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0) // pf3 is in 8bpp mode, pf4 is not used
	1716	MCFG_DECO16IC_SPLIT(0)
	1717	MCFG_DECO16IC_WIDTH12(0)
	1718	MCFG_DECO16IC_PF1_TRANS_MASK(0xff)
	1719	MCFG_DECO16IC_PF2_TRANS_MASK(0x00)
	1720	MCFG_DECO16IC_PF1_COL_BANK(0x10)
	1721	MCFG_DECO16IC_PF2_COL_BANK(0x00)
	1722	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1723	MCFG_DECO16IC_PF2_COL_MASK(0x00)
	1724	MCFG_DECO16IC_BANK1_CB(deco32_state, captaven_bank_callback)
	1725	// no bank2 callback
	1726	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1727	MCFG_DECO16IC_PF12_16X16_BANK(2)
1764	1728	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1765	1729	MCFG_DECO16IC_PALETTE("palette")
1766	1730
r29437	r29438
1809	1773	return machine().root_device().ioport(":IN1")->read();
1810	1774	}
1811	1775
	1776	int deco32_state::fghthist_bank_callback( int bank )
	1777	{
	1778	bank = bank >> 4;
	1779	bank = (bank & 1) \| ((bank & 4) >> 1) \| ((bank & 2) << 1);
	1780
	1781	return bank * 0x1000;
	1782	}
	1783
1812	1784	static MACHINE_CONFIG_START( fghthist, deco32_state ) /* DE-0380-2 PCB */
1813	1785
1814	1786	/* basic machine hardware */
r29437	r29438
1821	1793
1822	1794	MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
1823	1795
1824
1825	1796	MCFG_SCREEN_ADD("screen", RASTER)
1826	1797	MCFG_SCREEN_REFRESH_RATE(60)
1827	1798	MCFG_SCREEN_SIZE(428, 328)
r29437	r29438
1831	1802	MCFG_GFXDECODE_ADD("gfxdecode", "palette", fghthist)
1832	1803	MCFG_PALETTE_ADD("palette", 2048)
1833	1804
1834		MCFG_DECO16IC_ADD("tilegen1", fghthist_deco16ic_tilegen1_intf)
	1805	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	1806	MCFG_DECO16IC_SPLIT(0)
	1807	MCFG_DECO16IC_WIDTH12(1)
	1808	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1809	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1810	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1811	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	1812	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1813	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1814	MCFG_DECO16IC_BANK1_CB(deco32_state, fghthist_bank_callback)
	1815	MCFG_DECO16IC_BANK2_CB(deco32_state, fghthist_bank_callback)
	1816	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1817	MCFG_DECO16IC_PF12_16X16_BANK(1)
1835	1818	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1836	1819	MCFG_DECO16IC_PALETTE("palette")
1837	1820
1838		MCFG_DECO16IC_ADD("tilegen2", fghthist_deco16ic_tilegen2_intf)
	1821	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	1822	MCFG_DECO16IC_SPLIT(0)
	1823	MCFG_DECO16IC_WIDTH12(1)
	1824	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1825	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1826	MCFG_DECO16IC_PF1_COL_BANK(0x20)
	1827	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	1828	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1829	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1830	MCFG_DECO16IC_BANK1_CB(deco32_state, fghthist_bank_callback)
	1831	MCFG_DECO16IC_BANK2_CB(deco32_state, fghthist_bank_callback)
	1832	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1833	MCFG_DECO16IC_PF12_16X16_BANK(2)
1839	1834	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1840	1835	MCFG_DECO16IC_PALETTE("palette")
1841	1836
r29437	r29438
1893	1888	MCFG_GFXDECODE_ADD("gfxdecode", "palette", fghthist)
1894	1889	MCFG_PALETTE_ADD("palette", 2048)
1895	1890
1896		MCFG_DECO16IC_ADD("tilegen1", fghthist_deco16ic_tilegen1_intf)
	1891	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	1892	MCFG_DECO16IC_SPLIT(0)
	1893	MCFG_DECO16IC_WIDTH12(1)
	1894	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1895	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1896	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1897	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	1898	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1899	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1900	MCFG_DECO16IC_BANK1_CB(deco32_state, fghthist_bank_callback)
	1901	MCFG_DECO16IC_BANK2_CB(deco32_state, fghthist_bank_callback)
	1902	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1903	MCFG_DECO16IC_PF12_16X16_BANK(1)
1897	1904	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1898	1905	MCFG_DECO16IC_PALETTE("palette")
1899	1906
1900		MCFG_DECO16IC_ADD("tilegen2", fghthist_deco16ic_tilegen2_intf)
	1907	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	1908	MCFG_DECO16IC_SPLIT(0)
	1909	MCFG_DECO16IC_WIDTH12(1)
	1910	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1911	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1912	MCFG_DECO16IC_PF1_COL_BANK(0x20)
	1913	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	1914	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1915	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1916	MCFG_DECO16IC_BANK1_CB(deco32_state, fghthist_bank_callback)
	1917	MCFG_DECO16IC_BANK2_CB(deco32_state, fghthist_bank_callback)
	1918	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1919	MCFG_DECO16IC_PF12_16X16_BANK(2)
1901	1920	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1902	1921	MCFG_DECO16IC_PALETTE("palette")
1903	1922
r29437	r29438
1934	1953	MACHINE_CONFIG_END
1935	1954
1936	1955
1937		~~stat~~i~~c i~~nt dragngun_bank_callback( int bank )
	1956	int dragngun_state::bank_1_callback( int bank )
1938	1957	{
1939	1958	bank = bank >> 4;
1940	1959	return bank * 0x1000;
1941	1960	}
1942	1961
1943	1962
1944		~~stat~~i~~c i~~nt dragngun_bank2_callback( int bank )
	1963	int dragngun_state::bank_2_callback( int bank )
1945	1964	{
1946	1965	bank = bank >> 5;
1947	1966	return bank * 0x1000;
1948	1967	}
1949	1968
1950
1951		static const deco16ic_interface dragngun_deco16ic_tilegen1_intf =
1952		{
1953		0, 1, // dragon gun definitely needs pf3/4 full width, bgs in 2nd attract demo.
1954		0x0f, 0x0f, /* trans masks (default values) */
1955		0x20, 0x30, /* color base */
1956		0x0f, 0x0f, /* color masks (default values) */
1957		dragngun_bank_callback,
1958		dragngun_bank_callback,
1959		0,1,
1960		};
1961
1962		static const deco16ic_interface dragngun_deco16ic_tilegen2_intf =
1963		{
1964		0, 1, // dragon gun definitely needs pf3/4 full width, bgs in 2nd attract demo.
1965		0xff, 0xff, /* trans masks (default values) */
1966		0x04, 0x04, /* color base */
1967		0x03, 0x03, /* color masks (default values) */
1968		dragngun_bank2_callback,
1969		NULL,
1970		0,2,
1971		};
1972
1973		static const deco16ic_interface lockload_deco16ic_tilegen1_intf =
1974		{
1975		0, 1, // lockload definitely wants pf34 half width..
1976		0x0f, 0x0f, /* trans masks (default values) */
1977		0x20, 0x30, /* color base */
1978		0x0f, 0x0f, /* color masks (default values) */
1979		dragngun_bank_callback,
1980		dragngun_bank_callback,
1981		0,1,
1982		};
1983
1984		static const deco16ic_interface lockload_deco16ic_tilegen2_intf =
1985		{
1986		0, 0, // lockload definitely wants pf34 half width..
1987		0xff, 0xff, /* trans masks (default values) */
1988		0x04, 0x04, /* color base */
1989		0x03, 0x03, /* color masks (default values) */
1990		dragngun_bank2_callback,
1991		NULL,
1992		0,2,
1993		};
1994
1995	1969	static MACHINE_CONFIG_START( dragngun, dragngun_state )
1996	1970
1997	1971	/* basic machine hardware */
r29437	r29438
2018	1992
2019	1993	MCFG_BUFFERED_SPRITERAM32_ADD("spriteram")
2020	1994
2021		MCFG_DECO16IC_ADD("tilegen1", dragngun_deco16ic_tilegen1_intf)
	1995	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	1996	MCFG_DECO16IC_SPLIT(0)
	1997	MCFG_DECO16IC_WIDTH12(1)
	1998	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1999	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	2000	MCFG_DECO16IC_PF1_COL_BANK(0x20)
	2001	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	2002	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	2003	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	2004	MCFG_DECO16IC_BANK1_CB(dragngun_state, bank_1_callback)
	2005	MCFG_DECO16IC_BANK2_CB(dragngun_state, bank_1_callback)
	2006	MCFG_DECO16IC_PF12_8X8_BANK(0)
	2007	MCFG_DECO16IC_PF12_16X16_BANK(1)
2022	2008	MCFG_DECO16IC_GFXDECODE("gfxdecode")
2023	2009	MCFG_DECO16IC_PALETTE("palette")
2024	2010
2025		MCFG_DECO16IC_ADD("tilegen2", dragngun_deco16ic_tilegen2_intf)
	2011	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	2012	MCFG_DECO16IC_SPLIT(0)
	2013	MCFG_DECO16IC_WIDTH12(1)
	2014	MCFG_DECO16IC_PF1_TRANS_MASK(0xff)
	2015	MCFG_DECO16IC_PF2_TRANS_MASK(0xff)
	2016	MCFG_DECO16IC_PF1_COL_BANK(0x04)
	2017	MCFG_DECO16IC_PF2_COL_BANK(0x04)
	2018	MCFG_DECO16IC_PF1_COL_MASK(0x03)
	2019	MCFG_DECO16IC_PF2_COL_MASK(0x03)
	2020	MCFG_DECO16IC_BANK1_CB(dragngun_state, bank_2_callback)
	2021	// no bank2 callback
	2022	MCFG_DECO16IC_PF12_8X8_BANK(0)
	2023	MCFG_DECO16IC_PF12_16X16_BANK(2)
2026	2024	MCFG_DECO16IC_GFXDECODE("gfxdecode")
2027	2025	MCFG_DECO16IC_PALETTE("palette")
2028	2026
r29437	r29438
2035	2033	MCFG_DECO146_SET_SOUNDLATCH_CALLBACK(deco32_state, deco32_sound_cb)
2036	2034	MCFG_DECO146_SET_INTERFACE_SCRAMBLE_REVERSE
2037	2035
2038
2039
2040	2036	/* sound hardware */
2041	2037	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2042	2038
r29437	r29438
2059	2055	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
2060	2056	MACHINE_CONFIG_END
2061	2057
	2058
2062	2059	TIMER_DEVICE_CALLBACK_MEMBER(deco32_state::lockload_vbl_irq)
2063	2060	{
2064	2061	int scanline = param;
r29437	r29438
2105	2102
2106	2103	MCFG_BUFFERED_SPRITERAM32_ADD("spriteram")
2107	2104
2108		MCFG_DECO16IC_ADD("tilegen1", lockload_deco16ic_tilegen1_intf)
	2105	MCFG_GFXDECODE_ADD("gfxdecode", "palette", dragngun)
	2106	MCFG_PALETTE_ADD("palette", 2048)
	2107
	2108	MCFG_VIDEO_START_OVERRIDE(dragngun_state, lockload)
	2109
	2110	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	2111	MCFG_DECO16IC_SPLIT(0)
	2112	MCFG_DECO16IC_WIDTH12(1)
	2113	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	2114	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	2115	MCFG_DECO16IC_PF1_COL_BANK(0x20)
	2116	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	2117	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	2118	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	2119	MCFG_DECO16IC_BANK1_CB(dragngun_state, bank_1_callback)
	2120	MCFG_DECO16IC_BANK2_CB(dragngun_state, bank_1_callback)
	2121	MCFG_DECO16IC_PF12_8X8_BANK(0)
	2122	MCFG_DECO16IC_PF12_16X16_BANK(1)
2109	2123	MCFG_DECO16IC_GFXDECODE("gfxdecode")
2110	2124	MCFG_DECO16IC_PALETTE("palette")
2111	2125
2112		MCFG_DECO16IC_ADD("tilegen2", lockload_deco16ic_tilegen2_intf)
	2126	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	2127	MCFG_DECO16IC_SPLIT(0)
	2128	MCFG_DECO16IC_WIDTH12(0) // lockload definitely wants pf34 half width..
	2129	MCFG_DECO16IC_PF1_TRANS_MASK(0xff)
	2130	MCFG_DECO16IC_PF2_TRANS_MASK(0xff)
	2131	MCFG_DECO16IC_PF1_COL_BANK(0x04)
	2132	MCFG_DECO16IC_PF2_COL_BANK(0x04)
	2133	MCFG_DECO16IC_PF1_COL_MASK(0x03)
	2134	MCFG_DECO16IC_PF2_COL_MASK(0x03)
	2135	MCFG_DECO16IC_BANK1_CB(dragngun_state, bank_2_callback)
	2136	// no bank2 callback
	2137	MCFG_DECO16IC_PF12_8X8_BANK(0)
	2138	MCFG_DECO16IC_PF12_16X16_BANK(2)
2113	2139	MCFG_DECO16IC_GFXDECODE("gfxdecode")
2114	2140	MCFG_DECO16IC_PALETTE("palette")
2115	2141
2116		MCFG_GFXDECODE_ADD("gfxdecode", "palette", dragngun)
2117		MCFG_PALETTE_ADD("palette", 2048)
2118
2119		MCFG_VIDEO_START_OVERRIDE(dragngun_state,lockload)
2120
2121	2142	MCFG_DECO146_ADD("ioprot")
2122	2143	MCFG_DECO146_SET_SOUNDLATCH_CALLBACK(deco32_state, deco32_sound_cb)
2123	2144	MCFG_DECO146_SET_INTERFACE_SCRAMBLE_REVERSE
r29437	r29438
2149	2170
2150	2171	MACHINE_CONFIG_END
2151	2172
2152		static int tattass_bank_callback( int bank )
	2173
	2174	int deco32_state::tattass_bank_callback( int bank )
2153	2175	{
2154	2176	bank = bank >> 4;
2155	2177	return bank * 0x1000;
2156	2178	}
2157	2179
2158		static const deco16ic_interface tattass_deco16ic_tilegen1_intf =
2159		{
2160		0, 1,
2161		0x0f, 0x0f, /* trans masks (default values) */
2162		0x00, 0x10, /* color base */
2163		0x0f, 0x0f, /* color masks (default values) */
2164		tattass_bank_callback,
2165		tattass_bank_callback,
2166		0,1,
2167		};
2168
2169		static const deco16ic_interface tattass_deco16ic_tilegen2_intf =
2170		{
2171		0, 1,
2172		0x0f, 0x0f, /* trans masks (default values) */
2173		0x20, 0x30, /* color base */
2174		0x0f, 0x0f, /* color masks (default values) */
2175		tattass_bank_callback,
2176		tattass_bank_callback,
2177		0,2,
2178		};
2179
2180
2181
2182	2180	static MACHINE_CONFIG_START( tattass, deco32_state )
2183	2181
2184	2182	/* basic machine hardware */
r29437	r29438
2194	2192	MCFG_SCREEN_VISIBLE_AREA(08, 408-1, 18, 318-1)
2195	2193	MCFG_SCREEN_UPDATE_DRIVER(deco32_state, screen_update_nslasher)
2196	2194
2197		MCFG_DECO16IC_ADD("tilegen1", tattass_deco16ic_tilegen1_intf)
	2195	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	2196	MCFG_DECO16IC_SPLIT(0)
	2197	MCFG_DECO16IC_WIDTH12(1)
	2198	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	2199	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	2200	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	2201	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	2202	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	2203	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	2204	MCFG_DECO16IC_BANK1_CB(deco32_state, tattass_bank_callback)
	2205	MCFG_DECO16IC_BANK2_CB(deco32_state, tattass_bank_callback)
	2206	MCFG_DECO16IC_PF12_8X8_BANK(0)
	2207	MCFG_DECO16IC_PF12_16X16_BANK(1)
2198	2208	MCFG_DECO16IC_GFXDECODE("gfxdecode")
2199	2209	MCFG_DECO16IC_PALETTE("palette")
2200	2210
2201		MCFG_DECO16IC_ADD("tilegen2", tattass_deco16ic_tilegen2_intf)
	2211	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	2212	MCFG_DECO16IC_SPLIT(0)
	2213	MCFG_DECO16IC_WIDTH12(1)
	2214	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	2215	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	2216	MCFG_DECO16IC_PF1_COL_BANK(0x20)
	2217	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	2218	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	2219	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	2220	MCFG_DECO16IC_BANK1_CB(deco32_state, tattass_bank_callback)
	2221	MCFG_DECO16IC_BANK2_CB(deco32_state, tattass_bank_callback)
	2222	MCFG_DECO16IC_PF12_8X8_BANK(0)
	2223	MCFG_DECO16IC_PF12_16X16_BANK(2)
2202	2224	MCFG_DECO16IC_GFXDECODE("gfxdecode")
2203	2225	MCFG_DECO16IC_PALETTE("palette")
2204	2226
r29437	r29438
2247	2269	MCFG_SCREEN_VISIBLE_AREA(08, 408-1, 18, 318-1)
2248	2270	MCFG_SCREEN_UPDATE_DRIVER(deco32_state, screen_update_nslasher)
2249	2271
2250		MCFG_DECO16IC_ADD("tilegen1", tattass_deco16ic_tilegen1_intf)
	2272	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	2273	MCFG_DECO16IC_SPLIT(0)
	2274	MCFG_DECO16IC_WIDTH12(1)
	2275	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	2276	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	2277	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	2278	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	2279	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	2280	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	2281	MCFG_DECO16IC_BANK1_CB(deco32_state, tattass_bank_callback)
	2282	MCFG_DECO16IC_BANK2_CB(deco32_state, tattass_bank_callback)
	2283	MCFG_DECO16IC_PF12_8X8_BANK(0)
	2284	MCFG_DECO16IC_PF12_16X16_BANK(1)
2251	2285	MCFG_DECO16IC_GFXDECODE("gfxdecode")
2252	2286	MCFG_DECO16IC_PALETTE("palette")
2253	2287
2254		MCFG_DECO16IC_ADD("tilegen2", tattass_deco16ic_tilegen2_intf)
	2288	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	2289	MCFG_DECO16IC_SPLIT(0)
	2290	MCFG_DECO16IC_WIDTH12(1)
	2291	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	2292	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	2293	MCFG_DECO16IC_PF1_COL_BANK(0x20)
	2294	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	2295	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	2296	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	2297	MCFG_DECO16IC_BANK1_CB(deco32_state, tattass_bank_callback)
	2298	MCFG_DECO16IC_BANK2_CB(deco32_state, tattass_bank_callback)
	2299	MCFG_DECO16IC_PF12_8X8_BANK(0)
	2300	MCFG_DECO16IC_PF12_16X16_BANK(2)
2255	2301	MCFG_DECO16IC_GFXDECODE("gfxdecode")
2256	2302	MCFG_DECO16IC_PALETTE("palette")
2257	2303

branches/new_menus/src/mame/drivers/cobra.c
r29437	r29438
1022	1022
1023	1023
1024	1024
1025
1026
1027
1028
1029
1030	1025	/*****************************************************************************/
1031	1026
1032	1027	int cobra_state::decode_debug_state_value(int v)
r29437	r29438
3130	3125	};
3131	3126
3132	3127
3133		static const k001604_interface cobra_k001604_intf =
3134		{
3135		0, 1, /* gfx index 1 & 2 */
3136		0, 1, /* layer_size, roz_size */
3137		0 /* slrasslt hack */
3138		};
3139
3140
3141	3128	WRITE_LINE_MEMBER(cobra_state::ide_interrupt)
3142	3129	{
3143	3130	if (state == CLEAR_LINE)
r29437	r29438
3231	3218	MCFG_M48T58_ADD("m48t58")
3232	3219
3233	3220	MCFG_GFXDECODE_ADD("gfxdecode", "palette", empty)
3234		MCFG_K001604_ADD("k001604", cobra_k001604_intf) // on the LAN board in Racing Jam DX
	3221	MCFG_DEVICE_ADD("k001604", K001604, 0) // on the LAN board in Racing Jam DX
	3222	MCFG_K001604_GFX_INDEX1(0)
	3223	MCFG_K001604_GFX_INDEX2(1)
	3224	MCFG_K001604_LAYER_SIZE(0)
	3225	MCFG_K001604_ROZ_SIZE(1)
	3226	MCFG_K001604_TXT_OFFSET(0) // correct?
	3227	MCFG_K001604_ROZ_OFFSET(0) // correct?
3235	3228	MCFG_K001604_GFXDECODE("gfxdecode")
3236	3229	MCFG_K001604_PALETTE("palette")
3237	3230

branches/new_menus/src/mame/drivers/deco156.c
r29437	r29438
65	65	INTERRUPT_GEN_MEMBER(deco32_vbl_interrupt);
66	66	void descramble_sound( const char *tag );
67	67	DECLARE_WRITE_LINE_MEMBER(sound_irq_gen);
	68	int bank_callback(int bank);
68	69	};
69	70
70	71
r29437	r29438
321	322	device.execute().set_input_line(ARM_IRQ_LINE, HOLD_LINE);
322	323	}
323	324
324		~~stat~~i~~c i~~nt deco156_bank_callback(~~const~~ int bank)
	325	int deco156_state::bank_callback(int bank)
325	326	{
326	327	return ((bank >> 4) & 0x7) * 0x1000;
327	328	}
328	329
329		static const deco16ic_interface deco156_deco16ic_tilegen1_intf =
330		{
331		0, 1,
332		0x0f, 0x0f, /* trans masks (default values) */
333		0, 16, /* color base (default values) */
334		0x0f, 0x0f, /* color masks (default values) */
335		deco156_bank_callback,
336		deco156_bank_callback,
337		0,1,
338		};
339
340	330	UINT16 deco156_pri_callback(UINT16 x)
341	331	{
342	332	switch (x & 0xc000)
r29437	r29438
370	360	MCFG_GFXDECODE_ADD("gfxdecode", "palette", hvysmsh)
371	361	MCFG_PALETTE_ADD("palette", 1024)
372	362
373
374		MCFG_DECO16IC_ADD("tilegen1", deco156_deco16ic_tilegen1_intf)
	363	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	364	MCFG_DECO16IC_SPLIT(0)
	365	MCFG_DECO16IC_WIDTH12(1)
	366	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	367	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	368	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	369	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	370	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	371	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	372	MCFG_DECO16IC_BANK1_CB(deco156_state, bank_callback)
	373	MCFG_DECO16IC_BANK2_CB(deco156_state, bank_callback)
	374	MCFG_DECO16IC_PF12_8X8_BANK(0)
	375	MCFG_DECO16IC_PF12_16X16_BANK(1)
375	376	MCFG_DECO16IC_GFXDECODE("gfxdecode")
376	377	MCFG_DECO16IC_PALETTE("palette")
377	378
r29437	r29438
412	413	MCFG_GFXDECODE_ADD("gfxdecode", "palette", hvysmsh)
413	414	MCFG_PALETTE_ADD("palette", 1024)
414	415
415
416		MCFG_DECO16IC_ADD("tilegen1", deco156_deco16ic_tilegen1_intf)
	416	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	417	MCFG_DECO16IC_SPLIT(0)
	418	MCFG_DECO16IC_WIDTH12(1)
	419	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	420	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	421	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	422	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	423	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	424	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	425	MCFG_DECO16IC_BANK1_CB(deco156_state, bank_callback)
	426	MCFG_DECO16IC_BANK2_CB(deco156_state, bank_callback)
	427	MCFG_DECO16IC_PF12_8X8_BANK(0)
	428	MCFG_DECO16IC_PF12_16X16_BANK(1)
417	429	MCFG_DECO16IC_GFXDECODE("gfxdecode")
418	430	MCFG_DECO16IC_PALETTE("palette")
419	431

branches/new_menus/src/mame/drivers/pktgaldx.c
r29437	r29438
303	303	GFXDECODE_END
304	304
305	305
306		~~stat~~i~~c i~~nt pktgaldx_bank_callback( ~~const~~ int bank )
	306	int pktgaldx_state::bank_callback( int bank )
307	307	{
308	308	return ((bank >> 4) & 0x7) * 0x1000;
309	309	}
310	310
311		static const deco16ic_interface pktgaldx_deco16ic_tilegen1_intf =
312		{
313		0, 1,
314		0x0f, 0x0f, /* trans masks (default values) */
315		0, 16, /* color base (default values) */
316		0x0f, 0x0f, /* color masks (default values) */
317		NULL,
318		pktgaldx_bank_callback,
319		0,1,
320		};
321	311
322
323
324	312	void pktgaldx_state::machine_start()
325	313	{
326	314	}
r29437	r29438
350	338	MCFG_DECOCOMN_ADD("deco_common")
351	339	MCFG_DECOCOMN_PALETTE("palette")
352	340
353		MCFG_DECO16IC_ADD("tilegen1", pktgaldx_deco16ic_tilegen1_intf)
	341	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	342	MCFG_DECO16IC_SPLIT(0)
	343	MCFG_DECO16IC_WIDTH12(1)
	344	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	345	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	346	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	347	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	348	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	349	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	350	MCFG_DECO16IC_BANK1_CB(pktgaldx_state, bank_callback)
	351	MCFG_DECO16IC_BANK2_CB(pktgaldx_state, bank_callback)
	352	MCFG_DECO16IC_PF12_8X8_BANK(0)
	353	MCFG_DECO16IC_PF12_16X16_BANK(1)
354	354	MCFG_DECO16IC_GFXDECODE("gfxdecode")
355	355	MCFG_DECO16IC_PALETTE("palette")
356	356

branches/new_menus/src/mame/drivers/dblewing.c
r29437	r29438
113	113	virtual void machine_reset();
114	114	UINT32 screen_update_dblewing(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
115	115
	116	int bank_callback(int bank);
116	117	void dblewing_sound_cb( address_space &space, UINT16 data, UINT16 mem_mask );
117	118
118	119	READ16_MEMBER( wf_protection_region_0_104_r );
r29437	r29438
331	332	m_audiocpu->set_input_line(0, (m_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
332	333	}
333	334
334		~~stat~~i~~c i~~nt dblewing_bank_callback( ~~const~~ int bank )
	335	int dblewing_state::bank_callback( int bank )
335	336	{
336	337	return ((bank >> 4) & 0x7) * 0x1000;
337	338	}
338	339
339		static const deco16ic_interface dblewing_deco16ic_tilegen1_intf =
340		{
341		0, 1,
342		0x0f, 0x0f, /* trans masks (default values) */
343		0, 16, /* color base (default values) */
344		0x0f, 0x0f, /* color masks (default values) */
345		dblewing_bank_callback,
346		dblewing_bank_callback,
347		0,1,
348		};
349
350	340	void dblewing_state::machine_start()
351	341	{
352	342	save_item(NAME(m_sound_irq));
r29437	r29438
391	381	MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
392	382	MCFG_GFXDECODE_ADD("gfxdecode", "palette", dblewing)
393	383
394		MCFG_DECO16IC_ADD("tilegen1", dblewing_deco16ic_tilegen1_intf)
	384	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	385	MCFG_DECO16IC_SPLIT(0)
	386	MCFG_DECO16IC_WIDTH12(1)
	387	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	388	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	389	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	390	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	391	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	392	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	393	MCFG_DECO16IC_BANK1_CB(dblewing_state, bank_callback)
	394	MCFG_DECO16IC_BANK2_CB(dblewing_state, bank_callback)
	395	MCFG_DECO16IC_PF12_8X8_BANK(0)
	396	MCFG_DECO16IC_PF12_16X16_BANK(1)
395	397	MCFG_DECO16IC_GFXDECODE("gfxdecode")
396	398	MCFG_DECO16IC_PALETTE("palette")
397	399

branches/new_menus/src/mame/drivers/cninja.c
r29437	r29438
785	785
786	786	/**********************************************************************************/
787	787
788		~~stat~~ic int cninja_bank_callback( ~~const~~ int bank )
	788	int cninja_state::cninja_bank_callback( int bank )
789	789	{
790	790	if ((bank >> 4) & 0xf)
791	791	return 0x0000; /* Only 2 banks */
792	792	return 0x1000;
793	793	}
794	794
795		~~stat~~ic int robocop2_bank_callback( ~~const~~ int bank )
	795	int cninja_state::robocop2_bank_callback( int bank )
796	796	{
797	797	return (bank & 0x30) << 8;
798	798	}
799	799
800		~~stat~~ic int mutantf_1_bank_callback( ~~const~~ int bank )
	800	int cninja_state::mutantf_1_bank_callback( int bank )
801	801	{
802	802	return ((bank >> 4) & 0x3) << 12;
803	803	}
804	804
805		~~stat~~ic int mutantf_2_bank_callback( ~~const~~ int bank )
	805	int cninja_state::mutantf_2_bank_callback( int bank )
806	806	{
807	807	return ((bank >> 5) & 0x1) << 14;
808	808	}
809	809
810		static const deco16ic_interface cninja_deco16ic_tilegen1_intf =
811		{
812		1, 1,
813		0x0f, 0x0f, /* trans masks (default values) */
814		0, 16, /* color base */
815		0x0f, 0x0f, /* color masks (default values) */
816		NULL,
817		NULL,
818		0, 1,
819		};
820	810
821		static const deco16ic_interface cninja_deco16ic_tilegen2_intf =
822		{
823		0, 1,
824		0x0f, 0x0f, /* trans masks (default values) */
825		0, 48, /* color base */
826		0x0f, 0x0f, /* color masks (default values) */
827		cninja_bank_callback,
828		cninja_bank_callback,
829		0, 2,
830		};
831
832
833
834		static const deco16ic_interface edrandy_deco16ic_tilegen1_intf =
835		{
836		0, 1,
837		0x0f, 0x0f, /* trans masks (default values) */
838		0, 16, /* color base */
839		0x0f, 0x0f, /* color masks (default values) */
840		NULL,
841		NULL,
842		0,1,
843		};
844
845		static const deco16ic_interface edrandy_deco16ic_tilegen2_intf =
846		{
847		0, 1,
848		0x0f, 0x0f, /* trans masks (default values) */
849		0, 48, /* color base */
850		0x0f, 0x0f, /* color masks (default values) */
851		cninja_bank_callback,
852		cninja_bank_callback,
853		0,2,
854		};
855
856
857		static const deco16ic_interface robocop2_deco16ic_tilegen1_intf =
858		{
859		0, 1,
860		0x0f, 0x0f, /* trans masks (default values) */
861		0, 16, /* color base */
862		0x0f, 0x0f, /* color masks (default values) */
863		NULL,
864		robocop2_bank_callback,
865		0,1,
866		};
867
868		static const deco16ic_interface robocop2_deco16ic_tilegen2_intf =
869		{
870		0, 1,
871		0x0f, 0x0f, /* trans masks (default values) */
872		0, 48, /* color base */
873		0x0f, 0x0f, /* color masks (default values) */
874		robocop2_bank_callback,
875		robocop2_bank_callback,
876		0,2,
877		};
878
879
880		static const deco16ic_interface mutantf_deco16ic_tilegen1_intf =
881		{
882		0, 1,
883		0x0f, 0x0f, /* trans masks (default values) */
884		0, 0x30, /* color base */
885		0x0f, 0x0f, /* color masks (default values) */
886		mutantf_1_bank_callback,
887		mutantf_2_bank_callback,
888		0,1,
889		};
890
891		static const deco16ic_interface mutantf_deco16ic_tilegen2_intf =
892		{
893		0, 1,
894		0x0f, 0x0f, /* trans masks (default values) */
895		0x20, 0x40, /* color base */
896		0x0f, 0x0f, /* color masks (default values) */
897		mutantf_1_bank_callback,
898		mutantf_1_bank_callback,
899		0,2,
900		};
901
902
903	811	void cninja_state::machine_start()
904	812	{
905	813	save_item(NAME(m_scanline));
r29437	r29438
957	865	MCFG_DECOCOMN_ADD("deco_common")
958	866	MCFG_DECOCOMN_PALETTE("palette")
959	867
960		MCFG_DECO16IC_ADD("tilegen1", cninja_deco16ic_tilegen1_intf)
	868	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	869	MCFG_DECO16IC_SPLIT(1)
	870	MCFG_DECO16IC_WIDTH12(1)
	871	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	872	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	873	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	874	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	875	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	876	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	877	MCFG_DECO16IC_PF12_8X8_BANK(0)
	878	MCFG_DECO16IC_PF12_16X16_BANK(1)
961	879	MCFG_DECO16IC_GFXDECODE("gfxdecode")
962	880	MCFG_DECO16IC_PALETTE("palette")
963	881
964		MCFG_DECO16IC_ADD("tilegen2", cninja_deco16ic_tilegen2_intf)
	882	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	883	MCFG_DECO16IC_SPLIT(0)
	884	MCFG_DECO16IC_WIDTH12(1)
	885	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	886	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	887	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	888	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	889	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	890	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	891	MCFG_DECO16IC_BANK1_CB(cninja_state, cninja_bank_callback)
	892	MCFG_DECO16IC_BANK2_CB(cninja_state, cninja_bank_callback)
	893	MCFG_DECO16IC_PF12_8X8_BANK(0)
	894	MCFG_DECO16IC_PF12_16X16_BANK(2)
965	895	MCFG_DECO16IC_GFXDECODE("gfxdecode")
966	896	MCFG_DECO16IC_PALETTE("palette")
967	897
r29437	r29438
1025	955	MCFG_DECOCOMN_ADD("deco_common")
1026	956	MCFG_DECOCOMN_PALETTE("palette")
1027	957
1028		MCFG_DECO16IC_ADD("tilegen1", cninja_deco16ic_tilegen1_intf)
	958	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	959	MCFG_DECO16IC_SPLIT(1)
	960	MCFG_DECO16IC_WIDTH12(1)
	961	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	962	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	963	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	964	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	965	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	966	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	967	MCFG_DECO16IC_PF12_8X8_BANK(0)
	968	MCFG_DECO16IC_PF12_16X16_BANK(1)
1029	969	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1030	970	MCFG_DECO16IC_PALETTE("palette")
1031	971
1032		MCFG_DECO16IC_ADD("tilegen2", cninja_deco16ic_tilegen2_intf)
	972	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	973	MCFG_DECO16IC_SPLIT(0)
	974	MCFG_DECO16IC_WIDTH12(1)
	975	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	976	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	977	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	978	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	979	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	980	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	981	MCFG_DECO16IC_BANK1_CB(cninja_state, cninja_bank_callback)
	982	MCFG_DECO16IC_BANK2_CB(cninja_state, cninja_bank_callback)
	983	MCFG_DECO16IC_PF12_8X8_BANK(0)
	984	MCFG_DECO16IC_PF12_16X16_BANK(2)
1033	985	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1034	986	MCFG_DECO16IC_PALETTE("palette")
1035	987
r29437	r29438
1088	1040	MCFG_DECOCOMN_ADD("deco_common")
1089	1041	MCFG_DECOCOMN_PALETTE("palette")
1090	1042
1091		MCFG_DECO16IC_ADD("tilegen1", cninja_deco16ic_tilegen1_intf)
	1043	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	1044	MCFG_DECO16IC_SPLIT(1)
	1045	MCFG_DECO16IC_WIDTH12(1)
	1046	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1047	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1048	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1049	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	1050	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1051	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1052	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1053	MCFG_DECO16IC_PF12_16X16_BANK(1)
1092	1054	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1093	1055	MCFG_DECO16IC_PALETTE("palette")
1094	1056
1095		MCFG_DECO16IC_ADD("tilegen2", cninja_deco16ic_tilegen2_intf)
	1057	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	1058	MCFG_DECO16IC_SPLIT(0)
	1059	MCFG_DECO16IC_WIDTH12(1)
	1060	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1061	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1062	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1063	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	1064	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1065	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1066	MCFG_DECO16IC_BANK1_CB(cninja_state, cninja_bank_callback)
	1067	MCFG_DECO16IC_BANK2_CB(cninja_state, cninja_bank_callback)
	1068	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1069	MCFG_DECO16IC_PF12_16X16_BANK(2)
1096	1070	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1097	1071	MCFG_DECO16IC_PALETTE("palette")
1098	1072
r29437	r29438
1138	1112	MCFG_DECOCOMN_ADD("deco_common")
1139	1113	MCFG_DECOCOMN_PALETTE("palette")
1140	1114
1141		MCFG_DECO16IC_ADD("tilegen1", edrandy_deco16ic_tilegen1_intf)
	1115	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	1116	MCFG_DECO16IC_SPLIT(0)
	1117	MCFG_DECO16IC_WIDTH12(1)
	1118	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1119	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1120	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1121	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	1122	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1123	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1124	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1125	MCFG_DECO16IC_PF12_16X16_BANK(1)
1142	1126	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1143	1127	MCFG_DECO16IC_PALETTE("palette")
1144	1128
1145		MCFG_DECO16IC_ADD("tilegen2", edrandy_deco16ic_tilegen2_intf)
	1129	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	1130	MCFG_DECO16IC_SPLIT(0)
	1131	MCFG_DECO16IC_WIDTH12(1)
	1132	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1133	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1134	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1135	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	1136	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1137	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1138	MCFG_DECO16IC_BANK1_CB(cninja_state, cninja_bank_callback)
	1139	MCFG_DECO16IC_BANK2_CB(cninja_state, cninja_bank_callback)
	1140	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1141	MCFG_DECO16IC_PF12_16X16_BANK(2)
1146	1142	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1147	1143	MCFG_DECO16IC_PALETTE("palette")
1148	1144
r29437	r29438
1203	1199	MCFG_DECOCOMN_ADD("deco_common")
1204	1200	MCFG_DECOCOMN_PALETTE("palette")
1205	1201
1206		MCFG_DECO16IC_ADD("tilegen1", robocop2_deco16ic_tilegen1_intf)
	1202	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	1203	MCFG_DECO16IC_SPLIT(0)
	1204	MCFG_DECO16IC_WIDTH12(1)
	1205	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1206	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1207	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1208	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	1209	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1210	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1211	MCFG_DECO16IC_BANK2_CB(cninja_state, robocop2_bank_callback)
	1212	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1213	MCFG_DECO16IC_PF12_16X16_BANK(1)
1207	1214	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1208	1215	MCFG_DECO16IC_PALETTE("palette")
1209	1216
1210		MCFG_DECO16IC_ADD("tilegen2", robocop2_deco16ic_tilegen2_intf)
	1217	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	1218	MCFG_DECO16IC_SPLIT(0)
	1219	MCFG_DECO16IC_WIDTH12(1)
	1220	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1221	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1222	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1223	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	1224	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1225	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1226	MCFG_DECO16IC_BANK1_CB(cninja_state, robocop2_bank_callback)
	1227	MCFG_DECO16IC_BANK2_CB(cninja_state, robocop2_bank_callback)
	1228	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1229	MCFG_DECO16IC_PF12_16X16_BANK(2)
1211	1230	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1212	1231	MCFG_DECO16IC_PALETTE("palette")
1213	1232
r29437	r29438
1273	1292	MCFG_DECOCOMN_ADD("deco_common")
1274	1293	MCFG_DECOCOMN_PALETTE("palette")
1275	1294
1276		MCFG_DECO16IC_ADD("tilegen1", mutantf_deco16ic_tilegen1_intf)
	1295	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	1296	MCFG_DECO16IC_SPLIT(0)
	1297	MCFG_DECO16IC_WIDTH12(1)
	1298	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1299	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1300	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1301	MCFG_DECO16IC_PF2_COL_BANK(0x30)
	1302	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1303	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1304	MCFG_DECO16IC_BANK1_CB(cninja_state, mutantf_1_bank_callback)
	1305	MCFG_DECO16IC_BANK2_CB(cninja_state, mutantf_2_bank_callback)
	1306	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1307	MCFG_DECO16IC_PF12_16X16_BANK(1)
1277	1308	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1278	1309	MCFG_DECO16IC_PALETTE("palette")
1279	1310
1280		MCFG_DECO16IC_ADD("tilegen2", mutantf_deco16ic_tilegen2_intf)
	1311	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	1312	MCFG_DECO16IC_SPLIT(0)
	1313	MCFG_DECO16IC_WIDTH12(1)
	1314	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1315	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1316	MCFG_DECO16IC_PF1_COL_BANK(0x20)
	1317	MCFG_DECO16IC_PF2_COL_BANK(0x40)
	1318	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1319	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1320	MCFG_DECO16IC_BANK1_CB(cninja_state, mutantf_1_bank_callback)
	1321	MCFG_DECO16IC_BANK2_CB(cninja_state, mutantf_1_bank_callback)
	1322	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1323	MCFG_DECO16IC_PF12_16X16_BANK(2)
1281	1324	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1282	1325	MCFG_DECO16IC_PALETTE("palette")
1283	1326

branches/new_menus/src/mame/drivers/rohga.c
r29437	r29438
759	759
760	760	/**********************************************************************************/
761	761
762		~~stat~~i~~c i~~nt rohga_bank_callback( ~~const~~ int bank )
	762	int rohga_state::bank_callback( int bank )
763	763	{
764	764	return ((bank >> 4) & 0x3) << 12;
765	765	}
766	766
767		static const deco16ic_interface rohga_deco16ic_tilegen1_intf =
768		{
769		0, 1,
770		0x0f, 0x0f, /* trans masks (default values) */
771		0, 16,/* color base (default values) */
772		0x0f, 0x0f, /* color masks (default values) */
773		rohga_bank_callback,
774		rohga_bank_callback,
775		0, 1,
776		};
777
778		static const deco16ic_interface rohga_deco16ic_tilegen2_intf =
779		{
780		0, 1,
781		0x0f, 0x0f, /* trans masks (default values) */
782		0, 16, /* color base (default values) */
783		0x0f, 0x0f, /* color masks (default values) */
784		rohga_bank_callback,
785		rohga_bank_callback,
786		0, 2,
787		};
788
789		static const deco16ic_interface nitrobal_deco16ic_tilegen1_intf =
790		{
791		0, 0,
792		0x0f, 0x0f, /* trans masks (default values) */
793		0, 16, /* color base (pf4 is not default) */
794		0x0f, 0x0f, /* color masks */
795		rohga_bank_callback,
796		rohga_bank_callback,
797		0, 1,
798		};
799
800		static const deco16ic_interface nitrobal_deco16ic_tilegen2_intf =
801		{
802		0, 0,
803		0x0f, 0x0f, /* trans masks (default values) */
804		0, 0, /* color base (pf4 is not default) */
805		0, 0, /* color masks */
806		rohga_bank_callback,
807		rohga_bank_callback,
808		0, 2,
809		};
810
811	767	static MACHINE_CONFIG_START( rohga, rohga_state )
812	768
813	769	/* basic machine hardware */
r29437	r29438
837	793	MCFG_DECOCOMN_ADD("deco_common")
838	794	MCFG_DECOCOMN_PALETTE("palette")
839	795
840		MCFG_DECO16IC_ADD("tilegen1", rohga_deco16ic_tilegen1_intf)
	796	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	797	MCFG_DECO16IC_SPLIT(0)
	798	MCFG_DECO16IC_WIDTH12(1)
	799	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	800	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	801	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	802	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	803	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	804	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	805	MCFG_DECO16IC_BANK1_CB(rohga_state, bank_callback)
	806	MCFG_DECO16IC_BANK2_CB(rohga_state, bank_callback)
	807	MCFG_DECO16IC_PF12_8X8_BANK(0)
	808	MCFG_DECO16IC_PF12_16X16_BANK(1)
841	809	MCFG_DECO16IC_GFXDECODE("gfxdecode")
842	810	MCFG_DECO16IC_PALETTE("palette")
843	811
844		MCFG_DECO16IC_ADD("tilegen2", rohga_deco16ic_tilegen2_intf)
	812	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	813	MCFG_DECO16IC_SPLIT(0)
	814	MCFG_DECO16IC_WIDTH12(1)
	815	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	816	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	817	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	818	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	819	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	820	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	821	MCFG_DECO16IC_BANK1_CB(rohga_state, bank_callback)
	822	MCFG_DECO16IC_BANK2_CB(rohga_state, bank_callback)
	823	MCFG_DECO16IC_PF12_8X8_BANK(0)
	824	MCFG_DECO16IC_PF12_16X16_BANK(2)
845	825	MCFG_DECO16IC_GFXDECODE("gfxdecode")
846	826	MCFG_DECO16IC_PALETTE("palette")
847	827
r29437	r29438
897	877	MCFG_DECOCOMN_ADD("deco_common")
898	878	MCFG_DECOCOMN_PALETTE("palette")
899	879
900		MCFG_DECO16IC_ADD("tilegen1", rohga_deco16ic_tilegen1_intf)
	880	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	881	MCFG_DECO16IC_SPLIT(0)
	882	MCFG_DECO16IC_WIDTH12(1)
	883	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	884	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	885	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	886	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	887	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	888	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	889	MCFG_DECO16IC_BANK1_CB(rohga_state, bank_callback)
	890	MCFG_DECO16IC_BANK2_CB(rohga_state, bank_callback)
	891	MCFG_DECO16IC_PF12_8X8_BANK(0)
	892	MCFG_DECO16IC_PF12_16X16_BANK(1)
901	893	MCFG_DECO16IC_GFXDECODE("gfxdecode")
902	894	MCFG_DECO16IC_PALETTE("palette")
903	895
904		MCFG_DECO16IC_ADD("tilegen2", rohga_deco16ic_tilegen2_intf)
	896	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	897	MCFG_DECO16IC_SPLIT(0)
	898	MCFG_DECO16IC_WIDTH12(1)
	899	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	900	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	901	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	902	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	903	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	904	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	905	MCFG_DECO16IC_BANK1_CB(rohga_state, bank_callback)
	906	MCFG_DECO16IC_BANK2_CB(rohga_state, bank_callback)
	907	MCFG_DECO16IC_PF12_8X8_BANK(0)
	908	MCFG_DECO16IC_PF12_16X16_BANK(2)
905	909	MCFG_DECO16IC_GFXDECODE("gfxdecode")
906	910	MCFG_DECO16IC_PALETTE("palette")
907	911
r29437	r29438
965	969	MCFG_DECOCOMN_ADD("deco_common")
966	970	MCFG_DECOCOMN_PALETTE("palette")
967	971
968		MCFG_DECO16IC_ADD("tilegen1", nitrobal_deco16ic_tilegen1_intf)
	972	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	973	MCFG_DECO16IC_SPLIT(0)
	974	MCFG_DECO16IC_WIDTH12(0)
	975	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	976	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	977	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	978	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	979	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	980	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	981	MCFG_DECO16IC_BANK1_CB(rohga_state, bank_callback)
	982	MCFG_DECO16IC_BANK2_CB(rohga_state, bank_callback)
	983	MCFG_DECO16IC_PF12_8X8_BANK(0)
	984	MCFG_DECO16IC_PF12_16X16_BANK(1)
969	985	MCFG_DECO16IC_GFXDECODE("gfxdecode")
970	986	MCFG_DECO16IC_PALETTE("palette")
971	987
972		MCFG_DECO16IC_ADD("tilegen2", nitrobal_deco16ic_tilegen2_intf)
	988	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	989	MCFG_DECO16IC_SPLIT(0)
	990	MCFG_DECO16IC_WIDTH12(0)
	991	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	992	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	993	MCFG_DECO16IC_PF1_COL_BANK(0)
	994	MCFG_DECO16IC_PF2_COL_BANK(0)
	995	MCFG_DECO16IC_PF1_COL_MASK(0)
	996	MCFG_DECO16IC_PF2_COL_MASK(0)
	997	MCFG_DECO16IC_BANK1_CB(rohga_state, bank_callback)
	998	MCFG_DECO16IC_BANK2_CB(rohga_state, bank_callback)
	999	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1000	MCFG_DECO16IC_PF12_16X16_BANK(2)
973	1001	MCFG_DECO16IC_GFXDECODE("gfxdecode")
974	1002	MCFG_DECO16IC_PALETTE("palette")
975	1003
r29437	r29438
1037	1065	MCFG_DECOCOMN_ADD("deco_common")
1038	1066	MCFG_DECOCOMN_PALETTE("palette")
1039	1067
1040		MCFG_DECO16IC_ADD("tilegen1", rohga_deco16ic_tilegen1_intf)
	1068	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	1069	MCFG_DECO16IC_SPLIT(0)
	1070	MCFG_DECO16IC_WIDTH12(1)
	1071	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1072	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1073	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1074	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	1075	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1076	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1077	MCFG_DECO16IC_BANK1_CB(rohga_state, bank_callback)
	1078	MCFG_DECO16IC_BANK2_CB(rohga_state, bank_callback)
	1079	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1080	MCFG_DECO16IC_PF12_16X16_BANK(1)
1041	1081	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1042	1082	MCFG_DECO16IC_PALETTE("palette")
1043	1083
1044		MCFG_DECO16IC_ADD("tilegen2", rohga_deco16ic_tilegen2_intf)
	1084	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	1085	MCFG_DECO16IC_SPLIT(0)
	1086	MCFG_DECO16IC_WIDTH12(1)
	1087	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	1088	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	1089	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	1090	MCFG_DECO16IC_PF2_COL_BANK(0x10)
	1091	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	1092	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	1093	MCFG_DECO16IC_BANK1_CB(rohga_state, bank_callback)
	1094	MCFG_DECO16IC_BANK2_CB(rohga_state, bank_callback)
	1095	MCFG_DECO16IC_PF12_8X8_BANK(0)
	1096	MCFG_DECO16IC_PF12_16X16_BANK(2)
1045	1097	MCFG_DECO16IC_GFXDECODE("gfxdecode")
1046	1098	MCFG_DECO16IC_PALETTE("palette")
1047	1099

branches/new_menus/src/mame/drivers/darkseal.c
r29437	r29438
220	220
221	221	/******************************************************************************/
222	222
223		static const deco16ic_interface darkseal_deco16ic_tilegen1_intf =
224		{
225		0, 3, // both these tilemaps need to be twice the y size of usual!
226		0x0f, 0x0f, /* trans masks (default values) */
227		0x00, 0x00, /* color base */
228		0x0f, 0x0f, /* color masks (default values) */
229		NULL,
230		NULL,
231		0,1
232		};
233
234
235		static const deco16ic_interface darkseal_deco16ic_tilegen2_intf =
236		{
237		0, 1,
238		0x0f, 0x0f, /* trans masks (default values) */
239		0x00, 0x00, /* color base */
240		0x0f, 0x0f, /* color masks (default values) */
241		NULL,
242		NULL,
243		2,3
244		};
245
246
247	223	static MACHINE_CONFIG_START( darkseal, darkseal_state )
248	224
249	225	/* basic machine hardware */
r29437	r29438
268	244
269	245	MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
270	246
271		MCFG_DECO16IC_ADD("tilegen1", darkseal_deco16ic_tilegen1_intf)
	247	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	248	MCFG_DECO16IC_SPLIT(0)
	249	MCFG_DECO16IC_WIDTH12(3) // both these tilemaps need to be twice the y size of usual!
	250	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	251	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	252	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	253	MCFG_DECO16IC_PF2_COL_BANK(0x00)
	254	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	255	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	256	MCFG_DECO16IC_PF12_8X8_BANK(0)
	257	MCFG_DECO16IC_PF12_16X16_BANK(1)
272	258	MCFG_DECO16IC_GFXDECODE("gfxdecode")
273	259	MCFG_DECO16IC_PALETTE("palette")
274	260
275		MCFG_DECO16IC_ADD("tilegen2", darkseal_deco16ic_tilegen2_intf)
	261	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	262	MCFG_DECO16IC_SPLIT(0)
	263	MCFG_DECO16IC_WIDTH12(1)
	264	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	265	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	266	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	267	MCFG_DECO16IC_PF2_COL_BANK(0x00)
	268	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	269	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	270	MCFG_DECO16IC_PF12_8X8_BANK(2)
	271	MCFG_DECO16IC_PF12_16X16_BANK(3)
276	272	MCFG_DECO16IC_GFXDECODE("gfxdecode")
277	273	MCFG_DECO16IC_PALETTE("palette")
278	274
r29437	r29438
282	278	MCFG_DECO_SPRITE_PALETTE("palette")
283	279
284	280
285
286	281	/* sound hardware */
287	282	MCFG_SPEAKER_STANDARD_MONO("mono")
288	283

branches/new_menus/src/mame/drivers/vaportra.c
r29437	r29438
196	196
197	197	/******************************************************************************/
198	198
199		~~stat~~i~~c i~~nt vaportra_bank_callback( ~~const~~ int bank )
	199	int vaportra_state::bank_callback( int bank )
200	200	{
201	201	return ((bank >> 4) & 0x7) * 0x1000;
202	202	}
203	203
204		static const deco16ic_interface vaportra_deco16ic_tilegen1_intf =
205		{
206		0, 1,
207		0x0f, 0x0f, /* trans masks (default values) */
208		0x00, 0x20, /* color base */
209		0x0f, 0x0f, /* color masks (default values) */
210		vaportra_bank_callback,
211		vaportra_bank_callback,
212		0,1
213		};
214
215
216		static const deco16ic_interface vaportra_deco16ic_tilegen2_intf =
217		{
218		0, 1,
219		0x0f, 0x0f, /* trans masks (default values) */
220		0x30, 0x40, /* color base */
221		0x0f, 0x0f, /* color masks (default values) */
222		vaportra_bank_callback,
223		vaportra_bank_callback,
224		2,3
225		};
226
227	204	void vaportra_state::machine_start()
228	205	{
229	206	save_item(NAME(m_priority));
r29437	r29438
261	238	MCFG_PALETTE_ADD("palette", 1280)
262	239
263	240
264		MCFG_DECO16IC_ADD("tilegen1", vaportra_deco16ic_tilegen1_intf)
	241	MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
	242	MCFG_DECO16IC_SPLIT(0)
	243	MCFG_DECO16IC_WIDTH12(1)
	244	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	245	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	246	MCFG_DECO16IC_PF1_COL_BANK(0x00)
	247	MCFG_DECO16IC_PF2_COL_BANK(0x20)
	248	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	249	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	250	MCFG_DECO16IC_BANK1_CB(vaportra_state, bank_callback)
	251	MCFG_DECO16IC_BANK2_CB(vaportra_state, bank_callback)
	252	MCFG_DECO16IC_PF12_8X8_BANK(0)
	253	MCFG_DECO16IC_PF12_16X16_BANK(1)
265	254	MCFG_DECO16IC_GFXDECODE("gfxdecode")
266	255	MCFG_DECO16IC_PALETTE("palette")
267	256
268		MCFG_DECO16IC_ADD("tilegen2", vaportra_deco16ic_tilegen2_intf)
	257	MCFG_DEVICE_ADD("tilegen2", DECO16IC, 0)
	258	MCFG_DECO16IC_SPLIT(0)
	259	MCFG_DECO16IC_WIDTH12(1)
	260	MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
	261	MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
	262	MCFG_DECO16IC_PF1_COL_BANK(0x30)
	263	MCFG_DECO16IC_PF2_COL_BANK(0x40)
	264	MCFG_DECO16IC_PF1_COL_MASK(0x0f)
	265	MCFG_DECO16IC_PF2_COL_MASK(0x0f)
	266	MCFG_DECO16IC_BANK1_CB(vaportra_state, bank_callback)
	267	MCFG_DECO16IC_BANK2_CB(vaportra_state, bank_callback)
	268	MCFG_DECO16IC_PF12_8X8_BANK(2)
	269	MCFG_DECO16IC_PF12_16X16_BANK(3)
269	270	MCFG_DECO16IC_GFXDECODE("gfxdecode")
270	271	MCFG_DECO16IC_PALETTE("palette")
271	272

Property changes on: branches/new_menus
Modified: svn:mergeinfo Merged /trunk:r29418-29424

199869 Revisions