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r22650 Friday 3rd May, 2013 at 02:03:46 UTC by David Haywood
collapse some duplicated code (nw)

[src/emu/machine]	mcf5206e.c
[src/mame/drivers]	bfm_sc4h.c bfm_sc5.c
[src/mame/includes]	bfm_sc45.h bfm_sc5.h

trunk/src/mame/includes/bfm_sc45.h

r22649	r22650
10	10	#include "machine/68681.h"
11	11	#include "machine/nvram.h"
12	12
13		class sc4_state : public driver_device
	13	// common base class for things shared between sc4 and sc5
	14	class bfm_sc45_state : public driver_device
14	15	{
15	16	public:
16		sc4_state(const machine_config &mconfig, device_type type, const char *tag)
	17	bfm_sc45_state(const machine_config &mconfig, device_type type, const char *tag)
17	18	: driver_device(mconfig, type, tag),
18		m_cpuregion(*this, "maincpu"),
	19	m_maincpu(*this, "maincpu"),
19	20	m_duart(*this, "duart68681"),
20		m_ymz(*this, "ymz"),
21		m_maincpu(*this, "maincpu"),
22	21	m_vfd0(*this, "vfd0"),
	22	m_ymz(*this, "ymz")
	23	{
	24
	25	}
	26
	27	public:
	28	required_device<legacy_cpu_device> m_maincpu;
	29	required_device<duart68681_device> m_duart;
	30	optional_device<bfm_bda_t> m_vfd0;
	31	required_device<ymz280b_device> m_ymz;
	32
	33	// serial vfd
	34	int vfd_enabled;
	35	bool vfd_old_clock;
	36
	37	UINT8 vfd_ser_value;
	38	int vfd_ser_count;
	39	};
	40
	41	void bfm_sc45_write_serial_vfd(running_machine &machine, bool cs, bool clock, bool data);
	42
	43	// sc4 specifics
	44	class sc4_state : public bfm_sc45_state
	45	{
	46	public:
	47	sc4_state(const machine_config &mconfig, device_type type, const char *tag)
	48	: bfm_sc45_state(mconfig, type, tag),
	49	m_cpuregion(*this, "maincpu"),
23	50	m_nvram(*this, "nvram"),
24	51	m_io1(*this, "IN-0"),
25	52	m_io2(*this, "IN-1"),
r22649	r22650
40	67
41	68	required_memory_region m_cpuregion;
42	69	// devices
43		required_device<duart68681_device> m_duart;
44		required_device<ymz280b_device> m_ymz;
45		required_device<legacy_cpu_device> m_maincpu;
46		optional_device<bfm_bda_t> m_vfd0;
47	70	required_device<nvram_device> m_nvram;
48	71
49		// serial vfd
50		int vfd_enabled;
51		bool vfd_old_clock;
52	72
53		UINT8 vfd_ser_value;
54		int vfd_ser_count;
55
56	73	const stepper_interface **m_reel_setup;
57	74	int m_reel_changed;
58	75	int m_reels;

trunk/src/mame/includes/bfm_sc5.h

r22649	r22650
1	1	#include "cpu/m68000/m68000.h"
2	2	#include "includes/bfm_sc45.h"
3	3
4		class bfm_sc5_state : public driver_device
	4	class bfm_sc5_state : public bfm_sc45_state
5	5	{
6	6	public:
7	7	bfm_sc5_state(const machine_config &mconfig, device_type type, const char *tag)
8		: driver_device(mconfig, type, tag),
9		m_maincpu(*this, "maincpu"),
10		m_vfd0(*this, "vfd0")
	8	: bfm_sc45_state(mconfig, type, tag)
11	9	{ }
12	10
13	11	protected:
14	12
15	13
16	14	public:
17
18
19		// devices
20		required_device<cpu_device> m_maincpu;
21		optional_device<bfm_bda_t> m_vfd0;
22
23		// serial vfd
24		int vfd_enabled;
25		bool vfd_old_clock;
26
27		UINT8 vfd_ser_value;
28		int vfd_ser_count;
29
30	15	DECLARE_DRIVER_INIT(sc5);
31	16	DECLARE_WRITE_LINE_MEMBER(bfm_sc5_ym_irqhandler);
32	17	DECLARE_READ8_MEMBER( sc5_10202F0_r );
33	18	DECLARE_WRITE8_MEMBER( sc5_10202F0_w );
34
	19	DECLARE_WRITE16_MEMBER( sc5_duart_w );
35	20	};
	21

trunk/src/mame/drivers/bfm_sc4h.c

r22649	r22650
444	444
445	445	void bfm_sc4_reset_serial_vfd(running_machine &machine)
446	446	{
447		sc4_state *state = machine.driver_data<sc4_state>();
	447	bfm_sc45_state *state = machine.driver_data<bfm_sc45_state>();
448	448
449	449	state->m_vfd0->reset();
450	450	state->vfd_old_clock = false;
451	451	}
452	452
453		void bfm_sc4_write_serial_vfd(running_machine &machine, bool cs, bool clock, bool data)
	453	void bfm_sc45_write_serial_vfd(running_machine &machine, bool cs, bool clock, bool data)
454	454	{
455		sc4_state *state = machine.driver_data<sc4_state>();
	455	bfm_sc45_state *state = machine.driver_data<bfm_sc45_state>();
456	456
457	457	// if we're turned on
458	458	if ( cs )
r22649	r22650
555	555	// serial output to the VFD at least..
556	556	logerror("%08x bfm_sc4_68307_portb_w %04x %04x\n", pc, data, line_mask);
557	557
558		bfm_sc4_write_serial_vfd(space.machine(), (data & 0x4000)?1:0, (data & 0x1000)?1:0, !(data & 0x2000)?1:0);
	558	bfm_sc45_write_serial_vfd(space.machine(), (data & 0x4000)?1:0, (data & 0x1000)?1:0, !(data & 0x2000)?1:0);
559	559
560	560	bfm_sc4_reel3_w(space, 0, (data&0x0f00)>>8, 0xff);
561	561	}

trunk/src/mame/drivers/bfm_sc5.c

r22649	r22650
10	10
11	11
12	12	#include "emu.h"
	13
13	14	#include "includes/bfm_sc5.h"
	15
	16
14	17	#include "machine/mcf5206e.h"
15	18	#include "bfm_sc5.lh"
16	19	#include "video/awpvid.h"
17	20
18	21
19	22
20		void bfm_sc5_reset_serial_vfd(running_machine &machine)
	23	WRITE16_MEMBER( bfm_sc5_state::sc5_duart_w )
21	24	{
22		bfm_sc5_state *state = machine.driver_data<bfm_sc5_state>();
	25	// clearly a duart of some kind, write patterns are the same as SC4 games
	26	//   printf("%s: duart_w %1x %04x %04x\n", machine().describe_context(), offset, data, mem_mask);
23	27
24		state->m_vfd0->reset();
25		state->vfd_old_clock = false;
26		}
27
28		void bfm_sc5_write_serial_vfd(running_machine &machine, bool cs, bool clock, bool data)
29		{
30		bfm_sc5_state *state = machine.driver_data<bfm_sc5_state>();
31
32		// if we're turned on
33		if ( cs )
	28	if (mem_mask &0xff00)
34	29	{
35		if ( !state->vfd_enabled )
36		{
37		bfm_sc5_reset_serial_vfd(machine);
38		state->vfd_old_clock = clock;
39		state->vfd_enabled = true;
40		}
41		else
42		{
43		// if the clock line changes
44		if ( clock != state->vfd_old_clock )
45		{
46		if ( !clock )
47		{
48		//Should move to the internal serial process when DM01 is device-ified
49		//                  m_vfd0->shift_data(!data);
50		state->vfd_ser_value <<= 1;
51		if (data) state->vfd_ser_value |= 1;
52
53		state->vfd_ser_count++;
54		if ( state->vfd_ser_count == 8 )
55		{
56		state->vfd_ser_count = 0;
57		//   if (machine.device("matrix"))
58		//   {
59		//      BFM_dm01_writedata(machine,state->vfd_ser_value);
60		//   }
61		//   else
62		{
63		state->m_vfd0->write_char(state->vfd_ser_value);
64		}
65		}
66		}
67		state->vfd_old_clock = clock;
68		}
69		}
	30	duart68681_w(m_duart,space,offset,(data>>8)&0x00ff);
70	31	}
71	32	else
72	33	{
73		state->vfd_enabled = false;
	34	logerror("%s: duart_w %1x %04x %04x\n", machine().describe_context(), offset, data, mem_mask);
74	35	}
	36
75	37	}
76	38
77
78	39	static ADDRESS_MAP_START( sc5_map, AS_PROGRAM, 32, bfm_sc5_state )
79	40	// ROM (max size?)
80	41	AM_RANGE(0x00000000, 0x002fffff) AM_ROM
81	42	// ?
82	43	AM_RANGE(0x01000000, 0x0100ffff) AM_RAM
83	44
	45	#if 1
84	46	// dev1
85		AM_RANGE(0x01010000, 0x01010003) AM_NOP
86		AM_RANGE(0x01010010, 0x01010013) AM_NOP
87		AM_RANGE(0x01010020, 0x01010023) AM_NOP
88		AM_RANGE(0x01010030, 0x01010033) AM_NOP
89		AM_RANGE(0x01010040, 0x01010043) AM_NOP
90		AM_RANGE(0x01010050, 0x01010053) AM_NOP
91		AM_RANGE(0x01010060, 0x01010063) AM_NOP
92		AM_RANGE(0x01010070, 0x01010073) AM_NOP
93		AM_RANGE(0x01010080, 0x01010083) AM_NOP
94		AM_RANGE(0x01010090, 0x01010093) AM_NOP
95		AM_RANGE(0x010100a0, 0x010100a3) AM_NOP
96		AM_RANGE(0x010100b0, 0x010100b3) AM_NOP
97		AM_RANGE(0x010100c0, 0x010100c3) AM_NOP
98		AM_RANGE(0x010100d0, 0x010100d3) AM_NOP
99		AM_RANGE(0x010100e0, 0x010100e3) AM_NOP
100		AM_RANGE(0x010100f0, 0x010100f3) AM_NOP
101		AM_RANGE(0x01010100, 0x01010103) AM_NOP
102		AM_RANGE(0x01010110, 0x01010113) AM_NOP
103		AM_RANGE(0x01010120, 0x01010123) AM_NOP
104		AM_RANGE(0x01010130, 0x01010133) AM_NOP
105		AM_RANGE(0x01010140, 0x01010143) AM_NOP
106		AM_RANGE(0x01010150, 0x01010153) AM_NOP
107		AM_RANGE(0x01010160, 0x01010163) AM_NOP
108		AM_RANGE(0x01010170, 0x01010173) AM_NOP
109		AM_RANGE(0x01010180, 0x01010183) AM_NOP
110		AM_RANGE(0x01010190, 0x01010193) AM_NOP
111		AM_RANGE(0x010101a0, 0x010101a3) AM_NOP
112		AM_RANGE(0x010101b0, 0x010101b3) AM_NOP
113		AM_RANGE(0x010101c0, 0x010101c3) AM_NOP
114		AM_RANGE(0x010101d0, 0x010101d3) AM_NOP
115		AM_RANGE(0x010101e0, 0x010101e3) AM_NOP
116		AM_RANGE(0x010101f0, 0x010101f3) AM_NOP
117		AM_RANGE(0x01010200, 0x01010203) AM_NOP
118		AM_RANGE(0x01010210, 0x01010213) AM_NOP
119		AM_RANGE(0x01010220, 0x01010223) AM_NOP
120		AM_RANGE(0x01010230, 0x01010233) AM_NOP
	47	AM_RANGE(0x01010000, 0x01010003) AM_WRITENOP
	48	AM_RANGE(0x01010010, 0x01010013) AM_WRITENOP
	49	AM_RANGE(0x01010020, 0x01010023) AM_WRITENOP
	50	AM_RANGE(0x01010030, 0x01010033) AM_WRITENOP
	51	AM_RANGE(0x01010040, 0x01010043) AM_WRITENOP
	52	AM_RANGE(0x01010050, 0x01010053) AM_WRITENOP
	53	AM_RANGE(0x01010060, 0x01010063) AM_WRITENOP
	54	AM_RANGE(0x01010070, 0x01010073) AM_WRITENOP
	55	AM_RANGE(0x01010080, 0x01010083) AM_WRITENOP
	56	AM_RANGE(0x01010090, 0x01010093) AM_WRITENOP
	57	AM_RANGE(0x010100a0, 0x010100a3) AM_WRITENOP
	58	AM_RANGE(0x010100b0, 0x010100b3) AM_WRITENOP
	59	AM_RANGE(0x010100c0, 0x010100c3) AM_WRITENOP
	60	AM_RANGE(0x010100d0, 0x010100d3) AM_WRITENOP
	61	AM_RANGE(0x010100e0, 0x010100e3) AM_WRITENOP
	62	AM_RANGE(0x010100f0, 0x010100f3) AM_WRITENOP
	63	AM_RANGE(0x01010100, 0x01010103) AM_WRITENOP
	64	AM_RANGE(0x01010110, 0x01010113) AM_WRITENOP
	65	AM_RANGE(0x01010120, 0x01010123) AM_WRITENOP
	66	AM_RANGE(0x01010130, 0x01010133) AM_WRITENOP
	67	AM_RANGE(0x01010140, 0x01010143) AM_WRITENOP
	68	AM_RANGE(0x01010150, 0x01010153) AM_WRITENOP
	69	AM_RANGE(0x01010160, 0x01010163) AM_WRITENOP
	70	AM_RANGE(0x01010170, 0x01010173) AM_WRITENOP
	71	AM_RANGE(0x01010180, 0x01010183) AM_WRITENOP
	72	AM_RANGE(0x01010190, 0x01010193) AM_WRITENOP
	73	AM_RANGE(0x010101a0, 0x010101a3) AM_WRITENOP
	74	AM_RANGE(0x010101b0, 0x010101b3) AM_WRITENOP
	75	AM_RANGE(0x010101c0, 0x010101c3) AM_WRITENOP
	76	AM_RANGE(0x010101d0, 0x010101d3) AM_WRITENOP
	77	AM_RANGE(0x010101e0, 0x010101e3) AM_WRITENOP
	78	AM_RANGE(0x010101f0, 0x010101f3) AM_WRITENOP
	79	AM_RANGE(0x01010200, 0x01010203) AM_WRITENOP
	80	AM_RANGE(0x01010210, 0x01010213) AM_WRITENOP
	81	AM_RANGE(0x01010220, 0x01010223) AM_WRITENOP
	82	AM_RANGE(0x01010230, 0x01010233) AM_WRITENOP
121	83
122		AM_RANGE(0x01010280, 0x01010283) AM_NOP
	84	AM_RANGE(0x01010280, 0x01010283) AM_WRITENOP
123	85
124		AM_RANGE(0x010102a0, 0x010102a3) AM_NOP
	86	AM_RANGE(0x010102a0, 0x010102a3) AM_WRITENOP
125	87
126		AM_RANGE(0x010102c0, 0x010102c3) AM_NOP
	88	AM_RANGE(0x010102c0, 0x010102c3) AM_WRITENOP
127	89
128		AM_RANGE(0x010102f0, 0x010102f3) AM_NOP
	90	AM_RANGE(0x010102f0, 0x010102f3) AM_WRITENOP
129	91
130		AM_RANGE(0x01010300, 0x01010303) AM_NOP
	92	AM_RANGE(0x01010300, 0x01010303) AM_WRITENOP
131	93
132		AM_RANGE(0x01010330, 0x01010333) AM_NOP
	94	AM_RANGE(0x01010330, 0x01010333) AM_WRITENOP
133	95
134		AM_RANGE(0x01010360, 0x01010363) AM_NOP
	96	AM_RANGE(0x01010360, 0x01010363) AM_WRITENOP
135	97
136		AM_RANGE(0x01010380, 0x01010383) AM_NOP
137		AM_RANGE(0x01010390, 0x01010393) AM_NOP
	98	AM_RANGE(0x01010380, 0x01010383) AM_WRITENOP
	99	AM_RANGE(0x01010390, 0x01010393) AM_WRITENOP
138	100
139	101	// dev2
140		AM_RANGE(0x01020000, 0x01020003) AM_NOP
141		AM_RANGE(0x01020010, 0x01020013) AM_NOP
142		AM_RANGE(0x01020020, 0x01020023) AM_NOP
143		AM_RANGE(0x01020030, 0x01020033) AM_NOP
144		AM_RANGE(0x01020040, 0x01020043) AM_NOP
145		AM_RANGE(0x01020050, 0x01020053) AM_NOP
146		AM_RANGE(0x01020060, 0x01020063) AM_NOP
147		AM_RANGE(0x01020070, 0x01020073) AM_NOP
148		AM_RANGE(0x01020080, 0x01020083) AM_NOP
149		AM_RANGE(0x01020090, 0x01020093) AM_NOP
150		AM_RANGE(0x010200a0, 0x010200a3) AM_NOP
151		AM_RANGE(0x010200b0, 0x010200b3) AM_NOP
152		AM_RANGE(0x010200c0, 0x010200c3) AM_NOP
153		AM_RANGE(0x010200d0, 0x010200d3) AM_NOP
154		AM_RANGE(0x010200e0, 0x010200e3) AM_NOP
155		AM_RANGE(0x010200f0, 0x010200f3) AM_NOP
156		AM_RANGE(0x01020100, 0x01020103) AM_NOP
157		AM_RANGE(0x01020110, 0x01020113) AM_NOP
158		AM_RANGE(0x01020120, 0x01020123) AM_NOP
159		AM_RANGE(0x01020130, 0x01020133) AM_NOP
160		AM_RANGE(0x01020140, 0x01020143) AM_NOP
161		AM_RANGE(0x01020150, 0x01020153) AM_NOP
162		AM_RANGE(0x01020160, 0x01020163) AM_NOP
163		AM_RANGE(0x01020170, 0x01020173) AM_NOP
164		AM_RANGE(0x01020180, 0x01020183) AM_NOP
165		AM_RANGE(0x01020190, 0x01020193) AM_NOP
166		AM_RANGE(0x010201a0, 0x010201a3) AM_NOP
167		AM_RANGE(0x010201b0, 0x010201b3) AM_NOP
168		AM_RANGE(0x010201c0, 0x010201c3) AM_NOP
169		AM_RANGE(0x010201d0, 0x010201d3) AM_NOP
170		AM_RANGE(0x010201e0, 0x010201e3) AM_NOP
171		AM_RANGE(0x010201f0, 0x010201f3) AM_NOP
172		AM_RANGE(0x01020200, 0x01020203) AM_NOP
173		AM_RANGE(0x01020210, 0x01020213) AM_NOP
174		AM_RANGE(0x01020220, 0x01020223) AM_NOP
175		AM_RANGE(0x01020230, 0x01020233) AM_NOP
	102	AM_RANGE(0x01020000, 0x01020003) AM_WRITENOP
	103	AM_RANGE(0x01020010, 0x01020013) AM_WRITENOP
	104	AM_RANGE(0x01020020, 0x01020023) AM_WRITENOP
	105	AM_RANGE(0x01020030, 0x01020033) AM_WRITENOP
	106	AM_RANGE(0x01020040, 0x01020043) AM_WRITENOP
	107	AM_RANGE(0x01020050, 0x01020053) AM_WRITENOP
	108	AM_RANGE(0x01020060, 0x01020063) AM_WRITENOP
	109	AM_RANGE(0x01020070, 0x01020073) AM_WRITENOP
	110	AM_RANGE(0x01020080, 0x01020083) AM_WRITENOP
	111	AM_RANGE(0x01020090, 0x01020093) AM_WRITENOP
	112	AM_RANGE(0x010200a0, 0x010200a3) AM_WRITENOP
	113	AM_RANGE(0x010200b0, 0x010200b3) AM_WRITENOP
	114	AM_RANGE(0x010200c0, 0x010200c3) AM_WRITENOP
	115	AM_RANGE(0x010200d0, 0x010200d3) AM_WRITENOP
	116	AM_RANGE(0x010200e0, 0x010200e3) AM_WRITENOP
	117	AM_RANGE(0x010200f0, 0x010200f3) AM_WRITENOP
	118	AM_RANGE(0x01020100, 0x01020103) AM_WRITENOP
	119	AM_RANGE(0x01020110, 0x01020113) AM_WRITENOP
	120	AM_RANGE(0x01020120, 0x01020123) AM_WRITENOP
	121	AM_RANGE(0x01020130, 0x01020133) AM_WRITENOP
	122	AM_RANGE(0x01020140, 0x01020143) AM_WRITENOP
	123	AM_RANGE(0x01020150, 0x01020153) AM_WRITENOP
	124	AM_RANGE(0x01020160, 0x01020163) AM_WRITENOP
	125	AM_RANGE(0x01020170, 0x01020173) AM_WRITENOP
	126	AM_RANGE(0x01020180, 0x01020183) AM_WRITENOP
	127	AM_RANGE(0x01020190, 0x01020193) AM_WRITENOP
	128	AM_RANGE(0x010201a0, 0x010201a3) AM_WRITENOP
	129	AM_RANGE(0x010201b0, 0x010201b3) AM_WRITENOP
	130	AM_RANGE(0x010201c0, 0x010201c3) AM_WRITENOP
	131	AM_RANGE(0x010201d0, 0x010201d3) AM_WRITENOP
	132	AM_RANGE(0x010201e0, 0x010201e3) AM_WRITENOP
	133	AM_RANGE(0x010201f0, 0x010201f3) AM_WRITENOP
	134	AM_RANGE(0x01020200, 0x01020203) AM_WRITENOP
	135	AM_RANGE(0x01020210, 0x01020213) AM_WRITENOP
	136	AM_RANGE(0x01020220, 0x01020223) AM_WRITENOP
	137	AM_RANGE(0x01020230, 0x01020233) AM_WRITENOP
176	138
177		AM_RANGE(0x01020280, 0x01020283) AM_NOP
	139	AM_RANGE(0x01020280, 0x01020283) AM_WRITENOP
178	140
179		AM_RANGE(0x010202a0, 0x010202a3) AM_NOP
180		AM_RANGE(0x010202b0, 0x010202b3) AM_NOP
181		AM_RANGE(0x010202c0, 0x010202c3) AM_NOP
182
	141	AM_RANGE(0x010202a0, 0x010202a3) AM_WRITENOP
	142	AM_RANGE(0x010202b0, 0x010202b3) AM_WRITENOP
	143	AM_RANGE(0x010202c0, 0x010202c3) AM_WRITENOP
	144	#endif
183	145	AM_RANGE(0x010202F0, 0x010202F3) AM_READWRITE8(sc5_10202F0_r, sc5_10202F0_w, 0xffffffff)
184
185		AM_RANGE(0x01020330, 0x01020333) AM_NOP
	146	#if 1
	147	AM_RANGE(0x01020330, 0x01020333) AM_WRITENOP
186	148
187		AM_RANGE(0x01020350, 0x01020353) AM_NOP
188		AM_RANGE(0x01020360, 0x01020363) AM_NOP
189		AM_RANGE(0x01020370, 0x01020373) AM_NOP
	149	AM_RANGE(0x01020350, 0x01020353) AM_WRITENOP
	150	AM_RANGE(0x01020360, 0x01020363) AM_WRITENOP
	151	AM_RANGE(0x01020370, 0x01020373) AM_WRITENOP
190	152
191		AM_RANGE(0x01020390, 0x01020393) AM_NOP
	153	AM_RANGE(0x01020390, 0x01020393) AM_WRITENOP
	154	#endif
	155	AM_RANGE(0x02000000, 0x0200001f) AM_WRITE16(sc5_duart_w, 0xffffffff)
	156
192	157	// ram
193	158	AM_RANGE(0x40000000, 0x4000ffff) AM_RAM
194	159
r22649	r22650
208	173	case 0x2:
209	174	case 0x3:
210	175	printf("%s: sc5_10202F0_r %d\n", machine().describe_context(), offset);
211		return 0x00;
	176	return 0xff;
212	177	}
213	178
214	179	return 0;
r22649	r22650
219	184	switch (offset)
220	185	{
221	186	case 0x0:
222		bfm_sc5_write_serial_vfd(machine(), (data &0x4)?1:0, (data &0x1)?1:0, (data&0x2) ? 0:1);
	187	bfm_sc45_write_serial_vfd(machine(), (data &0x4)?1:0, (data &0x1)?1:0, (data&0x2) ? 0:1);
223	188	if (data&0xf8) printf("%s: sc5_10202F0_w %d - %02x\n", machine().describe_context(), offset, data);
224	189	break;
225	190	case 0x1:
r22649	r22650
243	208	};
244	209
245	210
	211
	212	void bfm_sc5_duart_irq_handler(device_t *device, int state, UINT8 vector)
	213	{
	214	printf("bfm_sc5_duart_irq_handler\n");
	215	};
	216
	217	void bfm_sc5_duart_tx(device_t *device, int channel, UINT8 data)
	218	{
	219	logerror("bfm_sc5_duart_tx\n");
	220	};
	221
	222
	223
	224	UINT8 bfm_sc5_duart_input_r(device_t *device)
	225	{
	226	//bfm_sc5_state *state = device->machine().driver_data<bfm_sc5_state>();
	227	printf("bfm_sc5_duart_input_r\n");
	228	return 0xff;
	229	}
	230
	231	void bfm_sc5_duart_output_w(device_t *device, UINT8 data)
	232	{
	233	logerror("bfm_sc5_duart_output_w\n");
	234	}
	235
	236
	237	static const duart68681_config bfm_sc5_duart68681_config =
	238	{
	239	bfm_sc5_duart_irq_handler,
	240	bfm_sc5_duart_tx,
	241	bfm_sc5_duart_input_r,
	242	bfm_sc5_duart_output_w,
	243	// TODO: What are the actual frequencies?
	244	16000000/2/8,     /* IP2/RxCB clock */
	245	16000000/2/16,    /* IP3/TxCA clock */
	246	16000000/2/16,    /* IP4/RxCA clock */
	247	16000000/2/8,     /* IP5/TxCB clock */
	248	};
	249
	250
246	251	MACHINE_CONFIG_START( bfm_sc5, bfm_sc5_state )
247	252	MCFG_CPU_ADD("maincpu", MCF5206E, 40000000) /* MCF5206eFT */
248	253	MCFG_CPU_PROGRAM_MAP(sc5_map)
r22649	r22650
251	256	/* sound hardware */
252	257	MCFG_SPEAKER_STANDARD_MONO("mono")
253	258
	259	MCFG_DUART68681_ADD("duart68681", 16000000/4, bfm_sc5_duart68681_config) // ?? Mhz
	260
	261
254	262	MCFG_BFMBDA_ADD("vfd0",0)
255	263
256	264	MCFG_DEFAULT_LAYOUT(layout_bfm_sc5)

trunk/src/emu/machine/mcf5206e.c

r22649	r22650
8	8	//#define debuglog printf
9	9	#define debuglog logerror
10	10
	11	#define invalidlog printf
	12	//#define invalidlog logerror
	13
	14
11	15	static ADDRESS_MAP_START( coldfire_regs_map, AS_0, 32, mcf5206e_peripheral_device )
12	16
13	17
r22649	r22650
170	174	case 1:
171	175	case 2:
172	176	case 3:
173		debuglog("%s: invalid ICR13_r %d\n", this->machine().describe_context(), offset);
	177	invalidlog("%s: invalid ICR13_r %d\n", this->machine().describe_context(), offset);
174	178	return 0;
175	179	}
176	180
r22649	r22650
189	193	case 1:
190	194	case 2:
191	195	case 3:
192		debuglog("%s: invalid ICR13_w %d, %02x\n", this->machine().describe_context(), offset, data);
	196	invalidlog("%s: invalid ICR13_w %d, %02x\n", this->machine().describe_context(), offset, data);
193	197	break;
194	198	}
195	199	}
r22649	r22650
204	208	}
205	209	else
206	210	{
207		debuglog("%s: invalid CSAR%d_r with offset %d\n", this->machine().describe_context(), which, offset);
	211	invalidlog("%s: invalid CSAR%d_r with offset %d\n", this->machine().describe_context(), which, offset);
208	212	return 0;
209	213	}
210	214	}
r22649	r22650
218	222	}
219	223	else
220	224	{
221		debuglog("%s: invalid CSAR%d_w with offset %d %04x\n", this->machine().describe_context(), which, offset, data);
	225	invalidlog("%s: invalid CSAR%d_w with offset %d %04x\n", this->machine().describe_context(), which, offset, data);
222	226	}
223	227	}
224	228
r22649	r22650
243	247	}
244	248	else
245	249	{
246		debuglog("%s: invalid CSCR%d_r with offset %d\n", this->machine().describe_context(), which, offset);
	250	invalidlog("%s: invalid CSCR%d_r with offset %d\n", this->machine().describe_context(), which, offset);
247	251	return 0;
248	252	}
249	253	}
r22649	r22650
257	261	}
258	262	else
259	263	{
260		debuglog("%s: invalid CSCR%d_r with offset %d %04x\n", this->machine().describe_context(), which, offset, data);
	264	invalidlog("%s: invalid CSCR%d_r with offset %d %04x\n", this->machine().describe_context(), which, offset, data);
261	265	}
262	266	}
263	267
r22649	r22650
331	335	debuglog("%s: DMCR_r %04x\n", this->machine().describe_context(), mem_mask);
332	336	return m_DMCR;
333	337	case 0:
334		debuglog("%s: invalid DMCR_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
	338	invalidlog("%s: invalid DMCR_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
335	339	return 0;
336	340	}
337	341
r22649	r22650
347	351	debuglog("%s: DMCR_w %04x %04x\n", this->machine().describe_context(), data, mem_mask);
348	352	break;
349	353	case 0:
350		debuglog("%s: invalid DMCR_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
	354	invalidlog("%s: invalid DMCR_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
351	355	break;
352	356
353	357	}
r22649	r22650
362	366	debuglog("%s: PAR_r %04x\n", this->machine().describe_context(), mem_mask);
363	367	return m_PAR;
364	368	case 0:
365		debuglog("%s: invalid PAR_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
	369	invalidlog("%s: invalid PAR_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
366	370	return 0;
367	371	}
368	372
r22649	r22650
378	382	debuglog("%s: PAR_w %04x %04x\n", this->machine().describe_context(), data, mem_mask);
379	383	break;
380	384	case 0:
381		debuglog("%s: invalid PAR_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
	385	invalidlog("%s: invalid PAR_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
382	386	break;
383	387
384	388	}
r22649	r22650
393	397	case 0:
394	398	case 2:
395	399	case 3:
396		debuglog("%s: invalid PPDDR_r %d\n", this->machine().describe_context(), offset);
	400	invalidlog("%s: invalid PPDDR_r %d\n", this->machine().describe_context(), offset);
397	401	return 0;
398	402	case 1: // '$1C5'
399	403	debuglog("%s: PPDDR_r\n", this->machine().describe_context());
r22649	r22650
410	414	case 0:
411	415	case 2:
412	416	case 3:
413		debuglog("%s: invalid PPDDR_w %d %02x\n", this->machine().describe_context(), offset, data);
	417	invalidlog("%s: invalid PPDDR_w %d %02x\n", this->machine().describe_context(), offset, data);
414	418	break;
415	419	case 1: // '$1C5'
416	420	m_PPDDR = data;
r22649	r22650
426	430	case 0:
427	431	case 2:
428	432	case 3:
429		debuglog("%s: invalid PPDAT_r %d\n", this->machine().describe_context(), offset);
	433	invalidlog("%s: invalid PPDAT_r %d\n", this->machine().describe_context(), offset);
430	434	return 0;
431	435	case 1: // '$1C9'
432	436	debuglog("%s: PPDAT_r\n", this->machine().describe_context());
r22649	r22650
443	447	case 0:
444	448	case 2:
445	449	case 3:
446		debuglog("%s: invalid PPDAT_w %d, %02x\n", this->machine().describe_context(), offset, data);
	450	invalidlog("%s: invalid PPDAT_w %d, %02x\n", this->machine().describe_context(), offset, data);
447	451	break;
448	452	case 1: // '$1C9'
449	453	m_PPDAT = data; // should use a callback.
r22649	r22650
464	468	case 1:
465	469	case 2:
466	470	case 3:
467		debuglog("%s: invalid MBCR_r %d\n", this->machine().describe_context(), offset);
	471	invalidlog("%s: invalid MBCR_r %d\n", this->machine().describe_context(), offset);
468	472	return 0;
469	473	}
470	474
r22649	r22650
482	486	case 1:
483	487	case 2:
484	488	case 3:
485		debuglog("%s: invalid MBCR_w %d, %02x\n", this->machine().describe_context(), offset, data);
	489	invalidlog("%s: invalid MBCR_w %d, %02x\n", this->machine().describe_context(), offset, data);
486	490	break;
487	491
488	492	}
r22649	r22650
498	502	case 1:
499	503	case 2:
500	504	case 3:
501		debuglog("%s: invalid MFDR_r %d\n", this->machine().describe_context(), offset);
	505	invalidlog("%s: invalid MFDR_r %d\n", this->machine().describe_context(), offset);
502	506	return 0;
503	507	}
504	508
r22649	r22650
516	520	case 1:
517	521	case 2:
518	522	case 3:
519		debuglog("%s: invalid MFDR_w %d, %02x\n", this->machine().describe_context(), offset, data);
	523	invalidlog("%s: invalid MFDR_w %d, %02x\n", this->machine().describe_context(), offset, data);
520	524	break;
521	525
522	526	}
r22649	r22650
542	546	case 1:
543	547	case 2:
544	548	case 3:
545		debuglog("%s: invalid MBSR_r %d\n", this->machine().describe_context(), offset);
	549	invalidlog("%s: invalid MBSR_r %d\n", this->machine().describe_context(), offset);
546	550	return 0;
547	551	}
548	552
r22649	r22650
560	564	case 1:
561	565	case 2:
562	566	case 3:
563		debuglog("%s: invalid MBSR_w %d, %02x\n", this->machine().describe_context(), offset, data);
	567	invalidlog("%s: invalid MBSR_w %d, %02x\n", this->machine().describe_context(), offset, data);
564	568	break;
565	569
566	570	}
r22649	r22650
584	588	case 1:
585	589	case 2:
586	590	case 3:
587		debuglog("%s: invalid MBDR_r %d\n", this->machine().describe_context(), offset);
	591	invalidlog("%s: invalid MBDR_r %d\n", this->machine().describe_context(), offset);
588	592	return 0;
589	593	}
590	594
r22649	r22650
602	606	case 1:
603	607	case 2:
604	608	case 3:
605		debuglog("%s: invalid MBDR_w %d, %02x\n", this->machine().describe_context(), offset, data);
	609	invalidlog("%s: invalid MBDR_w %d, %02x\n", this->machine().describe_context(), offset, data);
606	610	break;
607	611
608	612	}
r22649	r22650
618	622	debuglog("%s: IMR_r %04x\n", this->machine().describe_context(), mem_mask);
619	623	return m_IMR;
620	624	case 0:
621		debuglog("%s: invalid IMR_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
	625	invalidlog("%s: invalid IMR_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
622	626	return 0;
623	627	}
624	628
r22649	r22650
634	638	debuglog("%s: IMR_w %04x %04x\n", this->machine().describe_context(), data, mem_mask);
635	639	break;
636	640	case 0:
637		debuglog("%s: invalid IMR_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
	641	invalidlog("%s: invalid IMR_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
638	642	break;
639	643
640	644	}
r22649	r22650
662	666
663	667	debuglog("timer1_callback\n");
664	668
665		timer1->adjust(attotime::from_msec(100)); // completely made up value just to fire our timers for now
	669	timer1->adjust(attotime::from_msec(10)); // completely made up value just to fire our timers for now
666	670	}
667	671
668	672
r22649	r22650
674	678	debuglog("%s: TMR1_r %04x\n", this->machine().describe_context(), mem_mask);
675	679	return m_TMR1;
676	680	case 1:
677		debuglog("%s: invalid TMR1_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
	681	invalidlog("%s: invalid TMR1_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
678	682	return 0;
679	683	}
680	684
r22649	r22650
689	693	COMBINE_DATA(&m_TMR1);
690	694	debuglog("%s: TMR1_w %04x %04x\n", this->machine().describe_context(), data, mem_mask);
691	695
692		debuglog("   (Prescale) PS : %02x  (Capture Edge/Interrupt) CE : %01x (Output Mode) OM : %01x  (Output Reference Interrupt En) ORI : %01x   Free Run (FRR) : %01x  Input Clock Source (ICLK) : %01x  (Reset Timer) RST : %01x  \n",
693		(m_TMR1 & 0xff00)>>8, (m_TMR1 & 0x00c0)>>6,  (m_TMR1 & 0x0020)>>5, (m_TMR1 & 0x0010)>>4, (m_TMR1 & 0x0008)>>3, (m_TMR1 & 0x0006)>>1, (m_TMR1 & 0x0001)>>0);
	696	debuglog("   (Prescale) PS : %02x  (Capture Edge/Interrupt) CE : %01x (Output Mode) OM : %01x  (Output Reference Interrupt En) ORI : %01x   Free Run (FRR) : %01x  Input Clock Source (ICLK) : %01x  (Reset Timer) RST : %01x  \n", (m_TMR1 & 0xff00)>>8, (m_TMR1 & 0x00c0)>>6,  (m_TMR1 & 0x0020)>>5, (m_TMR1 & 0x0010)>>4, (m_TMR1 & 0x0008)>>3, (m_TMR1 & 0x0006)>>1, (m_TMR1 & 0x0001)>>0);
694	697
695	698	if (m_TMR1 & 0x0001)
696	699	{
r22649	r22650
704	707
705	708	break;
706	709	case 1:
707		debuglog("%s: invalid TMR1_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
	710	invalidlog("%s: invalid TMR1_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
708	711	break;
709	712
710	713	}
r22649	r22650
718	721	debuglog("%s: TRR1_r %04x\n", this->machine().describe_context(), mem_mask);
719	722	return m_TRR1;
720	723	case 1:
721		debuglog("%s: invalid TRR1_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
	724	invalidlog("%s: invalid TRR1_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
722	725	return 0;
723	726	}
724	727
r22649	r22650
752	755	case 0:
753	756	case 2:
754	757	case 3:
755		debuglog("%s: invalid TER1_r %d\n", this->machine().describe_context(), offset);
	758	invalidlog("%s: invalid TER1_r %d\n", this->machine().describe_context(), offset);
756	759	return 0;
757	760	}
758	761
r22649	r22650
770	773	case 0:
771	774	case 2:
772	775	case 3:
773		debuglog("%s: invalid TER1_w %d, %02x\n", this->machine().describe_context(), offset, data);
	776	invalidlog("%s: invalid TER1_w %d, %02x\n", this->machine().describe_context(), offset, data);
774	777	break;
775	778
776	779	}
r22649	r22650
784	787	debuglog("%s: TCN1_r %04x\n", this->machine().describe_context(), mem_mask);
785	788	return 0x8ca0 -1;// m_TCN1; // this should be the counter, code has a hardcoded >= check against 8ca0.
786	789	case 1:
787		debuglog("%s: invalid TCN1_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
	790	invalidlog("%s: invalid TCN1_r %d %04x\n", this->machine().describe_context(), offset, mem_mask);
788	791	return 0;
789	792	}
790	793
r22649	r22650
800	803	debuglog("%s: TCN1_w %04x %04x\n", this->machine().describe_context(), data, mem_mask);
801	804	break;
802	805	case 1:
803		debuglog("%s: invalid TCN1_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
	806	invalidlog("%s: invalid TCN1_w %d, %04x %04x\n", this->machine().describe_context(), offset, data, mem_mask);
804	807	break;
805	808
806	809	}

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