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r22091 Monday 25th March, 2013 at 18:51:16 UTC by Angelo Salese
Added RAM-based BASIC bankswitch, improved floppy code, added mon_r(). SIS acts (again) weird on this, and no DRQ is fetched afterwards.
[src/emu/imagedev]floppy.h
[src/mess/drivers]mz3500.c

trunk/src/emu/imagedev/floppy.h
r22090r22091
9898   int dskchg_r() { return dskchg; }
9999   bool trk00_r() { return cyl != 0; }
100100   int idx_r() { return idx; }
101   int mon_r() { return mon; }
101102   bool ss_r() { return ss; }
102103   bool twosid_r();
103104
trunk/src/mess/drivers/mz3500.c
r22090r22091
8181   DECLARE_WRITE8_MEMBER(mz3500_crtc_w);
8282   DECLARE_READ8_MEMBER(mz3500_fdc_r);
8383   DECLARE_WRITE8_MEMBER(mz3500_fdc_w);
84   DECLARE_READ8_MEMBER(mz3500_fdc_dma_r);
8485   DECLARE_WRITE8_MEMBER(mz3500_pa_w);
8586   DECLARE_WRITE8_MEMBER(mz3500_pb_w);
8687   DECLARE_WRITE8_MEMBER(mz3500_pc_w);
r22090r22091
331332
332333      printf("Error: read with unmapped memory bank offset %04x MS %02x MA %02x MO %02x\n",offset,m_ms,m_ma,m_mo);
333334   }
335   else if (m_ms == 3) // RAM based BASIC
336   {
337      if((offset & 0xe000) == 0x0000) { return mz3500_work_ram_r(space,offset & 0x1fff); }
338      if((offset & 0xe000) == 0x2000)
339      {
340         switch(m_mo)
341         {
342            case 0x0: return mz3500_work_ram_r(space,(offset & 0x1fff) | 0x2000);
343            case 0x1: return mz3500_work_ram_r(space,(offset & 0x1fff) | 0xc000);
344            case 0x2: return mz3500_work_ram_r(space,(offset & 0x1fff) | 0xe000);
345         }
334346
335   return 0xff;
347         printf("Error: read with unmapped memory bank offset %04x MS %02x MO %02x\n",offset,m_ms,m_mo);
348      }
349      if((offset & 0xc000) == 0x4000) { return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x4000); }
350      if((offset & 0xc000) == 0x8000) { return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x8000); }
351      if((offset & 0xc000) == 0xc000)
352      {
353         switch(m_ma)
354         {
355            case 0x0: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x10000);
356            case 0x1: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x14000);
357            case 0x2: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x18000);
358            case 0x3: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x1c000);
359            case 0x4: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x20000);
360            case 0x5: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x24000);
361            case 0x6: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x28000);
362            case 0x7: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x2c000);
363            case 0x8: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x30000);
364            case 0x9: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x34000);
365            case 0xa: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x38000);
366            case 0xb: return mz3500_work_ram_r(space,(offset & 0x3fff) | 0x3c000);
367            case 0xf: return mz3500_shared_ram_r(space,(offset & 0x7ff));
368         }
369      }
370   }
371
372
373   return 0xff; // shouldn't happen
336374}
337375
338376WRITE8_MEMBER(mz3500_state::mz3500_master_mem_w)
r22090r22091
387425
388426      printf("Error: write with unmapped memory bank offset %04x data %02x MS %02x MA %02x\n",offset,data,m_ms,m_ma);
389427   }
428   else if (m_ms == 3) // RAM based BASIC
429   {
430      if((offset & 0xe000) == 0x0000) { mz3500_work_ram_w(space,offset & 0x1fff,data); return; }
431      if((offset & 0xe000) == 0x2000)
432      {
433         switch(m_mo)
434         {
435            case 0x0: mz3500_work_ram_w(space,(offset & 0x1fff) | 0x2000,data); return;
436            case 0x1: mz3500_work_ram_w(space,(offset & 0x1fff) | 0xc000,data); return;
437            case 0x2: mz3500_work_ram_w(space,(offset & 0x1fff) | 0xe000,data); return;
438         }
390439
440         printf("Error: read with unmapped memory bank offset %04x MS %02x MO %02x\n",offset,m_ms,m_mo);
441      }
442      if((offset & 0xc000) == 0x4000) { mz3500_work_ram_w(space,(offset & 0x3fff) | 0x4000,data); return; }
443      if((offset & 0xc000) == 0x8000) { mz3500_work_ram_w(space,(offset & 0x3fff) | 0x8000,data); return; }
444      if((offset & 0xc000) == 0xc000)
445      {
446         switch(m_ma)
447         {
448            case 0x0: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x10000,data); return;
449            case 0x1: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x14000,data); return;
450            case 0x2: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x18000,data); return;
451            case 0x3: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x1c000,data); return;
452            case 0x4: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x20000,data); return;
453            case 0x5: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x24000,data); return;
454            case 0x6: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x28000,data); return;
455            case 0x7: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x2c000,data); return;
456            case 0x8: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x30000,data); return;
457            case 0x9: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x34000,data); return;
458            case 0xa: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x38000,data); return;
459            case 0xb: mz3500_work_ram_w(space,(offset & 0x3fff) | 0x3c000,data); return;
460            case 0xf: mz3500_shared_ram_w(space,(offset & 0x7ff),data); return;
461         }
462      }
463   }
391464}
392465
393466READ8_MEMBER(mz3500_state::mz3500_shared_ram_r)
r22090r22091
487560   floppy_image_device *floppy;
488561   floppy = machine().device<floppy_connector>(m_fddnames[m_fdd_sel])->get_device();
489562
490   return floppy->idx_r() << 1;
563   return ((floppy->idx_r()) << 1) | (m_fdc->get_drq() & 1);
491564}
492565
493566WRITE8_MEMBER(mz3500_state::mz3500_fdc_w)
r22090r22091
517590
518591}
519592
593READ8_MEMBER(mz3500_state::mz3500_fdc_dma_r)
594{
595   return m_fdc->dma_r();
596}
597
520598static ADDRESS_MAP_START( mz3500_master_map, AS_PROGRAM, 8, mz3500_state )
521599   AM_RANGE(0x0000, 0xffff) AM_READWRITE(mz3500_master_mem_r,mz3500_master_mem_w)
522600ADDRESS_MAP_END
r22090r22091
530608   AM_RANGE(0xf4, 0xf5) AM_DEVICE("upd765a", upd765a_device, map) // MFD upd765
531609//   AM_RANGE(0xf8, 0xfb) MFD I/O port
532610   AM_RANGE(0xf8, 0xf8) AM_READWRITE(mz3500_fdc_r,mz3500_fdc_w)
611   AM_RANGE(0xf9, 0xf9) AM_READ(mz3500_fdc_dma_r)
533612   AM_RANGE(0xfc, 0xff) AM_READWRITE(mz3500_io_r,mz3500_io_w) // memory mapper
534613ADDRESS_MAP_END
535614
r22090r22091
690769
691770void mz3500_state::fdc_drq(bool state)
692771{
693  printf("%02x DRQ\n",state);
772   printf("%02x DRQ\n",state);
694773}
695774
696775void mz3500_state::machine_start()
r22090r22091
728807         for(int i=0;i<4;i++)
729808         {
730809            machine().device<floppy_connector>(m_fddnames[i])->get_device()->mon_w(ASSERT_LINE);
731            machine().device<floppy_connector>(m_fddnames[i])->get_device()->set_rpm(360);
810            machine().device<floppy_connector>(m_fddnames[i])->get_device()->set_rpm(300);
732811         }
733812
734         machine().device<upd765a_device>("upd765a")->set_rate(500000);
813         machine().device<upd765a_device>("upd765a")->set_rate(250000);
735814      }
736815   }
737816
r22090r22091
752831
753832static ADDRESS_MAP_START( upd7220_1_map, AS_0, 8, mz3500_state )
754833   ADDRESS_MAP_GLOBAL_MASK(0x1fff)
755   AM_RANGE(0x00000, 0x1fff) AM_RAM AM_SHARE("video_ram")
834   AM_RANGE(0x00000, 0x00fff) AM_RAM AM_SHARE("video_ram")
756835ADDRESS_MAP_END
757836
758837static ADDRESS_MAP_START( upd7220_2_map, AS_0, 8, mz3500_state )
r22090r22091
760839ADDRESS_MAP_END
761840
762841static SLOT_INTERFACE_START( mz3500_floppies )
763   SLOT_INTERFACE( "525hd", FLOPPY_525_HD )
842   SLOT_INTERFACE( "525ssdd", FLOPPY_525_SSDD )
764843SLOT_INTERFACE_END
765844
766845/* TODO: clocks */
r22090r22091
780859   MCFG_I8255A_ADD( "i8255", i8255_intf )
781860
782861   MCFG_UPD765A_ADD("upd765a", true, true)
783   MCFG_FLOPPY_DRIVE_ADD("upd765a:0", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
784   MCFG_FLOPPY_DRIVE_ADD("upd765a:1", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
785   MCFG_FLOPPY_DRIVE_ADD("upd765a:2", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
786   MCFG_FLOPPY_DRIVE_ADD("upd765a:3", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
862   MCFG_FLOPPY_DRIVE_ADD("upd765a:0", mz3500_floppies, "525ssdd", 0, floppy_image_device::default_floppy_formats)
863   MCFG_FLOPPY_DRIVE_ADD("upd765a:1", mz3500_floppies, "525ssdd", 0, floppy_image_device::default_floppy_formats)
864   MCFG_FLOPPY_DRIVE_ADD("upd765a:2", mz3500_floppies, "525ssdd", 0, floppy_image_device::default_floppy_formats)
865   MCFG_FLOPPY_DRIVE_ADD("upd765a:3", mz3500_floppies, "525ssdd", 0, floppy_image_device::default_floppy_formats)
787866
788867   MCFG_UPD7220_ADD("upd7220_chr", MAIN_CLOCK/5, hgdc_1_intf, upd7220_1_map)
789868   MCFG_UPD7220_ADD("upd7220_gfx", MAIN_CLOCK/5, hgdc_2_intf, upd7220_2_map)

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