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r22090 Monday 25th March, 2013 at 17:59:18 UTC by Angelo Salese
Improved various things, shows 'no system media' now
[src/mess/drivers]mz3500.c

trunk/src/mess/drivers/mz3500.c
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44
55   preliminary driver by Angelo Salese
66
7   TODO:
8   - BUSREQ / BUSACK signals.
9   - master/slave comms aren't perfect (especially noticeable if you change the video DIP)
10
711   Notes:
812   Sub-CPU test meanings:
913   * RA (tests RAM, first is work RAM, other two are shared RAM banks)
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2428
2529#include "emu.h"
2630#include "cpu/z80/z80.h"
27//#include "sound/ay8910.h"
31#include "machine/upd765.h"
32#include "machine/i8255.h"
33#include "sound/beep.h"
2834#include "video/upd7220.h"
29#include "machine/upd765.h"
3035
3136#define MAIN_CLOCK XTAL_8MHz
3237
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5964   UINT8 m_ma,m_mo,m_ms,m_me2,m_me1;
6065   UINT8 m_crtc[0x10];
6166
67   UINT8 m_srdy;
68
6269   UINT8 m_fdd_sel;
6370
6471   DECLARE_READ8_MEMBER(mz3500_master_mem_r);
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7481   DECLARE_WRITE8_MEMBER(mz3500_crtc_w);
7582   DECLARE_READ8_MEMBER(mz3500_fdc_r);
7683   DECLARE_WRITE8_MEMBER(mz3500_fdc_w);
84   DECLARE_WRITE8_MEMBER(mz3500_pa_w);
85   DECLARE_WRITE8_MEMBER(mz3500_pb_w);
86   DECLARE_WRITE8_MEMBER(mz3500_pc_w);
7787
88   void fdc_irq(bool state);
89   void fdc_drq(bool state);
90
7891   // screen updates
7992   UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
8093
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400413   ---- -xxx interrupt status
401414   */
402415
416   switch(offset)
417   {
418      case 2:
419         return ((machine().root_device().ioport("SYSTEM_DSW")->read() & 0x0f) << 1) | ((machine().root_device().ioport("FD_DSW")->read() & 0x8) >> 3);
420      case 3:
421         return ((machine().root_device().ioport("FD_DSW")->read() & 0x7)<<5) | (m_srdy << 4);
422   }
423
403424   return 0;
404425}
405426
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422443
423444   switch(offset)
424445   {
446      case 0:
447         /* HACK: actually busreq */
448         m_slave->set_input_line(INPUT_LINE_HALT, data & 2 ? ASSERT_LINE : CLEAR_LINE);
449
450         break;
425451      case 1:
426452         m_ms = data & 3;
427453         break;
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475501   */
476502   static const char *const m_fddnames[4] = { "upd765a:0", "upd765a:1", "upd765a:2", "upd765a:3"};
477503
478   for(int i=0;i<4;i++)
504   if(data & 0x40)
479505   {
480      if(data & 1 << i)
506      for(int i=0;i<4;i++)
481507      {
482         m_fdd_sel = i;
483         break;
508         if(data & 1 << i)
509         {
510            m_fdd_sel = i;
511            break;
512         }
484513      }
485514   }
486515
487   machine().device<floppy_connector>(m_fddnames[m_fdd_sel])->get_device()->mon_w(data & 0x10 ? ASSERT_LINE : CLEAR_LINE);
516   machine().device<floppy_connector>(m_fddnames[m_fdd_sel])->get_device()->mon_w(data & 0x10 ? CLEAR_LINE : ASSERT_LINE);
488517
489518}
490519
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516545//   AM_RANGE(0x00, 0x0f) f/f and irq to master CPU
517546//   AM_RANGE(0x10, 0x1f) i8251
518547//   AM_RANGE(0x20, 0x2f) pit8253
519//   AM_RANGE(0x30, 0x3f) i8255
548   AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("i8255", i8255_device, read, write)
520549   AM_RANGE(0x40, 0x40) AM_READ_PORT("DSW")
521550   AM_RANGE(0x50, 0x5f) AM_RAM_WRITE(mz3500_crtc_w)
522551   AM_RANGE(0x60, 0x61) AM_DEVREADWRITE("upd7220_gfx", upd7220_device, read, write)
523552   AM_RANGE(0x70, 0x71) AM_DEVREADWRITE("upd7220_chr", upd7220_device, read, write)
524553ADDRESS_MAP_END
525554
555WRITE8_MEMBER(mz3500_state::mz3500_pa_w)
556{
557   // printer data
558}
559
560WRITE8_MEMBER(mz3500_state::mz3500_pb_w)
561{
562   /*
563   x--- ---- CG select (ROM and/or upd7220 clock?)
564   -x-- ---- SRDY signal (to master)
565   --xx xxxx upd1990 RTC (CLK, Din, C2, C1, C0, STRB)
566
567   */
568   //printf("%02x PB\n",data);
569
570   m_srdy = (data & 0x40) >> 6;
571}
572
573WRITE8_MEMBER(mz3500_state::mz3500_pc_w)
574{
575   /*
576   x--- ---- printer OBF output
577   -x-- ---- printer ACK input
578   --x- ---- printer STROBE
579   ---x ---- buzzer
580   ---- -xxx Keyboard (ACKC, STC, DC)
581   */
582   //printf("%02x PC\n",data);
583
584   machine().device<beep_device>(BEEPER_TAG)->set_state(data & 0x10);
585
586}
587
588static I8255A_INTERFACE( i8255_intf )
589{
590   DEVCB_NULL,                     /* Port A read */
591   DEVCB_DRIVER_MEMBER(mz3500_state,mz3500_pa_w),            /* Port A write */
592   DEVCB_NULL,     /* Port B read */
593   DEVCB_DRIVER_MEMBER(mz3500_state,mz3500_pb_w),            /* Port B write */
594   DEVCB_NULL,     /* Port C read */
595   DEVCB_DRIVER_MEMBER(mz3500_state,mz3500_pc_w),            /* Port C write */
596};
597
598
526599static INPUT_PORTS_START( mz3500 )
527600   PORT_START("DSW")
528601   PORT_DIPNAME( 0x01, 0x00, "SYSA" )
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546619   PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
547620   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
548621   PORT_DIPSETTING(    0x40, DEF_STR( On ) )
549   PORT_DIPNAME( 0x80, 0x80, "Sub-CPU Test" )
622   PORT_DIPNAME( 0x80, 0x80, "Sub-CPU Test" ) /* hack */
550623   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
551624   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
552625
553   /* dummy active low structure */
554   PORT_START("DSWA")
626   PORT_START("FD_DSW")
555627   PORT_DIPNAME( 0x01, 0x01, "DSWA" )
556628   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
557629   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
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561633   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
562634   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
563635   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
564   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
636   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
565637   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
566638   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
567   PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
568   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
639
640   PORT_START("SYSTEM_DSW")
641   PORT_DIPNAME( 0x01, 0x01, "DSWA" )
642   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
569643   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
570   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
571   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
644   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
645   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
572646   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
573   PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
574   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
647   PORT_DIPNAME( 0x04, 0x00, "CRT Select" )
648   PORT_DIPSETTING(    0x04, "Normal Display (MZ1D01, MZ1D06)" )
649   PORT_DIPSETTING(    0x00, "Hi-Res Display (MZ1D02, MZ1D03)" )
650   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
651   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
575652   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
576   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
577   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
578   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
579653INPUT_PORTS_END
580654
581655static const gfx_layout charlayout_8x8 =
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607681   GFXDECODE_ENTRY( "gfx1", 0x1000, charlayout_8x16,     0, 1 )
608682GFXDECODE_END
609683
684void mz3500_state::fdc_irq(bool state)
685{
686//  printf("%d IRQ\n",state);
687   m_master->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
610688
689}
690
691void mz3500_state::fdc_drq(bool state)
692{
693  printf("%02x DRQ\n",state);
694}
695
611696void mz3500_state::machine_start()
612697{
613698   m_ipl_rom = memregion("ipl")->base();
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626711   m_me1 = 0;
627712   m_me2 = 0;
628713   //m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
714   m_srdy = 0;
715
716   upd765a_device *fdc;
717   fdc = machine().device<upd765a_device>(":upd765a");
718
719   if (fdc)
720   {
721      fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(mz3500_state::fdc_irq), this));
722      fdc->setup_drq_cb(upd765a_device::line_cb(FUNC(mz3500_state::fdc_drq), this));
723
724      m_fdd_sel = 0;
725      {
726         static const char *const m_fddnames[4] = { "upd765a:0", "upd765a:1", "upd765a:2", "upd765a:3"};
727
728         for(int i=0;i<4;i++)
729         {
730            machine().device<floppy_connector>(m_fddnames[i])->get_device()->mon_w(ASSERT_LINE);
731            machine().device<floppy_connector>(m_fddnames[i])->get_device()->set_rpm(360);
732         }
733
734         machine().device<upd765a_device>("upd765a")->set_rate(500000);
735      }
736   }
737
738   machine().device<beep_device>(BEEPER_TAG)->set_frequency(2400);
739   machine().device<beep_device>(BEEPER_TAG)->set_state(0);
629740}
630741
631742
743
632744void mz3500_state::palette_init()
633745{
634746   int i;
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665777
666778   MCFG_QUANTUM_PERFECT_CPU("master")
667779
780   MCFG_I8255A_ADD( "i8255", i8255_intf )
781
668782   MCFG_UPD765A_ADD("upd765a", true, true)
669783   MCFG_FLOPPY_DRIVE_ADD("upd765a:0", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
670784   MCFG_FLOPPY_DRIVE_ADD("upd765a:1", mz3500_floppies, "525hd", 0, floppy_image_device::default_floppy_formats)
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688802
689803   /* sound hardware */
690804   MCFG_SPEAKER_STANDARD_MONO("mono")
691//  MCFG_SOUND_ADD("aysnd", AY8910, MAIN_CLOCK/4)
692//  MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
805
806   MCFG_SOUND_ADD(BEEPER_TAG, BEEP, 0)
807   MCFG_SOUND_ROUTE(ALL_OUTPUTS,"mono",0.15)
693808MACHINE_CONFIG_END
694809
695810

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