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r21566 Monday 4th March, 2013 at 13:53:06 UTC by Fabio Priuli
further register cleanups. nw.
[src/mame/drivers]sfcbox.c
[src/mame/includes]snes.h
[src/mame/machine]snes.c
[src/mame/video]snes.c
[src/mess/drivers]snes.c

trunk/src/mame/video/snes.c
r21565r21566
16631663   m_mode = 0;
16641664   m_ppu1_version = 1;  // 5C77 chip version number, read by STAT77, only '1' is known
16651665   m_ppu2_version = 3;  // 5C78 chip version number, read by STAT78, only '2' & '3' encountered so far.
1666   
1666
16671667   m_cgram_address = 0;
16681668   m_read_ophct = 0;
16691669   m_read_opvct = 0;
16701670
1671   PPU_REG(VMAIN) = 0x80;
1672   // what about other regs?
1673
16711674   /* Inititialize mosaic table */
16721675   for (int j = 0; j < 16; j++)
16731676   {
r21565r21566
17841787   state_save_register_global(machine, m_vram_fgr_shift);
17851788   state_save_register_global(machine, m_vram_read_buffer);
17861789   state_save_register_global(machine, m_vmadd);
1787   
1790
1791   state_save_register_global_array(machine, m_regs);
1792
17881793   state_save_register_global_pointer(machine, m_vram, SNES_VRAM_SIZE);
17891794   state_save_register_global_pointer(machine, m_cgram, SNES_CGRAM_SIZE/2);
17901795   state_save_register_global_pointer(machine, m_oam_ram, SNES_OAM_SIZE/2);   
r21565r21566
27582763            WINLOGIC[(PPU_REG(WOBJLOG) & 0xc)>>2],
27592764            (PPU_REG(WOBJSEL) & 0x20)?((PPU_REG(WOBJSEL) & 0x10)?"o":"i"):" ",
27602765            (PPU_REG(WOBJSEL) & 0x80)?((PPU_REG(WOBJSEL) & 0x40)?"o":"i"):" " );
2761      logerror("1) %3d %3d   2) %3d %3d", (m_bgd_offset.horizontal[0] & 0x3ff) >> 3, (m_bgd_offset.vertical[0] & 0x3ff) >> 3, (m_bgd_offset.horizontal[1] & 0x3ff) >> 3, (m_bgd_offset.vertical[1] & 0x3ff) >> 3 );
2762      logerror("3) %3d %3d   4) %3d %3d", (m_bgd_offset.horizontal[2] & 0x3ff) >> 3, (m_bgd_offset.vertical[2] & 0x3ff) >> 3, (m_bgd_offset.horizontal[3] & 0x3ff) >> 3, (m_bgd_offset.vertical[3] & 0x3ff) >> 3 );
27632766      logerror("Flags: %s%s%s %s %2d", (PPU_REG(CGWSEL) & 0x2)?"S":"F", (PPU_REG(CGADSUB) & 0x80)?"-":"+", (PPU_REG(CGADSUB) & 0x40)?" 50%":"100%",(PPU_REG(CGWSEL) & 0x1)?"D":"P", (PPU_REG(MOSAIC) & 0xf0) >> 4 );
27642767      logerror("SetINI: %s %s %s %s %s %s", (PPU_REG(SETINI) & 0x1)?" I":"NI", (PPU_REG(SETINI) & 0x2)?"P":"R", (PPU_REG(SETINI) & 0x4)?"240":"225",(PPU_REG(SETINI) & 0x8)?"512":"256",(PPU_REG(SETINI) & 0x40)?"E":"N",(PPU_REG(SETINI) & 0x80)?"ES":"NS" );
27652768      logerror("Mode7: A %5d B %5d", m_mode7.matrix_a, m_mode7.matrix_b );
trunk/src/mame/includes/snes.h
r21565r21566
368368#define DSP_FIR_C6      0x6F
369369#define DSP_FIR_C7      0x7F
370370
371
372#define SNES_CPU_REG(a) m_cpu_regs[a - 0x4200]   // regs 0x4200-0x421f
373#define SNES_CPU_REG_STATE(a) state->m_cpu_regs[a - 0x4200]   // regs 0x4200-0x421f
374
371375/* (PPU) Video related */
372376
373377struct SNES_SCANLINE
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432436   
433437   struct
434438   {
435      UINT16 horizontal[4];
436      UINT16 vertical[4];
437   } m_bgd_offset;
438   
439   struct
440   {
441439      UINT16 latch_horz;
442440      UINT16 latch_vert;
443441      UINT16 current_horz;
r21565r21566
630628      int    do_transfer;
631629
632630      int    dma_disabled;    // used to stop DMA if HDMA is enabled (currently not implemented, see machine/snes.c)
633   }m_dma_channel[8];
631   } m_dma_channel[8];
634632   UINT8                 m_hdmaen; /* channels enabled for HDMA */
633   UINT8                 m_dma_regs[0x80];
634   UINT8                 m_cpu_regs[0x20];
635   UINT8                 m_oldjoy1_latch;
635636
636637   /* input-related */
637638   UINT8                 m_joy1l;
trunk/src/mame/drivers/sfcbox.c
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209209    ---- --x-   SNES Transfer CLOCK to SNES (Bit5 of WRIO/RDIO on SNES side)
210210    ---- ---x   SNES Transfer STAT to SNES  (Bit2 of WRIO/RDIO on SNES side)
211211*/
212   snes_ram[WRIO] = ((data & 4) >> 1) | (snes_ram[WRIO] & ~0x02); // DATA
213   snes_ram[WRIO] = ((data & 2) << 4) | (snes_ram[WRIO] & ~0x20); // CLOCK
214   snes_ram[WRIO] = ((data & 1) << 2) | (snes_ram[WRIO] & ~0x04); // STAT
212   SNES_CPU_REG(WRIO) = ((data & 4) >> 1) | (SNES_CPU_REG(WRIO) & ~0x02); // DATA
213   SNES_CPU_REG(WRIO) = ((data & 2) << 4) | (SNES_CPU_REG(WRIO) & ~0x20); // CLOCK
214   SNES_CPU_REG(WRIO) = ((data & 1) << 2) | (SNES_CPU_REG(WRIO) & ~0x04); // STAT
215215}
216216
217217
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234234   res = 0 << 5;
235235   res = 0 << 4;
236236   res = 0 << 3;
237   res |= ((snes_ram[WRIO] & 0x10) >> 4) << 2; // DATA to main
238   res |= ((snes_ram[WRIO] & 0x08) >> 3) << 1; // ACK to main
237   res |= ((SNES_CPU_REG(WRIO) & 0x10) >> 4) << 2; // DATA to main
238   res |= ((SNES_CPU_REG(WRIO) & 0x08) >> 3) << 1; // ACK to main
239239   res = 1 << 0;
240240
241241   return res;
trunk/src/mame/machine/snes.c
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3636
3737struct snes_cart_info snes_cart;
3838
39#define DMA_REG(a) state->m_dma_regs[a - 0x4300]   // regs 0x4300-0x437f
40
3941// DSP accessors
4042#define dsp_get_sr() state->m_upd7725->snesdsp_read(false)
4143#define dsp_get_dr() state->m_upd7725->snesdsp_read(true)
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128130   // latch the counters and pull IRQ
129131   // (don't need to switch to the 65816 context, we don't do anything dependant on it)
130132   m_ppu.latch_counters(machine());
131   snes_ram[TIMEUP] = 0x80;    /* Indicate that irq occurred */
133   SNES_CPU_REG(TIMEUP) = 0x80;    /* Indicate that irq occurred */
132134   m_maincpu->set_input_line(G65816_LINE_IRQ, ASSERT_LINE);
133135
134136   // don't happen again
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163165{
164166   address_space &cpu0space = m_maincpu->space(AS_PROGRAM);
165167   m_io_read(cpu0space.machine());
166   snes_ram[HVBJOY] &= 0xfe;       /* Clear busy bit */
168   SNES_CPU_REG(HVBJOY) &= 0xfe;       /* Clear busy bit */
167169
168170   m_io_timer->adjust(attotime::never);
169171}
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174176   m_ppu.m_beam.current_vert = machine().primary_screen->vpos();
175177
176178   // not in hblank
177   snes_ram[HVBJOY] &= ~0x40;
179   SNES_CPU_REG(HVBJOY) &= ~0x40;
178180
179181   /* Vertical IRQ timer - only if horizontal isn't also enabled! */
180   if ((snes_ram[NMITIMEN] & 0x20) && !(snes_ram[NMITIMEN] & 0x10))
182   if ((SNES_CPU_REG(NMITIMEN) & 0x20) && !(SNES_CPU_REG(NMITIMEN) & 0x10))
181183   {
182184      if (m_ppu.m_beam.current_vert == m_vtime)
183185      {
184         snes_ram[TIMEUP] = 0x80;    /* Indicate that irq occurred */
186         SNES_CPU_REG(TIMEUP) = 0x80;    /* Indicate that irq occurred */
185187         // IRQ latches the counters, do it now
186188         m_ppu.latch_counters(machine());
187189         m_maincpu->set_input_line(G65816_LINE_IRQ, ASSERT_LINE );
188190      }
189191   }
190192   /* Horizontal IRQ timer */
191   if (snes_ram[NMITIMEN] & 0x10)
193   if (SNES_CPU_REG(NMITIMEN) & 0x10)
192194   {
193195      int setirq = 1;
194196      int pixel = m_htime;
195197
196198      // is the HIRQ on a specific scanline?
197      if (snes_ram[NMITIMEN] & 0x20)
199      if (SNES_CPU_REG(NMITIMEN) & 0x20)
198200      {
199201         if (m_ppu.m_beam.current_vert != m_vtime)
200202         {
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221223   {
222224      machine().scheduler().timer_set(machine().primary_screen->time_until_pos(m_ppu.m_beam.current_vert, 10), timer_expired_delegate(FUNC(snes_state::snes_reset_oam_address),this));
223225
224      snes_ram[HVBJOY] |= 0x81;       /* Set vblank bit to on & indicate controllers being read */
225      snes_ram[RDNMI] |= 0x80;        /* Set NMI occurred bit */
226      SNES_CPU_REG(HVBJOY) |= 0x81;       /* Set vblank bit to on & indicate controllers being read */
227      SNES_CPU_REG(RDNMI) |= 0x80;        /* Set NMI occurred bit */
226228
227      if (snes_ram[NMITIMEN] & 0x80)  /* NMI only signaled if this bit set */
229      if (SNES_CPU_REG(NMITIMEN) & 0x80)  /* NMI only signaled if this bit set */
228230      {
229231         // NMI goes off about 12 cycles after this (otherwise Chrono Trigger, NFL QB Club, etc. lock up)
230232         m_nmi_timer->adjust(m_maincpu->cycles_to_attotime(12));
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243245
244246   if (m_ppu.m_beam.current_vert == 0)
245247   {   /* VBlank is over, time for a new frame */
246      snes_ram[HVBJOY] &= 0x7f;       /* Clear vblank bit */
247      snes_ram[RDNMI]  &= 0x7f;       /* Clear nmi occurred bit */
248      SNES_CPU_REG(HVBJOY) &= 0x7f;       /* Clear vblank bit */
249      SNES_CPU_REG(RDNMI)  &= 0x7f;       /* Clear nmi occurred bit */
248250      m_ppu.m_stat78 ^= 0x80;       /* Toggle field flag */
249251      m_ppu.m_stat77 &= 0x3f;  /* Clear Time Over and Range Over bits */
250252
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254256   m_scanline_timer->adjust(attotime::never);
255257   m_hblank_timer->adjust(machine().primary_screen->time_until_pos(m_ppu.m_beam.current_vert, m_hblank_offset * m_ppu.m_htmult));
256258
257//  printf("%02x %d\n",snes_ram[HVBJOY],m_ppu.m_beam.current_vert);
259//  printf("%02x %d\n",SNES_CPU_REG(HVBJOY),m_ppu.m_beam.current_vert);
258260}
259261
260262/* This is called at the start of hblank *before* the scanline indicated in current_vert! */
r21565r21566
274276      if (machine().primary_screen->vpos() > 0)
275277      {
276278         /* Do HDMA */
277         if (snes_ram[HDMAEN])
279         if (SNES_CPU_REG(HDMAEN))
278280            hdma(cpu0space);
279281
280282         machine().primary_screen->update_partial((m_ppu.m_interlace == 2) ? (m_ppu.m_beam.current_vert * m_ppu.m_interlace) : m_ppu.m_beam.current_vert - 1);
r21565r21566
282284   }
283285
284286   // signal hblank
285   snes_ram[HVBJOY] |= 0x40;
287   SNES_CPU_REG(HVBJOY) |= 0x40;
286288
287289   /* kick off the start of scanline timer */
288290   nextscan = m_ppu.m_beam.current_vert + 1;
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422424         break;
423425   }
424426
425   snes_ram[offset] = data;
427   DMA_REG(offset) = data;
426428}
427429
428430/*
r21565r21566
439441   // PPU accesses are from 2100 to 213f
440442   if (offset >= INIDISP && offset < APU00)
441443   {
442      return state->m_ppu.read(space, offset, snes_ram[WRIO] & 0x80);
444      return state->m_ppu.read(space, offset, SNES_CPU_REG_STATE(WRIO) & 0x80);
443445   }
444446
445447   // APU is mirrored from 2140 to 217f
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495497         state->m_wram_address &= 0x1ffff;
496498         return value;
497499      case OLDJOY1:   /* Data for old NES controllers (JOYSER1) */
498         if (snes_ram[OLDJOY1] & 0x1)
500         if (state->m_oldjoy1_latch & 0x1)
499501            return 0 | (snes_open_bus_r(space, 0) & 0xfc); //correct?
500502
501503         value = state->m_oldjoy1_read(space.machine());
502504
503505         return (value & 0x03) | (snes_open_bus_r(space, 0) & 0xfc); //correct?
504506      case OLDJOY2:   /* Data for old NES controllers (JOYSER2) */
505         if (snes_ram[OLDJOY1] & 0x1)
507         if (state->m_oldjoy1_latch & 0x1)
506508            return 0 | 0x1c | (snes_open_bus_r(space, 0) & 0xe0); //correct?
507509
508510         value = state->m_oldjoy2_read(space.machine());
509511
510512         return value | 0x1c | (snes_open_bus_r(space, 0) & 0xe0); //correct?
511513      case RDNMI:         /* NMI flag by v-blank and version number */
512         value = (snes_ram[RDNMI] & 0x80) | (snes_open_bus_r(space, 0) & 0x70);
513         snes_ram[RDNMI] &= 0x70;   /* NMI flag is reset on read */
514         value = (SNES_CPU_REG_STATE(RDNMI) & 0x80) | (snes_open_bus_r(space, 0) & 0x70);
515         SNES_CPU_REG_STATE(RDNMI) &= 0x70;   /* NMI flag is reset on read */
514516         return value | 2; //CPU version number
515517      case TIMEUP:        /* IRQ flag by H/V count timer */
516         value = (snes_open_bus_r(space, 0) & 0x7f) | (snes_ram[TIMEUP] & 0x80);
518         value = (snes_open_bus_r(space, 0) & 0x7f) | (SNES_CPU_REG_STATE(TIMEUP) & 0x80);
517519         state->m_maincpu->set_input_line(G65816_LINE_IRQ, CLEAR_LINE );
518         snes_ram[TIMEUP] = 0;   // flag is cleared on both read and write
520         SNES_CPU_REG_STATE(TIMEUP) = 0;   // flag is cleared on both read and write
519521         return value;
520522      case HVBJOY:        /* H/V blank and joypad controller enable */
521523         // electronics test says hcounter 272 is start of hblank, which is beampos 363
522//          if (space.machine().primary_screen->hpos() >= 363) snes_ram[HVBJOY] |= 0x40;
523//              else snes_ram[HVBJOY] &= ~0x40;
524         return (snes_ram[HVBJOY] & 0xc1) | (snes_open_bus_r(space, 0) & 0x3e);
524//          if (space.machine().primary_screen->hpos() >= 363) SNES_CPU_REG_STATE(HVBJOY) |= 0x40;
525//              else SNES_CPU_REG_STATE(HVBJOY) &= ~0x40;
526         return (SNES_CPU_REG_STATE(HVBJOY) & 0xc1) | (snes_open_bus_r(space, 0) & 0x3e);
525527      case RDIO:          /* Programmable I/O port - echos back what's written to WRIO */
526         return snes_ram[WRIO];
528         return SNES_CPU_REG_STATE(WRIO);
527529      case JOY1L:         /* Joypad 1 status register (low) */
528530         if(state->m_is_nss && state->m_input_disabled)
529531            return 0;
r21565r21566
577579      default:
578580//          mame_printf_debug("snes_r: offset = %x pc = %x\n",offset,space.device().safe_pc());
579581// Added break; after commenting above line.  If uncommenting, drop the break;
580                  break;
582         break;
581583   }
582584
583585//  printf("unsupported read: offset == %08x\n", offset);
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678680         state->m_wram_address &= 0x1ffff;
679681         return;
680682      case OLDJOY1:   /* Old NES joystick support */
681         if (((!(data & 0x1)) && (snes_ram[OLDJOY1] & 0x1)))
683         if (((!(data & 0x1)) && (state->m_oldjoy1_latch & 0x1)))
682684         {
683685            state->m_read_idx[0] = 0;
684686            state->m_read_idx[1] = 0;
685687         }
686         if(state->m_is_nss)
688         if (state->m_is_nss)
687689         {
688690            state->m_game_over_flag = (data & 4) >> 2;
689691         }
690         break;
692         state->m_oldjoy1_latch = data;
693         return;
694      case OLDJOY2:   /* Old NES joystick support */
695         return;
691696      case NMITIMEN:  /* Flag for v-blank, timer int. and joy read */
692         if((data & 0x30) == 0x00)
697         if ((data & 0x30) == 0x00)
693698         {
694699            state->m_maincpu->set_input_line(G65816_LINE_IRQ, CLEAR_LINE );
695            snes_ram[TIMEUP] = 0;   // clear pending IRQ if irq is disabled here, 3x3 Eyes - Seima Korin Den behaves on this
700            SNES_CPU_REG_STATE(TIMEUP) = 0;   // clear pending IRQ if irq is disabled here, 3x3 Eyes - Seima Korin Den behaves on this
696701         }
697         break;
698      case OLDJOY2:   /* Old NES joystick support */
699         break;
702         SNES_CPU_REG_STATE(NMITIMEN) = data;
703         return;
700704      case WRIO:      /* Programmable I/O port - latches H/V counters on a 0->1 transition */
701         if (!(snes_ram[WRIO] & 0x80) && (data & 0x80))
705         if (!(SNES_CPU_REG_STATE(WRIO) & 0x80) && (data & 0x80))
702706         {
703707            // external latch
704708            state->m_ppu.latch_counters(space.machine());
705709         }
706         break;
710         SNES_CPU_REG_STATE(WRIO) = data;
711         return;
707712      case HTIMEL:    /* H-Count timer settings (low)  */
708713         state->m_htime = (state->m_htime & 0xff00) | (data <<  0);
709714         state->m_htime &= 0x1ff;
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722727         return;
723728      case MDMAEN:    /* DMA channel designation and trigger */
724729         state->dma(space, data);
725         data = 0;   /* Once DMA is done we need to reset all bits to 0 */
726         break;
730         SNES_CPU_REG_STATE(MDMAEN) = 0;   /* Once DMA is done we need to reset all bits to 0 */
731         return;
727732      case HDMAEN:    /* HDMA channel designation */
728733         if (data) //if a HDMA is enabled, data is inited at the next scanline
729734            space.machine().scheduler().timer_set(space.machine().primary_screen->time_until_pos(state->m_ppu.m_beam.current_vert + 1), timer_expired_delegate(FUNC(snes_state::snes_reset_hdma),state));
730         break;
735         SNES_CPU_REG_STATE(HDMAEN) = data;
736         return;
731737      case TIMEUP:    // IRQ Flag is cleared on both read and write
732738         state->m_maincpu->set_input_line(G65816_LINE_IRQ, CLEAR_LINE );
733         snes_ram[TIMEUP] = 0;
739         SNES_CPU_REG_STATE(TIMEUP) = 0;
734740         return;
735741      /* Following are read-only */
736742      case HVBJOY:    /* H/V blank and joypad enable */
r21565r21566
14911497
14921498   // is automatic reading on? if so, copy port data1/data2 to joy1l->joy4h
14931499   // this actually works like reading the first 16bits from oldjoy1/2 in reverse order
1494   if (snes_ram[NMITIMEN] & 1)
1500   if (SNES_CPU_REG_STATE(NMITIMEN) & 1)
14951501   {
14961502      state->m_joy1l = (state->m_data1[0] & 0x00ff) >> 0;
14971503      state->m_joy1h = (state->m_data1[0] & 0xff00) >> 8;
r21565r21566
15931599   state->m_oldjoy2_read = nss_oldjoy2_read;
15941600
15951601   // set up some known register power-up defaults
1596   snes_ram[WRIO] = 0xff;
1597   snes_ram[VMAIN] = 0x80;
1602   SNES_CPU_REG_STATE(WRIO) = 0xff;
15981603
15991604   // see if there's a uPD7725 DSP in the machine config
16001605   state->m_upd7725 = machine.device<upd7725_device>("dsp");
r21565r21566
16941699//  state->m_soundcpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(snes_state::snes_spc_direct), state));
16951700
16961701   // power-on sets these registers like this
1697   snes_ram[WRIO] = 0xff;
1698//  snes_ram[WRMPYA] = 0xff;
1699//  snes_ram[WRDIVL] = 0xff;
1700//  snes_ram[WRDIVH] = 0xff;
1702   SNES_CPU_REG_STATE(WRIO) = 0xff;
1703//  SNES_CPU_REG_STATE(WRMPYA) = 0xff;
1704//  SNES_CPU_REG_STATE(WRDIVL) = 0xff;
1705//  SNES_CPU_REG_STATE(WRDIVH) = 0xff;
17011706
17021707   switch (state->m_has_addon_chip)
17031708   {
r21565r21566
17481753   state->save_item(NAME(state->m_data1));
17491754   state->save_item(NAME(state->m_data2));
17501755   state->save_item(NAME(state->m_read_idx));
1756   state->save_item(NAME(state->m_dma_regs));
1757   state->save_item(NAME(state->m_cpu_regs));
1758   state->save_item(NAME(state->m_oldjoy1_latch));
17511759
17521760   for (int i = 0; i < 2; i++)
17531761   {
r21565r21566
18011809      state->m_ppu.m_stat78 = SNES_PAL;
18021810
18031811   // reset does this to these registers
1804   snes_ram[NMITIMEN] = 0;
1812   SNES_CPU_REG_STATE(NMITIMEN) = 0;
18051813   state->m_htime = 0x1ff;
18061814   state->m_vtime = 0x1ff;
18071815
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20542062
20552063void snes_state::hdma_init( address_space &space )
20562064{
2057   m_hdmaen = snes_ram[HDMAEN];
2065   m_hdmaen = SNES_CPU_REG(HDMAEN);
20582066   for (int i = 0; i < 8; i++)
20592067   {
20602068      if (BIT(m_hdmaen, i))
trunk/src/mess/drivers/snes.c
r21565r21566
118118   snes_state *state = field.machine().driver_data<snes_state>();
119119   int port = (FPTR)param;
120120
121   if (snes_ram[OLDJOY1] & 0x1)
121   if (state->m_oldjoy1_latch & 0x1)
122122   {
123123      state->m_mouse[port].speed++;
124124      if ((state->m_mouse[port].speed & 0x03) == 0x03)
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589589
590590   // is automatic reading on? if so, copy port data1/data2 to joy1l->joy4h
591591   // this actually works like reading the first 16bits from oldjoy1/2 in reverse order
592   if (snes_ram[NMITIMEN] & 1)
592   if (SNES_CPU_REG_STATE(NMITIMEN) & 1)
593593   {
594594      state->m_joy1l = (state->m_data1[0] & 0x00ff) >> 0;
595595      state->m_joy1h = (state->m_data1[0] & 0xff00) >> 8;

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