trunk/src/mess/machine/a2scsi.c
| r21499 | r21500 | |
| 9 | 9 | |
| 10 | 10 | |
| 11 | 11 | Notes: |
| 12 | | |
| 13 | 12 | C0n0-C0n7 = NCR5380 registers in normal order |
| 14 | 13 | C0n9 = DIP switches |
| 15 | 14 | C0na = RAM and ROM bank switching |
| r21499 | r21500 | |
| 21 | 20 | #include "a2scsi.h" |
| 22 | 21 | #include "includes/apple2.h" |
| 23 | 22 | #include "machine/scsibus.h" |
| 23 | #include "machine/nscsi_cd.h" |
| 24 | #include "machine/nscsi_hd.h" |
| 24 | 25 | |
| 25 | | |
| 26 | 26 | /*************************************************************************** |
| 27 | 27 | PARAMETERS |
| 28 | 28 | ***************************************************************************/ |
| r21499 | r21500 | |
| 34 | 34 | const device_type A2BUS_SCSI = &device_creator<a2bus_scsi_device>; |
| 35 | 35 | |
| 36 | 36 | #define SCSI_ROM_REGION "scsi_rom" |
| 37 | | #define SCSI_5380_TAG "scsi:ncr5380" |
| 37 | #define SCSI_BUS_TAG "scsibus" |
| 38 | #define SCSI_5380_TAG "scsibus:7:ncr5380" |
| 38 | 39 | |
| 39 | | static const struct NCR5380interface a2scsi_5380_intf = |
| 40 | static const ncr5380n_interface ncr5380_interface = |
| 40 | 41 | { |
| 41 | | NULL // IRQ handler (unconnected according to schematic) |
| 42 | DEVCB_NULL, |
| 43 | DEVCB_DEVICE_LINE_MEMBER("^^^", a2bus_scsi_device, drq_w) |
| 42 | 44 | }; |
| 43 | 45 | |
| 46 | static SLOT_INTERFACE_START( scsi_devices ) |
| 47 | SLOT_INTERFACE("cdrom", NSCSI_CDROM) |
| 48 | SLOT_INTERFACE("harddisk", NSCSI_HARDDISK) |
| 49 | SLOT_INTERFACE_INTERNAL("ncr5380", NCR5380N) |
| 50 | SLOT_INTERFACE_END |
| 51 | |
| 44 | 52 | MACHINE_CONFIG_FRAGMENT( scsi ) |
| 45 | 53 | MCFG_SCSIBUS_ADD("scsi") |
| 46 | | MCFG_NCR5380_ADD(SCSI_5380_TAG, (XTAL_28_63636MHz/4), a2scsi_5380_intf) |
| 54 | MCFG_NSCSI_BUS_ADD(SCSI_BUS_TAG) |
| 55 | MCFG_NSCSI_ADD("scsibus:0", scsi_devices, 0, 0, 0, 0, false) |
| 56 | MCFG_NSCSI_ADD("scsibus:1", scsi_devices, 0, 0, 0, 0, false) |
| 57 | MCFG_NSCSI_ADD("scsibus:2", scsi_devices, 0, 0, 0, 0, false) |
| 58 | MCFG_NSCSI_ADD("scsibus:3", scsi_devices, 0, 0, 0, 0, false) |
| 59 | MCFG_NSCSI_ADD("scsibus:4", scsi_devices, 0, 0, 0, 0, false) |
| 60 | MCFG_NSCSI_ADD("scsibus:5", scsi_devices, 0, 0, 0, 0, false) |
| 61 | MCFG_NSCSI_ADD("scsibus:6", scsi_devices, "harddisk", 0, 0, 0, false) |
| 62 | MCFG_NSCSI_ADD("scsibus:7", scsi_devices, "ncr5380", 0, &ncr5380_interface, 10000000, true) |
| 47 | 63 | MACHINE_CONFIG_END |
| 48 | 64 | |
| 49 | 65 | ROM_START( scsi ) |
| r21499 | r21500 | |
| 81 | 97 | a2bus_scsi_device::a2bus_scsi_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) : |
| 82 | 98 | device_t(mconfig, type, name, tag, owner, clock), |
| 83 | 99 | device_a2bus_card_interface(mconfig, *this), |
| 84 | | m_ncr5380(*this, SCSI_5380_TAG) |
| 100 | m_ncr5380(*this, SCSI_5380_TAG), |
| 101 | m_scsibus(*this, SCSI_BUS_TAG) |
| 85 | 102 | { |
| 86 | 103 | m_shortname = "a2scsi"; |
| 87 | 104 | } |
| r21499 | r21500 | |
| 89 | 106 | a2bus_scsi_device::a2bus_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : |
| 90 | 107 | device_t(mconfig, A2BUS_SCSI, "Apple II SCSI Card", tag, owner, clock), |
| 91 | 108 | device_a2bus_card_interface(mconfig, *this), |
| 92 | | m_ncr5380(*this, SCSI_5380_TAG) |
| 109 | m_ncr5380(*this, SCSI_5380_TAG), |
| 110 | m_scsibus(*this, SCSI_BUS_TAG) |
| 93 | 111 | { |
| 94 | 112 | m_shortname = "a2scsi"; |
| 95 | 113 | } |
| r21499 | r21500 | |
| 111 | 129 | save_item(NAME(m_ram)); |
| 112 | 130 | save_item(NAME(m_rambank)); |
| 113 | 131 | save_item(NAME(m_rombank)); |
| 132 | save_item(NAME(m_bank)); |
| 133 | save_item(NAME(m_drq)); |
| 134 | save_item(NAME(m_816block)); |
| 114 | 135 | } |
| 115 | 136 | |
| 116 | 137 | void a2bus_scsi_device::device_reset() |
| 117 | 138 | { |
| 118 | 139 | m_rambank = m_rombank = 0; // CLR on 74LS273 at U3E is connected to RES, so these clear on reset |
| 140 | m_816block = false; |
| 119 | 141 | } |
| 120 | 142 | |
| 121 | 143 | |
| r21499 | r21500 | |
| 125 | 147 | |
| 126 | 148 | UINT8 a2bus_scsi_device::read_c0nx(address_space &space, UINT8 offset) |
| 127 | 149 | { |
| 128 | | printf("Read c0n%x (PC=%x)\n", offset, space.device().safe_pc()); |
| 129 | | |
| 130 | 150 | switch (offset) |
| 131 | 151 | { |
| 132 | 152 | case 0: |
| r21499 | r21500 | |
| 137 | 157 | case 5: |
| 138 | 158 | case 6: |
| 139 | 159 | case 7: |
| 140 | | return m_ncr5380->ncr5380_read_reg(offset); |
| 160 | // printf("Read 5380 @ %x\n", offset); |
| 161 | return m_ncr5380->read(space, offset); |
| 162 | break; |
| 141 | 163 | |
| 142 | | case 9: // card's ID? |
| 143 | | return 7; |
| 164 | case 8: // read and DACK |
| 165 | return m_ncr5380->dma_r(); |
| 166 | |
| 167 | case 9: // our SCSI ID (normally 0x80 = 7) |
| 168 | return (1<<7); |
| 169 | |
| 170 | case 0xa: // RAM/ROM bank |
| 171 | return m_bank; |
| 172 | |
| 173 | case 0xe: // DRQ status in bit 7 |
| 174 | return m_drq; |
| 175 | |
| 176 | default: |
| 177 | printf("Read c0n%x (PC=%x)\n", offset, space.device().safe_pc()); |
| 178 | break; |
| 144 | 179 | } |
| 145 | 180 | |
| 146 | 181 | return 0xff; |
| r21499 | r21500 | |
| 153 | 188 | |
| 154 | 189 | void a2bus_scsi_device::write_c0nx(address_space &space, UINT8 offset, UINT8 data) |
| 155 | 190 | { |
| 156 | | printf("Write %02x to c0n%x (PC=%x)\n", data, offset, space.device().safe_pc()); |
| 157 | | |
| 158 | 191 | switch (offset) |
| 159 | 192 | { |
| 160 | 193 | case 0: |
| r21499 | r21500 | |
| 165 | 198 | case 5: |
| 166 | 199 | case 6: |
| 167 | 200 | case 7: |
| 168 | | m_ncr5380->ncr5380_write_reg(offset, data); |
| 201 | // printf("%02x to 5380 reg %x\n", data, offset); |
| 202 | m_ncr5380->write(space, offset, data); |
| 169 | 203 | break; |
| 170 | 204 | |
| 205 | case 8: // write and DACK |
| 206 | m_ncr5380->dma_w(data); |
| 207 | break; |
| 208 | |
| 171 | 209 | case 0xa: // ROM and RAM banking (74LS273 at U3E) |
| 172 | 210 | /* |
| 173 | 211 | ROM banking: |
| r21499 | r21500 | |
| 185 | 223 | |
| 186 | 224 | m_rambank = ((data>>4) & 0x7) * 0x400; |
| 187 | 225 | m_rombank = (data & 0xf) * 0x400; |
| 188 | | printf("RAM bank to %x, ROM bank to %x\n", m_rambank, m_rombank); |
| 226 | m_bank = data; |
| 227 | // printf("RAM bank to %x, ROM bank to %x\n", m_rambank, m_rombank); |
| 228 | m_816block = false; // does this reset block mode? |
| 189 | 229 | break; |
| 190 | 230 | |
| 191 | | case 0xb: |
| 192 | | printf("Reset NCR5380\n"); |
| 231 | case 0xb: // reset 5380 |
| 232 | // printf("Resetting SCSI: %02x at %x\n", data, space.device().safe_pc()); |
| 233 | m_ncr5380->reset(); |
| 234 | m_816block = false; |
| 193 | 235 | break; |
| 236 | |
| 237 | case 0xc: // set IIgs block mode DMA |
| 238 | printf("%02x to block-mode DMA mode\n", data); |
| 239 | m_816block = true; |
| 240 | break; |
| 241 | |
| 242 | case 0xd: // set Mac-style pseudo-DMA |
| 243 | // printf("%02x to pseudo-DMA mode\n", data); |
| 244 | m_816block = false; |
| 245 | break; |
| 246 | |
| 247 | default: |
| 248 | printf("Write %02x to c0n%x (PC=%x)\n", data, offset, space.device().safe_pc()); |
| 249 | break; |
| 194 | 250 | } |
| 195 | 251 | } |
| 196 | 252 | |
| r21499 | r21500 | |
| 206 | 262 | |
| 207 | 263 | void a2bus_scsi_device::write_cnxx(address_space &space, UINT8 offset, UINT8 data) |
| 208 | 264 | { |
| 209 | | printf("Write %02x to cn%02x (PC=%x)\n", data, offset, space.device().safe_pc()); |
| 265 | // there are writes to cn0A, possibly misguided C0nA (bank select?) writes? |
| 266 | // printf("Write %02x to cn%02x (PC=%x)\n", data, offset, space.device().safe_pc()); |
| 210 | 267 | } |
| 211 | 268 | |
| 212 | 269 | /*------------------------------------------------- |
| r21499 | r21500 | |
| 219 | 276 | // bankswitched ROM at cc00-cfff |
| 220 | 277 | if (offset < 0x400) |
| 221 | 278 | { |
| 222 | | printf("Read RAM at %x = %02x\n", offset+m_rambank, m_ram[offset + m_rambank]); |
| 279 | // printf("Read RAM at %x = %02x\n", offset+m_rambank, m_ram[offset + m_rambank]); |
| 280 | if (m_816block) |
| 281 | { |
| 282 | return m_ncr5380->dma_r(); |
| 283 | } |
| 284 | |
| 223 | 285 | return m_ram[offset + m_rambank]; |
| 224 | 286 | } |
| 225 | 287 | else |
| r21499 | r21500 | |
| 235 | 297 | { |
| 236 | 298 | if (offset < 0x400) |
| 237 | 299 | { |
| 238 | | printf("%02x to RAM at %x\n", data, offset+m_rambank); |
| 239 | | m_ram[offset + m_rambank] = data; |
| 300 | // printf("%02x to RAM at %x\n", data, offset+m_rambank); |
| 301 | if (m_816block) |
| 302 | { |
| 303 | m_ncr5380->dma_w(data); |
| 304 | } |
| 305 | else |
| 306 | { |
| 307 | m_ram[offset + m_rambank] = data; |
| 308 | } |
| 240 | 309 | } |
| 241 | 310 | } |
| 311 | |
| 312 | WRITE_LINE_MEMBER( a2bus_scsi_device::drq_w ) |
| 313 | { |
| 314 | m_drq = (state ? 0x80 : 0x00); |
| 315 | } |