trunk/src/mame/drivers/coolridr.c
| r21196 | r21197 | |
|---|
| 323 | 323 | UINT8 m_vblank; |
| 324 | 324 | int m_scsp_last_line; |
| 325 | 325 | UINT8 an_mux_data; |
| 326 | UINT8 sound_data; |
| 326 | 327 | |
| 327 | | |
| 328 | 328 | DECLARE_READ32_MEMBER(sysh1_unk_r); |
| 329 | 329 | DECLARE_WRITE32_MEMBER(sysh1_unk_w); |
| 330 | 330 | DECLARE_READ32_MEMBER(sysh1_ioga_r); |
| r21196 | r21197 | |
|---|
| 343 | 343 | DECLARE_WRITE8_MEMBER(analog_mux_w); |
| 344 | 344 | DECLARE_WRITE8_MEMBER(lamps_w); |
| 345 | 345 | DECLARE_WRITE_LINE_MEMBER(scsp_to_main_irq); |
| 346 | DECLARE_WRITE8_MEMBER(sound_to_sh1_w); |
| 346 | 347 | DECLARE_DRIVER_INIT(coolridr); |
| 347 | 348 | virtual void machine_start(); |
| 348 | 349 | virtual void machine_reset(); |
| r21196 | r21197 | |
|---|
| 469 | 470 | /* unknown purpose */ |
| 470 | 471 | READ32_MEMBER(coolridr_state::sysh1_unk_r) |
| 471 | 472 | { |
| 473 | if(offset == 8) |
| 474 | return sound_data; |
| 475 | |
| 476 | if(offset == 2 || offset == 6) // DMA status |
| 477 | return 0; |
| 478 | |
| 479 | printf("%08x\n",offset); |
| 480 | |
| 472 | 481 | return m_h1_unk[offset]; |
| 473 | 482 | } |
| 474 | 483 | |
| 475 | 484 | WRITE32_MEMBER(coolridr_state::sysh1_unk_w) |
| 476 | 485 | { |
| 486 | address_space &main_space = m_maincpu->space(AS_PROGRAM); |
| 487 | address_space &sound_space = m_soundcpu->space(AS_PROGRAM); |
| 488 | |
| 489 | if(offset == 8) |
| 490 | { |
| 491 | //bit 16 probably halts m68k |
| 492 | return; |
| 493 | } |
| 494 | |
| 495 | if(offset == 2) |
| 496 | { |
| 497 | if(!(data & 1) && (m_h1_unk[2] & 1)) // 1 -> 0 transition enables DMA |
| 498 | { |
| 499 | UINT32 src = m_h1_unk[0]; |
| 500 | UINT32 dst = m_h1_unk[1]; |
| 501 | UINT32 size = 0x200; // TODO |
| 502 | |
| 503 | if(src == 0x100000) // DMA for m68k program, TODO |
| 504 | return; |
| 505 | |
| 506 | //printf("%08x %08x %08x\n",src,dst,size); |
| 507 | |
| 508 | for(int i = 0;i < size; i+=2) |
| 509 | { |
| 510 | sound_space.write_word(dst,main_space.read_word(src)); |
| 511 | src+=2; |
| 512 | dst+=2; |
| 513 | } |
| 514 | } |
| 515 | } |
| 516 | |
| 517 | if(offset == 6) |
| 518 | { |
| 519 | if(!(data & 1) && (m_h1_unk[6] & 1)) // 1 -> 0 transition enables DMA |
| 520 | { |
| 521 | UINT32 src = m_h1_unk[4]; |
| 522 | UINT32 dst = m_h1_unk[5]; |
| 523 | UINT32 size = 0x200; // TODO |
| 524 | |
| 525 | if(src == 0x100000) // DMA for m68k program, TODO |
| 526 | return; |
| 527 | |
| 528 | //printf("%08x %08x %08x\n",src,dst,size); |
| 529 | |
| 530 | for(int i = 0;i < size; i+=2) |
| 531 | { |
| 532 | sound_space.write_word(dst,main_space.read_word(src)); |
| 533 | src+=2; |
| 534 | dst+=2; |
| 535 | } |
| 536 | } |
| 537 | } |
| 538 | |
| 477 | 539 | COMBINE_DATA(&m_h1_unk[offset]); |
| 540 | |
| 541 | //printf("%08x %08x\n",offset*4,m_h1_unk[offset]); |
| 478 | 542 | } |
| 479 | 543 | |
| 544 | |
| 480 | 545 | /* According to Guru, this is actually the same I/O chip of Sega Model 2 HW */ |
| 481 | 546 | #if 0 |
| 482 | 547 | READ32_MEMBER(coolridr_state::sysh1_ioga_r) |
| r21196 | r21197 | |
|---|
| 754 | 819 | // it writes the palette for the bgs here, with fade effects? |
| 755 | 820 | // is this the only way for the tile colours to be actually used, or does this just go to memory somewhere too? |
| 756 | 821 | //printf("blit mode %02x %02x %08x\n", m_blitterMode, m_blitterSerialCount, data); |
| 757 | | |
| 822 | |
| 758 | 823 | sysh1_pal_w(space,m_textOffset,data,0xffffffff); |
| 759 | 824 | m_textOffset++; |
| 760 | 825 | |
| r21196 | r21197 | |
|---|
| 972 | 1037 | AM_RANGE(0x03200000, 0x0327ffff) AM_READWRITE16(h1_soundram2_r, h1_soundram2_w,0xffffffff) //AM_SHARE("soundram2") |
| 973 | 1038 | AM_RANGE(0x03300000, 0x03300fff) AM_DEVREADWRITE16_LEGACY("scsp2", scsp_r, scsp_w, 0xffffffff) |
| 974 | 1039 | |
| 975 | | AM_RANGE(0x04000000, 0x0400001f) AM_DEVREADWRITE8("i8237", am9517a_device, read, write, 0xffffffff) |
| 976 | | AM_RANGE(0x04000020, 0x0400003f) AM_READWRITE(sysh1_unk_r,sysh1_unk_w) AM_SHARE("h1_unk") |
| 977 | | AM_RANGE(0x04200000, 0x0420003f) AM_RAM /* hi-word for DMA? */ |
| 1040 | // AM_RANGE(0x04000000, 0x0400001f) AM_DEVREADWRITE8("i8237", am9517a_device, read, write, 0xffffffff) |
| 1041 | AM_RANGE(0x04000000, 0x0400003f) AM_READWRITE(sysh1_unk_r,sysh1_unk_w) AM_SHARE("h1_unk") |
| 1042 | // AM_RANGE(0x04200000, 0x0420003f) AM_RAM /* hi-word for DMA? */ |
| 978 | 1043 | |
| 979 | 1044 | AM_RANGE(0x05000000, 0x05000fff) AM_RAM |
| 980 | 1045 | AM_RANGE(0x05200000, 0x052001ff) AM_RAM |
| r21196 | r21197 | |
|---|
| 995 | 1060 | AM_RANGE(0x60000000, 0x600003ff) AM_WRITENOP |
| 996 | 1061 | ADDRESS_MAP_END |
| 997 | 1062 | |
| 998 | | // SH-1 or SH-2 almost certainly copies the program down to here: the ROM containing the program is 32-bit wide and the 68000 is 16-bit |
| 999 | | // the SCSP is believed to be hardcoded to decode the first 4 MB like this for a master/slave config |
| 1000 | | // (see also Model 3): |
| 1063 | WRITE8_MEMBER(coolridr_state::sound_to_sh1_w) |
| 1064 | { |
| 1065 | sound_data = data; |
| 1066 | } |
| 1067 | |
| 1001 | 1068 | static ADDRESS_MAP_START( system_h1_sound_map, AS_PROGRAM, 16, coolridr_state ) |
| 1002 | 1069 | AM_RANGE(0x000000, 0x07ffff) AM_RAM AM_REGION("scsp1",0) AM_SHARE("soundram") |
| 1003 | 1070 | AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE_LEGACY("scsp1", scsp_r, scsp_w) |
| 1004 | 1071 | AM_RANGE(0x200000, 0x27ffff) AM_RAM AM_REGION("scsp2",0) AM_SHARE("soundram2") |
| 1005 | 1072 | AM_RANGE(0x300000, 0x300fff) AM_DEVREADWRITE_LEGACY("scsp2", scsp_r, scsp_w) |
| 1006 | 1073 | AM_RANGE(0x800000, 0x80ffff) AM_RAM |
| 1007 | | AM_RANGE(0x900000, 0x900001) AM_WRITENOP |
| 1074 | AM_RANGE(0x900000, 0x900001) AM_WRITE8(sound_to_sh1_w,0x00ff) |
| 1008 | 1075 | ADDRESS_MAP_END |
| 1009 | 1076 | |
| 1010 | 1077 | |
| r21196 | r21197 | |
|---|
| 1469 | 1536 | static const scsp_interface scsp2_interface = |
| 1470 | 1537 | { |
| 1471 | 1538 | 0, |
| 1472 | | NULL |
| 1539 | NULL, |
| 1540 | DEVCB_DRIVER_LINE_MEMBER(coolridr_state, scsp_to_main_irq) |
| 1473 | 1541 | }; |
| 1474 | 1542 | |
| 1475 | 1543 | #define MAIN_CLOCK XTAL_28_63636MHz |